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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-328713b0451sm1759033eec.16.2026.08.27.23.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 23:00:39 -0700 (PDT) From: Qiang Yu Date: Thu, 27 Aug 2026 23:00:33 -0700 Subject: [PATCH v4 1/4] dt-bindings: clock: qcom: Move x1e80100 TCSR to own binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-hamoa_tcsr_qref_0826-v4-1-663c9d30468d@oss.qualcomm.com> References: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> In-Reply-To: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio Cc: Qiang Yu , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787896837; l=5301; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=PKv6mMi7V8bziM8kz/nBz/UZlKW+5RA3VoFJbhSl3m4=; b=62827RoEitkPq2El2VR/nsvzINQBORrcSs7lWoMjwnc2W9uZfzQ/ODmLHKqSedoPCVqgfDgDq Vr+99bG17pvDHU7/bGsDKrNQKD26xYnvGWIfWe/RM4QQzQBnKPeIo7q X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Proofpoint-GUID: i5H_jta_0_cacVZ-4PoIBr_tnrLvMV_x X-Proofpoint-ORIG-GUID: i5H_jta_0_cacVZ-4PoIBr_tnrLvMV_x X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfX2gGNT7YiWBg4 kZ1YAznR2M+01hGQ5+FhM4ZusrqKAmv9wa3vJH+aX/fh8TZ1jsDRy5ogtDinBUKHEoGlrWJ/JMT oAPz5uX2jDZoaazOhBvnh/RMUlbC3PDm6Nf3Orai7e/0KHv3P+GSjEmheYXFmqY9/MDNlkp0rEB Pz7hikWVp7yFQZWXrk4eu7YDPF5RbHTXuT8hxUU01exDGSj4Kxj/sOFmg++StG2Cz0GoMfl3hEK a09ipOw5cwXf6z+9v+OO3dxJlq2POq0u64EgaUjBEeD8LS83pNFWiYjqhd4ZJRLReZWNPybgAbr 73R5q9Ne6SaFb1Xw3cqcf3EvyCukwvIgElVQWccJWj02LMzjcz0EwbDxgYOU1YtdfjSMtNHXBG+ bJdru4gyfYJhmF0SSWWkelO7whDG1jY/oTmFDK5BIx9WqF/QLqcfAWsAEwxguAoC3PfLMFO1iPg C0QIn9LHzq13MNZ+RsQ== X-Authority-Analysis: v=2.4 cv=Rsn16imK c=1 sm=1 tr=0 ts=6a912409 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=gEfo2CItAAAA:8 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=1jFqek8pW4xovbWQFpAA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfX1PRGORbORjWF WCEgXAoa6tz/lKX3lIhQiQbCaTtkwiolWcdJb/gNvLHdk8veCRIBiU9+JaXZw4aDYlYtScg1Iax bMAPzxuSYhE7QwJ/6KS4BZzst0yvMTc= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-28_01,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608280049 The QREF block supplies reference clocks to PCIe/USB/UFS PHYs and requires dedicated LDO supplies to operate. The digital control interface for QREF (clkref_en registers) resides in TCSR on x1e80100. Since QREF has no dedicated DT node of its own, these supply properties are placed in the TCSR node which acts as the control interface for QREF. These LDOs are required by QREF to provide a stable reference clock, without which the USB/PCIe/eDP PHYs cannot work properly, so the supplies are marked required even though it breaks ABI. TCSR does not act as a reset provider on x1e80100: no driver has ever registered a reset controller for it, and no consumer references it as a reset, so #reset-cells is dropped entirely rather than documented. Add a dedicated binding file for qcom,x1e80100-tcsr and document the supply properties. Signed-off-by: Qiang Yu Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/qcom,sm8550-tcsr.yaml | 1 - .../bindings/clock/qcom,x1e80100-tcsr.yaml | 114 +++++++++++++++++= ++++ 2 files changed, 114 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml = b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml index 1f3332275c17..f199655790da 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -36,7 +36,6 @@ properties: - qcom,sm8550-tcsr - qcom,sm8650-tcsr - qcom,sm8750-tcsr - - qcom,x1e80100-tcsr - const: syscon - items: - enum: diff --git a/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yam= l b/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yaml new file mode 100644 index 000000000000..8163c679fc54 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,x1e80100-tcsr.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,x1e80100-tcsr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm TCSR Clock Controller on X1E80100 + +maintainers: + - Bjorn Andersson + - Taniya Das + +description: | + Qualcomm TCSR clock control module provides the clocks on X1E80100 + + See also: + - include/dt-bindings/clock/qcom,x1e80100-tcsr.h + +properties: + compatible: + items: + - enum: + - qcom,x1e80100-tcsr + - const: syscon + + clocks: + items: + - description: TCXO pad clock + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + vdda-qrefrpt0-0p9-supply: true + vdda-qrefrpt1-0p9-supply: true + vdda-qrefrpt2-0p9-supply: true + vdda-qrefrpt3-0p9-supply: true + vdda-qrefrpt4-0p9-supply: true + vdda-qrefrx0-0p9-supply: true + vdda-qrefrx1-0p9-supply: true + vdda-qrefrx2-0p9-supply: true + vdda-qrefrx3-0p9-supply: true + vdda-qrefrx4-0p9-supply: true + vdda-qreftx0-0p9-supply: true + vdda-qreftx0-1p2-supply: true + vdda-qreftx1-0p9-supply: true + vdda-qreftx1-1p2-supply: true + vdda-refgen0-0p9-supply: true + vdda-refgen0-1p2-supply: true + vdda-refgen2-0p9-supply: true + vdda-refgen2-1p2-supply: true + +required: + - compatible + - clocks + - '#clock-cells' + - vdda-qrefrpt0-0p9-supply + - vdda-qrefrpt1-0p9-supply + - vdda-qrefrpt2-0p9-supply + - vdda-qrefrpt3-0p9-supply + - vdda-qrefrpt4-0p9-supply + - vdda-qrefrx0-0p9-supply + - vdda-qrefrx1-0p9-supply + - vdda-qrefrx2-0p9-supply + - vdda-qrefrx3-0p9-supply + - vdda-qrefrx4-0p9-supply + - vdda-qreftx0-0p9-supply + - vdda-qreftx0-1p2-supply + - vdda-qreftx1-0p9-supply + - vdda-qreftx1-1p2-supply + - vdda-refgen0-0p9-supply + - vdda-refgen0-1p2-supply + - vdda-refgen2-0p9-supply + - vdda-refgen2-1p2-supply + +additionalProperties: false + +examples: + - | + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + clock-controller@1fc0000 { + compatible =3D "qcom,x1e80100-tcsr", "syscon"; + reg =3D <0x0 0x1fc0000 0x0 0x30000>; + clocks =3D <&rpmhcc RPMH_CXO_CLK>; + #clock-cells =3D <1>; + vdda-qrefrpt0-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l1a>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1a>; + vdda-qreftx0-0p9-supply =3D <&vreg_l1a>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2a>; + vdda-qreftx1-0p9-supply =3D <&vreg_l1a>; + vdda-qreftx1-1p2-supply =3D <&vreg_l2a>; + vdda-refgen0-0p9-supply =3D <&vreg_l1a>; + vdda-refgen0-1p2-supply =3D <&vreg_l2a>; + vdda-refgen2-0p9-supply =3D <&vreg_l1a>; + vdda-refgen2-1p2-supply =3D <&vreg_l2a>; + }; + }; + +... --=20 2.34.1 From nobody Sat Sep 26 23:53:49 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E93033CAA49 for ; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-328713b0451sm1759033eec.16.2026.08.27.23.00.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 23:00:40 -0700 (PDT) From: Qiang Yu Date: Thu, 27 Aug 2026 23:00:34 -0700 Subject: [PATCH v4 2/4] clk: qcom: tcsrcc-x1e80100: Migrate to clk_ref helper Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-hamoa_tcsr_qref_0826-v4-2-663c9d30468d@oss.qualcomm.com> References: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> In-Reply-To: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio Cc: Qiang Yu , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Abel Vesa X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787896837; l=12513; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=tElI37nrURGsXExW6LrMpMh8iriigV4g+ArjmBAGwbw=; b=bcxPtFYb7VS6T9aKQQIbK1iBl5y0axr6XD5wceqihvw+ni7sfyAUsm830lx/pka8JerFd1oyN Phbnl0SdT8fATrCv6NIUlue1OEOcpuVut/ldKUfHwMdAsg0UMFjSHEc X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Authority-Analysis: v=2.4 cv=ZbMt8MVA c=1 sm=1 tr=0 ts=6a91240b cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=48_MYvKuBCZC4ZtyZX0A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: L7DNbfXAWRBlR5mUntKEL5Wqungv36og X-Proofpoint-GUID: L7DNbfXAWRBlR5mUntKEL5Wqungv36og X-Proofpoint-Spam-Info: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfX/FBrBsG6zB2M pggIGMuApNezFuj3Q9gNIHteRsvQhn1r+Zzpb+6qlR6RxguFBUS+ssU6PqmdAB4lZCBSWLAIm4s 6VS0pkD9YNjtMygxTfPzRGaulLTtC54= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfXyaEFkiyBElb7 bSsmmnNDHFU0UFoDKJsW9SdhmsJZrs/W8AfW4mD9In4TrhqDvKp99hfDmjd4mEpdBl9b+siPoBx AaPSBNthmCSgD2+EDSNoWy4BO3akQ0JCw7SCjg0YyCK1OEI+TDoykpMg8MhVRxwWXlmJB5VN1BC X8FCQpIlRdZNYkgu91k4RRiNLh2EyD+TgJ08P/Mpzl/a7BHy/A3nQZ6lqWm6cpj/iNlfB6Iajfu Bder9lYdai14KLi1lf9nfMehzSjBBRHMGVqHCyQBaYIDjZ6IvZUgbG3Epd5+tCx/PYQBYsVgoU5 xSW1xrTv0rx887TQRaWIfPt0PZx+9jKzbUVKxgUe8xcGwGh3RYGs55186EVGH3iMZtaMeAwZ0tb rcsy88Pkr8xaMVWp0NLeEJDdevv+73B4xvnZHNENEquC/zxHAfRE7un61VcTM+k/Lqd4sou2+zU KCqGtZqxV/mE0s7/lzA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-28_01,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 adultscore=0 malwarescore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608280049 Replace local clk_branch-based clkref definitions with descriptor-based registration via qcom_clk_ref_probe(). This keeps the x1e80100 driver focused on clock metadata and reuses common runtime logic for regulator handling, enable/disable sequencing, and OF provider wiring. Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa Signed-off-by: Qiang Yu --- drivers/clk/qcom/tcsrcc-x1e80100.c | 335 +++++++++++++--------------------= ---- 1 file changed, 113 insertions(+), 222 deletions(-) diff --git a/drivers/clk/qcom/tcsrcc-x1e80100.c b/drivers/clk/qcom/tcsrcc-x= 1e80100.c index 0b05c27b619b..ad1f6be83a53 100644 --- a/drivers/clk/qcom/tcsrcc-x1e80100.c +++ b/drivers/clk/qcom/tcsrcc-x1e80100.c @@ -5,252 +5,141 @@ */ =20 #include +#include #include +#include #include #include =20 #include =20 -#include "clk-branch.h" -#include "clk-regmap.h" -#include "common.h" -#include "reset.h" - -enum { - DT_BI_TCXO_PAD, +static const char * const x1e80100_tcsr_tx1_rpt0_rx0_regulators[] =3D { + "vdda-refgen0-0p9", + "vdda-refgen0-1p2", + "vdda-qreftx1-0p9", + "vdda-qreftx1-1p2", + "vdda-qrefrpt0-0p9", + "vdda-qrefrx0-0p9", }; =20 -static struct clk_branch tcsr_edp_clkref_en =3D { - .halt_reg =3D 0x15130, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15130, - .enable_mask =3D BIT(0), - .hw.init =3D &(const struct clk_init_data) { - .name =3D "tcsr_edp_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, - }, +static const char * const x1e80100_tcsr_tx1_rpt1_rx1_regulators[] =3D { + "vdda-refgen0-0p9", + "vdda-refgen0-1p2", + "vdda-qreftx1-0p9", + "vdda-qreftx1-1p2", + "vdda-qrefrpt1-0p9", + "vdda-qrefrx1-0p9", }; =20 -static struct clk_branch tcsr_pcie_2l_4_clkref_en =3D { - .halt_reg =3D 0x15100, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15100, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_pcie_2l_4_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, - }, +static const char * const x1e80100_tcsr_tx1_rpt12_rx2_regulators[] =3D { + "vdda-refgen0-0p9", + "vdda-refgen0-1p2", + "vdda-qreftx1-0p9", + "vdda-qreftx1-1p2", + "vdda-qrefrpt1-0p9", + "vdda-qrefrpt2-0p9", + "vdda-qrefrx2-0p9", }; =20 -static struct clk_branch tcsr_pcie_2l_5_clkref_en =3D { - .halt_reg =3D 0x15104, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15104, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_pcie_2l_5_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, - }, +static const char * const x1e80100_tcsr_tx0_rpt3_rx3_regulators[] =3D { + "vdda-refgen2-0p9", + "vdda-refgen2-1p2", + "vdda-qreftx0-0p9", + "vdda-qreftx0-1p2", + "vdda-qrefrpt3-0p9", + "vdda-qrefrx3-0p9", }; =20 -static struct clk_branch tcsr_pcie_8l_clkref_en =3D { - .halt_reg =3D 0x15108, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15108, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_pcie_8l_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, - }, +static const char * const x1e80100_tcsr_tx0_rpt4_rx4_regulators[] =3D { + "vdda-refgen2-0p9", + "vdda-refgen2-1p2", + "vdda-qreftx0-0p9", + "vdda-qreftx0-1p2", + "vdda-qrefrpt4-0p9", + "vdda-qrefrx4-0p9", }; =20 -static struct clk_branch tcsr_usb3_mp0_clkref_en =3D { - .halt_reg =3D 0x1510c, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x1510c, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb3_mp0_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, - }, +static const struct regmap_config tcsr_cc_x1e80100_regmap_config =3D { + .reg_bits =3D 32, + .reg_stride =3D 4, + .val_bits =3D 32, + .max_register =3D 0x2f000, + .fast_io =3D true, }; =20 -static struct clk_branch tcsr_usb3_mp1_clkref_en =3D { - .halt_reg =3D 0x15110, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15110, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb3_mp1_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, +static const struct qcom_clk_ref_desc * const tcsr_cc_x1e80100_clk_descs[]= =3D { + [TCSR_EDP_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_edp_clkref_en", + .offset =3D 0x15130, + .regulator_names =3D x1e80100_tcsr_tx0_rpt3_rx3_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt3_rx3_regulators), }, -}; - -static struct clk_branch tcsr_usb2_1_clkref_en =3D { - .halt_reg =3D 0x15114, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15114, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb2_1_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_PCIE_2L_4_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_pcie_2l_4_clkref_en", + .offset =3D 0x15100, + .regulator_names =3D x1e80100_tcsr_tx1_rpt1_rx1_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt1_rx1_regulators), }, -}; - -static struct clk_branch tcsr_ufs_phy_clkref_en =3D { - .halt_reg =3D 0x15118, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15118, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_ufs_phy_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_PCIE_2L_5_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_pcie_2l_5_clkref_en", + .offset =3D 0x15104, + .regulator_names =3D x1e80100_tcsr_tx1_rpt12_rx2_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt12_rx2_regulators), }, -}; - -static struct clk_branch tcsr_usb4_1_clkref_en =3D { - .halt_reg =3D 0x15120, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15120, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb4_1_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_PCIE_8L_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_pcie_8l_clkref_en", + .offset =3D 0x15108, + .regulator_names =3D x1e80100_tcsr_tx1_rpt0_rx0_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt0_rx0_regulators), }, -}; - -static struct clk_branch tcsr_usb4_2_clkref_en =3D { - .halt_reg =3D 0x15124, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15124, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb4_2_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_USB3_MP0_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb3_mp0_clkref_en", + .offset =3D 0x1510c, + .regulator_names =3D x1e80100_tcsr_tx1_rpt0_rx0_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt0_rx0_regulators), }, -}; - -static struct clk_branch tcsr_usb2_2_clkref_en =3D { - .halt_reg =3D 0x15128, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x15128, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_usb2_2_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_USB3_MP1_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb3_mp1_clkref_en", + .offset =3D 0x15110, + .regulator_names =3D x1e80100_tcsr_tx1_rpt0_rx0_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt0_rx0_regulators), }, -}; - -static struct clk_branch tcsr_pcie_4l_clkref_en =3D { - .halt_reg =3D 0x1512c, - .halt_check =3D BRANCH_HALT_DELAY, - .clkr =3D { - .enable_reg =3D 0x1512c, - .enable_mask =3D BIT(0), - .hw.init =3D &(struct clk_init_data){ - .name =3D "tcsr_pcie_4l_clkref_en", - .parent_data =3D &(const struct clk_parent_data){ - .index =3D DT_BI_TCXO_PAD, - }, - .num_parents =3D 1, - .ops =3D &clk_branch2_ops, - }, + [TCSR_USB2_1_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb2_1_clkref_en", + .offset =3D 0x15114, + .regulator_names =3D x1e80100_tcsr_tx0_rpt3_rx3_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt3_rx3_regulators), + }, + [TCSR_UFS_PHY_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_ufs_phy_clkref_en", + .offset =3D 0x15118, + .regulator_names =3D x1e80100_tcsr_tx1_rpt12_rx2_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx1_rpt12_rx2_regulators), + }, + [TCSR_USB4_1_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb4_1_clkref_en", + .offset =3D 0x15120, + .regulator_names =3D x1e80100_tcsr_tx0_rpt4_rx4_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt4_rx4_regulators), + }, + [TCSR_USB4_2_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb4_2_clkref_en", + .offset =3D 0x15124, + .regulator_names =3D x1e80100_tcsr_tx0_rpt3_rx3_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt3_rx3_regulators), + }, + [TCSR_USB2_2_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_usb2_2_clkref_en", + .offset =3D 0x15128, + .regulator_names =3D x1e80100_tcsr_tx0_rpt3_rx3_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt3_rx3_regulators), + }, + [TCSR_PCIE_4L_CLKREF_EN] =3D &(const struct qcom_clk_ref_desc) { + .name =3D "tcsr_pcie_4l_clkref_en", + .offset =3D 0x1512c, + .regulator_names =3D x1e80100_tcsr_tx0_rpt4_rx4_regulators, + .num_regulators =3D ARRAY_SIZE(x1e80100_tcsr_tx0_rpt4_rx4_regulators), }, -}; - -static struct clk_regmap *tcsr_cc_x1e80100_clocks[] =3D { - [TCSR_EDP_CLKREF_EN] =3D &tcsr_edp_clkref_en.clkr, - [TCSR_PCIE_2L_4_CLKREF_EN] =3D &tcsr_pcie_2l_4_clkref_en.clkr, - [TCSR_PCIE_2L_5_CLKREF_EN] =3D &tcsr_pcie_2l_5_clkref_en.clkr, - [TCSR_PCIE_8L_CLKREF_EN] =3D &tcsr_pcie_8l_clkref_en.clkr, - [TCSR_USB3_MP0_CLKREF_EN] =3D &tcsr_usb3_mp0_clkref_en.clkr, - [TCSR_USB3_MP1_CLKREF_EN] =3D &tcsr_usb3_mp1_clkref_en.clkr, - [TCSR_USB2_1_CLKREF_EN] =3D &tcsr_usb2_1_clkref_en.clkr, - [TCSR_UFS_PHY_CLKREF_EN] =3D &tcsr_ufs_phy_clkref_en.clkr, - [TCSR_USB4_1_CLKREF_EN] =3D &tcsr_usb4_1_clkref_en.clkr, - [TCSR_USB4_2_CLKREF_EN] =3D &tcsr_usb4_2_clkref_en.clkr, - [TCSR_USB2_2_CLKREF_EN] =3D &tcsr_usb2_2_clkref_en.clkr, - [TCSR_PCIE_4L_CLKREF_EN] =3D &tcsr_pcie_4l_clkref_en.clkr, -}; - -static const struct regmap_config tcsr_cc_x1e80100_regmap_config =3D { - .reg_bits =3D 32, - .reg_stride =3D 4, - .val_bits =3D 32, - .max_register =3D 0x2f000, - .fast_io =3D true, -}; - -static const struct qcom_cc_desc tcsr_cc_x1e80100_desc =3D { - .config =3D &tcsr_cc_x1e80100_regmap_config, - .clks =3D tcsr_cc_x1e80100_clocks, - .num_clks =3D ARRAY_SIZE(tcsr_cc_x1e80100_clocks), }; =20 static const struct of_device_id tcsr_cc_x1e80100_match_table[] =3D { @@ -261,7 +150,9 @@ MODULE_DEVICE_TABLE(of, tcsr_cc_x1e80100_match_table); =20 static int tcsr_cc_x1e80100_probe(struct platform_device *pdev) { - return qcom_cc_probe(pdev, &tcsr_cc_x1e80100_desc); + return qcom_clk_ref_probe(pdev, &tcsr_cc_x1e80100_regmap_config, + tcsr_cc_x1e80100_clk_descs, + ARRAY_SIZE(tcsr_cc_x1e80100_clk_descs)); } =20 static struct platform_driver tcsr_cc_x1e80100_driver =3D { --=20 2.34.1 From nobody Sat Sep 26 23:53:49 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67DBF3CB56E for ; Fri, 28 Aug 2026 06:00:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787896848; 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Drop the stale #reset-cells property to match the qcom,x1e80100-tcsr binding, which no longer declares it either. Signed-off-by: Qiang Yu Reviewed-by: Abel Vesa Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 8a96ea1bdb9c..7f62c624e4ca 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -3984,7 +3984,6 @@ tcsr: clock-controller@1fc0000 { reg =3D <0 0x01fc0000 0 0x30000>; clocks =3D <&rpmhcc RPMH_CXO_CLK>; #clock-cells =3D <1>; - #reset-cells =3D <1>; }; =20 gpu: gpu@3d00000 { --=20 2.34.1 From nobody Sat Sep 26 23:53:49 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D71F33CAE75 for ; Fri, 28 Aug 2026 06:00:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-328713b0451sm1759033eec.16.2026.08.27.23.00.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 23:00:44 -0700 (PDT) From: Qiang Yu Date: Thu, 27 Aug 2026 23:00:36 -0700 Subject: [PATCH v4 4/4] arm64: dts: qcom: hamoa/purwa: Add QREF regulator supplies Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260827-hamoa_tcsr_qref_0826-v4-4-663c9d30468d@oss.qualcomm.com> References: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> In-Reply-To: <20260827-hamoa_tcsr_qref_0826-v4-0-663c9d30468d@oss.qualcomm.com> To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Konrad Dybcio Cc: Qiang Yu , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787896837; l=26299; i=qiang.yu@oss.qualcomm.com; s=20250513; h=from:subject:message-id; bh=+zdu2cxP8YznBKROeajXYhCB3Wu23IRXkP3hcEUlxDM=; b=kuVKs1k5HsU7FedLsM8n4IGvUI7PoL1yM/Am+xEXWzehChGg19ngwaxOXl1MlUMTPXAm6kIhE +TPEvpuMJwjCR1afG1EX2CFUCl5n+D2a69iZtjR/qOWwtYIgux9jk/F X-Developer-Key: i=qiang.yu@oss.qualcomm.com; a=ed25519; pk=Rr94t+fykoieF1ngg/bXxEfr5KoQxeXPtYxM8fBQTAI= X-Proofpoint-GUID: 8LVaBB12LdB0nOLOYAymYr28M8NnAGt1 X-Proofpoint-ORIG-GUID: 8LVaBB12LdB0nOLOYAymYr28M8NnAGt1 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfX6EDfBHDczbYh ATIAGUBPYlL1/HBnicOLrpKW3FjC5R0x0EtBwjv1iNI42p0G+Wfh4ds7b0nK48kF48EgS35zlK8 3iDCuFls9eSfJ0KcBGj51ClUDbWt82+zs/hHsSGe91JSV4oDqSzxkVhcc4YuR7Pdy2RICdDDzTd x0QUaTlRRyyanh4HLFq3VxFx889po2RJmNbm5mZlB2yZfH39ucEh0bztmqBLjNcAYjP9MWQOWxm sEQpfshLYrIhUm+wLSw7hcEiTHvxY98rzlL/kPrKF5mO091svTp9DlvQBfSdn5ZgW/SedcTf91W Zx68si0nFE8G31HJFB3DH36mHJ1047zp/z1QNstPx0cARXQ7jEOfePmNIt82FFaQlGe2+aBvXBP YMVXSjypsmSS8VuV6tyw1nAiV+4tGCAy7VN9xjcYhEiyxi+oAcWFFgGIYFHwi8IHTjPbSl+qo0h TJhrwfDInwG42D2cutg== X-Authority-Analysis: v=2.4 cv=Rsn16imK c=1 sm=1 tr=0 ts=6a91240f cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=4vDcivUYQOVtOqHL04gA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODI4MDA0OSBTYWx0ZWRfXyTLggGJeP5py mJfJWIKTMz1Qi73mu72yf8t/3u8OSdE4Zojy22z2os81bebHvbzr/P9vPbXh/z9Pv3Gn7150Nl6 R8tx8bwMbRNrZKWB7WL2r2s5cOe1hUE= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-28_01,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608280049 Wire up the LDO supplies required by the QREF and refgen blocks on Purwa and Hamoa boards. Purwa's QREF topology is same as Hamoa's, so it reuses the same qcom,x1e80100-tcsr compatible and supply set rather than needing a dedicated one. Reviewed-by: Abel Vesa Signed-off-by: Qiang Yu --- arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 21 +++++++++++++++++= ++++ .../qcom/hamoa-lenovo-ideacentre-mini-01q8x10.dts | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/purwa-iot-som.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-asus-vivobook-s15.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-crd.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 21 +++++++++++++++++= ++++ .../dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi | 21 +++++++++++++++++= ++++ .../boot/dts/qcom/x1e80100-dell-xps13-9345.dts | 21 +++++++++++++++++= ++++ .../dts/qcom/x1e80100-honor-magicbook-art-14.dts | 21 +++++++++++++++++= ++++ .../boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 21 +++++++++++++++++= ++++ .../dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts | 21 +++++++++++++++++= ++++ .../boot/dts/qcom/x1e80100-microsoft-romulus.dtsi | 21 +++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 21 +++++++++++++++++= ++++ .../boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts | 21 +++++++++++++++++= ++++ .../boot/dts/qcom/x1p42100-microsoft-sp12in.dts | 21 +++++++++++++++++= ++++ 19 files changed, 399 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/hamoa-iot-som.dtsi index bc70fe5db96f..f139f3adb933 100644 --- a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi @@ -478,6 +478,27 @@ &remoteproc_cdsp { status =3D "okay"; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>; /* TPM LP & INT */ =20 diff --git a/arch/arm64/boot/dts/qcom/hamoa-lenovo-ideacentre-mini-01q8x10.= dts b/arch/arm64/boot/dts/qcom/hamoa-lenovo-ideacentre-mini-01q8x10.dts index 284825008389..75ce8b0c94d2 100644 --- a/arch/arm64/boot/dts/qcom/hamoa-lenovo-ideacentre-mini-01q8x10.dts +++ b/arch/arm64/boot/dts/qcom/hamoa-lenovo-ideacentre-mini-01q8x10.dts @@ -902,6 +902,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI11 (TPM) */ <76 4>, /* SPI19 (TZ Protected) */ diff --git a/arch/arm64/boot/dts/qcom/purwa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/purwa-iot-som.dtsi index 488e98413c3a..4ef3a5407ce8 100644 --- a/arch/arm64/boot/dts/qcom/purwa-iot-som.dtsi +++ b/arch/arm64/boot/dts/qcom/purwa-iot-som.dtsi @@ -476,6 +476,27 @@ &remoteproc_cdsp { status =3D "okay"; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>; /* TPM LP & INT */ =20 diff --git a/arch/arm64/boot/dts/qcom/x1-asus-vivobook-s15.dtsi b/arch/arm6= 4/boot/dts/qcom/x1-asus-vivobook-s15.dtsi index 0dc7c1b5a14a..6bf12d8f0431 100644 --- a/arch/arm64/boot/dts/qcom/x1-asus-vivobook-s15.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-asus-vivobook-s15.dtsi @@ -1036,6 +1036,27 @@ &smb2360_1_eusb2_repeater { vdd3-supply =3D <&vreg_l14b_3p0>; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi b/arch/arm64= /boot/dts/qcom/x1-asus-zenbook-a14.dtsi index 59cbbfbce490..7b1486469730 100644 --- a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi @@ -1272,6 +1272,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI11, TZ Protected */ <90 1>; /* Unknown, TZ Protected */ diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qco= m/x1-crd.dtsi index 60db83b8985f..ef9c8836c33a 100644 --- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi @@ -1528,6 +1528,27 @@ right_tweeter: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/= dts/qcom/x1-dell-thena.dtsi index 4cda708455d8..2ebb42906c9b 100644 --- a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi @@ -1301,6 +1301,27 @@ right_tweeter: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI11 (TPM) */ <76 4>, /* SPI19 (TZ Protected) */ diff --git a/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi b/arch/arm64/= boot/dts/qcom/x1-hp-omnibook-x14.dtsi index dba8cee43e29..6b4b17acc069 100644 --- a/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi @@ -1284,6 +1284,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi b/arch/arm64= /boot/dts/qcom/x1-microsoft-denali.dtsi index ce7d958ca687..db4bffe486c0 100644 --- a/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi @@ -1107,6 +1107,27 @@ right_spkr: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI (TPM) */ <238 1>; /* UFS Reset */ diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot= /dts/qcom/x1e001de-devkit.dts index be1a8ac8c699..21303340a530 100644 --- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts @@ -1193,6 +1193,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>; /* SPI (TPM) */ =20 diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/= arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi index 0bee2a3d6e7a..75ad74bcb042 100644 --- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi @@ -1382,6 +1382,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/a= rm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts index 2be5a37c00cc..ad62350ba670 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts @@ -1069,6 +1069,27 @@ &smb2360_1_eusb2_repeater { vdd3-supply =3D <&vreg_l14b_3p0>; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI11 (TPM) */ <76 4>, /* SPI19 (TZ Protected) */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-honor-magicbook-art-14.dts b= /arch/arm64/boot/dts/qcom/x1e80100-honor-magicbook-art-14.dts index b70c1e094bbf..603f6d7717f3 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-honor-magicbook-art-14.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-honor-magicbook-art-14.dts @@ -1066,6 +1066,27 @@ right_tweeter: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>; /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arc= h/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts index 9eb2dfd99f20..2692e48537aa 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts @@ -1347,6 +1347,27 @@ right_tweeter: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts b/= arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts index e4a0b86847cd..039f68807376 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts @@ -1248,6 +1248,27 @@ right_tweeter: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p9>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <28 4>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arc= h/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi index 13d0f09e0c2a..9f45ad9305e8 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi @@ -1322,6 +1322,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j>; +}; + &tlmm { gpio-reserved-ranges =3D <44 4>, /* SPI (TPM) */ <238 1>; /* UFS Reset */ diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dt= s/qcom/x1e80100-qcp.dts index 78380fec8839..9d4fa442d158 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts @@ -1177,6 +1177,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <33 3>, /* Unused */ <44 4>, /* SPI (TPM) */ diff --git a/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts b/ar= ch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts index c2f21fcb1b09..8891ad6188ed 100644 --- a/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts +++ b/arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts @@ -1325,6 +1325,27 @@ wcd_tx: codec@0,3 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <72 2>; /* Secure EC I2C connection (?) */ diff --git a/arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts b/arch/= arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts index 0314b2246cdb..edcb6b99a384 100644 --- a/arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts +++ b/arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts @@ -968,6 +968,27 @@ right_spkr: speaker@0,1 { }; }; =20 +&tcsr { + vdda-qrefrpt0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrpt1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrpt3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrpt4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qrefrx0-0p9-supply =3D <&vreg_l3c_0p8>; + vdda-qrefrx1-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx2-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-qrefrx3-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qrefrx4-0p9-supply =3D <&vreg_l1d_0p8>; + vdda-qreftx0-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx0-1p2-supply =3D <&vreg_l2j_1p2>; + vdda-qreftx1-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-qreftx1-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen0-0p9-supply =3D <&vreg_l3i_0p8>; + vdda-refgen0-1p2-supply =3D <&vreg_l3e_1p2>; + vdda-refgen2-0p9-supply =3D <&vreg_l3j_0p8>; + vdda-refgen2-1p2-supply =3D <&vreg_l2j_1p2>; +}; + &tlmm { gpio-reserved-ranges =3D <34 2>, /* Unused */ <44 4>; /* SPI (TPM) */ --=20 2.34.1