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Wed, 26 Aug 2026 07:53:05 -0700 (PDT) From: Andrew Jones To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: jgg@ziepe.ca, kevin.tian@intel.com, robin.murphy@arm.com, joro@8bytes.org, will@kernel.org Subject: [RFC PATCH v1 1/8] iommu/dma: Prepare MSI physical address lists Date: Wed, 26 Aug 2026 16:52:55 +0200 Message-ID: <20260826145302.449904-2-andrew.jones@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260826145302.449904-1-andrew.jones@oss.qualcomm.com> References: <20260826145302.449904-1-andrew.jones@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: eI355BNQ_TOmzmawL_tR6eb4L9ujopQz X-Proofpoint-Spam-Info: AW1haW4tMjYwODI2MDEyNCBTYWx0ZWRfX7m6w2j6xNNDt nM1zH3AAlizA+GJXbHyn2R4YuwCsjfu5HRAu4ZbsaEaB/Xnd+B59iogI/hnzbEWVV/YlRer9CiA D3k7wGd5rNX0MBw2yqF07be2sOLE2hk= X-Proofpoint-GUID: eI355BNQ_TOmzmawL_tR6eb4L9ujopQz X-Authority-Analysis: v=2.4 cv=SoCgLvO0 c=1 sm=1 tr=0 ts=6a8efdd4 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=CzrpMg+lqiTzknPDBj2tlw==:17 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=kJPfLSheDWDr1nFXzE0A:9 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI2MDEyNCBTYWx0ZWRfX9gymkCFvnBOb jV/ngTV4xTUOiiGmy32R69wOjzcvF5xKGeNkPlUbvPQ4qzzizGUep4GQ/f3hT6+MGKD9QtmQl6Z Nrjj/2nXw0lJCTV6KgROnWuVXJxPJPAHVfynOdIGPYUAiwBNBj7kILbBHTn5WuywFIRlsloiWsw M1pML9P+7RObGC4M/7v14ABxP/eUV5+Z6BIwDV89bpdQ45pQG5ZsYAxPYu0jCmJ9DkZhYYn3jw+ tkUXkVDw3gWBvxmsn4hmEe5on2iMPWYK6MHFMeNalZgXpcEIr56oCZdaCWocuY9EMWuNBW4c8Kf k1eFaHdEtWY6rNT9CUt4rT/nPpGUWe9zjHBOfesK5f2IxPVKJszSCL58KmC8Y49GIb+yq6u18EP tfvcp+RkQiNjgiYObVkIgqDGyaoM7OZb6EeaTSpi5ERAZG88njcxwyWRMWdBG+pwHcdggf3f1yy /Pf/Z6v9ZGylsZyyAwA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-26_04,2026-08-26_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 malwarescore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608260124 Content-Type: text/plain; charset="utf-8" Software MSI mappings may cover an ordered list of physical addresses which must be mapped into one contiguous IOVA range. Extend the internal DMA-IOMMU mapping helpers to accept an address array, address count, and required mapping granule. Teach iommu_dma_get_msi_page() to map the list into one contiguous IOVA allocation. Keep the existing per-page cache entries and mark the first entry with the size of the allocation so an identical list can reuse the mapping without changing the existing cache representation. This prepares for the forthcoming iommu_dma_prepare_msi_list() API. Signed-off-by: Andrew Jones --- drivers/iommu/dma-iommu.c | 115 ++++++++++++++++++++++++++++---------- 1 file changed, 87 insertions(+), 28 deletions(-) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 9a07eb39336e..c256531ff19f 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -42,6 +42,7 @@ struct iommu_dma_msi_page { struct list_head list; dma_addr_t iova; phys_addr_t phys; + size_t range_size; /* IOVA range size, or 0 if not the first map */ }; =20 enum iommu_dma_queue_type { @@ -481,7 +482,7 @@ static int cookie_init_hw_msi_region(struct iommu_dma_c= ookie *cookie, num_pages =3D iova_align(iovad, end - start) >> iova_shift(iovad); =20 for (i =3D 0; i < num_pages; i++) { - msi_page =3D kmalloc_obj(*msi_page); + msi_page =3D kzalloc_obj(*msi_page); if (!msi_page) return -ENOMEM; =20 @@ -2196,15 +2197,41 @@ static struct list_head *cookie_msi_pages(const str= uct iommu_domain *domain) } } =20 +static bool iommu_dma_msi_range_matches(struct list_head *msi_page_list, + const struct iommu_dma_msi_page *base_page, + const phys_addr_t *phys_addrs, + unsigned int nr_addrs, size_t granule) +{ + const struct iommu_dma_msi_page *msi_page; + unsigned int nr_found =3D 0; + dma_addr_t offset; + + list_for_each_entry(msi_page, msi_page_list, list) { + if (msi_page->iova < base_page->iova) + continue; + offset =3D msi_page->iova - base_page->iova; + if (offset >=3D base_page->range_size) + continue; + if (!IS_ALIGNED(offset, granule) || msi_page->phys !=3D phys_addrs[offse= t / granule]) + return false; + nr_found++; + } + + return nr_found =3D=3D nr_addrs; +} + static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *de= v, - phys_addr_t msi_addr, struct iommu_domain *domain) + const phys_addr_t *phys_addrs, unsigned int nr_addrs, size_t granule, + struct iommu_domain *domain) { struct list_head *msi_page_list =3D cookie_msi_pages(domain); - struct iommu_dma_msi_page *msi_page; - dma_addr_t iova; + struct iommu_dma_msi_page *msi_page, *first_page =3D NULL; int prot =3D IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; - size_t size =3D cookie_msi_granule(domain); static DEFINE_MUTEX(msi_prepare_lock); + LIST_HEAD(new_msi_pages); + dma_addr_t base_iova; + unsigned int i; + size_t size; =20 /* * Normally a device's default domain is only ever attached to that @@ -2218,32 +2245,60 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi= _page(struct device *dev, */ guard(mutex)(&msi_prepare_lock); =20 - msi_addr &=3D ~(phys_addr_t)(size - 1); - list_for_each_entry(msi_page, msi_page_list, list) - if (msi_page->phys =3D=3D msi_addr) + if (!nr_addrs || nr_addrs > SIZE_MAX / granule) + return NULL; + size =3D nr_addrs * granule; + + list_for_each_entry(msi_page, msi_page_list, list) { + if (msi_page->phys !=3D phys_addrs[0]) + continue; + if (nr_addrs =3D=3D 1) + return msi_page; + if (msi_page->range_size =3D=3D size && + iommu_dma_msi_range_matches(msi_page_list, msi_page, phys_addrs, + nr_addrs, granule)) return msi_page; + } =20 - msi_page =3D kzalloc_obj(*msi_page); - if (!msi_page) - return NULL; + for (i =3D 0; i < nr_addrs; i++) { + msi_page =3D kzalloc_obj(*msi_page); + if (!msi_page) + goto out_free_pages; + list_add_tail(&msi_page->list, &new_msi_pages); + } =20 - iova =3D iommu_dma_alloc_iova(domain, size, dma_get_mask(dev), dev); - if (!iova) - goto out_free_page; + base_iova =3D iommu_dma_alloc_iova(domain, size, dma_get_mask(dev), dev); + if (!base_iova) + goto out_free_pages; =20 - if (iommu_map(domain, iova, msi_addr, size, prot, GFP_KERNEL)) - goto out_free_iova; + i =3D 0; + list_for_each_entry(msi_page, &new_msi_pages, list) { + msi_page->phys =3D phys_addrs[i]; + msi_page->iova =3D base_iova + i * granule; + if (!i) + first_page =3D msi_page; + if (iommu_map(domain, msi_page->iova, msi_page->phys, granule, prot, GFP= _KERNEL)) + goto out_unmap; + i++; + } =20 - INIT_LIST_HEAD(&msi_page->list); - msi_page->phys =3D msi_addr; - msi_page->iova =3D iova; - list_add(&msi_page->list, msi_page_list); - return msi_page; + first_page->range_size =3D size; + list_splice(&new_msi_pages, msi_page_list); + return first_page; =20 -out_free_iova: - iommu_dma_free_iova(domain, iova, size, NULL); -out_free_page: - kfree(msi_page); +out_unmap: + if (i) { + size_t unmap =3D iommu_unmap(domain, base_iova, i * granule); + + WARN_ON_ONCE(unmap !=3D i * granule); + } + iommu_dma_free_iova(domain, base_iova, size, NULL); +out_free_pages: + while (!list_empty(&new_msi_pages)) { + msi_page =3D list_first_entry(&new_msi_pages, typeof(*msi_page), list); + list_del(&msi_page->list); + kfree(msi_page); + } return NULL; } =20 @@ -2252,19 +2307,23 @@ int iommu_dma_sw_msi(struct iommu_domain *domain, s= truct msi_desc *desc, { struct device *dev =3D msi_desc_to_dev(desc); const struct iommu_dma_msi_page *msi_page; + phys_addr_t phys_addr; + size_t granule; =20 if (!has_msi_cookie(domain)) { msi_desc_set_iommu_msi_iova(desc, 0, 0); return 0; } =20 + granule =3D cookie_msi_granule(domain); + phys_addr =3D ALIGN_DOWN(msi_addr, granule); + iommu_group_mutex_assert(dev); - msi_page =3D iommu_dma_get_msi_page(dev, msi_addr, domain); + msi_page =3D iommu_dma_get_msi_page(dev, &phys_addr, 1, granule, domain); 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charset="utf-8" struct iommufd_sw_msi_maps uses a fixed 64-bit bitmap, limiting each group and hardware page table to 64 software MSI mappings. RISC-V interrupt remapping needs a mapping for every possible CPU, so this limit is insufficient. Make the bitmap grow on demand and treat IDs beyond its current size as absent. Cap it at 16K entries to bound allocation size while leaving ample room for expected software MSI users. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/device.c | 3 +- drivers/iommu/iommufd/driver.c | 37 ++++++++++++++-------- drivers/iommu/iommufd/hw_pagetable.c | 1 + drivers/iommu/iommufd/iommufd_private.h | 41 +++++++++++++++++++++++-- 4 files changed, 66 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index d488c23fd353..868f1e591208 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -34,6 +34,7 @@ static void iommufd_group_release(struct kref *kref) NULL, GFP_KERNEL); iommu_group_put(igroup->group); mutex_destroy(&igroup->lock); + kfree(igroup->required_sw_msi.bitmap); kfree(igroup); } =20 @@ -384,7 +385,7 @@ static int iommufd_group_setup_msi(struct iommufd_group= *igroup, int rc; =20 if (cur->sw_msi_start !=3D igroup->sw_msi_start || - !test_bit(cur->id, igroup->required_sw_msi.bitmap)) + !iommufd_sw_msi_maps_test_bit(&igroup->required_sw_msi, cur->id)) continue; =20 rc =3D iommufd_sw_msi_install(ictx, hwpt_paging, cur); diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 3b8067976eac..d0b05b1fda42 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -196,13 +196,15 @@ iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys= _addr_t msi_addr, list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { if (cur->sw_msi_start !=3D sw_msi_start) continue; + if (cur->pgoff =3D=3D UINT_MAX) + return ERR_PTR(-EOVERFLOW); max_pgoff =3D max(max_pgoff, cur->pgoff + 1); if (cur->msi_addr =3D=3D msi_addr) return cur; } =20 - if (ictx->sw_msi_id >=3D - BITS_PER_BYTE * sizeof_field(struct iommufd_sw_msi_maps, bitmap)) + if (ictx->sw_msi_id > IOMMUFD_SW_MSI_MAX_ID || + max_pgoff > (ULONG_MAX - sw_msi_start) / PAGE_SIZE) return ERR_PTR(-EOVERFLOW); =20 cur =3D kzalloc_obj(*cur); @@ -222,21 +224,25 @@ int iommufd_sw_msi_install(struct iommufd_ctx *ictx, struct iommufd_sw_msi_map *msi_map) { unsigned long iova; + int rc; =20 lockdep_assert_held(&ictx->sw_msi_lock); =20 + if (iommufd_sw_msi_maps_test_bit(&hwpt_paging->present_sw_msi, msi_map->i= d)) + return 0; + iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; - if (!test_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap)) { - int rc; - - rc =3D iommu_map(hwpt_paging->common.domain, iova, - msi_map->msi_addr, PAGE_SIZE, - IOMMU_WRITE | IOMMU_READ | IOMMU_MMIO, - GFP_KERNEL_ACCOUNT); - if (rc) - return rc; - __set_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); - } + rc =3D iommufd_sw_msi_maps_ensure(&hwpt_paging->present_sw_msi, msi_map->= id); + if (rc) + return rc; + + rc =3D iommu_map(hwpt_paging->common.domain, iova, + msi_map->msi_addr, PAGE_SIZE, + IOMMU_WRITE | IOMMU_READ | IOMMU_MMIO, + GFP_KERNEL_ACCOUNT); + if (rc) + return rc; + __set_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); return 0; } EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi_install, "IOMMUFD_INTERNAL"); @@ -290,6 +296,11 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct= msi_desc *desc, if (IS_ERR(msi_map)) return PTR_ERR(msi_map); =20 + rc =3D iommufd_sw_msi_maps_ensure(&handle->idev->igroup->required_sw_msi, + msi_map->id); + if (rc) + return rc; + rc =3D iommufd_sw_msi_install(ictx, hwpt_paging, msi_map); if (rc) return rc; diff --git a/drivers/iommu/iommufd/hw_pagetable.c b/drivers/iommu/iommufd/h= w_pagetable.c index 623cc608ca0c..54873de43eb0 100644 --- a/drivers/iommu/iommufd/hw_pagetable.c +++ b/drivers/iommu/iommufd/hw_pagetable.c @@ -32,6 +32,7 @@ void iommufd_hwpt_paging_destroy(struct iommufd_object *o= bj) } =20 __iommufd_hwpt_destroy(&hwpt_paging->common); + kfree(hwpt_paging->present_sw_msi.bitmap); refcount_dec(&hwpt_paging->ioas->obj.users); } =20 diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommuf= d/iommufd_private.h index 43fbc5bed8de..9ca5f9f92cdf 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -29,11 +30,47 @@ struct iommufd_sw_msi_map { unsigned int id; }; =20 -/* Bitmap of struct iommufd_sw_msi_map::id */ +/* Bitmap of struct iommufd_sw_msi_map::id; starts empty, grows on demand.= */ struct iommufd_sw_msi_maps { - DECLARE_BITMAP(bitmap, 64); + unsigned long *bitmap; + unsigned int nbits; }; =20 +/* Large enough for foreseeable SW MSI users while bounding bitmap growth.= */ +#define IOMMUFD_SW_MSI_MAX_ID (16U * 1024 - 1) + +/* Grow bitmap to accommodate id. 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charset="utf-8" Separate lookup of an existing software MSI mapping from allocation of a new mapping. This prepares the code for allocating multiple mappings for an MSI physical address list. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/driver.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index d0b05b1fda42..3856989f5c4b 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -189,6 +189,23 @@ iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_= addr_t msi_addr, phys_addr_t sw_msi_start) { struct iommufd_sw_msi_map *cur; + + lockdep_assert_held(&ictx->sw_msi_lock); + + list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { + if (cur->sw_msi_start !=3D sw_msi_start) + continue; + if (cur->msi_addr =3D=3D msi_addr) + return cur; + } + return NULL; +} + +static struct iommufd_sw_msi_map * +iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, + phys_addr_t sw_msi_start) +{ + struct iommufd_sw_msi_map *cur; unsigned int max_pgoff =3D 0; =20 lockdep_assert_held(&ictx->sw_msi_lock); @@ -199,8 +216,6 @@ iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_a= ddr_t msi_addr, if (cur->pgoff =3D=3D UINT_MAX) return ERR_PTR(-EOVERFLOW); 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charset="utf-8" Track the start and length of the software MSI reserved region as one range and pass it to the mapping lookup and allocation helpers. Reject cached mappings outside the region and new mappings when no complete page remains. This enforces the reserved region bounds and prepares the helpers to allocate contiguous MSI address lists. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/device.c | 17 +++++++++++------ drivers/iommu/iommufd/driver.c | 21 ++++++++++++--------- drivers/iommu/iommufd/io_pagetable.c | 9 +++++---- drivers/iommu/iommufd/iommufd_private.h | 9 +++++++-- 4 files changed, 35 insertions(+), 21 deletions(-) diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index 868f1e591208..7b83810a1c90 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -97,7 +97,7 @@ static struct iommufd_group *iommufd_get_group(struct iom= mufd_ctx *ictx, kref_init(&new_igroup->ref); mutex_init(&new_igroup->lock); xa_init(&new_igroup->pasid_attach); - new_igroup->sw_msi_start =3D PHYS_ADDR_MAX; + new_igroup->sw_msi_range.start =3D PHYS_ADDR_MAX; /* group reference moves into new_igroup */ new_igroup->group =3D group; =20 @@ -374,7 +374,7 @@ static int iommufd_group_setup_msi(struct iommufd_group= *igroup, struct iommufd_ctx *ictx =3D igroup->ictx; struct iommufd_sw_msi_map *cur; =20 - if (igroup->sw_msi_start =3D=3D PHYS_ADDR_MAX) + if (igroup->sw_msi_range.start =3D=3D PHYS_ADDR_MAX) return 0; =20 /* @@ -384,7 +384,7 @@ static int iommufd_group_setup_msi(struct iommufd_group= *igroup, list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { int rc; =20 - if (cur->sw_msi_start !=3D igroup->sw_msi_start || + if (cur->sw_msi_start !=3D igroup->sw_msi_range.start || !iommufd_sw_msi_maps_test_bit(&igroup->required_sw_msi, cur->id)) continue; =20 @@ -414,18 +414,23 @@ static int iommufd_device_attach_reserved_iova(struct iommufd_device *idev, struct iommufd_hwpt_paging *hwpt_paging) { + struct iommufd_sw_msi_range sw_msi_range =3D { + .start =3D PHYS_ADDR_MAX, + }; struct iommufd_group *igroup =3D idev->igroup; + bool first_attach; int rc; =20 lockdep_assert_held(&igroup->lock); =20 + first_attach =3D iommufd_group_first_attach(igroup, IOMMU_NO_PASID); rc =3D iopt_table_enforce_dev_resv_regions(&hwpt_paging->ioas->iopt, - idev->dev, - &igroup->sw_msi_start); + idev->dev, &sw_msi_range); if (rc) return rc; =20 - if (iommufd_group_first_attach(igroup, IOMMU_NO_PASID)) { + if (first_attach) { + igroup->sw_msi_range =3D sw_msi_range; rc =3D iommufd_group_setup_msi(igroup, hwpt_paging); if (rc) { iopt_remove_reserved_iova(&hwpt_paging->ioas->iopt, diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 3856989f5c4b..8bb47a81fed1 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -186,14 +186,15 @@ EXPORT_SYMBOL_NS_GPL(iommufd_viommu_report_event, "IO= MMUFD"); */ static struct iommufd_sw_msi_map * iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - phys_addr_t sw_msi_start) + const struct iommufd_sw_msi_range *sw_msi_range) { struct iommufd_sw_msi_map *cur; =20 lockdep_assert_held(&ictx->sw_msi_lock); =20 list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { - if (cur->sw_msi_start !=3D sw_msi_start) + if (cur->sw_msi_start !=3D sw_msi_range->start || + cur->pgoff >=3D sw_msi_range->length / PAGE_SIZE) continue; if (cur->msi_addr =3D=3D msi_addr) return cur; @@ -203,7 +204,7 @@ iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_a= ddr_t msi_addr, =20 static struct iommufd_sw_msi_map * iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - phys_addr_t sw_msi_start) + const struct iommufd_sw_msi_range *sw_msi_range) { struct iommufd_sw_msi_map *cur; unsigned int max_pgoff =3D 0; @@ -211,7 +212,7 @@ iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys= _addr_t msi_addr, lockdep_assert_held(&ictx->sw_msi_lock); =20 list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { - if (cur->sw_msi_start !=3D sw_msi_start) + if (cur->sw_msi_start !=3D sw_msi_range->start) continue; if (cur->pgoff =3D=3D UINT_MAX) return ERR_PTR(-EOVERFLOW); @@ -219,14 +220,16 @@ iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, ph= ys_addr_t msi_addr, } =20 if (ictx->sw_msi_id > IOMMUFD_SW_MSI_MAX_ID || - max_pgoff > (ULONG_MAX - sw_msi_start) / PAGE_SIZE) + max_pgoff > (ULONG_MAX - sw_msi_range->start) / PAGE_SIZE) return ERR_PTR(-EOVERFLOW); + if (max_pgoff >=3D sw_msi_range->length / PAGE_SIZE) + return ERR_PTR(-ENOSPC); =20 cur =3D kzalloc_obj(*cur); if (!cur) return ERR_PTR(-ENOMEM); =20 - cur->sw_msi_start =3D sw_msi_start; + cur->sw_msi_start =3D sw_msi_range->start; cur->msi_addr =3D msi_addr; cur->pgoff =3D max_pgoff; cur->id =3D ictx->sw_msi_id++; @@ -295,7 +298,7 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct = msi_desc *desc, =20 handle =3D to_iommufd_handle(raw_handle); /* No IOMMU_RESV_SW_MSI means no change to the msi_msg */ - if (handle->idev->igroup->sw_msi_start =3D=3D PHYS_ADDR_MAX) + if (handle->idev->igroup->sw_msi_range.start =3D=3D PHYS_ADDR_MAX) return 0; =20 ictx =3D handle->idev->ictx; @@ -307,11 +310,11 @@ int iommufd_sw_msi(struct iommu_domain *domain, struc= t msi_desc *desc, */ msi_map =3D iommufd_sw_msi_get_map(handle->idev->ictx, msi_addr & PAGE_MASK, - handle->idev->igroup->sw_msi_start); + &handle->idev->igroup->sw_msi_range); if (!msi_map) msi_map =3D iommufd_sw_msi_alloc_map(handle->idev->ictx, msi_addr & PAGE_MASK, - handle->idev->igroup->sw_msi_start); + &handle->idev->igroup->sw_msi_range); if (IS_ERR(msi_map)) return PTR_ERR(msi_map); =20 diff --git a/drivers/iommu/iommufd/io_pagetable.c b/drivers/iommu/iommufd/i= o_pagetable.c index 24d4917105d9..8bf2554af334 100644 --- a/drivers/iommu/iommufd/io_pagetable.c +++ b/drivers/iommu/iommufd/io_pagetable.c @@ -1501,7 +1501,7 @@ void iopt_remove_access(struct io_pagetable *iopt, /* Narrow the valid_iova_itree to include reserved ranges from a device. */ int iopt_table_enforce_dev_resv_regions(struct io_pagetable *iopt, struct device *dev, - phys_addr_t *sw_msi_start) + struct iommufd_sw_msi_range *sw_msi_range) { struct iommu_resv_region *resv; LIST_HEAD(resv_regions); @@ -1520,10 +1520,11 @@ int iopt_table_enforce_dev_resv_regions(struct io_p= agetable *iopt, if (resv->type =3D=3D IOMMU_RESV_DIRECT_RELAXABLE) continue; =20 - if (sw_msi_start && resv->type =3D=3D IOMMU_RESV_MSI) + if (sw_msi_range && resv->type =3D=3D IOMMU_RESV_MSI) num_hw_msi++; - if (sw_msi_start && resv->type =3D=3D IOMMU_RESV_SW_MSI) { - *sw_msi_start =3D resv->start; + if (sw_msi_range && resv->type =3D=3D IOMMU_RESV_SW_MSI) { + sw_msi_range->start =3D resv->start; + sw_msi_range->length =3D resv->length; num_sw_msi++; } =20 diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommuf= d/iommufd_private.h index 9ca5f9f92cdf..4e2d32809695 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -22,6 +22,11 @@ struct iommu_option; struct iommufd_device; struct dma_buf_attachment; =20 +struct iommufd_sw_msi_range { + phys_addr_t start; + size_t length; +}; + struct iommufd_sw_msi_map { struct list_head sw_msi_item; phys_addr_t sw_msi_start; @@ -171,7 +176,7 @@ void iopt_table_remove_domain(struct io_pagetable *iopt, struct iommu_domain *domain); int iopt_table_enforce_dev_resv_regions(struct io_pagetable *iopt, struct device *dev, - phys_addr_t *sw_msi_start); + struct iommufd_sw_msi_range *sw_msi_range); int iopt_set_allow_iova(struct io_pagetable *iopt, struct rb_root_cached *allowed_iova); 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charset="utf-8" Teach iommufd_sw_msi_get_map() to match an ordered physical address list against an existing contiguous IOVA range. Mark the first map with the range size so an identical list can reuse the allocation. Teach iommufd_sw_msi_alloc_map() to reserve identifiers and offsets for the complete list and build its maps on a temporary list. Keep the existing scalar installation behavior and only publish newly allocated maps after installation succeeds. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/driver.c | 161 ++++++++++++++++++------ drivers/iommu/iommufd/iommufd_private.h | 1 + 2 files changed, 123 insertions(+), 39 deletions(-) diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 8bb47a81fed1..6a0527f4b058 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -179,35 +179,91 @@ EXPORT_SYMBOL_NS_GPL(iommufd_viommu_report_event, "IO= MMUFD"); =20 #ifdef CONFIG_IRQ_MSI_IOMMU /* - * Get a iommufd_sw_msi_map for the msi physical address requested by the = irq + * Get an iommufd_sw_msi_map for the msi physical addresses requested by t= he irq * layer. The mapping to IOVA is global to the iommufd file descriptor, ev= ery * domain that is attached to a device using the same MSI parameters will = use - * the same IOVA. + * the same contiguous IOVA range. */ static struct iommufd_sw_msi_map * -iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - const struct iommufd_sw_msi_range *sw_msi_range) +iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, const phys_addr_t *phys_a= ddrs, + unsigned int nr_addrs, const struct iommufd_sw_msi_range *sw_msi_= range) { - struct iommufd_sw_msi_map *cur; + struct iommufd_sw_msi_map *cur, *msi_map; + unsigned int nr_found; =20 lockdep_assert_held(&ictx->sw_msi_lock); =20 - list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { - if (cur->sw_msi_start !=3D sw_msi_range->start || - cur->pgoff >=3D sw_msi_range->length / PAGE_SIZE) + list_for_each_entry(msi_map, &ictx->sw_msi_list, sw_msi_item) { + if (msi_map->sw_msi_start !=3D sw_msi_range->start || + msi_map->msi_addr !=3D phys_addrs[0]) + continue; + if (msi_map->range_size !=3D nr_addrs * PAGE_SIZE) continue; - if (cur->msi_addr =3D=3D msi_addr) - return cur; + if (msi_map->pgoff > sw_msi_range->length / PAGE_SIZE || + nr_addrs > sw_msi_range->length / PAGE_SIZE - msi_map->pgoff) + continue; + + nr_found =3D 0; + list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { + unsigned int index; + + if (cur->sw_msi_start !=3D sw_msi_range->start || + cur->pgoff < msi_map->pgoff) + continue; + index =3D cur->pgoff - msi_map->pgoff; + if (index >=3D nr_addrs) + continue; + if (cur->msi_addr !=3D phys_addrs[index]) + break; + nr_found++; + } + if (nr_found =3D=3D nr_addrs) + return msi_map; } return NULL; } =20 +static int iommufd_sw_msi_check_alloc(struct iommufd_ctx *ictx, + const struct iommufd_sw_msi_range *sw_msi_range, + unsigned int first_pgoff, unsigned int nr_addrs, + size_t *range_size) +{ + unsigned long max_iova_pgoff; + unsigned int last_pgoff; + unsigned int last_id; + size_t range_pages; + + if (!nr_addrs) + return -EINVAL; + if (sw_msi_range->start > ULONG_MAX) + return -EOVERFLOW; + + range_pages =3D sw_msi_range->length / PAGE_SIZE; + max_iova_pgoff =3D (ULONG_MAX - sw_msi_range->start) / PAGE_SIZE; + + if (check_add_overflow(ictx->sw_msi_id, nr_addrs - 1, &last_id) || + last_id > IOMMUFD_SW_MSI_MAX_ID || + check_add_overflow(first_pgoff, nr_addrs - 1, &last_pgoff) || + last_pgoff > max_iova_pgoff || + check_mul_overflow((size_t)nr_addrs, PAGE_SIZE, range_size)) + return -EOVERFLOW; + + if (last_pgoff >=3D range_pages) + return -ENOSPC; + + return 0; +} + static struct iommufd_sw_msi_map * -iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - const struct iommufd_sw_msi_range *sw_msi_range) +iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, const phys_addr_t *phys= _addrs, + unsigned int nr_addrs, const struct iommufd_sw_msi_range *sw_msi_range, + struct list_head *new_msi_maps) { - struct iommufd_sw_msi_map *cur; - unsigned int max_pgoff =3D 0; + struct iommufd_sw_msi_map *cur, *first_map =3D NULL; + unsigned int next_pgoff =3D 0; + unsigned int i; + size_t size; + int rc; =20 lockdep_assert_held(&ictx->sw_msi_lock); =20 @@ -216,25 +272,38 @@ iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, ph= ys_addr_t msi_addr, continue; if (cur->pgoff =3D=3D UINT_MAX) return ERR_PTR(-EOVERFLOW); - max_pgoff =3D max(max_pgoff, cur->pgoff + 1); + next_pgoff =3D max(next_pgoff, cur->pgoff + 1); } =20 - if (ictx->sw_msi_id > IOMMUFD_SW_MSI_MAX_ID || - max_pgoff > (ULONG_MAX - sw_msi_range->start) / PAGE_SIZE) - return ERR_PTR(-EOVERFLOW); - if (max_pgoff >=3D sw_msi_range->length / PAGE_SIZE) - return ERR_PTR(-ENOSPC); - - cur =3D kzalloc_obj(*cur); - if (!cur) - return ERR_PTR(-ENOMEM); - - cur->sw_msi_start =3D sw_msi_range->start; - cur->msi_addr =3D msi_addr; - cur->pgoff =3D max_pgoff; - cur->id =3D ictx->sw_msi_id++; - list_add_tail(&cur->sw_msi_item, &ictx->sw_msi_list); - return cur; + rc =3D iommufd_sw_msi_check_alloc(ictx, sw_msi_range, next_pgoff, nr_addr= s, &size); + if (rc) + return ERR_PTR(rc); + + for (i =3D 0; i < nr_addrs; i++) { + cur =3D kzalloc_obj(*cur); + if (!cur) + goto err_free; + + cur->sw_msi_start =3D sw_msi_range->start; + cur->msi_addr =3D phys_addrs[i]; + cur->pgoff =3D next_pgoff + i; + cur->id =3D ictx->sw_msi_id + i; + if (!i) { + cur->range_size =3D size; + first_map =3D cur; + } + list_add_tail(&cur->sw_msi_item, new_msi_maps); + } + + return first_map; + +err_free: + while (!list_empty(new_msi_maps)) { + cur =3D list_first_entry(new_msi_maps, typeof(*cur), sw_msi_item); + list_del(&cur->sw_msi_item); + kfree(cur); + } + return ERR_PTR(-ENOMEM); } =20 int iommufd_sw_msi_install(struct iommufd_ctx *ictx, @@ -280,7 +349,9 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct = msi_desc *desc, struct iommufd_attach_handle *handle; struct iommufd_sw_msi_map *msi_map; struct iommufd_ctx *ictx; + LIST_HEAD(new_msi_maps); unsigned long iova; + phys_addr_t phys_addr; int rc; =20 /* @@ -308,29 +379,41 @@ int iommufd_sw_msi(struct iommu_domain *domain, struc= t msi_desc *desc, * assume the caller has checked that it is contained with a MMIO region * that is secure to map at PAGE_SIZE. */ - msi_map =3D iommufd_sw_msi_get_map(handle->idev->ictx, - msi_addr & PAGE_MASK, - &handle->idev->igroup->sw_msi_range); + phys_addr =3D msi_addr & PAGE_MASK; + msi_map =3D iommufd_sw_msi_get_map(ictx, &phys_addr, 1, &handle->idev->ig= roup->sw_msi_range); if (!msi_map) - msi_map =3D iommufd_sw_msi_alloc_map(handle->idev->ictx, - msi_addr & PAGE_MASK, - &handle->idev->igroup->sw_msi_range); + msi_map =3D iommufd_sw_msi_alloc_map(ictx, &phys_addr, 1, + &handle->idev->igroup->sw_msi_range, + &new_msi_maps); if (IS_ERR(msi_map)) return PTR_ERR(msi_map); =20 rc =3D iommufd_sw_msi_maps_ensure(&handle->idev->igroup->required_sw_msi, msi_map->id); if (rc) - return rc; + goto err_free; =20 rc =3D iommufd_sw_msi_install(ictx, hwpt_paging, msi_map); if (rc) - return rc; + goto err_free; __set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap); =20 + if (!list_empty(&new_msi_maps)) { + list_splice_tail_init(&new_msi_maps, &ictx->sw_msi_list); + ictx->sw_msi_id++; + } + iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; msi_desc_set_iommu_msi_iova(desc, iova, PAGE_SHIFT); return 0; + +err_free: + while (!list_empty(&new_msi_maps)) { + msi_map =3D list_first_entry(&new_msi_maps, typeof(*msi_map), sw_msi_ite= m); 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charset="utf-8" Add a range installation helper which installs every map in a contiguous software MSI range and rolls back only mappings added by the failed operation. Use the helper when replaying range mappings into a new paging domain. This prepares iommufd to publish and install physical address lists without exposing partially installed ranges. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/driver.c | 76 ++++++++++++++++++++++++++++++---- 1 file changed, 68 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 6a0527f4b058..a43a25078f87 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -178,6 +178,17 @@ int iommufd_viommu_report_event(struct iommufd_viommu = *viommu, EXPORT_SYMBOL_NS_GPL(iommufd_viommu_report_event, "IOMMUFD"); =20 #ifdef CONFIG_IRQ_MSI_IOMMU +static bool iommufd_sw_msi_range_index(const struct iommufd_sw_msi_map *ma= p, + const struct iommufd_sw_msi_map *base_map, + unsigned int nr_addrs, unsigned int *index) +{ + if (map->sw_msi_start !=3D base_map->sw_msi_start || map->pgoff < base_ma= p->pgoff) + return false; + + *index =3D map->pgoff - base_map->pgoff; + return *index < nr_addrs; +} + /* * Get an iommufd_sw_msi_map for the msi physical addresses requested by t= he irq * layer. The mapping to IOVA is global to the iommufd file descriptor, ev= ery @@ -207,11 +218,7 @@ iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, const= phys_addr_t *phys_addrs, list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { unsigned int index; =20 - if (cur->sw_msi_start !=3D sw_msi_range->start || - cur->pgoff < msi_map->pgoff) - continue; - index =3D cur->pgoff - msi_map->pgoff; - if (index >=3D nr_addrs) + if (!iommufd_sw_msi_range_index(cur, msi_map, nr_addrs, &index)) continue; if (cur->msi_addr !=3D phys_addrs[index]) break; @@ -306,9 +313,9 @@ iommufd_sw_msi_alloc_map(struct iommufd_ctx *ictx, cons= t phys_addr_t *phys_addrs return ERR_PTR(-ENOMEM); } =20 -int iommufd_sw_msi_install(struct iommufd_ctx *ictx, - struct iommufd_hwpt_paging *hwpt_paging, - struct iommufd_sw_msi_map *msi_map) +static int iommufd_sw_msi_install_one(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct iommufd_sw_msi_map *msi_map) { unsigned long iova; int rc; @@ -332,6 +339,59 @@ int iommufd_sw_msi_install(struct iommufd_ctx *ictx, __set_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); return 0; } + +int iommufd_sw_msi_install(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct iommufd_sw_msi_map *base_map) +{ + struct iommufd_sw_msi_map *msi_map; + struct list_head *msi_maps =3D &ictx->sw_msi_list; + unsigned long *newly_mapped; + unsigned int nr_addrs =3D base_map->range_size ? base_map->range_size / P= AGE_SIZE : 1; + unsigned int nr_found =3D 0; + unsigned int index; + int rc =3D 0; + + newly_mapped =3D bitmap_zalloc(nr_addrs, GFP_KERNEL_ACCOUNT); + if (!newly_mapped) + return -ENOMEM; + + list_for_each_entry(msi_map, msi_maps, sw_msi_item) { + if (!iommufd_sw_msi_range_index(msi_map, base_map, nr_addrs, &index)) + continue; + if (iommufd_sw_msi_maps_test_bit(&hwpt_paging->present_sw_msi, msi_map->= id)) { + nr_found++; + continue; + } + rc =3D iommufd_sw_msi_install_one(ictx, hwpt_paging, msi_map); + if (rc) + goto err_unmap; + __set_bit(index, newly_mapped); + nr_found++; + } + if (nr_found !=3D nr_addrs) { + rc =3D -EINVAL; + goto err_unmap; + } + + bitmap_free(newly_mapped); + return 0; + +err_unmap: + list_for_each_entry(msi_map, msi_maps, sw_msi_item) { + unsigned long iova; + + if (!iommufd_sw_msi_range_index(msi_map, base_map, nr_addrs, &index) || + !test_bit(index, newly_mapped)) + continue; + + iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; + WARN_ON_ONCE(iommu_unmap(hwpt_paging->common.domain, iova, PAGE_SIZE) != =3D PAGE_SIZE); + __clear_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); + } + bitmap_free(newly_mapped); + return rc; +} EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi_install, "IOMMUFD_INTERNAL"); =20 /* --=20 2.43.0 From nobody Mon Sep 28 04:53:45 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE3F944E650 for ; Wed, 26 Aug 2026 14:53:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Teach the software MSI path to install every mapping in an address list before publishing newly allocated maps. Mark the complete list as required by the group and roll back mappings installed by a failed operation. Keep iommufd_sw_msi() as a one-address wrapper so existing callers retain their current behavior. Signed-off-by: Andrew Jones --- drivers/iommu/iommufd/driver.c | 101 +++++++++++++++++++++++---------- 1 file changed, 72 insertions(+), 29 deletions(-) diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index a43a25078f87..45278c11c688 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -340,14 +340,14 @@ static int iommufd_sw_msi_install_one(struct iommufd_= ctx *ictx, return 0; } =20 -int iommufd_sw_msi_install(struct iommufd_ctx *ictx, - struct iommufd_hwpt_paging *hwpt_paging, - struct iommufd_sw_msi_map *base_map) +static int __iommufd_sw_msi_install_range(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct list_head *msi_maps, + const struct iommufd_sw_msi_map *base_map, + unsigned int nr_addrs) { struct iommufd_sw_msi_map *msi_map; - struct list_head *msi_maps =3D &ictx->sw_msi_list; unsigned long *newly_mapped; - unsigned int nr_addrs =3D base_map->range_size ? base_map->range_size / P= AGE_SIZE : 1; unsigned int nr_found =3D 0; unsigned int index; int rc =3D 0; @@ -392,16 +392,36 @@ int iommufd_sw_msi_install(struct iommufd_ctx *ictx, bitmap_free(newly_mapped); return rc; } + +int iommufd_sw_msi_install(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct iommufd_sw_msi_map *base_map) +{ + unsigned int nr_addrs =3D base_map->range_size ? base_map->range_size / P= AGE_SIZE : 1; + + return __iommufd_sw_msi_install_range(ictx, hwpt_paging, &ictx->sw_msi_li= st, base_map, + nr_addrs); +} EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi_install, "IOMMUFD_INTERNAL"); =20 -/* - * Called by the irq code if the platform translates the MSI address throu= gh the - * IOMMU. msi_addr is the physical address of the MSI page. iommufd will - * allocate a fd global iova for the physical page that is the same on all - * domains and devices. - */ -int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr) +static void iommufd_sw_msi_set_required(struct iommufd_group *igroup, + struct list_head *msi_maps, + const struct iommufd_sw_msi_map *base_map, + unsigned int nr_addrs) +{ + struct iommufd_sw_msi_map *msi_map; + unsigned int index; + + list_for_each_entry(msi_map, msi_maps, sw_msi_item) { + if (!iommufd_sw_msi_range_index(msi_map, base_map, nr_addrs, &index)) + continue; + __set_bit(msi_map->id, igroup->required_sw_msi.bitmap); + } +} + +static int iommufd_sw_msi_list(struct iommu_domain *domain, struct msi_des= c *desc, + const phys_addr_t *phys_addrs, unsigned int nr_addrs, + size_t granule) { struct device *dev =3D msi_desc_to_dev(desc); struct iommufd_hwpt_paging *hwpt_paging; @@ -410,10 +430,19 @@ int iommufd_sw_msi(struct iommu_domain *domain, struc= t msi_desc *desc, struct iommufd_sw_msi_map *msi_map; struct iommufd_ctx *ictx; LIST_HEAD(new_msi_maps); + struct list_head *msi_maps; unsigned long iova; - phys_addr_t phys_addr; + unsigned int i; int rc; =20 + if (granule !=3D PAGE_SIZE) + return -EOPNOTSUPP; + if (!nr_addrs || nr_addrs > SIZE_MAX / PAGE_SIZE) + return -EINVAL; + for (i =3D 0; i < nr_addrs; i++) + if (!IS_ALIGNED(phys_addrs[i], PAGE_SIZE)) + return -EINVAL; + /* * It is safe to call iommu_attach_handle_get() here because the iommu * core code invokes this under the group mutex which also prevents any @@ -434,33 +463,33 @@ int iommufd_sw_msi(struct iommu_domain *domain, struc= t msi_desc *desc, =20 ictx =3D handle->idev->ictx; guard(mutex)(&ictx->sw_msi_lock); - /* - * The input msi_addr is the exact byte offset of the MSI doorbell, we - * assume the caller has checked that it is contained with a MMIO region - * that is secure to map at PAGE_SIZE. - */ - phys_addr =3D msi_addr & PAGE_MASK; - msi_map =3D iommufd_sw_msi_get_map(ictx, &phys_addr, 1, &handle->idev->ig= roup->sw_msi_range); - if (!msi_map) - msi_map =3D iommufd_sw_msi_alloc_map(ictx, &phys_addr, 1, + msi_map =3D iommufd_sw_msi_get_map(ictx, phys_addrs, nr_addrs, + &handle->idev->igroup->sw_msi_range); + if (msi_map) { + msi_maps =3D &ictx->sw_msi_list; + } else { + msi_map =3D iommufd_sw_msi_alloc_map(ictx, phys_addrs, nr_addrs, &handle->idev->igroup->sw_msi_range, &new_msi_maps); - if (IS_ERR(msi_map)) - return PTR_ERR(msi_map); + if (IS_ERR(msi_map)) + return PTR_ERR(msi_map); + msi_maps =3D &new_msi_maps; + } =20 rc =3D iommufd_sw_msi_maps_ensure(&handle->idev->igroup->required_sw_msi, - msi_map->id); + msi_map->id + nr_addrs - 1); if (rc) goto err_free; =20 - rc =3D iommufd_sw_msi_install(ictx, hwpt_paging, msi_map); + rc =3D __iommufd_sw_msi_install_range(ictx, hwpt_paging, msi_maps, msi_ma= p, nr_addrs); if (rc) goto err_free; - __set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap); + + iommufd_sw_msi_set_required(handle->idev->igroup, msi_maps, msi_map, nr_a= ddrs); =20 if (!list_empty(&new_msi_maps)) { list_splice_tail_init(&new_msi_maps, &ictx->sw_msi_list); - ictx->sw_msi_id++; + ictx->sw_msi_id +=3D nr_addrs; } =20 iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; @@ -475,6 +504,20 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct= msi_desc *desc, } return rc; } + +/* + * Called by the irq code if the platform translates the MSI address throu= gh the + * IOMMU. msi_addr is the physical address of the MSI page. iommufd will + * allocate a fd global iova for the physical page that is the same on all + * domains and devices. + */ +int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + phys_addr_t msi_addr) +{ + phys_addr_t phys_addr =3D msi_addr & PAGE_MASK; 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charset="utf-8" Add iommu_dma_prepare_msi_list() to map an ordered physical address list through the current domain backend. Validate that the requested granule is a power of two no smaller than PAGE_SIZE and that every address is aligned to it. Refactor iommu_dma_prepare_msi() to obtain the backend granule and align its single address before using the same list dispatcher. Convert the DMA-IOMMU and iommufd backend entry points to consume address lists directly. Signed-off-by: Andrew Jones --- drivers/iommu/dma-iommu.c | 13 ++-- drivers/iommu/dma-iommu.h | 13 +++- drivers/iommu/iommu-priv.h | 7 ++- drivers/iommu/iommu.c | 109 +++++++++++++++++++++++++++------ drivers/iommu/iommufd/driver.c | 24 +++----- include/linux/iommu.h | 8 +++ 6 files changed, 126 insertions(+), 48 deletions(-) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index c256531ff19f..0699785adbfb 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -2173,7 +2173,7 @@ static bool has_msi_cookie(const struct iommu_domain = *domain) domain->cookie_type =3D=3D IOMMU_COOKIE_DMA_MSI); } =20 -static size_t cookie_msi_granule(const struct iommu_domain *domain) +size_t iommu_dma_msi_granule(const struct iommu_domain *domain) { switch (domain->cookie_type) { case IOMMU_COOKIE_DMA_IOVA: @@ -2303,23 +2303,20 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi= _page(struct device *dev, } =20 int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr) + const phys_addr_t *phys_addrs, unsigned int nr_addrs, size_t granul= e) { struct device *dev =3D msi_desc_to_dev(desc); const struct iommu_dma_msi_page *msi_page; - phys_addr_t phys_addr; - size_t granule; =20 if (!has_msi_cookie(domain)) { msi_desc_set_iommu_msi_iova(desc, 0, 0); return 0; } - - granule =3D cookie_msi_granule(domain); - phys_addr =3D ALIGN_DOWN(msi_addr, granule); + if (granule !=3D iommu_dma_msi_granule(domain)) + return -EOPNOTSUPP; =20 iommu_group_mutex_assert(dev); - msi_page =3D iommu_dma_get_msi_page(dev, &phys_addr, 1, granule, domain); + msi_page =3D iommu_dma_get_msi_page(dev, phys_addrs, nr_addrs, granule, d= omain); if (!msi_page) return -ENOMEM; =20 diff --git a/drivers/iommu/dma-iommu.h b/drivers/iommu/dma-iommu.h index 040d00252563..bf9cd4102d35 100644 --- a/drivers/iommu/dma-iommu.h +++ b/drivers/iommu/dma-iommu.h @@ -19,8 +19,9 @@ int iommu_dma_init_fq(struct iommu_domain *domain); =20 void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list= ); =20 +size_t iommu_dma_msi_granule(const struct iommu_domain *domain); int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr); + const phys_addr_t *phys_addrs, unsigned int nr_addrs, size_t granul= e); =20 extern bool iommu_dma_forcedac; =20 @@ -53,8 +54,14 @@ static inline void iommu_dma_get_resv_regions(struct dev= ice *dev, struct list_he { } =20 -static inline int iommu_dma_sw_msi(struct iommu_domain *domain, - struct msi_desc *desc, phys_addr_t msi_addr) +static inline size_t iommu_dma_msi_granule(const struct iommu_domain *doma= in) +{ + return 0; +} + +static inline int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi= _desc *desc, + const phys_addr_t *phys_addrs, unsigned int nr_addrs, + size_t granule) { return -ENODEV; } diff --git a/drivers/iommu/iommu-priv.h b/drivers/iommu/iommu-priv.h index aaffad5854fc..1122c99566d5 100644 --- a/drivers/iommu/iommu-priv.h +++ b/drivers/iommu/iommu-priv.h @@ -54,10 +54,11 @@ int iommu_replace_group_handle(struct iommu_group *grou= p, =20 #if IS_ENABLED(CONFIG_IOMMUFD_DRIVER_CORE) && IS_ENABLED(CONFIG_IRQ_MSI_IO= MMU) int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr); + const phys_addr_t *phys_addrs, unsigned int nr_addrs, size_t granule); #else /* !CONFIG_IOMMUFD_DRIVER_CORE || !CONFIG_IRQ_MSI_IOMMU */ -static inline int iommufd_sw_msi(struct iommu_domain *domain, - struct msi_desc *desc, phys_addr_t msi_addr) +static inline int iommufd_sw_msi(struct iommu_domain *domain, struct msi_d= esc *desc, + const phys_addr_t *phys_addrs, unsigned int nr_addrs, + size_t granule) { return -EOPNOTSUPP; } diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index a3dea7353500..692e793c624e 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -4223,42 +4223,115 @@ void pci_dev_reset_iommu_done(struct pci_dev *pdev) EXPORT_SYMBOL_GPL(pci_dev_reset_iommu_done); =20 #if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) +static int __iommu_dma_prepare_msi_list(struct iommu_group *group, struct = msi_desc *desc, + const phys_addr_t *phys_addrs, unsigned int nr_addrs, + size_t granule) +{ + if (!group->domain || group->domain->type =3D=3D IOMMU_DOMAIN_IDENTITY) + return 0; + + switch (group->domain->cookie_type) { + case IOMMU_COOKIE_DMA_MSI: + case IOMMU_COOKIE_DMA_IOVA: + return iommu_dma_sw_msi(group->domain, desc, phys_addrs, nr_addrs, granu= le); + case IOMMU_COOKIE_IOMMUFD: + return iommufd_sw_msi(group->domain, desc, phys_addrs, nr_addrs, granule= ); + default: + return -EOPNOTSUPP; + } +} + +static int iommu_dma_validate_msi_list(const phys_addr_t *phys_addrs, unsi= gned int nr_addrs, + size_t granule) +{ + unsigned int i; + + if (!nr_addrs || granule < PAGE_SIZE || !is_power_of_2(granule) || + nr_addrs > SIZE_MAX / granule) + return -EINVAL; + + for (i =3D 0; i < nr_addrs; i++) + if (!IS_ALIGNED(phys_addrs[i], granule)) + return -EINVAL; + + return 0; +} + +/** + * iommu_dma_prepare_msi_list() - Map MSI pages in the IOMMU domain + * @desc: MSI descriptor to update with the base IOVA + * @phys_addrs: Ordered MSI target physical addresses + * @nr_addrs: Number of addresses in @phys_addrs + * @granule: Mapping granule for every address + * + * @nr_addrs must be nonzero and @granule must be a power of two no smalle= r than + * PAGE_SIZE. Every address must be aligned to @granule. The addresses are= mapped + * in order to one contiguous IOVA range and may repeat. The list is consu= med + * synchronously and is not retained. + * + * When a software MSI mapping is required, the backend records the base I= OVA + * and granule shift in @desc. Otherwise, @desc is left unchanged. + * + * Return: 0 on success, -EINVAL if the parameters are invalid, -EOPNOTSUP= P if + * the domain backend cannot provide the mapping, or another negative error + * code from the backend. + */ +int iommu_dma_prepare_msi_list(struct msi_desc *desc, const phys_addr_t *p= hys_addrs, + unsigned int nr_addrs, size_t granule) +{ + struct device *dev =3D msi_desc_to_dev(desc); + struct iommu_group *group =3D dev->iommu_group; + int ret; + + ret =3D iommu_dma_validate_msi_list(phys_addrs, nr_addrs, granule); + if (ret || !group) + return ret; + + mutex_lock(&group->mutex); + ret =3D __iommu_dma_prepare_msi_list(group, desc, phys_addrs, nr_addrs, g= ranule); + mutex_unlock(&group->mutex); + return ret; +} + /** * iommu_dma_prepare_msi() - Map the MSI page in the IOMMU domain * @desc: MSI descriptor, will store the MSI page * @msi_addr: MSI target address to be mapped * - * The implementation of sw_msi() should take msi_addr and map it to - * an IOVA in the domain and call msi_desc_set_iommu_msi_iova() with the - * mapping information. - * * Return: 0 on success or negative error code if the mapping failed. */ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) { struct device *dev =3D msi_desc_to_dev(desc); struct iommu_group *group =3D dev->iommu_group; + phys_addr_t phys_addr; + size_t granule; int ret =3D 0; =20 if (!group) return 0; =20 mutex_lock(&group->mutex); - /* An IDENTITY domain must pass through */ - if (group->domain && group->domain->type !=3D IOMMU_DOMAIN_IDENTITY) { - switch (group->domain->cookie_type) { - case IOMMU_COOKIE_DMA_MSI: - case IOMMU_COOKIE_DMA_IOVA: - ret =3D iommu_dma_sw_msi(group->domain, desc, msi_addr); - break; - case IOMMU_COOKIE_IOMMUFD: - ret =3D iommufd_sw_msi(group->domain, desc, msi_addr); - break; - default: - ret =3D -EOPNOTSUPP; - break; - } + if (!group->domain || group->domain->type =3D=3D IOMMU_DOMAIN_IDENTITY) + goto out_unlock; + + switch (group->domain->cookie_type) { + case IOMMU_COOKIE_DMA_MSI: + case IOMMU_COOKIE_DMA_IOVA: + granule =3D iommu_dma_msi_granule(group->domain); + break; + case IOMMU_COOKIE_IOMMUFD: + granule =3D PAGE_SIZE; + break; + default: + ret =3D -EOPNOTSUPP; + goto out_unlock; } + + phys_addr =3D ALIGN_DOWN(msi_addr, granule); + ret =3D __iommu_dma_prepare_msi_list(group, desc, &phys_addr, 1, granule); + +out_unlock: mutex_unlock(&group->mutex); return ret; } diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 45278c11c688..72e9ce63a5ee 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -419,9 +419,14 @@ static void iommufd_sw_msi_set_required(struct iommufd= _group *igroup, } } =20 -static int iommufd_sw_msi_list(struct iommu_domain *domain, struct msi_des= c *desc, - const phys_addr_t *phys_addrs, unsigned int nr_addrs, - size_t granule) +/* + * Called by the irq code if the platform translates the MSI addresses thr= ough the + * IOMMU. phys_addrs are the physical addresses of the MSI pages. iommufd = will + * allocate contiguous fd global iovas for the physical pages that are the= same on + * all domains and devices. + */ +int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + const phys_addr_t *phys_addrs, unsigned int nr_addrs, size_t granule) { struct device *dev =3D msi_desc_to_dev(desc); struct iommufd_hwpt_paging *hwpt_paging; @@ -505,19 +510,6 @@ static int iommufd_sw_msi_list(struct iommu_domain *do= main, struct msi_desc *des return rc; } =20 -/* - * Called by the irq code if the platform translates the MSI address throu= gh the - * IOMMU. msi_addr is the physical address of the MSI page. iommufd will - * allocate a fd global iova for the physical page that is the same on all - * domains and devices. - */ -int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr) -{ - phys_addr_t phys_addr =3D msi_addr & PAGE_MASK; - - return iommufd_sw_msi_list(domain, desc, &phys_addr, 1, PAGE_SIZE); -} EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi, "IOMMUFD"); #endif =20 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index ac43b8b93f14..bf08be172e40 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1561,8 +1561,16 @@ static inline void pci_dev_reset_iommu_done(struct p= ci_dev *pdev) =20 #ifdef CONFIG_IRQ_MSI_IOMMU #ifdef CONFIG_IOMMU_API +int iommu_dma_prepare_msi_list(struct msi_desc *desc, const phys_addr_t *p= hys_addrs, + unsigned int nr_addrs, size_t granule); int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr); #else +static inline int iommu_dma_prepare_msi_list(struct msi_desc *desc, const = phys_addr_t *phys_addrs, + unsigned int nr_addrs, size_t granule) +{ + return 0; +} + static inline int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) { --=20 2.43.0