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Wed, 26 Aug 2026 00:16:51 -0700 (PDT) X-Received: by 2002:a05:6a21:6191:b0:3cc:ad3e:bd7e with SMTP id adf61e73a8af0-3cf8465a5cemr9891217637.14.1787728611028; Wed, 26 Aug 2026 00:16:51 -0700 (PDT) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3283d8dc465sm5553772eec.24.2026.08.26.00.16.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Aug 2026 00:16:50 -0700 (PDT) From: Krishna Chaitanya Chundru Date: Wed, 26 Aug 2026 12:46:30 +0530 Subject: [PATCH v4 1/2] PCI: dwc: Force L2 link entry on shutdown/reboot without D3cold check Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260826-shutdown-v4-1-eb5fe9d454ae@oss.qualcomm.com> References: <20260826-shutdown-v4-0-eb5fe9d454ae@oss.qualcomm.com> In-Reply-To: <20260826-shutdown-v4-0-eb5fe9d454ae@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: konrad.dybcio@oss.qualcomm.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Krishna Chaitanya Chundru X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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If no endpoint supports it, the function returns early and leaves the link up. Querying D3cold support during shutdown is actively harmful, not just slow: pci_host_common_d3cold_possible() requires every active endpoint to already be in PCI_D3hot, and returns false otherwise. If any endpoint is still in D0 -- which is common, since endpoint drivers aren't guaranteed to have suspended by the time the host's shutdown path runs the check fails and dw_pcie_suspend_noirq() returns early without ever moving the link to L2, leaving it up right up to the point where the system cuts power/clocks to the controller. Detect the shutdown/reboot case via system_state. Still call pci_host_common_d3cold_possible() unconditionally, since it's also how "pme_capable" gets set, but ignore its return value when shutting down and force L2 entry regardless. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/dwc/pcie-designware-host.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index f5a38e6fd8d7..5d07a742faa1 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -1224,14 +1225,25 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci) =20 int dw_pcie_suspend_noirq(struct dw_pcie *pci) { - bool pme_capable =3D false; + bool shutdown =3D system_state =3D=3D SYSTEM_HALT || + system_state =3D=3D SYSTEM_POWER_OFF || + system_state =3D=3D SYSTEM_RESTART; + bool d3cold, pme_capable =3D false; int ret =3D 0; u32 val; =20 if (!dw_pcie_link_up(pci)) goto stop_link; =20 - if (!pci_host_common_d3cold_possible(pci->pp.bridge, &pme_capable)) + /* + * During reboot/halt/poweroff the link is going away regardless, so + * force L2 entry without checking whether endpoints have transitioned + * to D3hot -- there's no point walking the bus to find out. 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Without this, the link may still be up and endpoints still have transactions in flight when power/clocks are cut, which can trip SMMU translation faults or NoC protocol errors. Reuse dw_pcie_suspend_noirq() in the shutdown path to force the link into L2, putting it into D3cold. device_shutdown() runs with interrupts enabled, unlike suspend_noirq(). Mask the chained MSI IRQ(s) and the Global IRQ before tearing down the link and clocks/PHY, since a late/spurious interrupt could otherwise reach a handler that touches now-unclocked PARF/DBI registers. Firmware-managed (ECAM) Root Complexes own their own link teardown and clock/PHY shutdown; for those, only mask the MSI IRQs. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/dwc/pcie-qcom.c | 53 ++++++++++++++++++++++++++++++= ++++ 1 file changed, 53 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controlle= r/dwc/pcie-qcom.c index b58a607b713f..fad2f4e2d6be 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1924,6 +1924,9 @@ static int qcom_pcie_ecam_host_init(struct pci_config= _window *cfg) pp->use_imsi_rx =3D true; dw_pcie_msi_init(pp); =20 + /* Stash pci so qcom_pcie_shutdown() can mask the MSI IRQ(s) later */ + platform_set_drvdata(to_platform_device(dev), pci); + return devm_add_action_or_reset(dev, qcom_pci_free_msi, pp); } =20 @@ -2337,6 +2340,55 @@ static int qcom_pcie_probe(struct platform_device *p= dev) return ret; } =20 +static void qcom_pcie_mask_msi_irqs(struct dw_pcie_rp *pp) +{ + u32 ctrl; + + /* + * Mask the chained MSI IRQ(s) before tearing down the link and + * clocks/PHY. Unlike suspend_noirq(), device_shutdown() runs with + * interrupts enabled, so a late/spurious MSI could otherwise hit + * dw_chained_msi_isr() and touch DBI registers after the controller + * is powered off. + */ + for (ctrl =3D 0; ctrl < MAX_MSI_CTRLS; ctrl++) { + if (pp->msi_irq[ctrl] > 0) + disable_irq(pp->msi_irq[ctrl]); + } +} + +static void qcom_pcie_shutdown(struct platform_device *pdev) +{ + const struct qcom_pcie_cfg *pcie_cfg =3D of_device_get_match_data(&pdev->= dev); + struct qcom_pcie *pcie; + + if (pcie_cfg && pcie_cfg->firmware_managed) { + /* + * Firmware owns the link teardown and clock/PHY shutdown in + * this mode; Linux only owns the chained MSI IRQ(s), which + * still need to be masked off before shutdown proceeds. + */ + struct dw_pcie *pci =3D platform_get_drvdata(pdev); + + if (pci) + qcom_pcie_mask_msi_irqs(&pci->pp); + return; + } + + pcie =3D platform_get_drvdata(pdev); + if (pcie) { + qcom_pcie_mask_msi_irqs(&pcie->pci->pp); + + if (pcie->global_irq) + disable_irq(pcie->global_irq); + + dw_pcie_suspend_noirq(pcie->pci); + } + + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); +} + static int qcom_pcie_suspend_noirq(struct device *dev) { struct qcom_pcie *pcie; @@ -2519,5 +2571,6 @@ static struct platform_driver qcom_pcie_driver =3D { .pm =3D &qcom_pcie_pm_ops, .probe_type =3D PROBE_PREFER_ASYNCHRONOUS, }, + .shutdown =3D qcom_pcie_shutdown, }; builtin_platform_driver(qcom_pcie_driver); --=20 2.34.1