From nobody Mon Sep 28 04:56:11 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 459283CEBA7 for ; Wed, 26 Aug 2026 10:51:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787741520; cv=none; b=tx2JftHFRifUS8LlcfD++XFU95WSVg76R3Zz52+Ps2VkdWLbi93cg8mVJXHFdJObih3wxCAAsnbSSbcIzsDbDZgtiinKuDByMg9C7BOAqeNvCJ9f/RCPEkOxhS4HoFt+43X6deMqPxuSnBbbE4YmQexFzmK+MCdtR9ZcqDyWm2U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787741520; c=relaxed/simple; bh=YafAY5/v4eDzwj1ILd524WEEaHj3LGZoILkqYo7g3R8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=WeBNAjippFKwUZSuLGSQWycjU3gNGBWrHPzke1xxuXNVEnxjrbG3WYl1L8x3dxRbiBsUD0pmXRoE0YQkKUL7JwdKntOIm8/3JCDkZM4hZmrxfVLB4R79MaYMYJ5GuejmbyIWG/v491pXHwVrkZdEvAmT0BGJQe0kyo51FiS1oYU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PIfiH+Qe; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PIfiH+Qe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1787741512; x=1819277512; h=from:date:subject:mime-version:content-transfer-encoding: message-id:to:cc; bh=YafAY5/v4eDzwj1ILd524WEEaHj3LGZoILkqYo7g3R8=; b=PIfiH+QeH8zFL4wsJlqGXSI2ZWk/TJUjwPx9vl00uHDNVmchlh/Z+Pih CEZvGGqGuclkQlbkpHS5gay6j6VCwlZwkWzgdy3UsQlnSBnELUVjO28bG mbVErVmW8o+2DNsz/3KLD0cJwT+88CGbzVnrT1DrRwMzpbKBp1f70k0vV J+a0QI+vx/KBw/dpvXQ5ciBwYl8ycXKl7V6v7+aBjXCkGGcIBum6p+Bkl E1duknkeveIYtVPZ9B1qlDF8NAmJE7exuQVCWqkQK/gVybUjJXlMqKyg/ R2u6VQ8pHjucc5umWDMJLYhhbFf22dPc3vGmg+3BWXL9arbPN+ylvldXF A==; X-CSE-ConnectionGUID: q7UoPUYRRAWWrPkJhMFeUA== X-CSE-MsgGUID: FypGo6l8T4qM9PlIxfTGpg== X-IronPort-AV: E=McAfee;i="6800,10657,11886"; a="99380370" X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="99380370" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2026 03:51:46 -0700 X-CSE-ConnectionGUID: SW3SbYRdQPuvSR+RxnZrYA== X-CSE-MsgGUID: bNWbK2mJQxmIBxL6HLDLjA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,244,1779174000"; d="scan'208";a="265744399" Received: from sannilnx-dsk.jer.intel.com (HELO [127.0.1.1]) ([10.12.231.107]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2026 03:51:45 -0700 From: Alexander Usyskin Date: Wed, 26 Aug 2026 13:51:23 +0300 Subject: [PATCH] mtd: mtd_intel_dg: reset poll counter for each erase Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260826-mtd_eraze_to_fix-v1-1-b8a893333075@intel.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x2MQQqAIBAAvxJ7TjADs74SIVZr7SENlYikvycdZ 2AmQ8RAGGGoMgS8KJJ3BZq6gmU3bkNGa2EQXEiuhGRHWjUG86BOXlu6Wdtxhdz2/dwYKNkZsOh /OU7v+wEqOwUEYgAAAA== X-Change-ID: 20260826-mtd_eraze_to_fix-3708e0f99b1a To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Menachem Adin , Alexander Usyskin X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787741504; l=1606; i=alexander.usyskin@intel.com; s=20260315; h=from:subject:message-id; bh=NPQbbJPbozkY44eWUMbteLHRjQYwlyTvxeF54RXzi6c=; b=753re2wggG4X98i0iYpauDU9AOIbnrFqtc3ekNw5V7YO+K1EQeyHEhuhpe561JGFW/5jM5dEk 9BOgN5HWql4BvGa5yFk4gm1woQzATs7atpiosFHKpPv6WqsofT9kaqz X-Developer-Key: i=alexander.usyskin@intel.com; a=ed25519; pk=X+qoF/nFCdDOV04IForWSxnkyoCAbUE10egZi6PSfcU= From: Menachem Adin The non-posted erase polling counter is initialized only once per MTD erase request. Large requests therefore share the polling budget across all 4K erase commands and can fail with -ETIME even though no individual command timed out. Reset the counter for each 4K erase command so every operation gets the intended completion timeout. Signed-off-by: Menachem Adin Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/devices/mtd_intel_dg.c b/drivers/mtd/devices/mtd_i= ntel_dg.c index f2fa8f68d190..6e226c0c7f17 100644 --- a/drivers/mtd/devices/mtd_intel_dg.c +++ b/drivers/mtd/devices/mtd_intel_dg.c @@ -387,7 +387,7 @@ idg_erase(struct intel_dg_nvm *nvm, u8 region, loff_t f= rom, u64 len, u64 *fail_a void __iomem *base2 =3D nvm->base2; void __iomem *base =3D nvm->base; const u32 block =3D 0x10; - u32 iter =3D 0; + u32 iter; u32 reg; u64 i; =20 @@ -396,6 +396,7 @@ idg_erase(struct intel_dg_nvm *nvm, u8 region, loff_t f= rom, u64 len, u64 *fail_a iowrite32(region << 24 | block, base + NVM_ERASE_REG); if (nvm->non_posted_erase) { /* Wait for Erase Done */ + iter =3D 0; reg =3D ioread32(base2 + NVM_DEBUG_REG); while (!(reg & NVM_NON_POSTED_ERASE_DONE) && ++iter < NVM_NON_POSTED_ERASE_DONE_ITER) { --- base-commit: 8d3ae59288f1e7d58d76558a6ee96d533bc5019f change-id: 20260826-mtd_eraze_to_fix-3708e0f99b1a Best regards, --=20 Alexander Usyskin