From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA39D3D669F; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; cv=none; b=OGAqXV4XFqAfT1aEUaEOMAFzPCckjwQuyjlZz9mSi2PtthPryaNlJbTTd5Xq+M1q+o1MQThyL+Wpdl0xNnbgI49a5Znte6PnQi0KxFgm2TUgM4ic7bslA8CbofDX4UuSI9VKCgQg3kA6LTiQodczbsV/5pyaK3g24hIbGW7q7rk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; c=relaxed/simple; bh=CoY8MC/CiohEkIO0woh3W7ToV/HZWV2HpXzffodCVGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=neRyK7czF3bipGTdDEkcE+Fznw5HwP+4j+RATwK8sEVoaoNfiDScnht6CcTPaj8Ute+K+54/QvvvV+KthAdtBdPCc26bGOrUApNzySygbZuVEdtKeJ/n4ebaxM+wt1VdcLbCCLz9K6UJFiLVw46A9zQ28uCtFI9FCH9g9H9iTh8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dXi2KDBn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dXi2KDBn" Received: by smtp.kernel.org (Postfix) with ESMTPS id 61083C2BCF6; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787654583; bh=CoY8MC/CiohEkIO0woh3W7ToV/HZWV2HpXzffodCVGU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=dXi2KDBnpXPK2Qy1FmdqBt7NXzaRClX1vDgz5Pkf26FETh0FItmvXwWqNhfVIfT++ IgdQZER0Xbe4XKN5cI412XeNSiGJKdat6ttx+pyJS874EZqXSYJ33JDq05eCbKzS5b Q2evRDpXbjPxltpM4QQoa24LJmlFJVbxcSnMaujWrLBhV19KCy0gZ9VUqJEFpmJJId 0jG14JgnEZ5/dH8AF6eMsZEYqBHkV4hGuSLpWhu1KnODDM/584+oM5Gqo2ROk81PJu Wp78bDXpp6kdLKVnB380AmyhVII1Y9F2J0yT6+iHBh0h+xPlrgI3WiJ2oZdUeGQ+dn sJu6td99tecbw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38FEDC61DB4; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:26 +0400 Subject: [PATCH 1/9] dt-bindings: usb: qcom,snps-dwc3: Add ability to select UTMI as reference clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-1-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=2093; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=PpmFa72hwQoy5I4zpkHd0b3hra/QO3YfJD1WlPOqoa4=; b=EuVX9KSNZOwoA0oaPoUM8tQBGYI6bSeOyFoi0yRtwHUcr0O+MAF2deFukun0alQeBviIQSN4B 2YaYa9tHmR7DjbZ/uO/BfKDesBD0tj1LuB8LDkFsbLqH8Kd0RFvc0OB X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add ability to select the UTMI clock as reference clock which is passed by the glue layer to the DWC3 core to calculate the reference clock period and frame length adjustment based on its clock rate. In the flattened snsp-dwc3 model, it is currently not possible to pass a reference clock that differs from the default since: commit 613a2e655d4d ("usb: dwc3: core: Expose core driver as library") This prevents moving chipsets such as IPQ5018, IPQ6018, IPQ5332, IPQ5424 and IPQ9574 with a reference clock rate different from 19.2 MHz from moving to the flattened model. The Qualcomm takes care of clock and resets management itself and sets the ignore_clocks_and_resets flag in dwc3_probe_data to true, so the core doesn't acquire the reference clock from the devicetree. The existing DT property 'snps,quirk-ref-clk-period-ns' has been deprecated. So, add a property to select the UTMI clock used by many (if not all) Qualcomm USB controllers as the reference clock. Signed-off-by: George Moussalem --- Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml b/Do= cumentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml index ea60f7220afe..aa263dfd42a1 100644 --- a/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml @@ -155,6 +155,15 @@ properties: HS/FS/LS modes are supported. type: boolean =20 + qcom,select-utmi-as-ref-clk: + description: + If present, pass the UTMI clock as the reference clock to the DWC3 c= ore to + use its clock rate to calculate the reference clock period and frame + length adjustment in GUCTL and GFLADJ registers. This is needed when= these + values based on the standard clock rate deviate from the hardware de= fault + values. If not set, the hardware default values are used. + type: boolean + wakeup-source: true =20 required: --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA43D3D8122; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; cv=none; b=HL19QqgnHR+71f99sHFtEHYIIrgiSTR5sHGUiiU7JGdlL8OjuYCpwzS54U5YgUj8MbOHhAMeuDWkX0b21Ul5LEwVku5FyKftUxFJaOhWSkIX8UeNLVmhfhv5l/bPtABeTXYtp12cyqTYEbBlKxmBO2p9oUbM5PGQ3Toe4BvtmNI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; c=relaxed/simple; bh=n4qcwQOAWpnOhdNXJpqY+XiT9fYkJ1wr279B5rQKL1c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tinH6CaUeCx0fLp5bJQnQcFZ802p7VBO+oaXQhWMwtIb17JNLU3dObKdchf87sBc6cfsfjpzmOgDbFQYppcjsz5+2dQUdiHw6Y1LGj3b+6vIV5O/ZvPr3fTnBjW9A6nEaL0ofKQ6mpdyD2WSc9DfUmq3JNZvspyDIq4hqEiH7nI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WudKBFN4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WudKBFN4" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6E95EC2BCFB; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787654583; bh=n4qcwQOAWpnOhdNXJpqY+XiT9fYkJ1wr279B5rQKL1c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=WudKBFN4B9vQ6EfLDKan/fYYaGMB8Rh+jt7zjdtCZPd6aehsJkRVVcppeuyN7E6mF JCywxaX2S95vLCrSjzLC0vG35YDbpRYijen09RAMDqh94qgyc8zqMvpMbFJdw7PY47 IMrqqyj5djhwmqqCdvHAn6sKP6MQLV6hnqSUX+K8lY7VhRM6KjzozMUOaT9QVz9dU8 wwoGUlid01qeoUvCEyZTS2Aq4h/sQs0C4ln0+CvbLbrl5RQ2KGbnvULPaek+h4M2hc QJZ+ZwLWR1gJj00du43owMJlN1HXqwxv5oKX8/4MlH/1DN/OwRuCmlWH0FL1E16tIb UOM3b9UaCXHnA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48B5BC61DB6; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:27 +0400 Subject: [PATCH 2/9] usb: dwc3: core: Allow glue layer to pass reference clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-2-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=3821; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=jvcPphTWzl9HnvqjiW15stsU13/prizmqZkkC3i7P+w=; b=/PrKQvI5KomoWBa8UIyh3AmedvSdG+Ox3wY4vsVkfrKHkv9xE0YkK/8PqgMrnMVy/IHdBF+Cc YhLLqT0y11zDuW9sFQFj2/CEgx6EZjmFmB+gPgZLputRXQ6eN/t4DOA X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Add ability to pass a reference clock from the glue layer to the DWC3 core driver. The core calculates the reference clock period and frame length adjustment based on the reference clock rate. In the flattened snsp-dwc3 model, it is currently not possible to pass a reference clock that differs from the default since: commit 613a2e655d4d ("usb: dwc3: core: Expose core driver as library") The new glue layers (incl. Qualcomm's) set the ignore_clocks_and_resets flag in dwc3_probe_data to true, which disables the core driver's clock management, thus it also doesn't acquire the reference clock from the devicetree needed in dwc3_ref_clk_period. There's an existing DT property 'snps,quirk-ref-clk-period-ns', but that's been deprecated. In addition, basing the rate from the period is often not accurate enough to derive the frame length adjustment value. This prevents moving chipsets such as IPQ5018, IPQ6018, IPQ5332, IPQ5424 and IPQ9574 with a different reference clock rate from moving to the flattened model. So, add ability to set the reference clock in dwc3_probe_data, then have the core obtain the clock rate and use that to calculate the required period and frame length adjustment. Signed-off-by: George Moussalem --- drivers/usb/dwc3/core.c | 12 ++++++++++++ drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/glue.h | 2 ++ 3 files changed, 16 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index fd5c2cd36c59..c52920148588 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -420,6 +420,10 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc) } else if (dwc->ref_clk_per) { period =3D dwc->ref_clk_per; rate =3D NSEC_PER_SEC / period; + } else if (dwc->ref_clk_rate) { + rate =3D dwc->ref_clk_rate; + period =3D NSEC_PER_SEC / rate; + } else { return; } @@ -2332,6 +2336,14 @@ int dwc3_core_probe(const struct dwc3_probe_data *da= ta) ret =3D dwc3_get_clocks(dwc); if (ret) goto err_put_psy; + } else if (data->ref_clk) { + dwc->ref_clk_rate =3D clk_get_rate(data->ref_clk); + if (!dwc->ref_clk_rate) { + dev_err(dev, + "failed to get rate from ref clock provided by glue layer\n"); + ret =3D -EINVAL; + goto err_put_psy; + } } =20 ret =3D reset_control_deassert(dwc->reset); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 608daeb7ef10..04b15defccf3 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1032,6 +1032,7 @@ struct dwc3_glue_ops { * @regs_size: address space size * @fladj: frame length adjustment * @ref_clk_per: reference clock period configuration + * @ref_clk_rate: clock rate taken from reference clock provided by glue l= ayer * @irq_gadget: peripheral controller's IRQ number * @otg_irq: IRQ number for OTG IRQs * @current_otg_role: current role of operation while using the OTG block @@ -1261,6 +1262,7 @@ struct dwc3 { =20 u32 fladj; u32 ref_clk_per; + unsigned long ref_clk_rate; u32 irq_gadget; u32 otg_irq; u32 current_otg_role; diff --git a/drivers/usb/dwc3/glue.h b/drivers/usb/dwc3/glue.h index d738e1739ae0..75c9612527a5 100644 --- a/drivers/usb/dwc3/glue.h +++ b/drivers/usb/dwc3/glue.h @@ -33,6 +33,7 @@ struct dwc3_properties { * @skip_core_init_mode: Skip the finial initialization of the target mode= , as * it must be managed by the glue * @properties: dwc3 software manage properties + * @ref_clk: optional reference clock for the DWC3 core */ struct dwc3_probe_data { struct dwc3 *dwc; @@ -40,6 +41,7 @@ struct dwc3_probe_data { bool ignore_clocks_and_resets; bool skip_core_init_mode; struct dwc3_properties properties; + struct clk *ref_clk; }; =20 /** --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DADAA3D8123; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; cv=none; b=C859CvzXPevo1wyTiLpVR2IA3eS/1k9X3pXptVA6g/o6pQgtC/VrQT/XAAViSqYHhIDUFM0WCH+ajqIN4RBUVjowSWU60UhAVFPffTLLRwRfB9SCCY7x713t0iMBkK72lJfpaBtr1jbk0vNA+psYDdyB0ftIyNH0KXgUxlnroHk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654583; c=relaxed/simple; bh=cjJKfu1NBudId1qQWYXIg0pclAI0IbjrW5ldFkbUqGQ=; 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Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:28 +0400 Subject: [PATCH 3/9] usb: dwc3: qcom: Add support for selecting UTMI as reference clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-3-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=2074; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=IcMBry42eYPvkI9bqgoJ0mKN1T29dETKkJm3TDSEDqQ=; b=BsQfnDzO0TLBZ6Yyad0M5dIlm2SMDXkIzWw0tUEGJxjetAasa20HW8fCBpwhX2iRvsnfSlCM/ umhR9eH1+uLDHby/I+dvLMOVcMai1utHlDYS2qEN2QbYjT3t+L357PS X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem On many Qualcomm chipsets, the UTMI clock is used as the reference clock (ex. IPQ5018, IPQ6018, and IPQ9574 and more). Since moving to the new flattened snps-dwc3 model, it is no longer possible to pass the reference clock to the dwc3 core driver. The clock rate is used by dwc3 core to derive the reference clock period and frame length adjusment. This is needed when the reference clock deviates from the hardware default (typically 19.2MHz). Above mentioned SoCs use different rates and, as such, the core initializes with the wrong values which leads to non-functional USB operation. Read the "qcom,select-utmi-as-ref-clk" property to determine if the UTMI clock should be used as the reference clock. If so, set it as the reference clock in the dwc3_probe_data structure. The dwc3 core driver will then use this clock to derive the clock rate. Signed-off-by: George Moussalem --- drivers/usb/dwc3/dwc3-qcom.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index ac68b4218b56..17292517c594 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -617,6 +617,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) int ret; bool ignore_pipe_clk; bool wakeup_source; + bool select_utmi_as_ref_clk; + struct clk *ref_clk; =20 qcom =3D devm_kzalloc(&pdev->dev, sizeof(*qcom), GFP_KERNEL); if (!qcom) @@ -698,6 +700,18 @@ static int dwc3_qcom_probe(struct platform_device *pde= v) qcom->current_role =3D USB_ROLE_DEVICE; } =20 + select_utmi_as_ref_clk =3D device_property_read_bool(dev, + "qcom,select-utmi-as-ref-clk"); + if (select_utmi_as_ref_clk) { + ref_clk =3D devm_clk_get_optional(dev, "mock_utmi"); + if (IS_ERR(ref_clk)) { + ret =3D PTR_ERR(ref_clk); + dev_warn(dev, "failed to get ref clock: %d\n", ret); + } else { + probe_data.ref_clk =3D ref_clk; + } + } + qcom->dwc.glue_ops =3D &dwc3_qcom_glue_ops; =20 qcom->dwc.dev =3D dev; --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E443B3DD84C; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654584; cv=none; b=ZTOW5pvKglBXwGLkXB8fvtMQTEpyE/AfO+hl0YQZchR9s4z3193hIx0c15ZBVowNowtY5DeCPQczkRkDmj0GujnvhOtwVR0Txh/2ADaZYEOxL/ZTHEJBkgrlSZQUBRaTajeMYgf+CPrUgQquzO0kjYoujRnrU7Fz8jhFEgHhdto= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654584; c=relaxed/simple; bh=tCAzbInnhvFDL9buuYL7KdkaisjuGMRVdXRk4no9M1o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:29 +0400 Subject: [PATCH 4/9] arm64: dts: qcom: ipq5018: Flatten usb controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-4-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=3394; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=6BPO4AvL6INquHSJlpPKSSxHp8SiLg7eyZ/yhHtV55Y=; b=8vEyC0VPHc1y7QMH615ImRYE50Z5BNY/kBik5KwdvozQ205D7c30TKizD66zv05NONmKt1TUN ooZtrR4g/pXA8a68DHjR5z5nsXMImUsOwf1igUbTV6c9zCLCluPZL7p X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller node and update to using latest bindings and flattened driver approach. Add property to select UTMI as reference clock for the DWC3 core to calculate the right values for the period and frame length adjustment. In addition, set the right UTMI clock rate and override any clock rate inherited from the bootloader. Signed-off-by: George Moussalem Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 6 +-- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 52 ++++++++++++----------= ---- 2 files changed, 26 insertions(+), 32 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/bo= ot/dts/qcom/ipq5018-rdp432-c2.dts index 33eef92b19b1..8efb2b21ed9e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts @@ -110,11 +110,9 @@ data-pins { }; =20 &usb { - status =3D "okay"; -}; - -&usb_dwc { dr_mode =3D "host"; + + status =3D "okay"; }; =20 &usbphy0 { diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qc= om/ipq5018.dtsi index 4fc627b47fe7..71834606535e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -580,16 +580,9 @@ qpic_nand: spi@79b0000 { status =3D "disabled"; }; =20 - usb: usb@8af8800 { - compatible =3D "qcom,ipq5018-dwc3", "qcom,dwc3"; - reg =3D <0x08af8800 0x400>; - - interrupts =3D , - , - ; - interrupt-names =3D "pwr_event", - "dp_hs_phy_irq", - "dm_hs_phy_irq"; + usb: usb@8a00000 { + compatible =3D "qcom,ipq5018-dwc3", "qcom,snps-dwc3"; + reg =3D <0x08a00000 0xfc100>; =20 clocks =3D <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, @@ -599,30 +592,33 @@ usb: usb@8af8800 { "iface", "sleep", "mock_utmi"; + assigned-clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; + assigned-clock-rates =3D <60000000>; + + interrupts =3D , + , + , + ; + interrupt-names =3D "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; =20 resets =3D <&gcc GCC_USB0_BCR>; =20 + phys =3D <&usbphy0>; + phy-names =3D "usb2-phy"; + qcom,select-utmi-as-pipe-clk; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; + qcom,select-utmi-as-ref-clk; =20 - status =3D "disabled"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; =20 - usb_dwc: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x08a00000 0xe000>; - clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "ref"; - interrupts =3D ; - phy-names =3D "usb2-phy"; - phys =3D <&usbphy0>; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - }; + status =3D "disabled"; }; =20 intc: interrupt-controller@b000000 { --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1752D3F5BD6; Tue, 25 Aug 2026 10:43:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654584; cv=none; b=g+tiDdOr1f7GMxMtBkCjFHFojnoj1xRfsU3stR6N3i9Lu0wVQaUHrRd07WVlHO9c4HLKERZvPxda4Qwnw3wnhKak+OpNa++iL3ho0KJpHxOTLEXJ18ELTKsTchFsqJEq+mvXfOpTmWMdiwjcPq85bzY2LQWn02M69wcqFqh2/0o= ARC-Message-Signature: i=1; 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b=XCdxMw2XegH8YNVkSMrFQlWBDN89MCLfwgP/EePCFy59gIwrOr8+IxRocZ4Rsa7rF PXBCH9QT0u9em0NmgQSEWaXN/t/daSbIcotKoGlZSxzcFimvkDlidiegZBXSTXkipK q3rs4LTnuw6qGzd1E18e+6zsvTmkmUnuQ9Hdh+RhFTgx4UlUygLSGmZcvVTDhHhRG4 YUHAP1HcP+cbpvFvh2i55DvzquxGVhaNEa6N+ZwfQfPvRLX+l6GuiJi39EldyPXqnj daOlQENSSugEfuOgdTHPZkJTn/WCtqscV9KDQ5JjBilx9QOz97nWwHDgMhOZ/N3P+H DvMepiL5jaE1Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EC72C61DBD; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:30 +0400 Subject: [PATCH 5/9] arm64: dts: qcom: ipq5332: Flatten usb controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-5-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=3628; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=XcXDBw/Xz3Ce4Ry86g4nKP67j/TsjKjKAWkU4N53ZY8=; b=Fwwy4w2Z5iICHC/24S1k6VwH8z7gfSGjoui7lh/4FBRQbNENCNw7Psueo8VhAc7aC+9HDg0Om qW0D4ecq360DbyzPYFXYXBMyk6BF4W9BUPOpPv7x/bo99DKBjD0HDQE X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller node and update to using latest bindings and flattened driver approach. Add property to select UTMI as reference clock for the DWC3 core to calculate the right values for the period and frame length adjustment. In addition, set the right UTMI clock rate and override any clock rate inherited from the bootloader. Signed-off-by: George Moussalem Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 6 +-- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 58 ++++++++++++++-----------= ---- 2 files changed, 29 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/= dts/qcom/ipq5332-rdp468.dts index c224ffc65b08..25a70cd884c0 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts @@ -90,11 +90,9 @@ spi_0_cs_pins: spi-0-cs-state { }; =20 &usb { - status =3D "okay"; -}; - -&usb_dwc { dr_mode =3D "host"; + + status =3D "okay"; }; =20 &usbphy0 { diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qc= om/ipq5332.dtsi index 74d9de8d7641..87579a6b0e30 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -493,16 +493,9 @@ qpic_nand: spi@79b0000 { status =3D "disabled"; }; =20 - usb: usb@8af8800 { - compatible =3D "qcom,ipq5332-dwc3", "qcom,dwc3"; - reg =3D <0x08af8800 0x400>; - - interrupts =3D , - , - ; - interrupt-names =3D "pwr_event", - "dp_hs_phy_irq", - "dm_hs_phy_irq"; + usb: usb@8a00000 { + compatible =3D "qcom,ipq5332-dwc3", "qcom,snps-dwc3"; + reg =3D <0x08a00000 0xfc100>; =20 clocks =3D <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, @@ -510,34 +503,37 @@ usb: usb@8af8800 { clock-names =3D "core", "sleep", "mock_utmi"; + assigned-clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; + assigned-clock-rates =3D <60000000>; =20 - resets =3D <&gcc GCC_USB_BCR>; - - qcom,select-utmi-as-pipe-clk; + interrupts =3D , + , + , + ; + interrupt-names =3D "dwc_usb3", + "pwr_event", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; =20 - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; interconnects =3D <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>, <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>; interconnect-names =3D "usb-ddr", "apps-usb"; =20 - status =3D "disabled"; + resets =3D <&gcc GCC_USB_BCR>; =20 - usb_dwc: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x08a00000 0xe000>; - clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "ref"; - interrupts =3D ; - phy-names =3D "usb2-phy"; - phys =3D <&usbphy0>; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - }; + phys =3D <&usbphy0>; + phy-names =3D "usb2-phy"; + + qcom,select-utmi-as-pipe-clk; + qcom,select-utmi-as-ref-clk; + + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + + status =3D "disabled"; }; =20 intc: interrupt-controller@b000000 { --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BC7B3F6C2D; Tue, 25 Aug 2026 10:43:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-6-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=5460; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=gdbpY1GROdrMhOSCYV276n/5Y7paNY112o8bpbwPIZY=; b=UKXdBccAqZoJwx+wuJcjfo3zeDOMwPbA3eWB+kereCt44wCBDC7sXOp+QIgsNmbV9C5WygWGU JaF3imUk7PnBnAP/GfFGT9ijYnThUnbtEshr4jyVaRA6kls034aL/Uq X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller nodes and update to using latest bindings and flattened driver approach. Add property to both USB controller nodes to select UTMI as reference clock for the DWC3 core to calculate the right values for the period and frame length adjustment. Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 12 ++-- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 89 +++++++++++++------------= ---- 2 files changed, 44 insertions(+), 57 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/= dts/qcom/ipq5424-rdp466.dts index be8657239c46..dfd6a124686a 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts +++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts @@ -74,14 +74,6 @@ vreg_misc_0p925: regulator-usb-0p925 { }; }; =20 -&dwc_0 { - dr_mode =3D "host"; -}; - -&dwc_1 { - dr_mode =3D "host"; -}; - &pcie2 { pinctrl-0 =3D <&pcie2_default_state>; pinctrl-names =3D "default"; @@ -282,10 +274,14 @@ &uart1 { }; =20 &usb2 { + dr_mode =3D "host"; + status =3D "okay"; }; =20 &usb3 { + dr_mode =3D "host"; + status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qc= om/ipq5424.dtsi index 702061e16a58..648f95d70448 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -639,12 +639,9 @@ qusb_phy_1: phy@71000 { status =3D "disabled"; }; =20 - usb2: usb2@1ef8800 { - compatible =3D "qcom,ipq5424-dwc3", "qcom,dwc3"; - reg =3D <0 0x01ef8800 0 0x400>; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb2: usb2@1e00000 { + compatible =3D "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; + reg =3D <0 0x01e00000 0 0xfc100>; =20 clocks =3D <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, @@ -663,33 +660,32 @@ usb2: usb2@1ef8800 { assigned-clock-rates =3D <200000000>, <24000000>; =20 - interrupts-extended =3D <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended =3D <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "dm_hs_phy_irq", "dp_hs_phy_irq"; =20 resets =3D <&gcc GCC_USB1_BCR>; + + phys =3D <&qusb_phy_1>; + phy-names =3D "usb2-phy"; + qcom,select-utmi-as-pipe-clk; - status =3D "disabled"; + qcom,select-utmi-as-ref-clk; =20 - dwc_1: usb@1e00000 { - compatible =3D "snps,dwc3"; - reg =3D <0 0x01e00000 0 0xe000>; - clocks =3D <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names =3D "ref"; - interrupts =3D ; - phys =3D <&qusb_phy_1>; - phy-names =3D "usb2-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - }; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + + status =3D "disabled"; }; =20 qusb_phy_0: phy@7b000 { @@ -730,13 +726,9 @@ ssphy_0: phy@7d000 { status =3D "disabled"; }; =20 - usb3: usb3@8af8800 { - compatible =3D "qcom,ipq5424-dwc3", "qcom,dwc3"; - reg =3D <0 0x08af8800 0 0x400>; - - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb3: usb3@8a00000 { + compatible =3D "qcom,ipq5424-dwc3", "qcom,snps-dwc3"; + reg =3D <0 0x08a00000 0 0xfc100>; =20 clocks =3D <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, @@ -755,34 +747,33 @@ usb3: usb3@8af8800 { assigned-clock-rates =3D <200000000>, <24000000>; =20 - interrupts-extended =3D <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended =3D <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "dm_hs_phy_irq", "dp_hs_phy_irq"; =20 resets =3D <&gcc GCC_USB_BCR>; - status =3D "disabled"; =20 - dwc_0: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0 0x08a00000 0 0xcd00>; - clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "ref"; - interrupts =3D ; - phys =3D <&qusb_phy_0>, <&ssphy_0>; - phy-names =3D "usb2-phy", "usb3-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - }; + phys =3D <&qusb_phy_0>, <&ssphy_0>; + phy-names =3D "usb2-phy", "usb3-phy"; + + qcom,select-utmi-as-ref-clk; + + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + + status =3D "disabled"; }; =20 timer@f420000 { --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 176C73F5BD7; Tue, 25 Aug 2026 10:43:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654584; cv=none; b=RdmCYb37Kj0zEFxO2TVhY8srHPXeQZqfTfK6yxXYrV9UXm9vSuHBJfEwyVCBkC9q23nnY5AdU4Ci8zzZy85h+jH68bKTVGK8iYnaXJJ9OIrkddu0ruwY2owJpRoxAB+WrsR6z5q4rbAcSXfwbK10vU1sgo0PlYo0YhicQQp676M= ARC-Message-Signature: i=1; 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b=FIfEtTRzNwuPSBdHeu7A0O7f+JxcesvZ58BUMjHIFmjCYl61Fi632WGEEFEPakffD /lCl1IBb7jfEPQ6moy5ZlEeb0taPCk6EIBvPj7xMe+EFoLBr9eIT/FtZyubEzxKvH1 4wWbuEc0pFuZqBiGvI5yrCudDj5yYsFuvje9h0xfkwWoN2gjde7xtRjpWqgcHlBobE hlpBPXe6Vq7Wwm2l9v9rBLwT4mbBXlHeQ8695EimZgJQRoAYtEQSuUq3Bc4dmLPvRJ Q1PI/ynGXNcmblZUS9ZJbSU2Y7Ras4YGkZyc2pXqneDWsqOIqFMsNvTwwu8vVJJpUw 4ovt6rDXxLgkw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A19B3C61DB6; Tue, 25 Aug 2026 10:43:03 +0000 (UTC) From: George Moussalem via B4 Relay Date: Tue, 25 Aug 2026 14:42:32 +0400 Subject: [PATCH 7/9] arm64: dts: qcom: ipq6018: Flatten usb controller nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-7-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=4884; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=aUKQ2DqvYtl1g4KXgUauo5s7uDYsNKGbePueF7ygyUQ=; b=fVQrZVVQLceQi065nAZAiAEV8AV1xpRLIVf0Di7GMboKktHVxciBOec8h85j0+B7XxQ0kQDZq zDH1hVJI47bDVgtkOId7wzIvfHCNb5Hw07OJOCvrKXQd3a79lA1+bmY X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller nodes and update to using latest bindings and flattened driver approach. This SoC has two USB controllers of which the USB3 node had a ref clock populated in the DWC3 child node. Add property to the USB3 node only to select UTMI as reference clock for the DWC3 core to calculate the right values for the period and frame length adjustment. Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 99 ++++++++++++++++---------------= ---- 1 file changed, 46 insertions(+), 53 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qc= om/ipq6018.dtsi index 0701517275d4..4b39616dd899 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -423,12 +423,10 @@ pwm: pwm@1941010 { status =3D "disabled"; }; =20 - usb2: usb@70f8800 { - compatible =3D "qcom,ipq6018-dwc3", "qcom,dwc3"; - reg =3D <0x0 0x070f8800 0x0 0x400>; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb2: usb@7000000 { + compatible =3D "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; + reg =3D <0x0 0x07000000 0x0 0xfc100>; + clocks =3D <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; @@ -441,27 +439,26 @@ usb2: usb@70f8800 { assigned-clock-rates =3D <133330000>, <24000000>; =20 - interrupts =3D , + interrupts =3D , + , ; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy"; =20 resets =3D <&gcc GCC_USB1_BCR>; - status =3D "disabled"; =20 - dwc_1: usb@7000000 { - compatible =3D "snps,dwc3"; - reg =3D <0x0 0x07000000 0x0 0xcd00>; - interrupts =3D ; - phys =3D <&qusb_phy_1>; - phy-names =3D "usb2-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode =3D "host"; - }; + phys =3D <&qusb_phy_1>; + phy-names =3D "usb2-phy"; + + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode =3D "host"; + + status =3D "disabled"; }; =20 sdhc: mmc@7804000 { @@ -669,21 +666,18 @@ qpic_nand: nand-controller@79b0000 { status =3D "disabled"; }; =20 - usb3: usb@8af8800 { - compatible =3D "qcom,ipq6018-dwc3", "qcom,dwc3"; - reg =3D <0x0 0x08af8800 0x0 0x400>; - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; + usb3: usb@8a00000 { + compatible =3D "qcom,ipq6018-dwc3", "qcom,snps-dwc3"; + reg =3D <0x0 0x08a00000 0x0 0xfc100>; =20 clocks =3D <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names =3D "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_MASTER_CLK>, @@ -692,32 +686,31 @@ usb3: usb@8af8800 { <133330000>, <24000000>; =20 - interrupts =3D , + interrupts =3D , + , , ; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "ss_phy_irq"; =20 resets =3D <&gcc GCC_USB0_BCR>; - status =3D "disabled"; =20 - dwc_0: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x0 0x08a00000 0x0 0xcd00>; - interrupts =3D ; - phys =3D <&qusb_phy_0>, <&ssphy_0>; - phy-names =3D "usb2-phy", "usb3-phy"; - clocks =3D <&xo>; - clock-names =3D "ref"; - tx-fifo-resize; - snps,parkmode-disable-ss-quirk; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode =3D "host"; - }; + phys =3D <&qusb_phy_0>, <&ssphy_0>; + phy-names =3D "usb2-phy", "usb3-phy"; + + qcom,select-utmi-as-ref-clk; + + tx-fifo-resize; + snps,parkmode-disable-ss-quirk; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode =3D "host"; + + status =3D "disabled"; }; =20 intc: interrupt-controller@b000000 { --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FAF33F58CA; Tue, 25 Aug 2026 10:43:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-8-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=5157; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=hIddtiBZwT8syQLEUJVTu1O+HNgK8pUyjSoAJUmUX9Y=; b=xc+csD+UoB54hrKPw1ecnzhZiRJgUlsGMFHE1B9KaHxKwHuP6OWJhfwIuBffKjXb+AseKVhrg VmilW7cJdBdAaM9N5KhcyjEuWMdc7I9oe9cApDbgaciAsdzuDGtfxLm X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller nodes and update to using latest bindings and flattened driver approach. In addition, fix indentation of properties in both nodes. Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 112 ++++++++++++++++--------------= ---- 1 file changed, 52 insertions(+), 60 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qc= om/ipq8074.dtsi index 75a5ae30d966..d4a86b3815f2 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -625,104 +625,96 @@ qpic_nand: nand-controller@79b0000 { status =3D "disabled"; }; =20 - usb_0: usb@8af8800 { - compatible =3D "qcom,ipq8074-dwc3", "qcom,dwc3"; - reg =3D <0x08af8800 0x400>; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; + usb_0: usb@8a00000 { + compatible =3D "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; + reg =3D <0x08a00000 0xfc100>; =20 clocks =3D <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, - <&gcc GCC_USB0_MASTER_CLK>, - <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names =3D "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_MOCK_UTMI_CLK>; assigned-clock-rates =3D <133330000>, - <133330000>, - <19200000>; + <133330000>, + <19200000>; =20 - interrupts =3D , + interrupts =3D , + , , ; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "ss_phy_irq"; =20 power-domains =3D <&gcc USB0_GDSC>; =20 + phys =3D <&qusb_phy_0>, <&ssphy_0>; + phy-names =3D "usb2-phy", "usb3-phy"; + + snps,parkmode-disable-ss-quirk; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode =3D "host"; + resets =3D <&gcc GCC_USB0_BCR>; - status =3D "disabled"; =20 - dwc_0: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x8a00000 0xcd00>; - interrupts =3D ; - phys =3D <&qusb_phy_0>, <&ssphy_0>; - phy-names =3D "usb2-phy", "usb3-phy"; - snps,parkmode-disable-ss-quirk; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode =3D "host"; - }; + status =3D "disabled"; }; =20 - usb_1: usb@8cf8800 { - compatible =3D "qcom,ipq8074-dwc3", "qcom,dwc3"; - reg =3D <0x08cf8800 0x400>; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; + usb_1: usb@8c00000 { + compatible =3D "qcom,ipq8074-dwc3", "qcom,snps-dwc3"; + reg =3D <0x08c00000 0xfc100>; =20 clocks =3D <&gcc GCC_SYS_NOC_USB1_AXI_CLK>, - <&gcc GCC_USB1_MASTER_CLK>, - <&gcc GCC_USB1_SLEEP_CLK>, - <&gcc GCC_USB1_MOCK_UTMI_CLK>; + <&gcc GCC_USB1_MASTER_CLK>, + <&gcc GCC_USB1_SLEEP_CLK>, + <&gcc GCC_USB1_MOCK_UTMI_CLK>; clock-names =3D "cfg_noc", - "core", - "sleep", - "mock_utmi"; + "core", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_SYS_NOC_USB1_AXI_CLK>, <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; assigned-clock-rates =3D <133330000>, - <133330000>, - <19200000>; + <133330000>, + <19200000>; =20 - interrupts =3D , + interrupts =3D , + , , ; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "ss_phy_irq"; =20 power-domains =3D <&gcc USB1_GDSC>; =20 + phys =3D <&qusb_phy_1>, <&ssphy_1>; + phy-names =3D "usb2-phy", "usb3-phy"; + + snps,parkmode-disable-ss-quirk; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode =3D "host"; + resets =3D <&gcc GCC_USB1_BCR>; - status =3D "disabled"; =20 - dwc_1: usb@8c00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x8c00000 0xcd00>; - interrupts =3D ; - phys =3D <&qusb_phy_1>, <&ssphy_1>; - phy-names =3D "usb2-phy", "usb3-phy"; - snps,parkmode-disable-ss-quirk; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - dr_mode =3D "host"; - }; + status =3D "disabled"; }; =20 intc: interrupt-controller@b000000 { --=20 2.53.0 From nobody Mon Sep 28 06:35:53 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C0BC3F6C58; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260825-ipq-flatten-usb-v1-9-5c1f3170bbe9@outlook.com> References: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> In-Reply-To: <20260825-ipq-flatten-usb-v1-0-5c1f3170bbe9@outlook.com> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Thinh Nguyen , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , George Moussalem X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654580; l=3319; i=george.moussalem@outlook.com; s=20250321; h=from:subject:message-id; bh=59gaIbwJxqd1gc9ND5BnMnViKAwQRYOhscidCPM/sVU=; b=56OxhOno6ncFhmyV+lLK7MyeSU90Ba7ltrTmbq8svHp4yoo7Mrg6RwBeALXCPymWUidFhAQbb nqGT1wG55ajAbNswsgZa9/Y4ONsIy9+dE2IA8weLqoQEiKCJ4uim7OQ X-Developer-Key: i=george.moussalem@outlook.com; a=ed25519; pk=/PuRTSI9iYiHwcc6Nrde8qF4ZDhJBlUgpHdhsIjnqIk= X-Endpoint-Received: by B4 Relay for george.moussalem@outlook.com/20250321 with auth_id=364 X-Original-From: George Moussalem Reply-To: george.moussalem@outlook.com From: George Moussalem Flatten usb controller nodes and update to using latest bindings and flattened driver approach. Add property to the USB node to select UTMI as reference clock for the DWC3 core to calculate the right values for the period and frame length adjustment. Signed-off-by: George Moussalem --- arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 6 ++-- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 42 +++++++++++---------= ---- 2 files changed, 21 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/= boot/dts/qcom/ipq9574-rdp-common.dtsi index 62877b46f9b3..0d06a838c233 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi @@ -252,10 +252,6 @@ flash@0 { }; }; =20 -&usb_0_dwc3 { - dr_mode =3D "host"; -}; - &usb_0_qmpphy { vdda-pll-supply =3D <&mp5496_l5>; vdda-phy-supply =3D <®ulator_fixed_0p925>; @@ -272,6 +268,8 @@ &usb_0_qusbphy { }; =20 &usb3 { + dr_mode =3D "host"; + status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index 5a5bda5f21a1..b56ba76e8b54 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -756,12 +756,9 @@ usb_0_qmpphy: phy@7d000 { status =3D "disabled"; }; =20 - usb3: usb@8af8800 { - compatible =3D "qcom,ipq9574-dwc3", "qcom,dwc3"; - reg =3D <0x08af8800 0x400>; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; + usb3: usb@8a00000 { + compatible =3D "qcom,ipq9574-dwc3", "qcom,snps-dwc3"; + reg =3D <0x08a00000 0xfc100>; =20 clocks =3D <&gcc GCC_SNOC_USB_CLK>, <&gcc GCC_USB0_MASTER_CLK>, @@ -780,32 +777,31 @@ usb3: usb@8af8800 { assigned-clock-rates =3D <200000000>, <24000000>; =20 - interrupts-extended =3D <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended =3D <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, <&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "pwr_event", + interrupt-names =3D "dwc_usb3", + "pwr_event", "qusb2_phy", "dm_hs_phy_irq", "dp_hs_phy_irq"; =20 resets =3D <&gcc GCC_USB_BCR>; - status =3D "disabled"; =20 - usb_0_dwc3: usb@8a00000 { - compatible =3D "snps,dwc3"; - reg =3D <0x8a00000 0xcd00>; - clocks =3D <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "ref"; - interrupts =3D ; - phys =3D <&usb_0_qusbphy>, <&usb_0_qmpphy>; - phy-names =3D "usb2-phy", "usb3-phy"; - tx-fifo-resize; - snps,is-utmi-l1-suspend; - snps,hird-threshold =3D /bits/ 8 <0x0>; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - }; + phys =3D <&usb_0_qusbphy>, <&usb_0_qmpphy>; + phy-names =3D "usb2-phy", "usb3-phy"; + + qcom,select-utmi-as-ref-clk; + + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold =3D /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + + status =3D "disabled"; }; =20 intc: interrupt-controller@b000000 { --=20 2.53.0