From nobody Mon Sep 28 08:47:22 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 172E041A4E0; Mon, 24 Aug 2026 12:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; cv=none; b=QQIT1leth4ECHCW6itZDJmZ7f+cwXfftR6mbIqlgR36CJYZk0PKAVqZGyLkAzeWpDl7Wuph38ttNgbJZJzI6SfPt8jOSz0xg0lf+/ZVMHu9lQ/vd+eS6zCpw89og4740SXe8IY0OLBydQPhuWDsEJQ8jZxT0xHN/uHlLX8lYcqI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; c=relaxed/simple; bh=QCU6ybMTej+JbME3Y8uLe9x6qDs9WyhgQ4MpAnIADYE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qSdANgQ0+0H4RUzgq0nOELzU5ojL/AKOhIkxpJmeQu4pS0mUJrQTXoHBn60pJfPC5KX1ypFAed8YqDRoVppwVvATAWj2mJsw31fD7ttyn8/jeDCM1DHZnx0K0xhDH56zRN4hZTsYKcrNiV68byl1lOlquv0zMHvTlanIqNfn8eU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JSAKU9O0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JSAKU9O0" Received: by smtp.kernel.org (Postfix) with ESMTPS id B6733C19425; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787574696; bh=QCU6ybMTej+JbME3Y8uLe9x6qDs9WyhgQ4MpAnIADYE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JSAKU9O0PYj2L9UswmdTyeHUe6VP+grUTODEFiSgQpsH2MWAlmEt+t3dRj7Ho+eqH hO8+CabebB6YYuhLYDJAhGR8YZSNQRjv5UZGRVHq9FYiUwEqUrpMFCYBg4XHEX93kS 55GpY737IBPA5SFTIs4NlCxprisXWxkkO7BTubm/JIAyuIUPcEpDEmi66t4OVJsTl4 vBEgYp2Gor9aaspEipf+iamB6L0pV4AilEq2vxo6rUEUfShYZrxHDw78YS4GmWPaOx XSUdm/WjBjquEALweMrTymVm1SmhEn5rqPbk1txrmR8s4qNqEf0CcByFyYgrNlDAjF WilT474CiyErg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95C93C5DF9B; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) From: Jean-Baptiste Maneyrol via B4 Relay Date: Mon, 24 Aug 2026 14:30:07 +0200 Subject: [PATCH v2 1/4] iio: imu: inv_icm42600: sleep before enabling FIFO data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-inv-icm42600-enhacements-v2-1-0040837fde12@tdk.com> References: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> In-Reply-To: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jean-Baptiste Maneyrol , Jean-Baptiste Maneyrol , Jonathan Cameron X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787574695; l=2859; i=jean-baptiste.maneyrol@tdk.com; s=20240923; h=from:subject:message-id; bh=zSqZCZXt3vQQXgixrfVXug/hYSEOSR96v8Z7vTJ9wTQ=; b=YJI9IgVr8hcnwMOHHh5Mq6YLB3CiZwlm/1i0qFSAmX87D4SUtvpmbaHw78JA9s9WhfUNQ1gv/ fVubuloT/ijCO6YdWQ4kzQXDBgoCbMFZF+BTAc9p340DysdDNxuvVWQ X-Developer-Key: i=jean-baptiste.maneyrol@tdk.com; a=ed25519; pk=bRqF1WYk0hR3qrnAithOLXSD0LvSu8DUd+quKLxCicI= X-Endpoint-Received: by B4 Relay for jean-baptiste.maneyrol@tdk.com/20240923 with auth_id=218 X-Original-From: Jean-Baptiste Maneyrol Reply-To: jean-baptiste.maneyrol@tdk.com From: Jean-Baptiste Maneyrol When turning accel or gyro on, a sleep is required for letting the mechanical part stabilize before reporting correct data. Move the sleep before enabling FIFO data to prevent push of incorrect data. We need to unlock the driver mutex while sleeping to not block data of the other sensor if it is running. There is no possible race here because we are already under IIO mode mutex locked since it is a IIO buffer callback. Signed-off-by: Jean-Baptiste Maneyrol --- drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c | 16 ++++++++++++---- drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c | 16 ++++++++++++---- 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c b/drivers/ii= o/imu/inv_icm42600/inv_icm42600_accel.c index 4b0e3cd8a506..3197081a808a 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c @@ -254,15 +254,23 @@ static int inv_icm42600_accel_update_scan_mode(struct= iio_dev *indio_dev, fifo_en |=3D INV_ICM42600_SENSOR_ACCEL; } =20 + /* + * Sleep maximum stabilization time before enabling data in FIFO. + * We need to release the driver lock to not block gyro data processing. + * There is no possible race here since we are under IIO mutex locked. + */ + sleep =3D max(sleep_accel, sleep_temp); + if (sleep) { + mutex_unlock(&st->lock); + msleep(sleep); + mutex_lock(&st->lock); + } + /* update data FIFO write */ ret =3D inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); =20 out_unlock: mutex_unlock(&st->lock); - /* sleep maximum required time */ - sleep =3D max(sleep_accel, sleep_temp); - if (sleep) - msleep(sleep); return ret; } =20 diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c b/drivers/iio= /imu/inv_icm42600/inv_icm42600_gyro.c index 253bf571439d..9de5c383665f 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c @@ -126,15 +126,23 @@ static int inv_icm42600_gyro_update_scan_mode(struct = iio_dev *indio_dev, fifo_en |=3D INV_ICM42600_SENSOR_GYRO; } =20 + /* + * Sleep maximum stabilization time before enabling data in FIFO. + * We need to release the driver lock to not block accel data processing. + * There is no possible race here since we are under IIO mutex locked. + */ + sleep =3D max(sleep_gyro, sleep_temp); + if (sleep) { + mutex_unlock(&st->lock); + msleep(sleep); + mutex_lock(&st->lock); + } + /* update data FIFO write */ ret =3D inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); =20 out_unlock: mutex_unlock(&st->lock); - /* sleep maximum required time */ - sleep =3D max(sleep_gyro, sleep_temp); - if (sleep) - msleep(sleep); return ret; } =20 --=20 2.55.0 From nobody Mon Sep 28 08:47:22 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 173B741A4E4; Mon, 24 Aug 2026 12:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; cv=none; b=Lvb3sC4873ouwPwAGfGhDSIqklUAJMhAITAYOC6MnTgocCteNDQV3GkE54ijuHAR8CeOW/MLf0d3nxNE2ncDHYQF9202jfNH6ApzNV8Tx6p7OJOzwmwPXx4+gDipStV1smZso7tO8RltqNRx1c4Bz0zGGpOFmeIhCN+8b4OAdyc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; c=relaxed/simple; bh=QVG2mL9l4+6bwR+PJ1wuVD2fZla4HMp8DiPKeNhew0s=; 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Mon, 24 Aug 2026 12:31:36 +0000 (UTC) From: Jean-Baptiste Maneyrol via B4 Relay Date: Mon, 24 Aug 2026 14:30:08 +0200 Subject: [PATCH v2 2/4] iio: imu: inv_icm42600: use 2 sensors fixed packet size of 16 bytes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-inv-icm42600-enhacements-v2-2-0040837fde12@tdk.com> References: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> In-Reply-To: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jean-Baptiste Maneyrol , Jean-Baptiste Maneyrol , Jonathan Cameron X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787574695; l=3984; i=jean-baptiste.maneyrol@tdk.com; s=20240923; h=from:subject:message-id; bh=mNAm8b4ddHbtiXu6xptZFNN+mbbMV5qtuBUPJ1NmHtE=; b=ZuL4YPV/Xrq9Y1ehBN8r95BCijfBgaf7uje8Z6cxyKE8/kyyF+rXybR/Rwpg67vtZII0mU03c AIZDCoUZ2evA0V3QOd8Gzpi15ViqRuJLt1WM9X5J4CKnZmf5WKR8RGl X-Developer-Key: i=jean-baptiste.maneyrol@tdk.com; a=ed25519; pk=bRqF1WYk0hR3qrnAithOLXSD0LvSu8DUd+quKLxCicI= X-Endpoint-Received: by B4 Relay for jean-baptiste.maneyrol@tdk.com/20240923 with auth_id=218 X-Original-From: Jean-Baptiste Maneyrol Reply-To: jean-baptiste.maneyrol@tdk.com From: Jean-Baptiste Maneyrol Sometimes dynamic switch between 1 sensor frame to 2 sensors frame is not working when there are too much frames already in the FIFO. By moving accel/gyro on sleep before turning FIFO on, we are storing many FIFO frames before updating the frame format hitting the bug everytime. Fix that by always using the 2 sensors frame of 16 bytes. Also update the hwfifo max watermark reported. Signed-off-by: Jean-Baptiste Maneyrol --- drivers/iio/imu/inv_icm42600/inv_icm42600.h | 4 +-- drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c | 34 ++++++++----------= ---- 2 files changed, 14 insertions(+), 24 deletions(-) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600.h b/drivers/iio/imu/= inv_icm42600/inv_icm42600.h index b55d993f0264..f6c7c84c7e45 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h @@ -356,8 +356,8 @@ struct inv_icm42600_sensor_state { cpu_to_le16((_wm) & GENMASK(11, 0)) /* FIFO is 2048 bytes, let 12 samples for reading latency */ #define INV_ICM42600_FIFO_WATERMARK_MAX (2048 - 12 * 16) -/* INV_ICM42600_FIFO_WATERMARK_MAX / 8 =3D 232 */ -#define INV_ICM42600_FIFO_WATERMARK_MAX_SAMPLES 232 +/* INV_ICM42600_FIFO_WATERMARK_MAX / 16 =3D 116 */ +#define INV_ICM42600_FIFO_WATERMARK_MAX_SAMPLES 116 =20 #define INV_ICM42600_REG_INT_CONFIG1 0x0064 #define INV_ICM42600_INT_CONFIG1_TPULSE_DURATION BIT(6) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/i= io/imu/inv_icm42600/inv_icm42600_buffer.c index 998d312f7bde..5421122057ee 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c @@ -131,13 +131,16 @@ int inv_icm42600_buffer_set_fifo_en(struct inv_icm426= 00_state *st, INV_ICM42600_FIFO_CONFIG1_GYRO_EN | INV_ICM42600_FIFO_CONFIG1_ACCEL_EN; =20 - val =3D 0; - if (fifo_en & INV_ICM42600_SENSOR_GYRO) - val |=3D INV_ICM42600_FIFO_CONFIG1_GYRO_EN; - if (fifo_en & INV_ICM42600_SENSOR_ACCEL) - val |=3D INV_ICM42600_FIFO_CONFIG1_ACCEL_EN; - if (fifo_en & INV_ICM42600_SENSOR_TEMP) - val |=3D INV_ICM42600_FIFO_CONFIG1_TEMP_EN; + /* + * Always enable/disable all bits to ensure we can flawlessly add + * accel/gyro data in the FIFO while it is running. + */ + if (fifo_en) + val =3D INV_ICM42600_FIFO_CONFIG1_TEMP_EN | + INV_ICM42600_FIFO_CONFIG1_GYRO_EN | + INV_ICM42600_FIFO_CONFIG1_ACCEL_EN; + else + val =3D 0; =20 ret =3D regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, = val); if (ret) @@ -149,19 +152,6 @@ int inv_icm42600_buffer_set_fifo_en(struct inv_icm4260= 0_state *st, return 0; } =20 -static size_t inv_icm42600_get_packet_size(unsigned int fifo_en) -{ - size_t packet_size; - - if ((fifo_en & INV_ICM42600_SENSOR_GYRO) && - (fifo_en & INV_ICM42600_SENSOR_ACCEL)) - packet_size =3D INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; - else - packet_size =3D INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE; - - return packet_size; -} - static unsigned int inv_icm42600_wm_truncate(unsigned int watermark, size_t packet_size) { @@ -209,7 +199,7 @@ int inv_icm42600_buffer_update_watermark(struct inv_icm= 42600_state *st) __le16 raw_wm; int ret; =20 - packet_size =3D inv_icm42600_get_packet_size(st->fifo.en); + packet_size =3D INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; =20 /* compute sensors latency, depending on sensor watermark and odr */ wm_gyro =3D inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size= ); @@ -495,7 +485,7 @@ int inv_icm42600_buffer_fifo_read(struct inv_icm42600_s= tate *st, /* compute maximum FIFO read size (watermark for max =3D 0 interrupt case= ) */ if (max =3D=3D 0) max =3D st->fifo.watermark.value; - max_count =3D max * inv_icm42600_get_packet_size(st->fifo.en); + max_count =3D max * INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; =20 /* read FIFO count value */ raw_fifo_count =3D (__be16 *)st->buffer; --=20 2.55.0 From nobody Mon Sep 28 08:47:22 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 136EA4195DA; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="A4XKQcrz" Received: by smtp.kernel.org (Postfix) with ESMTPS id CC80BC2BCFD; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787574696; bh=zh7Rco5/rcIpTtHldYR1Wtd48uDL2MN7LmZkjJu263Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=A4XKQcrzwbGjrVtSlfcy07oYR2+HHpysuIhimdWG95Gs8JLiR1Xmvg89lC70tj2fX EJtgWG7o6/s76GhvaEjH1j89XcZxEVOaOgMWNFHhmy6gaI/6MJ/Rb7dYjIMcYpx8zQ mWTW823yTHXXmdfwU6o+K3QJI7zzA3e3GQscfRpRDbJJJAF66QL4hDrObQ+4E3FBMS t9PwHOCGvpJzhUg4rKT7R/xeRPYE/BK/qNsHp+cr+iw6w+4dUg4xy766kgelFtdHZA lEzxSCCINWrJIVUul0ifuQx23DxLGilVFYLb7tQB8/Crl7qRhF8hv3lu8ckAf0FhWS nUWkbGh97duhg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9C00C5DF94; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) From: Jean-Baptiste Maneyrol via B4 Relay Date: Mon, 24 Aug 2026 14:30:09 +0200 Subject: [PATCH v2 3/4] iio: imu: inv_icm42600: simplify watermark computation by using GCD Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-inv-icm42600-enhacements-v2-3-0040837fde12@tdk.com> References: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> In-Reply-To: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jean-Baptiste Maneyrol , Jean-Baptiste Maneyrol , Jonathan Cameron X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787574695; l=4544; i=jean-baptiste.maneyrol@tdk.com; s=20240923; h=from:subject:message-id; bh=w5ahhNMA8cXSfMKpbubZjHPf7yCjR67wSh0jwhlYIrU=; b=PmKyqFklwTcYKXeF9TWpEI2eb+9t2fmQb8+oi1GHMPDy8zgiA58BaD6yyi1O9sNNfrHFX1mfh YqYtIr34fTECKR0ZHKwWOmaKkvxKN5RM6oHOqmQKj2OZosMXYCECaAC X-Developer-Key: i=jean-baptiste.maneyrol@tdk.com; a=ed25519; pk=bRqF1WYk0hR3qrnAithOLXSD0LvSu8DUd+quKLxCicI= X-Endpoint-Received: by B4 Relay for jean-baptiste.maneyrol@tdk.com/20240923 with auth_id=218 X-Original-From: Jean-Baptiste Maneyrol Reply-To: jean-baptiste.maneyrol@tdk.com From: Jean-Baptiste Maneyrol The watermark computation was in fact resulting in computing the GCD of the latencies when both sensors are on. GCD is required because of the IIO buffer watermark. Move to use gcd() and update documentation accordingly. Signed-off-by: Jean-Baptiste Maneyrol --- drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c | 47 ++++++++++--------= ---- 1 file changed, 21 insertions(+), 26 deletions(-) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/i= io/imu/inv_icm42600/inv_icm42600_buffer.c index 5421122057ee..b1a43ca610c4 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include #include #include @@ -175,15 +176,14 @@ static unsigned int inv_icm42600_wm_truncate(unsigned= int watermark, * * FIFO watermark threshold is computed based on the required watermark va= lues * set for gyro and accel sensors. Since watermark is all about acceptable= data - * latency, use the smallest setting between the 2. It means choosing the - * smallest latency but this is not as simple as choosing the smallest wat= ermark - * value. Latency depends on watermark and ODR. It requires several steps: - * 1) compute gyro and accel latencies and choose the smallest value. - * 2) adapt the chosen latency so that it is a multiple of both gyro and a= ccel - * ones. Otherwise it is possible that you don't meet a requirement. (f= or - * example with gyro @100Hz wm 4 and accel @100Hz with wm 6, choosing t= he - * value of 4 will not meet accel latency requirement because 6 is not a - * multiple of 4. You need to use the value 2.) + * latency, we should need to use the smallest latency value. But it is no= t as + * simple as choosing the smallest watermark value. Latency depends on wat= ermark + * and ODR and IIO buffer watermark adds another requirement. The required= steps: + * 1) compute gyro and accel periods and latencies + * 2) Use the smallest period and the GCD of the latencies. GCD is required + * because of the IIO buffer watermark that will prevent send of data i= f not + * crossed. Thus accel and gyro watermarks must be a multiple of the wa= termark + * value. Computing the GCD gives us the biggest value that meets this = criteria. * 3) Since all periods are multiple of each others, watermark is computed= by * dividing this computed latency by the smallest period, which corresp= onds * to the FIFO frequency. Beware that this is only true because we are = not @@ -193,7 +193,7 @@ int inv_icm42600_buffer_update_watermark(struct inv_icm= 42600_state *st) { size_t packet_size, wm_size; unsigned int wm_gyro, wm_accel, watermark; - u32 period_gyro, period_accel; + u32 period_gyro, period_accel, period; u32 latency_gyro, latency_accel, latency; bool restore; __le16 raw_wm; @@ -221,22 +221,17 @@ int inv_icm42600_buffer_update_watermark(struct inv_i= cm42600_state *st) watermark =3D wm_gyro; st->fifo.watermark.eff_gyro =3D wm_gyro; } else { - /* compute the smallest latency that is a multiple of both */ - if (latency_gyro <=3D latency_accel) - latency =3D latency_gyro - (latency_accel % latency_gyro); - else - latency =3D latency_accel - (latency_gyro % latency_accel); - /* all this works because periods are multiple of each others */ - watermark =3D latency / min(period_gyro, period_accel); - if (watermark < 1) - watermark =3D 1; - /* update effective watermark */ - st->fifo.watermark.eff_gyro =3D latency / period_gyro; - if (st->fifo.watermark.eff_gyro < 1) - st->fifo.watermark.eff_gyro =3D 1; - st->fifo.watermark.eff_accel =3D latency / period_accel; - if (st->fifo.watermark.eff_accel < 1) - st->fifo.watermark.eff_accel =3D 1; + /* + * In case of both accel and gyro enabled, we need to use the + * shortest period and the gcd of the latencies. Gcd is required + * because of the IIO buffer watermark that will prevent data + * sending if we are not crossing the watermark level. + */ + period =3D min(period_gyro, period_accel); + latency =3D gcd(latency_gyro, latency_accel); + watermark =3D max(latency / period, 1); + st->fifo.watermark.eff_gyro =3D max(latency / period_gyro, 1); + st->fifo.watermark.eff_accel =3D max(latency / period_accel, 1); } =20 /* compute watermark value in bytes */ --=20 2.55.0 From nobody Mon Sep 28 08:47:22 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14E12419FD2; Mon, 24 Aug 2026 12:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; cv=none; b=jDxImEN2jey6RNYuhxEJpt93mGYOJR8uoPTTRqjQmcHgqbiMURbJg7CzzI1BHGQYMdF9WgERiywDwAZJO/E0hTq3OwfQnKOtIZqrmJ8Zq+5gkXAiRqWQG0IXGCqGWgW4q8TNyiEIhv1DV1xRQlY4HnQ9T8WfNchGI9m6RpJSfCM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787574697; c=relaxed/simple; bh=HXue9k6IGMoL9cs3zdJLOVXFVMKEHYebO+iwEOkq7l4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eE56kK/9UIJAtRWnyRr2BU9W+Ax2xZQGxzzM8bc9PVXMjOtFPoEBEqmDwV4etO8vZcQgUya4Hn5I8r0Z5pVYbzGwN826Zv2H/AWYeZF91o10O24/EE5NJDP51N0iTlnBiGGk1Mp/L08rQ10KqYsfFF5AJEMOKIQw2X+ptKZwysY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vNxgjI29; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vNxgjI29" Received: by smtp.kernel.org (Postfix) with ESMTPS id DF307C2BCFF; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787574696; bh=HXue9k6IGMoL9cs3zdJLOVXFVMKEHYebO+iwEOkq7l4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=vNxgjI29kyE94mqpZ/T9diRZJiu2pB9WDShGmEN2+agR+VVFIVNTPsIJqFYg4S4zX oJJ/poWn2V0FWru62csIe4SN8xLV0yTviZzjWMnXnycycGJT7CyS4VGULVHXoRAYcO Rm541Sb1gs3GvG+vu06xSTt8flDHFCKCeJ80ptBIJnXy/m0nqhDQKtTRfAE0wyzMFW AbbtKJ0t2N92JNcmiprNncbDILKic00pn0b19qsqZVS04xU0G8iAnNcay7YHs6bomW JHumbHiVG/WgFhxblzq5sr/klAZSWoDOOLYsuWlDDxYkoaLrNqJ+IcssWoEjtRUeH/ RID040JlS1kAw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C88CCC61DB4; Mon, 24 Aug 2026 12:31:36 +0000 (UTC) From: Jean-Baptiste Maneyrol via B4 Relay Date: Mon, 24 Aug 2026 14:30:10 +0200 Subject: [PATCH v2 4/4] iio: imu: inv_icm42600: do not read FIFO count for watermark it Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-inv-icm42600-enhacements-v2-4-0040837fde12@tdk.com> References: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> In-Reply-To: <20260824-inv-icm42600-enhacements-v2-0-0040837fde12@tdk.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jean-Baptiste Maneyrol , Jean-Baptiste Maneyrol , Jonathan Cameron X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787574695; l=2389; i=jean-baptiste.maneyrol@tdk.com; s=20240923; h=from:subject:message-id; bh=Zm48u8KCXMBBkgQlt9czWfmZZ/N82LVph63qdI2PIO8=; b=azF5mX7dKXNNp3nyza0VdYJVC4Oo+5WI61bcFnkrbd8vQqx9RXLHAvJHwZNqLy/Cc6VyU3Rzg XNt//0Z58zdD/qh5KWJkNhPxeAZvO4kk2m2Gv5D+Asl/GXhsrXBNWtx X-Developer-Key: i=jean-baptiste.maneyrol@tdk.com; a=ed25519; pk=bRqF1WYk0hR3qrnAithOLXSD0LvSu8DUd+quKLxCicI= X-Endpoint-Received: by B4 Relay for jean-baptiste.maneyrol@tdk.com/20240923 with auth_id=218 X-Original-From: Jean-Baptiste Maneyrol Reply-To: jean-baptiste.maneyrol@tdk.com From: Jean-Baptiste Maneyrol Optimize data reading for high frequencies by not reading FIFO count in case of watermark interrupt. We cannot already read more than watermark samples because of the timestamping mechanism. It is required to not perturb the timing between the watermark interrupts. Since we also know there is at least watermark samples in the FIFO, let's just read these watermark FIFO samples directly without reading FIFO count in this case. Signed-off-by: Jean-Baptiste Maneyrol --- drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c | 33 ++++++++++--------= ---- 1 file changed, 15 insertions(+), 18 deletions(-) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/i= io/imu/inv_icm42600/inv_icm42600_buffer.c index b1a43ca610c4..ded45dfe46a2 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c @@ -477,24 +477,21 @@ int inv_icm42600_buffer_fifo_read(struct inv_icm42600= _state *st, st->fifo.nb.accel =3D 0; st->fifo.nb.total =3D 0; =20 - /* compute maximum FIFO read size (watermark for max =3D 0 interrupt case= ) */ - if (max =3D=3D 0) - max =3D st->fifo.watermark.value; - max_count =3D max * INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; - - /* read FIFO count value */ - raw_fifo_count =3D (__be16 *)st->buffer; - ret =3D regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, - raw_fifo_count, sizeof(*raw_fifo_count)); - if (ret) - return ret; - st->fifo.count =3D be16_to_cpup(raw_fifo_count); - - /* check and clamp FIFO count value */ - if (st->fifo.count =3D=3D 0) - return 0; - if (st->fifo.count > max_count) - st->fifo.count =3D max_count; + /* read watermark samples for interrupt case (max =3D 0) or read FIFO cou= nt */ + if (max =3D=3D 0) { + st->fifo.count =3D st->fifo.watermark.value * + INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; + } else { + raw_fifo_count =3D (__be16 *)st->buffer; + ret =3D regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, + raw_fifo_count, sizeof(*raw_fifo_count)); + if (ret) + return ret; + max_count =3D max * INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; + st->fifo.count =3D min(be16_to_cpup(raw_fifo_count), max_count); + if (st->fifo.count =3D=3D 0) + return 0; + } =20 /* read all FIFO data in internal buffer */ ret =3D regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA, --=20 2.55.0