From nobody Mon Sep 28 08:57:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E950421F05; Mon, 24 Aug 2026 13:12:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787577138; cv=none; b=GK2tis+NYav8Va00yM3BXzITcBgbTQFnQDMBhAvReE6us0THCJYoW9UHWUpKtmFNR7I6WDXZwtGvn/Pz+oLN/+dN1OuY38Suu/8UjILO3hvbCIpLikqe4fP10Th4Gjv6/ce50T/kDPzOwAlGK53+0wCCtJM6FL4J0DWYXN4tTl8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787577138; c=relaxed/simple; bh=QyXzZnJwkyxBDSEwT4XALNAbFVFz7Ox37OrO3JqwCZk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=URk1OdGuXjJ8xjAYRKPmg0m81v66rTXKeV5bn0jGDmlVqGvrAWVKz0/B3ymn9T77y7kKoWqE8L0uRQ3JjfhkocoADxq+2DVM6Ass8jBljOs3/R3OncqlxLAq0Eqk9cEDcXOaUUy/M5RLUpPALSDe7OgEnnpCCJN2hka9edNm1Lg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=p7NjkJO7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="p7NjkJO7" Received: by smtp.kernel.org (Postfix) with ESMTPS id CDF6CC19425; Mon, 24 Aug 2026 13:12:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787577137; bh=QyXzZnJwkyxBDSEwT4XALNAbFVFz7Ox37OrO3JqwCZk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=p7NjkJO7FloiQgAuqKk6zV+0yL9ZWDaWqO36zQDjya1zg0eZekTpPYjkSfqavibgf SON5OBnuQBIxhDJE7W+fZz7ByT4ZeIWYionNeSZM4potvBl01yx9/crETHJKapm0eR 0JJ6n+sflqxxVePsYb2ZlNWQ8GLkDWIF0X5vWXp1I6WlnhvBFXefJcl4Xpzg2wuWDr NAucYBQNra5pa+N7qKNzIQd4SgayKQ9B5XPMD+OdUvuKNJx1/vLtNQHVtS1XBjL3Fm BMACGGbYK3qrXtP0ILMc97IoRMgCKhbE4Wrnd4w0V/8OpvVPikuAqT6xyh7/wr5zjk OQGuOaHJweDuA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB06FC5DF94; Mon, 24 Aug 2026 13:12:17 +0000 (UTC) From: Vincent Jardin via B4 Relay Date: Mon, 24 Aug 2026 15:12:01 +0200 Subject: [PATCH v2 1/3] arm64: dts: lx2160a: fix incorrect pinmux Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-for-upstream-lx2160a-pinmux-fix-v2-1-0a525d5f4cd5@free.fr> References: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> In-Reply-To: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> To: Frank Li , Carlos Song , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Josua Mayer Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thibaut Collet , Vincent Jardin X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787577136; l=1626; i=vjardin@free.fr; s=20260525; h=from:subject:message-id; bh=cZfDHWxtn03VL7NNB13yIdWVRIXNDxo1MTtXhAgv4U8=; b=dHSEpwxeF9dhLwKyueWq+wokOc4uqkX0QwvIMBU7Ty2dsMST7A7Rn24MKI+ZUqoIEeVH/goLx WKgk3gOCBUzBv9OBRjRsCCsjhAfCQGBgKygWVieLawOiMoatUKi+UHR X-Developer-Key: i=vjardin@free.fr; a=ed25519; pk=hppgLeFpGpKOi7LNwGEZ4jOYofJCoGd4Jf1ltAabiLw= X-Endpoint-Received: by B4 Relay for vjardin@free.fr/20260525 with auth_id=871 X-Original-From: Vincent Jardin Reply-To: vjardin@free.fr From: Vincent Jardin For gpio1 value set for pinctrl is outside the mask and so will do nothing. Add the missing offset for value field to be the same as the mask as expected. Fixes: 284ad7064aaa ("arm64: dts: lx2160a: complete pinmux for rcwsr12 conf= iguration word") Suggested-by: Thibaut Collet Signed-off-by: Vincent Jardin --- arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi b/arch/arm64/boo= t/dts/freescale/fsl-lx216x.dtsi index ae6e37870c5e5..d4522a19405a9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi @@ -1622,7 +1622,7 @@ fspi_data74_pins: xspi1-data74-pins { }; =20 gpio1_31_28_pins: xspi1-data74-gpio-pins { - pinctrl-single,bits =3D <0x0 0x1 (0x7 << 15)>; + pinctrl-single,bits =3D <0x0 (0x1 << 15) (0x7 << 15)>; }; =20 fspi_data30_pins: xspi1-data30-pins { @@ -1630,7 +1630,7 @@ fspi_data30_pins: xspi1-data30-pins { }; =20 gpio1_27_24_pins: xspi1-data30-gpio-pins { - pinctrl-single,bits =3D <0x0 0x1 (0x7 << 18)>; + pinctrl-single,bits =3D <0x0 (0x1 << 18) (0x7 << 18)>; }; =20 fspi_dqs_sck_cs10_pins: xspi1-base-pins { @@ -1638,7 +1638,7 @@ fspi_dqs_sck_cs10_pins: xspi1-base-pins { }; =20 gpio1_23_20_pins: xspi1-base-gpio-pins { - pinctrl-single,bits =3D <0x0 0x1 (0x7 << 21)>; + pinctrl-single,bits =3D <0x0 (0x1 << 21) (0x7 << 21)>; }; =20 esdhc0_cmd_data30_clk_vsel_pins: sdhc1-base-sdhc-vsel-pins { --=20 2.43.0 From nobody Mon Sep 28 08:57:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E6DA41D640; Mon, 24 Aug 2026 13:12:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787577138; cv=none; b=LJEHpO3IV4e/5ZHTavxy/VpwiZtzT9VR9LHP1vgbCIQV41+BidwCEYdU5OlzGRYHr2CFsmZebpk4vlgTjrkyONma8oxzMMRo4qn971V6ek+KPueQ20BiTMJrzaT/gjobcJax3wQ9Fhqfie3jDR3G+hK1KLZc34UCsyW6J7Lw2/4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Mon, 24 Aug 2026 13:12:17 +0000 (UTC) From: Vincent Jardin via B4 Relay Date: Mon, 24 Aug 2026 15:12:02 +0200 Subject: [PATCH v2 2/3] arm64: dts: lx2160a: fix IIC1 pinmux submask rejected by pinctrl-single Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-for-upstream-lx2160a-pinmux-fix-v2-2-0a525d5f4cd5@free.fr> References: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> In-Reply-To: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> To: Frank Li , Carlos Song , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Josua Mayer Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thibaut Collet , Vincent Jardin X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787577136; l=2029; i=vjardin@free.fr; s=20260525; h=from:subject:message-id; bh=O+VGpUg5BMz3UlWXVE3y0mK/EDo+jBPNvLqqP9N2rrU=; b=9Ed/17SijE21QKnYqCS+wmMMquGU+wut4XYtYPBK2z9I734J/iXdafdkfxzBHcSF8wg6ghV31 0FGmBmeWpd4ApF2eECQlKiDvxZBfzEnxrOpJ2ESHJspGQoNp27Xlyro X-Developer-Key: i=vjardin@free.fr; a=ed25519; pk=hppgLeFpGpKOi7LNwGEZ4jOYofJCoGd4Jf1ltAabiLw= X-Endpoint-Received: by B4 Relay for vjardin@free.fr/20260525 with auth_id=871 X-Original-From: Vincent Jardin Reply-To: vjardin@free.fr From: Vincent Jardin IIC1_PMUX is a single bit field at RCWSR14 bit 10, so the mask for the two iic1 pinmux nodes was narrowed from 0x7 to 0x1 to avoid writing the two reserved bits next to it. With pinctrl-single,bit-per-mux the driver does not take the supplied mask as the bits to modify. It derives the field from the node's pinctrl-single,function-mask, which is 0x7 here, and then requires the supplied mask to match it exactly: bit_pos =3D __ffs(mask); /* 10 */ mask_pos =3D ((pcs->fmask) << bit_pos); /* 0x7 << 10 =3D 0x1c00 */ submask =3D mask & mask_pos; /* 0x400 */ ... if (submask !=3D mask_pos) { dev_warn(pcs->dev, "Invalid submask 0x%x for %pOFn at 0x%x\n", submask, np, offset); continue; } A one bit mask gives submask 0x400 against mask_pos 0x1c00, so both nodes are rejected and the pins are never muxed with this message: pinctrl-single 70010012c.pinmux: Invalid submask 0x400 for iic1-i2c-pins pinctrl-single 70010012c.pinmux: Invalid submask 0x400 for iic1-gpio-pins The values are not changed: - 0x0 selects IIC1 - 0x1 << 10 selects GPIO_1[3:2]. Fixes: 7a3cc49ad1fc ("arm64: dts: lx2160a: change i2c0 (iic1) pinmux mask t= o one bit") Signed-off-by: Vincent Jardin --- arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi b/arch/arm64/boo= t/dts/freescale/fsl-lx216x.dtsi index d4522a19405a9..fae705dd07669 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi @@ -1688,11 +1688,11 @@ i2c6_i2c7_pins: iic8-iic7-i2c-pins { =20 /* RCWSR14 */ i2c0_pins: iic1-i2c-pins { - pinctrl-single,bits =3D <0x8 0x0 (0x1 << 10)>; + pinctrl-single,bits =3D <0x8 0x0 (0x7 << 10)>; }; =20 gpio0_3_2_pins: iic1-gpio-pins { - pinctrl-single,bits =3D <0x8 (0x1 << 10) (0x1 << 10)>; + pinctrl-single,bits =3D <0x8 (0x1 << 10) (0x7 << 10)>; }; }; =20 --=20 2.43.0 From nobody Mon Sep 28 08:57:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E7AB421223; Mon, 24 Aug 2026 13:12:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787577138; cv=none; b=FcQw+gEqTIWhkhCT/l1ILLuByVRW3yAk+F7+17iNjt0VeE8JypvebJbb0ibFX2mj4Iy6VPOmgt6YMr52UtYujKI7M3moKodLuFdKplTted1ihh2FxLrpto+7Bxxgb/ssEmA2RKTfNVbkfobbZ1+wZx/BPLotpMEqEf/gqG7zlzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787577138; c=relaxed/simple; bh=YfnNy7H+MKpmvOhS4SoksQSiXwR94LflioldK9T78Ag=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=h5iDcgAOwIWOhWMZ3KviHbgcNeiaFuSo3V460uf0KWXzcHJZuAQt5tAq6c22Bp5OZ0zRIkkFd6AeLUxAcqHR9BQlBdyFPJJP6blroe2CwCNmYik/u2rEzTqkZnIMyElhDdfsrncsl8zwsTL5MkLGeItp0akrnI1/JuKrj5KvR6E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PX2O47pq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PX2O47pq" Received: by smtp.kernel.org (Postfix) with ESMTPS id EA918C2BCFF; Mon, 24 Aug 2026 13:12:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787577138; bh=YfnNy7H+MKpmvOhS4SoksQSiXwR94LflioldK9T78Ag=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PX2O47pqhH/pbt/WC7X8/6B5zZNt44LL++6mowya9jleVdzkb61QM6ZO1UXW5BJZl 2/ICBumpdlSkSdY8ihrM8JDH5m5QwbGuER5FaEOsf5dmUd6qCYrRpsA6ReSOgn7T3q IPqcUcw/cJwLJYHLFS8rrdb/ZeuhO1SLUkp+axzt5BS0lGYR1n1EZDZ6km6ylZh49w cqhaJCpCprTYHlsfYafS3laeevPvyGeycyzn46Q9+JnrHGQiRAV0MZeNdMiMt3SsaF 9vNHHb7AQNL4EOJ/9i4rgplRB5VGWQnm3jpQBWZ2hhjV/lEjNFb/f9uzBJ14Fq28d7 625d8lJXuVqjQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFF95C61CE3; Mon, 24 Aug 2026 13:12:17 +0000 (UTC) From: Vincent Jardin via B4 Relay Date: Mon, 24 Aug 2026 15:12:03 +0200 Subject: [PATCH v2 3/3] arm64: dts: lx2160a: fix the iic5 spi3 pinmux offset and value Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260824-for-upstream-lx2160a-pinmux-fix-v2-3-0a525d5f4cd5@free.fr> References: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> In-Reply-To: <20260824-for-upstream-lx2160a-pinmux-fix-v2-0-0a525d5f4cd5@free.fr> To: Frank Li , Carlos Song , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Josua Mayer Cc: imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thibaut Collet , Vincent Jardin X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787577136; l=1537; i=vjardin@free.fr; s=20260525; h=from:subject:message-id; bh=BZq9iBy9zMULsx08pGD1SDDVGE5pMTVNIR3ADNpa4zc=; b=CKuLq+J0V1nANBfd3Gi8NrIBf4GFu2kLUI5rd055oh1iFr2PI2LlUcEnf9TdY1zYJ+Kir0gch xK+EtHn0BzvA6Fa/QWghZyvOzPEphZGYwJwkVtej4BrEKqjdvA4wNTp X-Developer-Key: i=vjardin@free.fr; a=ed25519; pk=hppgLeFpGpKOi7LNwGEZ4jOYofJCoGd4Jf1ltAabiLw= X-Endpoint-Received: by B4 Relay for vjardin@free.fr/20260525 with auth_id=871 X-Original-From: Vincent Jardin Reply-To: vjardin@free.fr From: Vincent Jardin The iic5-spi3-pins node has both of its first two cells wrong. The offset selects the register within the node's reg range, where: 0x0 is RCWSR12, 0x4 is RCWSR13, 0x8 is RCWSR14. An offset of 0x3 is not one of them and is not even aligned for the declared 32 bit register width. It is the only node in this pinmux that does not use 0x0, 0x4 neither 0x8. The value is wrong too: IIC5_PMUX is RCWSR12[11:9] and it encodes 0b000 for IIC5, 0b001 for GPIO_1[25:24], 0b010 for SDHC1_CLK_SYNC_OUT/IN, 0b011 for {IIC5_SCL,IIC5_SDA} =3D {SPI3_SOUT,SPI3_SIN}. This node selects the last of those, so it needs 0x3, not the 0x2, which is the value of the neighbouring sdhc1 clock sync node it was copied from. Fixes: 284ad7064aaa ("arm64: dts: lx2160a: complete pinmux for rcwsr12 conf= iguration word") Signed-off-by: Vincent Jardin --- arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi b/arch/arm64/boo= t/dts/freescale/fsl-lx216x.dtsi index fae705dd07669..bf5d9b671d858 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx216x.dtsi @@ -1602,7 +1602,7 @@ esdhc0_clksync_pins: iic5-sdhc-clk-pins { }; =20 dspi2_miso_mosi_pins: iic5-spi3-pins { - pinctrl-single,bits =3D <0x3 (0x2 << 9) (0x7 << 9)>; + pinctrl-single,bits =3D <0x0 (0x3 << 9) (0x7 << 9)>; }; =20 i2c5_pins: iic6-i2c-pins { --=20 2.43.0