From nobody Mon Sep 28 11:39:38 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0494A2773E4 for ; Sat, 22 Aug 2026 04:43:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787373806; cv=none; b=a5fWDLepWpitVNakNPbM+ticWBAwhjPpSFqrAM+b4hUgGSrJtv6fqFV1xB04IQqF4S8ZLwfbKtys84Ofz0bg6Di+2wN7Ag7ltbY1eCJ/GdVv4vs4tE2MvRhUZC4nMnfXGtC+zvvzgF7+MPCgVs9Z384C7ONBDB1s6s2PelOOQHU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787373806; c=relaxed/simple; bh=JzOcZ/Tb7M5I13Crk4COYLtOJLFMvFLaEr7Wvye8qMw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=FOVgjTr06QsqreBxA9400UQZF0vLCZ5Z6shWzotatfH34w3pm0Fvfkhi7n+4ZtriKS01GvmpplxzPfrKLPoactQTm5u8bWZQ9UQ+IgPpBjoLoa7cCg/4YUZ6up/iDG5I2vgsqL5ALEacS/Dv5E0kDzHPtYCJfXRWLdNlTg4mrHg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CVVJdcy+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CVVJdcy+" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7C11DC2BCB8; Sat, 22 Aug 2026 04:43:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787373805; bh=JzOcZ/Tb7M5I13Crk4COYLtOJLFMvFLaEr7Wvye8qMw=; h=From:Date:Subject:To:Cc:Reply-To:From; b=CVVJdcy+70G/P7byX90dR7gX6Z7OmdNW+OFqCz/BNdedmxLYJxogNI0SbqQwmUlok PnZqAGXQfKYRXv5oGEi8GdLT2zGCdbEuDzQ2Pul7FU1JSFpPt8W+Z6of3XvX65BA5z fPEbp+QX3FWVYJA+Xns9FhwhseQ+kjvrO7IXdaRz1BtT7bRcoSr5lh5hinOCLv0kyK Yx6ewqVX2lH8qMcHBKfRtg7bUbd/+YrZJr9vFamHCaWNB8XoY/N9TK0+w1Fiu1ZEHt neg4oJCjXvpQg5DW3Dl9yRHyQfvoVg0sO0fTC4/g3rYhkaJNSJjka4wsTf+PPTXoBw JL63OnXXQfJ6A== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54CEFC5DF8C; Sat, 22 Aug 2026 04:43:25 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Fri, 21 Aug 2026 23:42:59 -0500 Subject: [PATCH v2] drm/nouveau: Use write-combined maps for coherent Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260821-tegra-coherent-wc-v2-1-2b1ddb67bf18@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/32NQQ6CMBBFr0Jm7RimEUxdeQ/Dok4HmESoaRvUE O5u5QAu30v++yskiSoJLtUKURZNGuYC5lABj24eBNUXBlObtj6bBrMM0SGHUaLMGV+MZO2JPLn GtTWU3TNKr++9eesKj5pyiJ/9YqGf/VdbCAl975mtsWzofh0mp48jhwm6bdu+iwT7VbIAAAA= X-Change-ID: 20260725-tegra-coherent-wc-19941d1a5a60 To: Lyude Paul , Danilo Krummrich , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, Karol Herbst , Faith Ekstrand , Aaron Kling X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787373804; l=1825; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=6HYeU8KylnBhcnrcZPOXIGFiI2xLSNaxtWKW6C5P3EY=; b=E+K0KUreTCalBE7SgwbmAoYYgW1vWcIP+4h8O5xvCnM/Xw/+v3R7Ojy+JrPJaTgM+vbqU6QDQ TqOCd3WkGgIDuzAuBIfm4z/IH0L8P9txEOi2/citcAVSjvqvuIRgS7A X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Faith Ekstrand On Tegra devices, uncached maps traslate to device memory, causing unaligned accesses by userspace resulting in a SIGBUS. Instead, use write-combined maps to ensure proper access. This would also affect discrete cards on any Arm device. It was determined that discrete cards regardless of cpu arch should use write-combined maps for coherent anyways. Thus this change is made for all gpu types. Signed-off-by: Faith Ekstrand Co-developed-by: Aaron Kling Signed-off-by: Aaron Kling --- Without this change, nouveau can easily hit sigbus errors in the Android UI rendering via nvk or running vulkan deqp tests on Tegra. Changing coherent maps to use write-combined stops the crashing. --- Changes in v2: - Set write-combined for coherent on all gpu types - Link to v1: https://lore.kernel.org/r/20260725-tegra-coherent-wc-v1-1-dfd= cc929c21b@gmail.com --- drivers/gpu/drm/nouveau/nouveau_sgdma.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouv= eau/nouveau_sgdma.c index fa3b4ebf38a83..2bd0376193aee 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c @@ -72,9 +72,7 @@ nouveau_sgdma_create_ttm(struct ttm_buffer_object *bo, ui= nt32_t page_flags) struct nouveau_sgdma_be *nvbe; enum ttm_caching caching; =20 - if (nvbo->force_coherent) - caching =3D ttm_uncached; - else if (drm->agp.bridge) + if (nvbo->force_coherent || drm->agp.bridge) caching =3D ttm_write_combined; else caching =3D ttm_cached; --- base-commit: 903c1cf6dff9964e71eda98a39e2e5d442050472 change-id: 20260725-tegra-coherent-wc-19941d1a5a60 Best regards, --=20 Aaron Kling