From nobody Mon Sep 28 17:49:25 2026 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF10339F16B; Thu, 20 Aug 2026 10:00:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787220041; cv=none; b=ZbaQt4n1760PdyhABORp+NjVm5fZmkl52paH1NCugxEXsrCnUrvlqfiCeUiScnWRpvf15v4VWCw1S/MSoDqApxu0VRo/gXCWtd1VpEIYXW2ab2oo8z81lQ5sTEpIqh/lmGId8jJAXbUNc4hrKEtFXFn9q6gpyEPS/HxRiYGXY+U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787220041; c=relaxed/simple; bh=Larx7+W+y93pSlplBywMJ3VjR5G4smWsTgfE8rNEcl8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F4FxMW9vz8TLt7ql108Yi/mn6Mz2pMupExdADyjMQLV8z1qcUVTDO0tnGL6DIyb05PK3ZzbL+FI4LXKFku+Ft/Z9h7jLi2ZFb9j2ussHN2JuEiEzy7pqMTDCTFb8DZ5SxGZClGs+LxSQ9M5P8Eh0Njg7ggComqCanRjON7R9HVw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from Vostro-3710.. (unknown [14.220.232.127]) by smtp.qiye.163.com (Hmail) with ESMTP id 4ab3c2732; Thu, 20 Aug 2026 18:00:32 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Rob Herring , Chukun Pan , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: arm: rockchip: Add Radxa E54C Date: Thu, 20 Aug 2026 18:00:19 +0800 Message-Id: <20260820100020.3370385-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260820100020.3370385-1-amadeus@jmu.edu.cn> References: <20260820100020.3370385-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa01e9d7dd303a2kunm5b0a804aa475b X-HM-MType: 10 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkZTR9MVk1JHUJLGU9KGh5JSlYeHw 5VEwETFhoSFyQUDg9ZV1kYEgtZQVlKT1VJSUtVSUhJVUpJTFlXWRYaDxIVHRRZQVlPS0hVSktISk 5MTlVKS0tVSkJLS1kG Content-Type: text/plain; charset="utf-8" The Radxa E54C is a high-performance network computer developed by Radxa based on the RK3582 SoC. Add devicetree binding documentation for it. Link: https://radxa.com/products/network-computer/e54c Signed-off-by: Chukun Pan Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index a799bb843f74..658d55b68a30 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -1005,9 +1005,11 @@ properties: - const: radxa,e20c - const: rockchip,rk3528 =20 - - description: Radxa E52C + - description: Radxa E52C/E54C items: - - const: radxa,e52c + - enum: + - radxa,e52c + - radxa,e54c - const: rockchip,rk3582 - const: rockchip,rk3588s =20 --=20 2.34.1 From nobody Mon Sep 28 17:49:25 2026 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCF7A3D47A1; Thu, 20 Aug 2026 10:00:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787220042; cv=none; b=XRsI5awsOSSe0dECqPHfdzwS3c7ECWLgrzv6qj5N7Ggb6vC4xNrc4uXkoJpSh1IIz/GgA447cuezhPBuQM0FMO2OakEcivcNluhWDD1OlUjTgDIB0Y5tVJArkkTp9ztiGahWVPZJRhF+4pRIRjP+Op3JnGHE1uWkdapF5/mycJo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787220042; c=relaxed/simple; bh=9G3WFoXZxK7z/bTGIWzeDOU1UxXSiPm4Fbi0ZdWyKIk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XcY522NK0dsGPHYxT68N5GTF7Ji78VVGS18OfQWtOS8NMDUePpy/ITgVy/z8CeS7TBLlmOfnShDzSdWBPQpphjX/dwVcHmSgEzjDBTeRd2sr5qdHElnd7NtYxHQgMjWUR8IUGedpbvaVKBUh7OOFzSFIGcQ6gGKEj9fu57G6/fc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=101.71.155.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from Vostro-3710.. (unknown [14.220.232.127]) by smtp.qiye.163.com (Hmail) with ESMTP id 4ab3c2734; Thu, 20 Aug 2026 18:00:34 +0800 (GMT+08:00) From: Chukun Pan To: Heiko Stuebner Cc: Rob Herring , Chukun Pan , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add Radxa E54C Date: Thu, 20 Aug 2026 18:00:20 +0800 Message-Id: <20260820100020.3370385-3-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260820100020.3370385-1-amadeus@jmu.edu.cn> References: <20260820100020.3370385-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa01e9d839303a2kunm5b0a804aa4761 X-HM-MType: 10 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVkaTkkZVh9NSUNITU9PGR9LTVYeHw 5VEwETFhoSFyQUDg9ZV1kYEgtZQVlKT1VJSUtVSUhJVUpJTFlXWRYaDxIVHRRZQVlPS0hVSktJT0 9PS1VKS0tVS1kG Content-Type: text/plain; charset="utf-8" The Radxa E54C is a high-performance network computer with the Rockchip RK3582 SoC. It has the following features: - 1x HDMI 2.1 TX - 2x USB 2.0 HOST - 1x USB 3.0 HOST - 1x USB 3.0 TypeC - 2 - 32 GB LPDDR4 - 1x MicroSD card slot - 1x M.2 NVMe SSD slot - 16 MB SPI (mx25u12835f) - Optional 8/16/32GB eMMC - RTL8367RB Gigabit Switch Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3582-radxa-e54c.dts | 1184 +++++++++++++++++ 2 files changed, 1185 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3582-radxa-e54c.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index e7936a21c118..13989dc90caa 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -184,6 +184,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-nanopi-r76s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-rock-4d.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3582-radxa-e52c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3582-radxa-e54c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-armsom-sige7.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-armsom-w3.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-coolpi-cm5-evb.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3582-radxa-e54c.dts b/arch/arm6= 4/boot/dts/rockchip/rk3582-radxa-e54c.dts new file mode 100644 index 000000000000..24a3e2443971 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3582-radxa-e54c.dts @@ -0,0 +1,1184 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include +#include +#include +#include "rk3588s.dtsi" + +/ { + model =3D "Radxa E54C"; + compatible =3D "radxa,e54c", "rockchip,rk3582", "rockchip,rk3588s"; + + aliases { + ethernet0 =3D &gmac1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + hdmi0-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint =3D <&hdmi0_out_con>; + }; + }; + }; + + keys-0 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-0 { + label =3D "Maskrom"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + keys-1 { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&user_key>; + + button-1 { + label =3D "User"; + linux,code =3D ; + gpios =3D <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sys_led>; + }; + + led-1 { + color =3D ; + function =3D LED_FUNCTION_LAN; + function-enumerator =3D <1>; + gpios =3D <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lan1_led>; + }; + + led-2 { + color =3D ; + function =3D LED_FUNCTION_LAN; + function-enumerator =3D <2>; + gpios =3D <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lan2_led>; + }; + + led-3 { + color =3D ; + function =3D LED_FUNCTION_LAN; + function-enumerator =3D <3>; + gpios =3D <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&lan3_led>; + }; + + led-4 { + color =3D ; + function =3D LED_FUNCTION_WAN; + gpios =3D <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wan_led>; + }; + }; + + dc_12v: regulator-12v-dc { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc_1v1_nldo_s3: regulator-1v1-vcc-nldo-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc_sysin>; + }; + + vcc3v3_pcie: regulator-3v3-pcie { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_sysin>; + }; + + vcc_3v3_s0: regulator-3v3-vcc-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + + vcc5v_usb3: regulator-5v0-usb3 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg_pwren_h>; + regulator-name =3D "vcc5v_usb3"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_sysin>; + }; + + vcc5v_usb_hub: regulator-5v0-usb-hub { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren_h>; + regulator-name =3D "vcc5v_usb_hub"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_sysin>; + }; + + vbus_typec0: regulator-5v0-vbus-typec0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&typec5v_pwren_h>; + regulator-name =3D "vbus_typec0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_sysin>; + }; + + vcc_sysin: vcca: regulator-5v0-vcc-sysin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_sysin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&typec_vin>; + }; + + vcc_5v0: regulator-5v0-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_5v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc_sysin>; + }; + + avddh_3v3: regulator-avdd-3v3 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtl8367_en>; + regulator-name =3D "avddh_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + startup-delay-us =3D <10000>; + vin-supply =3D <&vcc_5v0>; + }; + + typec_vin: regulator-typec-vin { + compatible =3D "regulator-fixed"; + regulator-name =3D "typec_vin"; + regulator-always-on; + regulator-boot-on; + vin-supply =3D <&dc_12v>; + }; +}; + +&combphy0_ps { + status =3D "okay"; +}; + +&combphy2_psu { + status =3D "okay"; +}; + +/* + * In the Rockchip RK3582 SoC, some CPU cores end up disabled + * and unused because they're marked in the efuses as defective. + * The disabling in the DT is performed by the boot loader. + */ +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&avddh_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; + /delete-property/ snps,tso; + status =3D "okay"; + + fixed-link { + speed =3D <1000>; + full-duplex; + }; +}; + +&hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmim0_tx0_cec + &hdmim1_tx0_hpd + &hdmim0_tx0_scl + &hdmim0_tx0_sda + &hdmi0_tx_on_h>; + status =3D "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint =3D <&hdmi0_con_in>; + }; +}; + +&hdmi0_sound { + status =3D "okay"; +}; + +&hdptxphy0 { + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0m2_xfer>; + status =3D "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x42>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible =3D "rockchip,rk8603", "rockchip,rk8602"; + reg =3D <0x43>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + eeprom@50 { + compatible =3D "belling,bl24c16a", "atmel,24c16"; + reg =3D <0x50>; + pagesize =3D <16>; + read-only; + vcc-supply =3D <&vcc_3v3_s3>; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + eth_mac0: macaddr@9e { + reg =3D <0x9e 0x06>; + }; + + eth_mac1: macaddr@a4 { + reg =3D <0xa4 0x06>; + }; + + eth_mac2: macaddr@aa { + reg =3D <0xaa 0x06>; + }; + + eth_mac3: macaddr@b0 { + reg =3D <0xb0 0x06>; + }; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + + vdd_npu_s0: regulator@42 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x42>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_npu_s0"; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c4m2_xfer>; + status =3D "okay"; + + usbc0: usb-typec@22 { + compatible =3D "fcs,fusb302"; + reg =3D <0x22>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cc_int_l>; + vbus-supply =3D <&vbus_typec0>; + + usb_con: connector { + compatible =3D "usb-c-connector"; + label =3D "USB-C"; + data-role =3D "dual"; + power-role =3D "dual"; + try-power-role =3D "sink"; + op-sink-microwatt =3D <1000000>; + pd-revision =3D /bits/ 8 <0x2 0x0 0x1 0x2>; + sink-pdos =3D ; + source-pdos =3D ; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + usbc0_hs: endpoint { + remote-endpoint =3D <&usb_host0_xhci_drd_sw>; + }; + }; + + port@1 { + reg =3D <1>; + usbc0_ss: endpoint { + remote-endpoint =3D <&usbdp_phy0_typec_ss>; + }; + }; + + port@2 { + reg =3D <2>; + usbc0_sbu: endpoint { + remote-endpoint =3D <&usbdp_phy0_typec_sbu>; + }; + }; + }; + }; + }; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + clock-output-names =3D "rtcic_32kout"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int_l>; + wakeup-source; + }; +}; + +&i2s5_8ch { + status =3D "okay"; +}; + +&mdio1 { + ethernet-switch@29 { + compatible =3D "realtek,rtl8365mb"; + reg =3D <29>; + reset-gpios =3D <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn_l>; + + switch_intc: interrupt-controller { + interrupt-parent =3D <&gpio3>; + interrupts =3D ; + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <1>; + }; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + + phy0: ethernet-phy@0 { + reg =3D <0>; + interrupt-parent =3D <&switch_intc>; + interrupts =3D <0>; + }; + + phy1: ethernet-phy@1 { + reg =3D <1>; + interrupt-parent =3D <&switch_intc>; + interrupts =3D <1>; + }; + + phy2: ethernet-phy@2 { + reg =3D <2>; + interrupt-parent =3D <&switch_intc>; + interrupts =3D <2>; + }; + + phy3: ethernet-phy@3 { + reg =3D <3>; + interrupt-parent =3D <&switch_intc>; + interrupts =3D <3>; + }; + + phy4: ethernet-phy@4 { + reg =3D <4>; + interrupt-parent =3D <&switch_intc>; + interrupts =3D <4>; + }; + }; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ethernet-port@0 { + reg =3D <0>; + label =3D "lan3"; + phy-handle =3D <&phy0>; + nvmem-cells =3D <ð_mac3>; + nvmem-cell-names =3D "mac-address"; + }; + + ethernet-port@1 { + reg =3D <1>; + label =3D "lan2"; + phy-handle =3D <&phy1>; + nvmem-cells =3D <ð_mac2>; + nvmem-cell-names =3D "mac-address"; + }; + + ethernet-port@2 { + reg =3D <2>; + label =3D "lan1"; + phy-handle =3D <&phy2>; + nvmem-cells =3D <ð_mac1>; + nvmem-cell-names =3D "mac-address"; + }; + + ethernet-port@3 { + reg =3D <3>; + label =3D "wan"; + phy-handle =3D <&phy3>; + nvmem-cells =3D <ð_mac0>; + nvmem-cell-names =3D "mac-address"; + }; + + ethernet-port@6 { + reg =3D <6>; + ethernet =3D <&gmac1>; + phy-mode =3D "rgmii"; + rx-internal-delay-ps =3D <2000>; + tx-internal-delay-ps =3D <2000>; + + fixed-link { + speed =3D <1000>; + full-duplex; + }; + }; + }; + }; +}; + +&pcie2x1l2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie20x1_2_perstn_m0>; + reset-gpios =3D <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; + status =3D "okay"; +}; + +&pd_npu { + domain-supply =3D <&vdd_npu_s0>; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + rtl8367_en: rtl8367-en { + rockchip,pins =3D <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + keys { + user_key: user-key { + rockchip,pins =3D <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + lan1_led: lan1-led { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lan2_led: lan2-led { + rockchip,pins =3D <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lan3_led: lan3-led { + rockchip,pins =3D <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sys_led: sys-led { + rockchip,pins =3D <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led: wan-led { + rockchip,pins =3D <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie20x1_2_perstn_m0: pcie-perstn { + rockchip,pins =3D <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + typec { + cc_int_l: cc-int-l { + rockchip,pins =3D <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + typec5v_pwren_h: typec5v-pwren-h { + rockchip,pins =3D <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_host_pwren_h: usb-host-pwren-h { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_otg_pwren_h: usb-otg-pwren-h { + rockchip,pins =3D <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm3m1_pins>; + status =3D "okay"; +}; + +&rknn_core_0 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_core_1 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_core_2 { + npu-supply =3D <&vdd_npu_s0>; + sram-supply =3D <&vdd_npu_s0>; + status =3D "okay"; +}; + +&rknn_mmu_0 { + status =3D "okay"; +}; + +&rknn_mmu_1 { + status =3D "okay"; +}; + +&rknn_mmu_2 { + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8_s0>; + status =3D "okay"; +}; + +/* Conflict with SFC */ +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + vmmc-supply =3D <&vcc_3v3_s0>; + vqmmc-supply =3D <&vcc_1v8_s3>; + status =3D "disabled"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios =3D <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc_3v3_s3>; + vqmmc-supply =3D <&vccio_sd_s0>; + status =3D "okay"; +}; + +&sfc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&fspim0_pins>; + status =3D "okay"; + + flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + spi-max-frequency =3D <104000000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <1>; + vcc-supply =3D <&vcc_1v8_s3>; + }; +}; + +&spi2 { + assigned-clocks =3D <&cru CLK_SPI2>; + assigned-clock-rates =3D <200000000>; + num-cs =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi2m2_cs0 &spi2m2_pins>; + status =3D "okay"; + + pmic@0 { + compatible =3D "rockchip,rk806"; + reg =3D <0>; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-parent =3D <&gpio0>; + interrupts =3D <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency =3D <1000000>; + system-power-controller; + + vcc1-supply =3D <&vcc_sysin>; + vcc2-supply =3D <&vcc_sysin>; + vcc3-supply =3D <&vcc_sysin>; + vcc4-supply =3D <&vcc_sysin>; + vcc5-supply =3D <&vcc_sysin>; + vcc6-supply =3D <&vcc_sysin>; + vcc7-supply =3D <&vcc_sysin>; + vcc8-supply =3D <&vcc_sysin>; + vcc9-supply =3D <&vcc_sysin>; + vcc10-supply =3D <&vcc_sysin>; + vcc11-supply =3D <&vcc_2v0_pldo_s3>; + vcc12-supply =3D <&vcc_sysin>; + vcc13-supply =3D <&vcc_1v1_nldo_s3>; + vcc14-supply =3D <&vcc_1v1_nldo_s3>; + vcca-supply =3D <&vcca>; + + rk806_dvs1_null: dvs1-null-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-name =3D "vdd_gpu_s0"; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-enable-ramp-delay =3D <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-name =3D "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg3 { + regulator-name =3D "vdd_logic_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <675000>; + regulator-max-microvolt =3D <750000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-name =3D "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-name =3D "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <675000>; + regulator-max-microvolt =3D <900000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-name =3D "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name =3D "vcc_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <2000000>; + regulator-max-microvolt =3D <2000000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-name =3D "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name =3D "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-name =3D "vcc_1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg1 { + regulator-name =3D "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca_1v8_s0: pldo-reg2 { + regulator-name =3D "vcca_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-name =3D "vdda_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-name =3D "vcca_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name =3D "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-name =3D "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name =3D "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-name =3D "vdda_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vdda_0v75_s0: nldo-reg3 { + regulator-name =3D "vdda_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-name =3D "vdda_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-name =3D "vdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status =3D "okay"; +}; + +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + status =3D "okay"; +}; + +&u2phy2 { + status =3D "okay"; +}; + +&u2phy2_host { + phy-supply =3D <&vcc5v_usb_hub>; + status =3D "okay"; +}; + +&u2phy3 { + status =3D "okay"; +}; + +&u2phy3_host { + phy-supply =3D <&vcc5v_usb3>; + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2m0_xfer>; + status =3D "okay"; +}; + +&usbdp_phy0 { + mode-switch; + orientation-switch; + sbu1-dc-gpios =3D <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios =3D <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + + port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + usbdp_phy0_typec_ss: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&usbc0_ss>; + }; + + usbdp_phy0_typec_sbu: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&usbc0_sbu>; + }; + }; +}; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_xhci { + usb-role-switch; + status =3D "okay"; + + port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_host0_xhci_drd_sw: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&usbc0_hs>; + }; + }; +}; + +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; + +&usb_host2_xhci { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vop { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi0_in_vp0>; + }; +}; --=20 2.34.1