From nobody Mon Sep 28 16:21:52 2026 Received: from Atcsqr.andestech.com (atcsqr.andestech.com [220.128.198.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0926833D6CA for ; Thu, 20 Aug 2026 06:34:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.128.198.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787207679; cv=none; b=ikM+5iAO+Z6V4nz16LOHgN/9VdhFfQ/egVrb2er5+Q5w3pYj7g0gxekVu6M2uxjU+owab3kff3GnJTERGRho9MUIRLn0BgMqjr5u/slMrJvvPWgv2sMe6W9c/wIe2w704IliNPC/V/AKZETS1eYFWHLoziV98qYxAssa+/zv4ew= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787207679; c=relaxed/simple; bh=V4+ISOdVHOx4edqhLj6T6q06bkB70C+CcY4/CYupAJo=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Lv1gD5LCiT6bOJ4PxPY+XGyVXAwtwIavwzDPeJ1zXHAxHGpPRTOUxu9RhYeOLL0emdHJN0ytxwnVHvPWPVL2OD+Fy9L7AhDgCd/autVfBgqjRjXOPNN5UDb4B5ZoyiKLN7ygCOplj97AE/gz83zGHan5ugwjHHs0g9dz7Bc+iRo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=andestech.com; spf=pass smtp.mailfrom=andestech.com; arc=none smtp.client-ip=220.128.198.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=andestech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=andestech.com Received: from Atcsqr.andestech.com (localhost [127.0.0.2] (may be forged)) by Atcsqr.andestech.com with ESMTP id 67K69h5T097423 for ; Thu, 20 Aug 2026 14:09:43 +0800 (+08) (envelope-from ben717@andestech.com) Received: from mail.andestech.com (atcpcs55.andestech.com [10.0.1.155]) by Atcsqr.andestech.com with ESMTPS id 67K68ujs096255 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 20 Aug 2026 14:08:56 +0800 (+08) (envelope-from ben717@andestech.com) Received: from ATCPCS34.andestech.com (10.0.1.134) by atcpcs55.andestech.com (10.0.1.155) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Thu, 20 Aug 2026 14:08:56 +0800 Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS34.andestech.com (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 20 Aug 2026 14:08:56 +0800 From: Ben Zong-You Xie To: CC: Greg Kroah-Hartman , Sasha Levin , Alexandre Ghiti , Palmer Dabbelt , Paul Walmsley , Albert Ou , , , Palmer Dabbelt , "Ben Zong-You Xie" Subject: [PATCH 6.1.y] riscv: Don't use PGD entries for the linear mapping Date: Thu, 20 Aug 2026 14:08:52 +0800 Message-ID: <20260820060852.1714595-1-ben717@andestech.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: ATCPCS33.andestech.com (10.0.1.100) To ATCPCS34.andestech.com (10.0.1.134) X-DKIM-Results: atcpcs55.andestech.com; dkim=none; X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL: Atcsqr.andestech.com 67K69h5T097423 Content-Type: text/plain; charset="utf-8" From: Alexandre Ghiti commit 629db01c64ff6cea08fc61b52426362689ef8618 upstream. Propagating changes at this level is cumbersome as we need to go through all the page tables when that happens (either when changing the permissions or when splitting the mapping). Note that this prevents the use of 4MB mapping for sv32 and 1GB mapping for sv39 in the linear mapping. Signed-off-by: Alexandre Ghiti Link: https://lore.kernel.org/r/20231108075930.7157-2-alexghiti@rivosinc.com Signed-off-by: Palmer Dabbelt [ Ben: Only backport the RV32 guard. 6.1.y can build the RV32 linear mapping from PGD entries, and there is no splitting in __set_memory(). So a one-page permission change mutates 1024 pages.] Signed-off-by: Ben Zong-You Xie --- arch/riscv/mm/init.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 72b3462babbf..7e6ea7f0cb68 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -666,8 +666,13 @@ void __init create_pgd_mapping(pgd_t *pgdp, =20 static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) { - /* Upgrade to PMD_SIZE mappings whenever possible */ - if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) + /* + * Upgrade to PMD_SIZE mappings whenever possible. Not on 32-bit, + * where PMD_SIZE =3D=3D PGDIR_SIZE: such a mapping is a PGD leaf entry + * that __set_memory() is unable to split. + */ + if (!IS_ENABLED(CONFIG_64BIT) || + (base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) return PAGE_SIZE; =20 return PMD_SIZE; --=20 2.34.1