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(unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a8934782; Wed, 19 Aug 2026 15:52:58 +0800 (GMT+08:00) From: Damon Ding To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sandy Huang , Heiko Stuebner , Andy Yan Cc: Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Dmitry Baryshkov , Marek Szyprowski , Sebastian Reichel , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Damon Ding , Conor Dooley Subject: [PATCH v7 1/5] dt-bindings: display: bridge: analogix-dp: Add data-lanes support for endpoint Date: Wed, 19 Aug 2026 15:52:34 +0800 Message-Id: <20260819075238.3007087-2-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819075238.3007087-1-damon.ding@rock-chips.com> References: <20260819075238.3007087-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa01902552703a8kunmf3c4117e328ba4 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDHU9IVkgfT0NDGkNIHUlDH1YVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSE pKQk1VSktLVUpCWQY+ DKIM-Signature: a=rsa-sha256; b=BcP2MZ56TrLVDpEourG1o8q1BF/gQtEVs7BWC+w4ZMt0HiTBllOfVretZVpP3+Pp3nJmPJwfjNmDEN59BKYEG0fmv+qMz5gcg9nzqu+iVljUPpDJne9ND+cze4lZFNOFtE8RvWjgy7dl+3HXByOuA8hYL4cxNLqYZh50yZ9EdXY=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=b+nSKBFe+y1XdWvizakdBtzYyTbwGeDxxK3jwOpDtv0=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add data-lanes property support to the port@1 endpoint for physical lane mapping configuration. Lane mapping is mainly used for below scenarios: 1. Correct PCB lane swap and differential line routing crossover without hardware changes; 2. Adapt mismatched lane pin definitions between SoC and eDP panel; 3. Support multiple panel hardware variants on the same board by configuring data-lanes in device tree only. Additionally, add data-lanes setting in Rockchip eDP DT node example to show actual lane mapping usage. Acked-by: Conor Dooley Reviewed-by: Sebastian Reichel Signed-off-by: Damon Ding Reviewed-by: Luca Ceresoli --- Changes in v2: - Add lane mapping application scenarios in commit message. - Remove redundant deprecated property 'data-lanes' for eDP node. - Update port@1 $ref to /schemas/graph.yaml#/$defs/port-base. Changes in v3: - Squash data-lanes adjustment of Rockchip eDP DT example into this commit. - Add unevaluatedProperties: false to both the port@1 and endpoint nodes. Changes in v5 - Add Acked-by and Reviewed-by tags. --- .../bindings/display/bridge/analogix,dp.yaml | 19 ++++++++++++++----- .../rockchip/rockchip,analogix-dp.yaml | 1 + 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,dp.y= aml b/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml index 62f0521b0924..ecf206871cdd 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml +++ b/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml @@ -42,13 +42,22 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/properties/port - description: - Input node to receive pixel data. + description: Input node to receive pixel data. =20 port@1: - $ref: /schemas/graph.yaml#/properties/port - description: - Port node with one endpoint connected to a dp-connector node. + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Port node with one endpoint connected to sink device = node. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + properties: + data-lanes: + minItems: 1 + maxItems: 4 + items: + enum: [ 0, 1, 2, 3 ] =20 required: - port@0 diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,an= alogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchi= p,analogix-dp.yaml index 6548f157fd96..39dafe75a680 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-= dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-= dp.yaml @@ -160,6 +160,7 @@ examples: reg =3D <1>; =20 edp_out_panel: endpoint { + data-lanes =3D <0 1>; remote-endpoint =3D <&panel_in_edp>; }; }; --=20 2.34.1 From nobody Mon Sep 28 18:34:34 2026 Received: from mail-m155115.qiye.163.com (mail-m155115.qiye.163.com [101.71.155.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 002A7386C39; Wed, 19 Aug 2026 12:29:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.115 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787142561; cv=none; b=tYsvgQKe0pAlSz4VlOnoPRk0S0cDx4KvlMMBgLBIqtq+OaxfvJmTvh0+6UsYPI3LTSqdnETE9A682fXxyOcB7R9ddCuFeGw0peUi8OPmE9YT9p5x04KX54B4hdDJUDmLlBtGFJ++BH2LeCanujzV1VpyJ0bQz0cJTHQVsGcR2+Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787142561; c=relaxed/simple; bh=mowNlomkjWV8WhtYoTKyfiaWwBDsTac8oQVst65R16Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JZSg8+CYrqBnHRmR4S4Fhup68cnZElufK6whaWnb/syVmOGvmlZIQM8J0ydNLGSyg7jdAq0m8yZjKYgBvuasC/RCKz1EKYVww7rDZx6VGNb6kTXVnnElwTXj3It3b4NzUekVOIoChEai8MzbMyDO3E05D50qUs4WK+DBbuukdf4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=BofeeCVP; arc=none smtp.client-ip=101.71.155.115 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="BofeeCVP" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a893478a; Wed, 19 Aug 2026 15:52:59 +0800 (GMT+08:00) From: Damon Ding To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sandy Huang , Heiko Stuebner , Andy Yan Cc: Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Dmitry Baryshkov , Marek Szyprowski , Sebastian Reichel , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Damon Ding Subject: [PATCH v7 2/5] drm/dp: Add helper to validate DP lane counts Date: Wed, 19 Aug 2026 15:52:35 +0800 Message-Id: <20260819075238.3007087-3-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819075238.3007087-1-damon.ding@rock-chips.com> References: <20260819075238.3007087-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa019025a1903a8kunmf3c4117e328baf X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlCQk5MVkofTElNTx0aSB5CTlYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU 9PT0hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=BofeeCVP2enIwmWCWtKcEc/wI+wDMp4HR/88gqnNww6NR58X08lhAgI4xEv8Tz8R7LcjcSDnBpky7X7kAeX0qGrA7y7gw/+G5EA0CTWkDsNoj3UuCD5EhUUm362oJ8iHygoylZft3TEXBa8vp8uOpH/pfyYTIaPiby0NFPDFtvs=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=3D3tCxbxiOqvsJFvLlKoOy9RkGLmHyoV0izPMCA9ZDc=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add a generic helper function drm_dp_lane_count_is_valid() to check if a DisplayPort lane count is valid. According to the DP specification, only 1, 2, or 4 lanes are supported. This helper avoids duplicating DP lane count validation logic across individual DisplayPort drivers. Suggested-by: Luca Ceresoli Reviewed-by: Luca Ceresoli Signed-off-by: Damon Ding --- Changes in v6: - Add Reviewed-by tag. --- include/drm/display/drm_dp_helper.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_= dp_helper.h index ab16c1be3900..5b05a7fbe174 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -139,6 +139,12 @@ bool drm_dp_as_sdp_supported(struct drm_dp_aux *aux, c= onst u8 dpcd[DP_RECEIVER_C =20 int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); =20 +static inline bool +drm_dp_lane_count_is_valid(int lane_count) +{ + return lane_count =3D=3D 1 || lane_count =3D=3D 2 || lane_count =3D=3D 4; +} + static inline int drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { --=20 2.34.1 From nobody Mon Sep 28 18:34:34 2026 Received: from mail-m3276.qiye.163.com (mail-m3276.qiye.163.com [220.197.32.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B8283C8C71; Wed, 19 Aug 2026 08:08:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.76 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787126916; cv=none; b=bnodLBMU4vTbsf3gcgRFytIeVlLdD13OjiITROxVS3nhF3vCaiBTFszBbJ/gPsxXbdzxS8/nYdk0PIh4Xv4LC/OsN6RMjdBbRXSUPywDjiLHogTIPwoTjcU91YX83UsHhHk64PtUONvFw11fOtpDq/SIIgKTZFcJS4todshC4QM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787126916; c=relaxed/simple; bh=cXoZ5nkVlsrf7ob6/fIWTvGwYAz8YkqvPeMve6jGnls=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Kqm2grkgycnh5CyFZFEaYZiN5pfFI1AbxL4r3evCyom5fS+xsf3ddOOJ+HLn9LEmm5i4nC4TC3me46o/oBg4hyHwoGOkTpW7vj/ywK5rQTLVzrYvVPohsGop5nZNH/erl9HiNDIBNtIdCbLVN50DkvqAD/Aog6W4UzTgTqX7rf0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=CN/GNaz/; arc=none smtp.client-ip=220.197.32.76 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="CN/GNaz/" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a8934793; Wed, 19 Aug 2026 15:53:01 +0800 (GMT+08:00) From: Damon Ding To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sandy Huang , Heiko Stuebner , Andy Yan Cc: Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Dmitry Baryshkov , Marek Szyprowski , Sebastian Reichel , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Damon Ding Subject: [PATCH v7 3/5] drm/bridge: analogix_dp: Restore mandatory samsung DP DT properties Date: Wed, 19 Aug 2026 15:52:36 +0800 Message-Id: <20260819075238.3007087-4-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819075238.3007087-1-damon.ding@rock-chips.com> References: <20260819075238.3007087-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa019025f9d03a8kunmf3c4117e328bbb X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDTRpKVkkYS05IHU5LT00aH1YVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU 9PT0hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=CN/GNaz/dklpEcsQPznDo5vxGOSWgZbPh0ztonxg/Rr/IzAOaUbXYeGCH+qsATxrAZqB6yvpLbH1lEIYPCK9Tr1qZaHOFaE434oD94I/MPnHfPIX7/FGcF76xIQIeP6YIt7aKzOUv9sMKEDZhf53+6ScdPg9MlpZeeWHkM3fIlc=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=t55Nmd0TIQJ9k05yP/OQSyQzY/yXm1yngBaarIKKeEk=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Revert the change that made samsung,link-rate and samsung,lane-count optional for Exynos DP. Add error checking to fail probe early if the required DT properties are missing. If these properties are zero, &link_train.link_rate and &link_train.lane_count used in the subsequent link training flow will also be zero, resulting in link training failure. Although all existing Exynos DP DT nodes already contain these two properties, this potential logic issue still needs to be fixed. Fixes: 0d0abd894ead ("drm: bridge: analogix/dp: add max link rate and lane = count limit for RK3288") Signed-off-by: Damon Ding --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index 566f1e5eb8cd..ddb15d6de05f 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1248,6 +1248,7 @@ static int analogix_dp_dt_parse_pdata(struct analogix= _dp_device *dp) { struct device_node *dp_node =3D dp->dev->of_node; struct video_info *video_info =3D &dp->video_info; + u32 val; =20 switch (dp->plat_data->dev_type) { case RK3288_DP: @@ -1269,10 +1270,14 @@ static int analogix_dp_dt_parse_pdata(struct analog= ix_dp_device *dp) * NOTE: those property parseing code is used for * providing backward compatibility for samsung platform. */ - of_property_read_u32(dp_node, "samsung,link-rate", - &video_info->max_link_rate); - of_property_read_u32(dp_node, "samsung,lane-count", - &video_info->max_lane_count); + if (of_property_read_u32(dp_node, "samsung,link-rate", &val)) + return dev_err_probe(dp->dev, -EINVAL, + "Failed to get samsung,link-rate\n"); + video_info->max_link_rate =3D val; + if (of_property_read_u32(dp_node, "samsung,lane-count", &val)) + return dev_err_probe(dp->dev, -EINVAL, + "Failed to get samsung,lane-count\n"); + video_info->max_lane_count =3D val; break; } =20 --=20 2.34.1 From nobody Mon Sep 28 18:34:34 2026 Received: from mail-m49247.qiye.163.com (mail-m49247.qiye.163.com [45.254.49.247]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAB4F3890F1; Wed, 19 Aug 2026 08:28:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.247 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787128124; cv=none; b=WL5ZVP1b3DaKXLZ01mbE4ySVj0mj7TG7E6xGKWc/15RFTxP5EfvqRpRfLAzAyZWkRxoYe1OuzPDK6kh9ylX9JVkHe9TeYhrfz+MCejGBFjE/6D+pFRzaH3tKIhRV5N30nMApbEKf90Q7G0hO55nUNU2NwY4nBE3hgizijvmrrPs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787128124; c=relaxed/simple; bh=EGc2jTS3oA/w9O5c/npYY+tNjKBHzGb7vkKuG05Wbbc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=X3tlcKQ27g+YYLRKxSMxYsBCz8iiMwmiMjTg+Z1u4jSMh10L16LsyvD3Ny3ZhclQBom8HtLxyX92j8I+Q+i1RVFL4GWEcu19RZHsXOovi/mHrWmyHNwGZGsFtCDRn9+Ud3yVFot0/k6I2YuuxbeE8eZytGlYmyj7PcSkLBOOmBY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=HzCKaOW9; arc=none smtp.client-ip=45.254.49.247 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="HzCKaOW9" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a893479b; Wed, 19 Aug 2026 15:53:02 +0800 (GMT+08:00) From: Damon Ding To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sandy Huang , Heiko Stuebner , Andy Yan Cc: Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Dmitry Baryshkov , Marek Szyprowski , Sebastian Reichel , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Damon Ding Subject: [PATCH v7 4/5] drm/bridge: analogix_dp: Add validation for samsung,lane-count property Date: Wed, 19 Aug 2026 15:52:37 +0800 Message-Id: <20260819075238.3007087-5-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819075238.3007087-1-damon.ding@rock-chips.com> References: <20260819075238.3007087-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa01902646003a8kunmf3c4117e328bca X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDSR5NVkNDGUhISkhKSEpMHVYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU 9PT0hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=HzCKaOW9WVbpPe+w4/1hzHZaG4ieDLwJ6pMO+fx2kpJA/wpP6czM6EbZpbGY0HaqGzRkdjMdMmXkhGyqBYajk4WZV4bnan9DveUsgx/ztdJ0EDE6RwzeLVi9T0qLy8z4yieZQDO3IdlkRXr2KJoKFO5zc7LgY0qZ09tjJj4ChtU=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=sufZXYFvhqt99gCkQ0mCK5s0oy3fyCr/7BG8YjyOEgU=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add validity check for samsung,lane-count to ensure DT-provided lane count values are specification-compliant. Suggested-by: Luca Ceresoli Reviewed-by: Luca Ceresoli Signed-off-by: Damon Ding --- Changes in v5: - Apply DRM DP helper API to check the validity of DP lane count. Changes in v6: - Rebase after the new commit for restoring mandatory properties samsung,link-rate and samsung,lane-count. Changes in v7: - Add Reviewed-by tag. --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index ddb15d6de05f..a74c855936b2 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1274,7 +1274,8 @@ static int analogix_dp_dt_parse_pdata(struct analogix= _dp_device *dp) return dev_err_probe(dp->dev, -EINVAL, "Failed to get samsung,link-rate\n"); video_info->max_link_rate =3D val; - if (of_property_read_u32(dp_node, "samsung,lane-count", &val)) + if (of_property_read_u32(dp_node, "samsung,lane-count", &val) || + !drm_dp_lane_count_is_valid(val)) return dev_err_probe(dp->dev, -EINVAL, "Failed to get samsung,lane-count\n"); video_info->max_lane_count =3D val; --=20 2.34.1 From nobody Mon Sep 28 18:34:34 2026 Received: from mail-m15572.qiye.163.com (mail-m15572.qiye.163.com [101.71.155.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E65493955F6; Wed, 19 Aug 2026 07:58:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787126309; cv=none; b=eNlOT0l+HAexbcqwz7mEnncYGfyKN9D0PG8Awu+FK4vGA5bZOmd/43HUrGdMptms2oBOJltB18qN6y4XdLR9OauRM1AjL5/Xmeb5ABw81NshptpE/IqbPmiBps+9/BDY6dsQ60lHorWMr3QIqZi9w/jrHT2ygY24nHDxPnUnUpk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787126309; c=relaxed/simple; bh=HiAtcqJkhCXUMg4s+LQopaaxzTPX6N0Z8JYfoKf/Vq4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WK5n2jFSSieKdwUqTaEw16jB4LjxNoAlJad9o4Bt8B0KjYlPLMDIwprbZAM8I+7ufyQLsHJy/IhrOiPFAOIMG7CI8tELSfZ849y4DFw/YsO0zuWqufVHDWKSoEkSz22sEsplrt0whXEeBhYaOTs+D1pkB/uqdJ2RtTPNQxVjVvI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=jO0lr3YC; arc=none smtp.client-ip=101.71.155.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="jO0lr3YC" Received: from zyb-HP-ProDesk-680-G2-MT.. (unknown [61.154.14.86]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a89347a7; Wed, 19 Aug 2026 15:53:03 +0800 (GMT+08:00) From: Damon Ding To: Andrzej Hajda , Neil Armstrong , Robert Foss , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sandy Huang , Heiko Stuebner , Andy Yan Cc: Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Dmitry Baryshkov , Marek Szyprowski , Sebastian Reichel , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Damon Ding Subject: [PATCH v7 5/5] drm/bridge: analogix_dp: Add support for optional data-lanes mapping Date: Wed, 19 Aug 2026 15:52:38 +0800 Message-Id: <20260819075238.3007087-6-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260819075238.3007087-1-damon.ding@rock-chips.com> References: <20260819075238.3007087-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Tid: 0aa01902694303a8kunmf3c4117e328bd9 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDSUhCVhhJQ0JKSxpPSUpPSlYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlNSlVKTk9VSk9VQ01ZV1kWGg8SFR0UWUFZT0tIVUpLSU 9PT0hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=jO0lr3YCbS3cbXGjq1uGTL2S3ToJU6O6h1GAa2zDaI35xJdSWz9A5UrGh1TriEtACK1yMCQnyENjAlvFt7ZcnZRtTl5+Ce80C5o7E+N7rW7cwnGy9Bab/dc89iIr5jHh2mWygSrFPCRQbyJYRkUokmYyu0vKSDPVaRjSbRbpb5A=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=NiUBBaBDB3od4tGa8ZQ/v77waFOWFcQOiX70hIg5mJs=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Parse the optional 'data-lanes' device tree property to support custom physical lane mapping configuration. If no valid configuration is found, fall back to the default lane map (0, 1, 2, 3) automatically and keep the driver running. Lane mapping is mainly used for below scenarios: 1. Correct PCB lane swap and differential line routing crossover without hardware changes; 2. Adapt mismatched lane pin definitions between SoC and eDP panel; 3. Support multiple panel hardware variants on the same board by configuring data-lanes in device tree only. Reviewed-by: Sebastian Reichel Signed-off-by: Damon Ding --- Changes in v2: - Add lane mapping application scenarios in commit message. Changes in v5: - Add Reviewed-by tag. --- .../drm/bridge/analogix/analogix_dp_core.c | 56 +++++++++++++++++++ .../drm/bridge/analogix/analogix_dp_core.h | 4 +- .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 15 +++-- .../gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++ 4 files changed, 70 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.c index a74c855936b2..39cb76a1913f 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -1244,6 +1244,59 @@ static const struct drm_bridge_funcs analogix_dp_bri= dge_funcs =3D { .detect =3D analogix_dp_bridge_detect, }; =20 +static int analogix_dp_dt_parse_lanes_map(struct analogix_dp_device *dp) +{ + struct video_info *video_info =3D &dp->video_info; + struct device_node *endpoint; + u32 tmp[LANE_COUNT4]; + u32 map[LANE_COUNT4] =3D {0, 1, 2, 3}; + bool used[LANE_COUNT4] =3D {false}; + int num_lanes; + int ret, i; + + memcpy(video_info->lane_map, map, sizeof(map)); + + num_lanes =3D drm_of_get_data_lanes_count_ep(dp->dev->of_node, 1, 0, 1, + video_info->max_lane_count); + if (num_lanes < 0) + return -EINVAL; + + endpoint =3D of_graph_get_endpoint_by_regs(dp->dev->of_node, 1, -1); + if (!endpoint) + return -EINVAL; + + ret =3D of_property_read_u32_array(endpoint, "data-lanes", tmp, num_lanes= ); + of_node_put(endpoint); + if (ret) + return -EINVAL; + + for (i =3D 0; i < num_lanes; i++) { + if (tmp[i] >=3D LANE_COUNT4) { + dev_dbg(dp->dev, "data-lanes[%d] =3D %u is out of range\n", i, tmp[i]); + return -EINVAL; + } + + if (used[tmp[i]]) { + dev_dbg(dp->dev, "data-lanes[%d] =3D %u is duplicate\n", i, tmp[i]); + return -EINVAL; + } + + used[tmp[i]] =3D true; + map[i] =3D tmp[i]; + } + + for (i =3D 0; i < LANE_COUNT4 && num_lanes < LANE_COUNT4; i++) { + if (!used[i]) + map[num_lanes++] =3D i; + } + + dev_dbg(dp->dev, "Using parsed lane map: <%u %u %u %u>\n", map[0], map[1]= , map[2], map[3]); + + memcpy(video_info->lane_map, map, sizeof(map)); + + return 0; +} + static int analogix_dp_dt_parse_pdata(struct analogix_dp_device *dp) { struct device_node *dp_node =3D dp->dev->of_node; @@ -1282,6 +1335,9 @@ static int analogix_dp_dt_parse_pdata(struct analogix= _dp_device *dp) break; } =20 + if (analogix_dp_dt_parse_lanes_map(dp)) + dev_dbg(dp->dev, "No valid data-lanes found, using default lane map\n"); + return 0; } =20 diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/g= pu/drm/bridge/analogix/analogix_dp_core.h index c7997677a286..4560597604ad 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -137,6 +137,8 @@ struct video_info { =20 int max_link_rate; enum link_lane_count_type max_lane_count; + + u32 lane_map[LANE_COUNT4]; }; =20 struct link_train { @@ -177,7 +179,7 @@ struct analogix_dp_device { /* analogix_dp_reg.c */ void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool ena= ble); void analogix_dp_stop_video(struct analogix_dp_device *dp); -void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable); +void analogix_dp_lane_mapping(struct analogix_dp_device *dp); void analogix_dp_init_analog_param(struct analogix_dp_device *dp); void analogix_dp_init_interrupt(struct analogix_dp_device *dp); void analogix_dp_reset(struct analogix_dp_device *dp); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gp= u/drm/bridge/analogix/analogix_dp_reg.c index ea8401293a23..c1344a3f013a 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -48,16 +48,15 @@ void analogix_dp_stop_video(struct analogix_dp_device *= dp) writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); } =20 -void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable) +void analogix_dp_lane_mapping(struct analogix_dp_device *dp) { + u32 *lane_map =3D dp->video_info.lane_map; u32 reg; =20 - if (enable) - reg =3D LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 | - LANE1_MAP_LOGIC_LANE_2 | LANE0_MAP_LOGIC_LANE_3; - else - reg =3D LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 | - LANE1_MAP_LOGIC_LANE_1 | LANE0_MAP_LOGIC_LANE_0; + reg =3D lane_map[0] << LANE0_MAP_SHIFT; + reg |=3D lane_map[1] << LANE1_MAP_SHIFT; + reg |=3D lane_map[2] << LANE2_MAP_SHIFT; + reg |=3D lane_map[3] << LANE3_MAP_SHIFT; =20 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); } @@ -140,7 +139,7 @@ void analogix_dp_reset(struct analogix_dp_device *dp) =20 usleep_range(20, 30); =20 - analogix_dp_lane_swap(dp, 0); + analogix_dp_lane_mapping(dp); =20 writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gp= u/drm/bridge/analogix/analogix_dp_reg.h index 12735139046c..ac914e37089b 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h @@ -209,6 +209,10 @@ #define LANE0_MAP_LOGIC_LANE_1 (0x1 << 0) #define LANE0_MAP_LOGIC_LANE_2 (0x2 << 0) #define LANE0_MAP_LOGIC_LANE_3 (0x3 << 0) +#define LANE3_MAP_SHIFT (6) +#define LANE2_MAP_SHIFT (4) +#define LANE1_MAP_SHIFT (2) +#define LANE0_MAP_SHIFT (0) =20 /* ANALOGIX_DP_ANALOG_CTL_1 */ #define TX_TERMINAL_CTRL_50_OHM (0x1 << 4) --=20 2.34.1