From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EF9A2E62B4; Wed, 19 Aug 2026 12:41:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143282; cv=none; b=R2AYhGpnI0TsB6aejW6rZ9I8Lbaw7ZlrgAs6krFszqNsiB959QXL635ye8gd90G8ZqVV2G6JL024yd7oe2Is6Kyd5+dAIIbzc5T3La58D9oDShZSJkh+F3ZLshBMR/mqEKwy4HxgSrZJPYlIdz2bGkq4cKan8cgOMdRuqcboZAA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143282; c=relaxed/simple; bh=0kfQCrAJAnt1AGSQBDQb2mzczFIyr/6cg3aznhPRdjQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Bc2Nnzas0F1hoNV+ur4E+IlZ7cgW/slh0k2OPaCpPfMUizcjIts2wsuCTtKpPf5+h8MqrgK4plufRvloh8uSjPs4HH3XF7WUb73LB9jRoI0jJDBmJhFtAbQH0SxR0pjbYBtgDzWKGTgZbGVWfLyx12UGiZuiwg+o465sSA8hs0k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=J6qZvlIE; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="J6qZvlIE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1787143280; x=1818679280; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=0kfQCrAJAnt1AGSQBDQb2mzczFIyr/6cg3aznhPRdjQ=; b=J6qZvlIEQWg3Yb6ZBpS+QMG1kgqkgqJBGIXbVLMz07PobDWO9P+xyInO 04Vqu6Gj14SA4r0BAjQbIJnFRC7dV1TsrDnvIVd73Acp4gXFn1Ov6vpSg EU4O6RUjE7DWwB1PSaqrRyyWM6pykJ6Gns5fwdd7R73c0pguthIOEZtkq VFjpfuCw4SghvP8BjTI6ekGuT4N9RFERqygLxVLVXu97pNx2pmUTpAGL+ 7ocClNrWHWi3ZvjHVkef5x8DdL/mb9xP+C2GHTLR8rJgbqFLCqX/29Z1z JylKuTbcI1RH9n/uv+K+YUlEkyrlQfJfWoPoShBgliaW+7JTEBVhh5iUB A==; X-CSE-ConnectionGUID: 9zn0HIDgQ2S1wuNd99srCg== X-CSE-MsgGUID: qv+VOYEmQw2vYyrhTtVhHQ== X-IronPort-AV: E=Sophos;i="6.25,231,1779174000"; d="scan'208";a="61462183" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2026 05:41:15 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Wed, 19 Aug 2026 05:41:15 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 19 Aug 2026 05:41:12 -0700 From: Ariana Lazar Date: Wed, 19 Aug 2026 15:41:05 +0300 Subject: [PATCH v4 1/9] iio: dac: mcp47feb02: initialize dac_data field in channel data struct at probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-1-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=1156; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=0kfQCrAJAnt1AGSQBDQb2mzczFIyr/6cg3aznhPRdjQ=; b=VFvZJyhRr9Zvmz1JiOq3KvEY/Cn/iagqyE+8QTpzk19UzupGbuZ95L8LCbnkgiSZXeByx8hx8 cVQowOFkcUtBleQOgWmSUBFtNCDKbdPcHewmWehqgp8qES61lVnvOAJ X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Read DAC value register to initialize corresponding field in channel_data struct when the module is inserted. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index a823c2a673a26d70e5829cb587034da435af0451..7502959d98eab27941d58b6b961= e6e3dee4222e6 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1020,7 +1020,12 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb= 02_data *data) gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); - unsigned int pd_tmp; + unsigned int pd_tmp, dac_val; + + ret =3D regmap_read(data->regmap, REG_ADDR(i), &dac_val); + if (ret) + return ret; + data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; --=20 2.43.0 From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF2A22DA74C; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-2-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=1321; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=s7Pd3ibmbenbGpv6jMS5wEIN6apeaPZlFOw7/5U9qmE=; b=tCjxqZAHvX0lTfSbxZlUcgGQz9vCF7hyk2sd56hcNw2vWNFZxSQy30NF2+9P0hh5j6dus8w/i vmOyiVT/ji0CdgL6tVqPvotoOOFqqBHa+mjIwDd66XcjMy5cqXwu8wA X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Correct the formula for initializing gain struct field for each channel with the correct bits from Gain Register. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 7502959d98eab27941d58b6b961e6e3dee4222e6..bf78618ac2c896b94e494a1ce76= ef5b3e520f482 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1017,7 +1017,6 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) if (ret) return ret; =20 - gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); unsigned int pd_tmp, dac_val; @@ -1028,7 +1027,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; - data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; + data->chdata[i].use_2x_gain =3D (gain_ch & DAC_GAIN_MASK(i)) ? 1 : 0; =20 /* * Inform the user that the current voltage reference read from the vola= tile --=20 2.43.0 From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A885D30676C; Wed, 19 Aug 2026 12:41:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143283; cv=none; b=oOYz/pFjSZojY7HHKKLwoPPIpdTGyTpVFK8uI5t+QXft8JreW1CtXnaFba1qh6tiHHY7ghUxFqnDEFHaqMG0+1hUevV5yy2G9In5wYdOR6VSE3XvcAINS4j837dzQdbOaf7DttAIXCYY22MXDbL/sw/DOARnqsicwlMyUeRQ2Og= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143283; c=relaxed/simple; bh=wSyrSm1qTZF23G+IEE24scv/amKr0POTAbYk6U6GlSg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=miRCU91R+ellP7JuPscSAG+fwWnGsOwBpBcrYyCeHvMV6ZbbRontIRzHVX6L9G/EhHsdFWUQh2xatmbs1SKLd/zXg54fOJhW+iVp9wB/nr3mnR4Gdr1f65iiIttwm0Eoy5uXtOTURupdYa5QZvMZkvhGbl0HqXOukbKNLEaCyfA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=Buwid/QW; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Buwid/QW" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1787143281; x=1818679281; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=wSyrSm1qTZF23G+IEE24scv/amKr0POTAbYk6U6GlSg=; b=Buwid/QWYCXOtJW8yTWn00jnFXNZkxNlBWa8H7wr99YYZ+GRPdfYGMmt erW7+ew8rav8mAaAX5rSg8pzAfvyqCsu4zMOtjBoyUx7sbGhPTRJTKZp9 T9BdozJvHAmyyjFVP5mfeQaEgnaXVsk5+AJ//fhWQItZ0J/OuwqkoIih0 c2K5U5s5pnYfQisg+MxgEsTJg4qS32aZaXNoI75aRqRTGic4cAC+1NxtT FXNC7nI3Xdlmr1waIWFQlbxevf/LPDrWbVGjiDyeMV1CnZlfcJWlg2ICE 8k5zyYD3XHjEQX1qTMhVrOf/iMddusPhpQsd88T325IITPz8RTmxKoAvj g==; X-CSE-ConnectionGUID: Ic+YMBa3RsqlUV9fZ2+kYQ== X-CSE-MsgGUID: SwgsmHUCR32eiw1sKIjcbQ== X-IronPort-AV: E=Sophos;i="6.25,231,1779174000"; d="scan'208";a="62676114" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2026 05:41:21 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Wed, 19 Aug 2026 05:41:20 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 19 Aug 2026 05:41:18 -0700 From: Ariana Lazar Date: Wed, 19 Aug 2026 15:41:07 +0300 Subject: [PATCH v4 3/9] iio: dac: mcp47feb02: correct false state case in store_eeprom_store Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-3-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=722; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=wSyrSm1qTZF23G+IEE24scv/amKr0POTAbYk6U6GlSg=; b=VJlcvoP5f0f6R/1rEuqwnbRhv1VT1iAEREvxL6LcNL1v48srtOtfuyKCCusBDDbsgiUmvNUXF kNU+ar+Uf1zCkbkmQuzZ2llYalk9kxGlvEryO0yQ+i49UIJNyo0SRkk X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Return len also when the state is false instead of 0. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index bf78618ac2c896b94e494a1ce76ef5b3e520f482..2ee981393aa1a2dc0bf65d25ab9= 37132fe2e7bf1 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -469,7 +469,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a return ret; =20 if (!state) - return 0; + return len; =20 /* * Verify DAC Wiper and DAC Configuration are unlocked. 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Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 2ee981393aa1a2dc0bf65d25ab937132fe2e7bf1..e5533fa3c31c0006d1707647911= 77879c1e794b0 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -978,8 +979,7 @@ static int mcp47feb02_parse_fw(struct iio_dev *indio_de= v, =20 ret =3D fwnode_property_read_string(child, "label", &data->labels[reg]); if (ret) - return dev_err_probe(dev, ret, "%pfw: invalid label\n", - fwnode_get_name(child)); + dev_dbg(dev, "%s: invalid label\n", fwnode_get_name(child)); =20 chanspec.address =3D reg; chanspec.channel =3D reg; --=20 2.43.0 From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B64D62F90E0; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-5-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=876; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=ULNX7XM/q3FMWCn7ukWYvqZEtM157eNtTtwlUSxrvxI=; b=HMI0ZBkt4MTxsgWnvCSKl0qD1Sg7n6MXSt/87gqtXQFY5ucchYXPNIWPkNqrHLSf4/v8gA4HR 3utPZwJn30uDTXg9D86YR6vFyzhNdcE5nTCCBnWX7c++X//d67GG24N X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Typo corrected to 'Register' in the comment regarding defined masks for the gain register. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index e5533fa3c31c0006d170764791177879c1e794b0..6f084eb71240b475bf85763139e= cfafc006da83d 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -54,7 +54,7 @@ #define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) #define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) =20 -/* Gain Control and I2C Slave Address Reguster fields */ +/* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) #define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) =20 --=20 2.43.0 From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 813CE2EEE7E; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-6-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=1903; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=myXQh1iDIpKn5R9LdBkXRvRACG8jMDaWnk1Wh8OpgZc=; b=W1vPxxOE5SV0bVas88xxn+RIAPlPPqFYHFyZ6WGCmB9n3fwKOtEtx49o1lVQwYuEwa9O7DGcG 5j66jpK40tbCfwiX7wYhEjzimjkelqKqK6bnVsgfzB+l7iw8oQn7e0D X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Use 2 new defines to select the corresponding bits for each channel in VREF and Power Down registers instead of the initial define without a meaningful name. Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 6f084eb71240b475bf85763139ecfafc006da83d..8ca67c4021a86a6d5034495c1db= b18772ada354b 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -34,8 +34,9 @@ /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 +#define MCP47FEB02_GET_VREF_MODE(reg, ch) (((reg) >> (2 * (ch))) & GENMAS= K(1, 0)) #define MCP47FEB02_POWER_DOWN_REG_ADDR 0x48 -#define MCP47FEB02_DAC_CTRL_MASK GENMASK(1, 0) +#define MCP47FEB02_GET_POWER_DOWN_MODE(reg, ch) (((reg) >> (2 * (ch))) & = GENMASK(1, 0)) =20 #define MCP47FEB02_GAIN_CTRL_STATUS_REG_ADDR 0x50 #define MCP47FEB02_GAIN_BIT_MASK BIT(0) @@ -1026,7 +1027,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; + data->chdata[i].ref_mode =3D MCP47FEB02_GET_VREF_MODE(vref_ch, i); data->chdata[i].use_2x_gain =3D (gain_ch & DAC_GAIN_MASK(i)) ? 1 : 0; =20 /* @@ -1070,7 +1071,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D (pd_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_MASK; + pd_tmp =3D MCP47FEB02_GET_POWER_DOWN_MODE(pd_ch, i); data->chdata[i].powerdown_mode =3D pd_tmp ? (pd_tmp - 1) : pd_tmp; data->chdata[i].powerdown =3D !!(data->chdata[i].powerdown_mode); } --=20 2.43.0 From nobody Tue Sep 29 18:55:08 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B8B62EEE8A; Wed, 19 Aug 2026 12:41:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143297; cv=none; b=uOvBds2H0NjEz5bxC/E7sez+BEoqcpODYZwvkWH0YxD8qZVzelOxqJS0J2IBs8rbVImYMhYJjrVnZa7rpNuUhbW7UusqcC3SCWQDxzSl/vde2x7msd48zyOW1K38Fa6W4KmFs6MngEzneinqJjE0ZeA9oEBuNKk/eLFHYBic2qw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787143297; c=relaxed/simple; bh=W674xamuV0WmeN+VxlUQBnHXaJW2tCINb/xh5XaazKg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=KJ35hvXSHA/sOycn/iuTw56wMG5SDhLjrsYVbQdg8vvSxTG4ctn7R0+jORFOmAjyzFArk92d0+VT3RUL7EXi9DOltlIbp1HHa2Jyoc2+R6K6DVNgs/6uQL0x98AYBaPoeiDii+lDAoyyEF9hSt/ZRZyD0JVkZpVw0Vv++xOZEcA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=rySOw2+J; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="rySOw2+J" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1787143295; x=1818679295; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=W674xamuV0WmeN+VxlUQBnHXaJW2tCINb/xh5XaazKg=; b=rySOw2+JtrlPZe3FZCVPFS+8yFIohPAOyCNhjaxTOgksUClMMtIQwkUT 68uwkHwClHAlBkLCYwvDnJwSXhh6F/3z0wOx/Dw+SCFhMJxK48h3+GB37 O2kIjOvjBNU5n6vRQcRdnr53QJIImIEITYYWJc7NVq4R80ruoe/aid27o +sGOwOIKBFUafmwqnFqowvipQwbSN6DH/tcG22UbREAOXM95om7/AbncD QYPTdKbDhwNrNikbzHiJlDkM3+LMIZ/6AnCVZG7qKAHLPfFQWoBoIDI17 R46HQVFj+6EITXYBrjTx6BXh3ljdT39FA+nCYm9km+FuInygzZA49fWN/ w==; X-CSE-ConnectionGUID: TCwentTOQU64GGQFvC1Oxg== X-CSE-MsgGUID: hRBdKH4AQ8qkc4JPkr36ZQ== X-IronPort-AV: E=Sophos;i="6.25,231,1779174000"; d="scan'208";a="72095625" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2026 05:41:32 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Wed, 19 Aug 2026 05:41:31 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 19 Aug 2026 05:41:29 -0700 From: Ariana Lazar Date: Wed, 19 Aug 2026 15:41:11 +0300 Subject: [PATCH v4 7/9] iio: dac: mcp47feb02: refactor MCP47FEB02 I2C driver into two modules Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-7-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=29650; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=W674xamuV0WmeN+VxlUQBnHXaJW2tCINb/xh5XaazKg=; b=vVT48KSfA5rBvDWxpJIO583hHMGq8zm4BnzgiakDymANS5tTjmCjjffei69L4orgchI8YiYzn yi7hBx3V6gmAyc9hB4OpBMfrPIJPDSG+3+00zwV7JD9AIhSBZYWTAAE X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Prepare the driver for the bus-specific code by refactoring into separate files. The renamed file will contain the common DAC functionality shared by the MCP47FxBy1/2/4/8 I2C and MCP48FxBy1/2/4/8 SPI drivers. The MCP47FEB02 driver was refactored into two modules: mcp47feb02-core.c and mcp47feb02-i2c.c in order to prepare the support for SPI MCP48FxBy1/2/4/8 DAC family on top of the current implementation. Signed-off-by: Ariana Lazar --- MAINTAINERS | 4 +- drivers/iio/dac/Kconfig | 10 +- drivers/iio/dac/Makefile | 3 +- .../iio/dac/{mcp47feb02.c =3D> mcp47feb02-core.c} | 327 ++-------------= ------ drivers/iio/dac/mcp47feb02-i2c.c | 145 +++++++++ drivers/iio/dac/mcp47feb02.h | 46 +++ 6 files changed, 227 insertions(+), 308 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6b4560681b51cfabf0b0e98fd89b69d8c527228b..fc87609865f26a9f484edc42058= f7df659a0fa4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16118,7 +16118,9 @@ M: Ariana Lazar L: linux-iio@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml -F: drivers/iio/dac/mcp47feb02.c +F: drivers/iio/dac/mcp47feb02-core.c +F: drivers/iio/dac/mcp47feb02-i2c.c +F: drivers/iio/dac/mcp47feb02.h =20 MCP4821 DAC DRIVER M: Anshul Dalal diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 657c68e75542e47ad5603165bcbc3660e90c6450..cc10d43ffd1e89bbf945ef89ea5= af0abe1a91084 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -550,8 +550,13 @@ config MCP4728 will be called mcp4728. =20 config MCP47FEB02 - tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 DAC driver" + tristate + +config MCP47FEB02_I2C + tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 I2C DAC driver" depends on I2C + select REGMAP_I2C + select MCP47FEB02 help Say yes here if you want to build the driver for the Microchip: - 8-bit DAC: @@ -567,7 +572,8 @@ config MCP47FEB02 (DAC) with I2C interface. =20 To compile this driver as a module, choose M here: the module - will be called mcp47feb02. + will be called mcp47feb02_i2c and you will also get + mcp47feb02_core for the core module. =20 config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 0034317984985035f7987a744899924bfd4612e3..28c8646a987cff1ac4d693fe868= 98d66c901d5bd 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -54,7 +54,8 @@ obj-$(CONFIG_MAX5522) +=3D max5522.o obj-$(CONFIG_MAX5821) +=3D max5821.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o -obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o +obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o +obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02-core= .c similarity index 73% rename from drivers/iio/dac/mcp47feb02.c rename to drivers/iio/dac/mcp47feb02-core.c index 8ca67c4021a86a6d5034495c1dbb18772ada354b..8bee01a82367371a590c9a7f23a= 18a1e8d1fe3ca 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C and SPI interface * - * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries * * Author: Ariana Lazar * @@ -17,12 +17,10 @@ #include #include #include -#include #include #include #include #include -#include #include #include #include @@ -31,6 +29,8 @@ #include #include =20 +#include "mcp47feb02.h" + /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 @@ -88,220 +88,12 @@ enum mcp47feb02_gain_bit_mode { MCP47FEB02_GAIN_BIT_X2 =3D 1, }; =20 -static const char * const mcp47feb02_powerdown_modes[] =3D { +const char * const mcp47feb02_powerdown_modes[] =3D { "1kohm_to_gnd", "100kohm_to_gnd", "open_circuit", }; =20 -/** - * struct mcp47feb02_features - chip specific data - * @name: device name - * @phys_channels: number of hardware channels - * @resolution: DAC resolution - * @have_ext_vref1: does the hardware have an the second external voltage = reference? - * @have_eeprom: does the hardware have an internal eeprom? - */ -struct mcp47feb02_features { - const char *name; - unsigned int phys_channels; - unsigned int resolution; - bool have_ext_vref1; - bool have_eeprom; -}; - -static const struct mcp47feb02_features mcp47feb01_chip_features =3D { - .name =3D "mcp47feb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb02_chip_features =3D { - .name =3D "mcp47feb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb04_chip_features =3D { - .name =3D "mcp47feb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb08_chip_features =3D { - .name =3D "mcp47feb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb11_chip_features =3D { - .name =3D "mcp47feb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb12_chip_features =3D { - .name =3D "mcp47feb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb14_chip_features =3D { - .name =3D "mcp47feb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb18_chip_features =3D { - .name =3D "mcp47feb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb21_chip_features =3D { - .name =3D "mcp47feb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb22_chip_features =3D { - .name =3D "mcp47feb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb24_chip_features =3D { - .name =3D "mcp47feb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb28_chip_features =3D { - .name =3D "mcp47feb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47fvb01_chip_features =3D { - .name =3D "mcp47fvb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb02_chip_features =3D { - .name =3D "mcp47fvb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb04_chip_features =3D { - .name =3D "mcp47fvb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb08_chip_features =3D { - .name =3D "mcp47fvb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb11_chip_features =3D { - .name =3D "mcp47fvb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb12_chip_features =3D { - .name =3D "mcp47fvb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb14_chip_features =3D { - .name =3D "mcp47fvb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb18_chip_features =3D { - .name =3D "mcp47fvb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb21_chip_features =3D { - .name =3D "mcp47fvb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb22_chip_features =3D { - .name =3D "mcp47fvb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb24_chip_features =3D { - .name =3D "mcp47fvb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb28_chip_features =3D { - .name =3D "mcp47fvb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - /** * struct mcp47feb02_channel_data - channel configuration * @ref_mode: chosen voltage for reference @@ -382,7 +174,7 @@ static const struct regmap_access_table mcp47feb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47feb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47feb02_regmap_config =3D { +const struct regmap_config mcp47feb02_regmap_config =3D { .name =3D "mcp47feb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -394,6 +186,7 @@ static const struct regmap_config mcp47feb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47feb02_regmap_config, "IIO_MCP47FEB02"); =20 /* For devices that doesn't have nonvolatile memory */ static const struct regmap_range mcp47fvb02_readable_ranges[] =3D { @@ -424,7 +217,7 @@ static const struct regmap_access_table mcp47fvb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47fvb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47fvb02_regmap_config =3D { +const struct regmap_config mcp47fvb02_regmap_config =3D { .name =3D "mcp47fvb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -436,6 +229,7 @@ static const struct regmap_config mcp47fvb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47fvb02_regmap_config, "IIO_MCP47FEB02"); =20 static int mcp47feb02_write_to_eeprom(struct mcp47feb02_data *data, unsign= ed int reg, unsigned int val) @@ -446,8 +240,6 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int * Wait until the currently occurring EEPROM Write Cycle is completed. * Only serial commands to the volatile memory are allowed. */ - guard(mutex)(&data->lock); - ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), @@ -473,6 +265,8 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a if (!state) return len; =20 + guard(mutex)(&data->lock); + /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, * writing to EEPROM is available. @@ -579,18 +373,17 @@ static int mcp47feb02_resume(struct device *dev) guard(mutex)(&data->lock); =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { - u8 pd_mode; int ret; =20 data->chdata[ch].powerdown =3D false; - pd_mode =3D data->chdata[ch].powerdown_mode + 1; =20 ret =3D regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_da= ta); if (ret) return ret; =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + DAC_CTRL_MASK(ch), + DAC_CTRL_VAL(ch, data->chdata[ch].ref_mode)); if (ret) return ret; =20 @@ -668,7 +461,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p return len; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp= 47feb02_resume); +EXPORT_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp47feb02= _resume); =20 static const struct iio_enum mcp47febxx_powerdown_mode_enum =3D { .items =3D mcp47feb02_powerdown_modes, @@ -1096,10 +889,10 @@ static int mcp47feb02_init_ch_scales(struct mcp47feb= 02_data *data, int vdd_uV, return 0; } =20 -static int mcp47feb02_probe(struct i2c_client *client) +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap) { - const struct mcp47feb02_features *chip_features; - struct device *dev =3D &client->dev; + struct device *dev =3D regmap_get_device(regmap); struct mcp47feb02_data *data; struct iio_dev *indio_dev; int vref1_uV, vref_uV, vdd_uV, ret; @@ -1108,22 +901,16 @@ static int mcp47feb02_probe(struct i2c_client *clien= t) if (!indio_dev) return -ENOMEM; =20 - data =3D iio_priv(indio_dev); - chip_features =3D i2c_get_match_data(client); - if (!chip_features) - return -EINVAL; + dev_set_drvdata(dev, indio_dev); =20 + data =3D iio_priv(indio_dev); data->chip_features =3D chip_features; + data->regmap =3D regmap; =20 - if (chip_features->have_eeprom) { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + if (chip_features->have_eeprom) indio_dev->info =3D &mcp47feb02_info; - } else { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + else indio_dev->info =3D &mcp47fvb02_info; - } - if (IS_ERR(data->regmap)) - return dev_err_probe(dev, PTR_ERR(data->regmap), "Error initializing i2c= regmap\n"); =20 indio_dev->name =3D chip_features->name; =20 @@ -1180,75 +967,7 @@ static int mcp47feb02_probe(struct i2c_client *client) =20 return devm_iio_device_register(dev, indio_dev); } - -static const struct i2c_device_id mcp47feb02_id[] =3D { - { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, - { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, - { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, - { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, - { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, - { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, - { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, - { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, - { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, - { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, - { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, - { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, - { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, - { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, - { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, - { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, - { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, - { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, - { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, - { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, - { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, - { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, - { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, - { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, - { } -}; -MODULE_DEVICE_TABLE(i2c, mcp47feb02_id); - -static const struct of_device_id mcp47feb02_of_match[] =3D { - { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, - { } -}; -MODULE_DEVICE_TABLE(of, mcp47feb02_of_match); - -static struct i2c_driver mcp47feb02_driver =3D { - .driver =3D { - .name =3D "mcp47feb02", - .of_match_table =3D mcp47feb02_of_match, - .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), - }, - .probe =3D mcp47feb02_probe, - .id_table =3D mcp47feb02_id, -}; -module_i2c_driver(mcp47feb02_driver); +EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); diff --git a/drivers/iio/dac/mcp47feb02-i2c.c b/drivers/iio/dac/mcp47feb02-= i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..7e49503e3abc91225b6ede89fda= b03f5ca3799f3 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-i2c.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with I2C interface: + * [MCP47FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005375A.pdf + * [MCP47FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005405A.pdf + * [MCP47FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb28, 8, 12, true, false); + +static int mcp47feb02_i2c_probe(struct i2c_client *client) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &client->dev; + struct regmap *regmap; + + chip_features =3D i2c_get_match_data(client); + if (!chip_features) + return dev_err_probe(dev, -ENODEV, "No I2C device found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing I2C regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct i2c_device_id mcp47feb02_i2c_id[] =3D { + { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, + { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, + { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, + { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, + { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, + { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, + { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, + { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, + { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, + { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, + { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, + { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, + { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, + { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, + { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, + { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, + { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, + { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, + { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, + { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, + { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, + { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, + { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, + { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp47feb02_i2c_id); + +static const struct of_device_id mcp47feb02_of_i2c_match[] =3D { + { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_i2c_match); + +static struct i2c_driver mcp47feb02_i2c_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_i2c_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_i2c_probe, + .id_table =3D mcp47feb02_i2c_id, +}; +module_i2c_driver(mcp47feb02_i2c_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); diff --git a/drivers/iio/dac/mcp47feb02.h b/drivers/iio/dac/mcp47feb02.h new file mode 100644 index 0000000000000000000000000000000000000000..64620c865871254f5db373f951f= fad3b9c273f29 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DRIVERS_IIO_DAC_MCP47FEB02_H__ +#define __DRIVERS_IIO_DAC_MCP47FEB02_H__ + +#include +#include + +extern const char * const mcp47feb02_powerdown_modes[]; + +/* Macro used for generating chip features structures */ +#define MCP47FEB02_CHIP_INFO(_name, _channels, _res, _vref1, _eeprom) \ +static const struct mcp47feb02_features _name##_chip_features =3D { \ + .name =3D #_name, \ + .phys_channels =3D _channels, \ + .resolution =3D _res, \ + .have_ext_vref1 =3D _vref1, \ + .have_eeprom =3D _eeprom, \ +} + +/** + * struct mcp47feb02_features - chip specific data + * @name: device name + * @phys_channels: number of hardware channels + * @resolution: DAC resolution + * @have_ext_vref1: does the hardware have an the second external voltage = reference? + * @have_eeprom: does the hardware have an internal eeprom? + */ +struct mcp47feb02_features { + const char *name; + unsigned int phys_channels; + unsigned int resolution; + bool have_ext_vref1; + bool have_eeprom; +}; + +extern const struct regmap_config mcp47feb02_regmap_config; +extern const struct regmap_config mcp47fvb02_regmap_config; + +/* Properties shared by I2C and SPI families */ +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap); 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Wed, 19 Aug 2026 05:41:32 -0700 From: Ariana Lazar Date: Wed, 19 Aug 2026 15:41:12 +0300 Subject: [PATCH v4 8/9] dt-bindings: iio: dac: add support for MCP48FEB02 SPI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-8-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=15556; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=acUL/CcC7KE1IDiRXLEfBcTJXBXILIApK2E6Dz8MP1c=; b=XloJX+9KyY6O/tAXq6A1DGJoz5PC2iBI/bu9HtUBgau1ofT7r/zsfPDzw+PI1NUHGwVco5sF5 tRIWjy67J7HAAP5fLcuZVAu6q7TiI0RENU9E6imt4Deg6w/S6rx7jyW X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Add the SPI MCP48FxBy1/2/4/8 part numbers, the spi-max-frequency property and a devicetree example for SPI usage to the existing binding. Signed-off-by: Ariana Lazar Reviewed-by: Rob Herring (Arm) --- .../bindings/iio/dac/microchip,mcp47feb02.yaml | 221 ++++++++++++++++-= ---- 1 file changed, 173 insertions(+), 48 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02= .yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml index d131f136bd15161666932261bcacd6d124b23ede..a86d094f0d4b54f9d9cc39fd542= 22f5968714668 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -4,58 +4,92 @@ $id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies +title: Microchip MCP4(7/8)F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C/SPI Interfa= ce Families =20 maintainers: - Ariana Lazar =20 description: | - Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, - MCP47FEB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005375A.pdf - Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, - MCP47FVB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005405A.pdf - Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, - MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, - MCP47FVB28 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produc= tDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf - - +------------+--------------+-------------+-------------+------------+ - | Device | Resolution | Channels | Vref number | Memory | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | - | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | - | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | - | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | - | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB01 | 8-bit | 1 | 1 | RAM | - | MCP47FVB11 | 10-bit | 1 | 1 | RAM | - | MCP47FVB21 | 12-bit | 1 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB02 | 8-bit | 2 | 1 | RAM | - | MCP47FVB12 | 10-bit | 2 | 1 | RAM | - | MCP47FVB22 | 12-bit | 2 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB04 | 8-bit | 4 | 2 | RAM | - | MCP47FVB14 | 10-bit | 4 | 2 | RAM | - | MCP47FVB24 | 12-bit | 4 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB08 | 8-bit | 8 | 2 | RAM | - | MCP47FVB18 | 10-bit | 8 | 2 | RAM | - | MCP47FVB28 | 12-bit | 8 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | - | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | - | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | - | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | - | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | - +------------+--------------+-------------+-------------+------------+ + Datasheets for MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies: + Datasheet for MCP47FEB01, MCP47FEB02, MCP47FEB11, MCP47FEB12, MCP47FEB2= 1, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB02, MCP47FVB11, MCP47FVB12, MCP47FVB2= 1, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB08, MCP47FEB14, MCP47FEB18, MCP47FEB2= 4, + MCP47FEB28, MCP47FVB04, MCP47FVB08, MCP47FVB14, MCP47FVB18, MCP47FVB24, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + Datasheets for MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Fami= lies: + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB2= 1, + MCP48FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005429B.pdf + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB2= 1, + MCP48FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005466A.pdf + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB1= 8, + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18, + MCP48FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf + + +------------+--------------+-------------+-------------+------------+--= ----------+ + | Device | Resolution | Channels | Vref number | Memory | I= nterface | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB01 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB02 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB04 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB01 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB02 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB04 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB08 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB11 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB12 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB14 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB11 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB12 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB14 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB18 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB21 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB22 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB24 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB21 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB22 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB24 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB28 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB01 | | 1 | 1 | RAM | = I2C | + | MCP47FVB02 | | 2 | 1 | RAM | = I2C | + | MCP47FVB04 | | 4 | 2 | RAM | = I2C | + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB01 | | 1 | 1 | RAM | = SPI | + | MCP48FVB02 | | 2 | 1 | RAM | = SPI | + | MCP48FVB04 | | 4 | 2 | RAM | = SPI | + | MCP48FVB08 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB11 | | 1 | 1 | RAM | = I2C | + | MCP47FVB12 | | 2 | 1 | RAM | = I2C | + | MCP47FVB14 | | 4 | 2 | RAM | = I2C | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB11 | | 1 | 1 | RAM | = SPI | + | MCP48FVB12 | | 2 | 1 | RAM | = SPI | + | MCP48FVB14 | | 4 | 2 | RAM | = SPI | + | MCP48FVB18 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB21 | | 1 | 1 | RAM | = I2C | + | MCP47FVB22 | | 2 | 1 | RAM | = I2C | + | MCP47FVB24 | | 4 | 2 | RAM | = I2C | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB21 | | 1 | 1 | RAM | = SPI | + | MCP48FVB22 | | 2 | 1 | RAM | = SPI | + | MCP48FVB24 | | 4 | 2 | RAM | = SPI | + | MCP48FVB28 | | 8 | 2 | RAM | = SPI | + +------------+--------------+-------------+-------------+------------+--= ----------+ =20 properties: compatible: @@ -84,10 +118,37 @@ properties: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb01 + - microchip,mcp48feb02 + - microchip,mcp48feb04 + - microchip,mcp48feb08 + - microchip,mcp48feb11 + - microchip,mcp48feb12 + - microchip,mcp48feb14 + - microchip,mcp48feb18 + - microchip,mcp48feb21 + - microchip,mcp48feb22 + - microchip,mcp48feb24 + - microchip,mcp48feb28 + - microchip,mcp48fvb01 + - microchip,mcp48fvb02 + - microchip,mcp48fvb04 + - microchip,mcp48fvb08 + - microchip,mcp48fvb11 + - microchip,mcp48fvb12 + - microchip,mcp48fvb14 + - microchip,mcp48fvb18 + - microchip,mcp48fvb21 + - microchip,mcp48fvb22 + - microchip,mcp48fvb24 + - microchip,mcp48fvb28 =20 reg: maxItems: 1 =20 + spi-max-frequency: + maximum: 10000000 + "#address-cells": const: 1 =20 @@ -178,6 +239,21 @@ required: - vdd-supply =20 allOf: + - if: + properties: + compatible: + contains: + pattern: "^microchip,mcp48f[ev]b[0-2][1248]$" + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# + dependencies: + spi-cpha: [ spi-cpol ] + spi-cpol: [ spi-cpha ] + else: + properties: + spi-max-frequency: false + spi-cpha: false + spi-cpol: false - if: properties: compatible: @@ -189,6 +265,12 @@ allOf: - microchip,mcp47fvb01 - microchip,mcp47fvb11 - microchip,mcp47fvb21 + - microchip,mcp48feb01 + - microchip,mcp48feb11 + - microchip,mcp48feb21 + - microchip,mcp48fvb01 + - microchip,mcp48fvb11 + - microchip,mcp48fvb21 then: properties: lat1-gpios: false @@ -211,6 +293,12 @@ allOf: - microchip,mcp47fvb02 - microchip,mcp47fvb12 - microchip,mcp47fvb22 + - microchip,mcp48feb02 + - microchip,mcp48feb12 + - microchip,mcp48feb22 + - microchip,mcp48fvb02 + - microchip,mcp48fvb12 + - microchip,mcp48fvb22 then: properties: lat1-gpios: false @@ -233,6 +321,12 @@ allOf: - microchip,mcp47feb04 - microchip,mcp47feb14 - microchip,mcp47feb24 + - microchip,mcp48feb04 + - microchip,mcp48feb14 + - microchip,mcp48feb24 + - microchip,mcp48fvb04 + - microchip,mcp48fvb14 + - microchip,mcp48fvb24 then: patternProperties: "^channel@[0-3]$": @@ -251,6 +345,12 @@ allOf: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb08 + - microchip,mcp48feb18 + - microchip,mcp48feb28 + - microchip,mcp48fvb08 + - microchip,mcp48fvb18 + - microchip,mcp48fvb28 then: patternProperties: "^channel@[0-7]$": @@ -272,7 +372,7 @@ allOf: properties: microchip,vref1-buffered: false =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | @@ -299,4 +399,29 @@ examples: }; }; }; + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dac@0 { + compatible =3D "microchip,mcp48feb02"; + reg =3D <0x0>; + vdd-supply =3D <&vdac_vdd>; + vref-supply =3D <&vref_reg>; + spi-max-frequency =3D <10000000>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + label =3D "Adjustable_voltage_ch0"; + }; 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(10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 19 Aug 2026 05:41:37 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 19 Aug 2026 05:41:34 -0700 From: Ariana Lazar Date: Wed, 19 Aug 2026 15:41:13 +0300 Subject: [PATCH v4 9/9] iio: dac: add support for Microchip MCP48FEB02 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260819-mcp47feb02_refactor-v4-9-beb2aa3bfd09@microchip.com> References: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> In-Reply-To: <20260819-mcp47feb02_refactor-v4-0-beb2aa3bfd09@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787143269; l=11114; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=XKeT60VIEsHna6RLpZwXaObEd7GhANJd5CZ6y4ZYSeQ=; b=EaGbll1o6coajISAQWvAgwA6QrNN5OHu0wVIDMld3/Lc5xyjWiN2BA/PiIUbZG7S5fePrWZTt Bp6DInWkrdeCHtjyxGToWAHykGMB6MX97Q2Y9fldtbWBLxPZPy6hz91 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= This is the iio driver for Microchip MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog Converters with nonvolatile or volatile memory and an SPI Interface. The families support up to 8 output channels. The devices can be 8-bit, 10-bit and 12-bit. Signed-off-by: Ariana Lazar --- MAINTAINERS | 1 + drivers/iio/dac/Kconfig | 23 +++++++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcp47feb02-spi.c | 145 +++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 170 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index fc87609865f26a9f484edc42058f7df659a0fa4f..b2ffcc0161ba0d147df35558312= cbf99052ed13e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16120,6 +16120,7 @@ S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml F: drivers/iio/dac/mcp47feb02-core.c F: drivers/iio/dac/mcp47feb02-i2c.c +F: drivers/iio/dac/mcp47feb02-spi.c F: drivers/iio/dac/mcp47feb02.h =20 MCP4821 DAC DRIVER diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index cc10d43ffd1e89bbf945ef89ea5af0abe1a91084..d941f78f7110b185fee6f025be8= 29bae1e4534da 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -575,6 +575,29 @@ config MCP47FEB02_I2C will be called mcp47feb02_i2c and you will also get mcp47feb02_core for the core module. =20 +config MCP47FEB02_SPI + tristate "MCP48F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 SPI DAC driver" + depends on SPI + select REGMAP_SPI + select MCP47FEB02 + help + Say yes here if you want to build the driver for the Microchip: + - 8-bit DAC: + MCP48FEB01, MCP48FEB02, MCP48FEB04, MCP48FEB08, + MCP48FVB01, MCP48FVB02, MCP48FVB04, MCP48FVB08 + - 10-bit DAC: + MCP48FEB11, MCP48FEB12, MCP48FEB14, MCP48FEB18, + MCP48FVB11, MCP48FVB12, MCP48FVB14, MCP48FVB18 + - 12-bit DAC: + MCP48FEB21, MCP48FEB22, MCP48FEB24, MCP48FEB28, + MCP48FVB21, MCP48FVB22, MCP48FVB24, MCP48FVB28 + having 1 to 8 channels, 8/10/12-bit digital-to-analog converter + (DAC) with SPI interface. + + To compile this driver as a module, choose M here: the module + will be called mcp47feb02_spi and you will also get + mcp47feb02_core for the core module. + config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 28c8646a987cff1ac4d693fe86898d66c901d5bd..9903198b934e8b66a4ea6562b66= 2d8073ed9cc59 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o +obj-$(CONFIG_MCP47FEB02_SPI) +=3D mcp47feb02-spi.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02-spi.c b/drivers/iio/dac/mcp47feb02-= spi.c new file mode 100644 index 0000000000000000000000000000000000000000..0c68d7c318cb2269a9d713d3c6e= c0854a576c19e --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-spi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP48FEB02 Multi-Channel DAC with SPI interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with SPI interface: + * [MCP48FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005429B.pdf + * [MCP48FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005466A.pdf + * [MCP48FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS200063= 62A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb28, 8, 12, true, false); + +static int mcp47feb02_spi_probe(struct spi_device *spi) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &spi->dev; + struct regmap *regmap; + + chip_features =3D spi_get_device_match_data(spi); + if (!chip_features) + return dev_err_probe(dev, -ENODEV, "No SPI device found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_spi(spi, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_spi(spi, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing SPI regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct spi_device_id mcp47feb02_spi_id[] =3D { + { .name =3D "mcp48feb01", .driver_data =3D (kernel_ulong_t)&mcp48feb01_ch= ip_features }, + { .name =3D "mcp48feb02", .driver_data =3D (kernel_ulong_t)&mcp48feb02_ch= ip_features }, + { .name =3D "mcp48feb04", .driver_data =3D (kernel_ulong_t)&mcp48feb04_ch= ip_features }, + { .name =3D "mcp48feb08", .driver_data =3D (kernel_ulong_t)&mcp48feb08_ch= ip_features }, + { .name =3D "mcp48feb11", .driver_data =3D (kernel_ulong_t)&mcp48feb11_ch= ip_features }, + { .name =3D "mcp48feb12", .driver_data =3D (kernel_ulong_t)&mcp48feb12_ch= ip_features }, + { .name =3D "mcp48feb14", .driver_data =3D (kernel_ulong_t)&mcp48feb14_ch= ip_features }, + { .name =3D "mcp48feb18", .driver_data =3D (kernel_ulong_t)&mcp48feb18_c= hip_features }, + { .name =3D "mcp48feb21", .driver_data =3D (kernel_ulong_t)&mcp48feb21_ch= ip_features }, + { .name =3D "mcp48feb22", .driver_data =3D (kernel_ulong_t)&mcp48feb22_ch= ip_features }, + { .name =3D "mcp48feb24", .driver_data =3D (kernel_ulong_t)&mcp48feb24_ch= ip_features }, + { .name =3D "mcp48feb28", .driver_data =3D (kernel_ulong_t)&mcp48feb28_ch= ip_features }, + { .name =3D "mcp48fvb01", .driver_data =3D (kernel_ulong_t)&mcp48fvb01_ch= ip_features }, + { .name =3D "mcp48fvb02", .driver_data =3D (kernel_ulong_t)&mcp48fvb02_ch= ip_features }, + { .name =3D "mcp48fvb04", .driver_data =3D (kernel_ulong_t)&mcp48fvb04_ch= ip_features }, + { .name =3D "mcp48fvb08", .driver_data =3D (kernel_ulong_t)&mcp48fvb08_ch= ip_features }, + { .name =3D "mcp48fvb11", .driver_data =3D (kernel_ulong_t)&mcp48fvb11_ch= ip_features }, + { .name =3D "mcp48fvb12", .driver_data =3D (kernel_ulong_t)&mcp48fvb12_ch= ip_features }, + { .name =3D "mcp48fvb14", .driver_data =3D (kernel_ulong_t)&mcp48fvb14_ch= ip_features }, + { .name =3D "mcp48fvb18", .driver_data =3D (kernel_ulong_t)&mcp48fvb18_ch= ip_features }, + { .name =3D "mcp48fvb21", .driver_data =3D (kernel_ulong_t)&mcp48fvb21_ch= ip_features }, + { .name =3D "mcp48fvb22", .driver_data =3D (kernel_ulong_t)&mcp48fvb22_ch= ip_features }, + { .name =3D "mcp48fvb24", .driver_data =3D (kernel_ulong_t)&mcp48fvb24_ch= ip_features }, + { .name =3D "mcp48fvb28", .driver_data =3D (kernel_ulong_t)&mcp48fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp47feb02_spi_id); + +static const struct of_device_id mcp47feb02_of_spi_match[] =3D { + { .compatible =3D "microchip,mcp48feb01", .data =3D &mcp48feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb02", .data =3D &mcp48feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb04", .data =3D &mcp48feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb08", .data =3D &mcp48feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb11", .data =3D &mcp48feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb12", .data =3D &mcp48feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb14", .data =3D &mcp48feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb18", .data =3D &mcp48feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb21", .data =3D &mcp48feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb22", .data =3D &mcp48feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb24", .data =3D &mcp48feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb28", .data =3D &mcp48feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb01", .data =3D &mcp48fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb02", .data =3D &mcp48fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb04", .data =3D &mcp48fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb08", .data =3D &mcp48fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb11", .data =3D &mcp48fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb12", .data =3D &mcp48fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb14", .data =3D &mcp48fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb18", .data =3D &mcp48fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb21", .data =3D &mcp48fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb22", .data =3D &mcp48fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb24", .data =3D &mcp48fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb28", .data =3D &mcp48fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_spi_match); + +static struct spi_driver mcp47feb02_spi_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_spi_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_spi_probe, + .id_table =3D mcp47feb02_spi_id, +}; +module_spi_driver(mcp47feb02_spi_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP48FEB02 Multi-Channel DAC with SPI i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); --=20 2.43.0