From nobody Mon Sep 28 19:25:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 567FD46D2CE; Tue, 18 Aug 2026 12:40:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056842; cv=none; b=cSEYztO1bHMw1vrwpqvztfuO6oSn1dRhB82HHgIaYkIgo0wIA60Q+x7tH/NaJFFjdiikRay6Td8wfsvq9kyyamHTKK0GJOCKIRjH391g9UTTLHKGRPC93Hyrdz4bAoTQRDa/DupRa9chCjql1A2A2UMAfX4P+BxKLHzTDqI9uOc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056842; c=relaxed/simple; bh=mtrZow1VnKLVFHIgnWe6y2Y6xQFKTwWZPCkJXsA9Av4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=guZ499zYq5Z//V2jZiBlC07KjQHBbGCI/RTYjs90noGTlpe4nQ+d2L5304OvmEplyC+mxLy+9Kr8vja8+OzOccqiySYoLe2ZO6pdv1LkNh8s/6EsR86enoXpnLEC2HpWmcuFqdphaEt6/r4lfJ3WSVNnkNlAo3bETfpRhVB7kFc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 617701F000E9; Tue, 18 Aug 2026 12:40:29 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org Subject: [PATCH 1/5] cpufreq: loongson3: Make this drvier depend on MACH_LOONGSON64 Date: Tue, 18 Aug 2026 20:39:17 +0800 Message-ID: <20260818123921.3600606-2-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260818123921.3600606-1-chenhuacai@loongson.cn> References: <20260818123921.3600606-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" 32BIT Loongson machines don't have SMC and FreqCtrl registers, so make this drvier depend on MACH_LOONGSON64. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen --- drivers/cpufreq/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig index db83f3365698..edc1299098d4 100644 --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig @@ -288,6 +288,7 @@ endif if LOONGARCH config LOONGSON3_CPUFREQ tristate "Loongson3 CPUFreq Driver" + depends on MACH_LOONGSON64 help This option adds a CPUFreq driver for Loongson processors which support software configurable cpu frequency. --=20 2.52.0 From nobody Mon Sep 28 19:25:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC0AD3A782D; Tue, 18 Aug 2026 12:40:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056859; cv=none; b=D0WChgl3U7hrVBp9yqdokSgaFqoqDttHukO5KQJ4SRkqxLnb4z18tWbdTgFPCoj+qC/1S/uULz7dRzFCAUwR5MfEnruUS1MDWNeMawU7PDtYIt/z9AUD4aO39LR05WjV1SNxql/LjQYM3NJPHX3CR28bhtSalmK6yKlPg1EY3xQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056859; c=relaxed/simple; bh=gdXZDaMP9VYXtCLquhuJtmlDM8Bl8q4Qe66enhMHBr8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C4Oq/tDs4gITAyZ2tCB1+FaSsnYLHrhNellJZbQLJc0FuW9M57ylLdKpcn1YPYkCazhDM/3bJg7WdWW5YELiKukXZ8+xWCrhOVwHTVIZU3IeRyKKvSaupXvmoywGk3CkSoDM7vF3Z8GTNkho+QZmWk0SqFTi4xpXkekdl3E4wno= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1A3D81F000E9; Tue, 18 Aug 2026 12:40:52 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH 2/5] cpufreq: loongson3: Adjust the width of id and val in smc_message Date: Tue, 18 Aug 2026 20:39:18 +0800 Message-ID: <20260818123921.3600606-3-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260818123921.3600606-1-chenhuacai@loongson.cn> References: <20260818123921.3600606-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The id field of smc_message is usually stand for the CPU ID. In the past this driver was only tested for desktop and laptop productions so 4-bits are enough. But now we have servers that can have as many as 256 cores, so we need 8-bits CPU ID. On the other hand, the val field is usually stand for CPU frequency so 12-bits are enough to represent 4GHz, and for higher frequencies there is an extra bit to extend (enough for 8GHz). In theory, this is a incompatible change, but fortunately the old SMC firmwares are not widely shipped and can be updated on the air, thus we can safely adjust the widths. Cc: stable@vger.kernel.org Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen --- drivers/cpufreq/loongson3_cpufreq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index 1e8715ea1b77..630f679aa739 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -21,9 +21,9 @@ union smc_message { u32 value; struct { - u32 id : 4; + u32 id : 8; u32 info : 4; - u32 val : 16; + u32 val : 12; u32 cmd : 6; u32 extra : 1; u32 complete : 1; --=20 2.52.0 From nobody Mon Sep 28 19:25:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0229846C83B; Tue, 18 Aug 2026 12:41:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056884; cv=none; b=aYuT0ztVKu4rGk1kJuak/jKj7vEiTJmUWu1PS0lxH7FPfWVIXAmkQcFzBzgedeHb2PClZhaTCBDpycRBAJbcBAKsw/w/cayNFwzuWK2zkuckV4XtmEueA6C3CsR9wEz/D5WWKicAWMBvJYeie5MPQZjfuFXx12FVTs2/E1RchPI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056884; c=relaxed/simple; bh=rLcSt2kfYOBdgaMB6RoZ+1ArusdKM3QJC841FuKNZYk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=stt5FyHU0nXExbM4mrzht/+jNRwtQ7u2Mevw4O0w8Wx8CUw04G3Y1F7twGCCM8octKPlE7nE+AialVVaXwm/R/4FzMCYVIq8Lcn2irnJKqh9qPLOfn/vxNCRPtcsyu0v7iueh8851Lytnv1tUZERLMbxfAiriS1XPUP0fi1tLdM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 53C611F000E9; Tue, 18 Aug 2026 12:41:18 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH 3/5] cpufreq: loongson3: Replace per-package mutex with per-node Date: Tue, 18 Aug 2026 20:39:19 +0800 Message-ID: <20260818123921.3600606-4-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260818123921.3600606-1-chenhuacai@loongson.cn> References: <20260818123921.3600606-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have multiple nodes in one package and SMC mailboxes are also per-node. So replace the per-package mutex with per-node one. Cc: stable@vger.kernel.org Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen --- drivers/cpufreq/loongson3_cpufreq.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index 630f679aa739..e3cd78a5ab18 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -169,7 +169,7 @@ struct loongson3_freq_data { struct cpufreq_frequency_table table[]; }; =20 -static struct mutex cpufreq_mutex[MAX_PACKAGES]; +static struct mutex cpufreq_mutex[MAX_NUMNODES]; static struct cpufreq_driver loongson3_cpufreq_driver; static DEFINE_PER_CPU(struct loongson3_freq_data *, freq_data); =20 @@ -177,14 +177,14 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext { int retries; unsigned int cpu =3D raw_smp_processor_id(); - unsigned int package =3D cpu_data[cpu].package; + unsigned int nid =3D cpu_to_node(cpu); union smc_message msg, last; =20 - mutex_lock(&cpufreq_mutex[package]); + mutex_lock(&cpufreq_mutex[nid]); =20 last.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); if (!last.complete) { - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; } =20 @@ -208,11 +208,11 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext } =20 if (!msg.complete || msg.cmd !=3D CMD_OK) { - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; } =20 - mutex_unlock(&cpufreq_mutex[package]); + mutex_unlock(&cpufreq_mutex[nid]); =20 return msg.val; } @@ -337,7 +337,7 @@ static int loongson3_cpufreq_probe(struct platform_devi= ce *pdev) { int i, ret; =20 - for (i =3D 0; i < MAX_PACKAGES; i++) { + for (i =3D 0; i < MAX_NUMNODES; i++) { ret =3D devm_mutex_init(&pdev->dev, &cpufreq_mutex[i]); if (ret) return ret; --=20 2.52.0 From nobody Mon Sep 28 19:25:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 708DD471436; Tue, 18 Aug 2026 12:41:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056910; cv=none; b=OATGRNBNh72VRMs15W/c8KUlDTOCf1OjMvSo5k7ONSiZuBXRs8pnq5dfDD24ubpUIEtSU2LELGVN36jNDvTeTCZmqeZJ6038i97q/VJDLBiFkUToZBS2yrgpbHdjnvFB2+tTwxWD4xJ0FPpzbOsj/9UZ2dQYIzWG1+NGIFvWz7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056910; c=relaxed/simple; bh=eUKT3CVNml9vN1N9oGnhYjqhTpBsI0FErV7HButheTc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VWE/0Wn8Qv0w6oRPq4rAx5EQ/jellWtetyeyhre69o/Bmr1T1Oq6JZL6r0S95A9icaW6JkEbL5G0mpcwUDvoWn0x92aVDDHVVNS4AjNYGj5QOWLxfLC2ql8INvUpJyizmckCsL1E7+3irJQCZEX8S9iQVgJgmIMm0h3oRlooJBY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9593F1F000E9; Tue, 18 Aug 2026 12:41:43 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org, Hongliang Wang Subject: [PATCH 4/5] cpufreq: loongson3: Use global physical CPU ID in get/target callbacks Date: Tue, 18 Aug 2026 20:39:20 +0800 Message-ID: <20260818123921.3600606-5-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260818123921.3600606-1-chenhuacai@loongson.cn> References: <20260818123921.3600606-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have discrete global physical CPU IDs while the core ID inside the packages are always continuous. In these cases we should use global physical CPU IDs to get and set frequencies. Cc: stable@vger.kernel.org Signed-off-by: Hongliang Wang Signed-off-by: Huacai Chen --- drivers/cpufreq/loongson3_cpufreq.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index e3cd78a5ab18..c75c0e30e881 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -219,38 +219,40 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext =20 static unsigned int loongson3_cpufreq_get(unsigned int cpu) { - int ret; + int ret, core =3D cpu_logical_map(cpu); =20 - ret =3D do_service_request(cpu, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_INFO, 0= , 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_INFO, = 0, 0); =20 return ret * KILO; } =20 static int loongson3_cpufreq_target(struct cpufreq_policy *policy, unsigne= d int index) { - int ret; + int ret, core =3D cpu_logical_map(policy->cpu); =20 - ret =3D do_service_request(cpu_data[policy->cpu].core, - FREQ_INFO_TYPE_LEVEL, CMD_SET_FREQ_INFO, index, 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_LEVEL, CMD_SET_FREQ_INFO, + index, 0); =20 return (ret >=3D 0) ? 0 : ret; } =20 static int configure_freq_table(int cpu) { - int i, ret, boost_level, max_level, freq_level; + int i, ret, core, boost_level, max_level, freq_level; struct platform_device *pdev =3D cpufreq_get_driver_data(); struct loongson3_freq_data *data; =20 if (per_cpu(freq_data, cpu)) return 0; =20 - ret =3D do_service_request(cpu, 0, CMD_GET_FREQ_LEVEL_NUM, 0, 0); + core =3D cpu_logical_map(cpu); + + ret =3D do_service_request(core, 0, CMD_GET_FREQ_LEVEL_NUM, 0, 0); if (ret < 0) return ret; max_level =3D ret; =20 - ret =3D do_service_request(cpu, 0, CMD_GET_FREQ_BOOST_LEVEL, 0, 0); + ret =3D do_service_request(core, 0, CMD_GET_FREQ_BOOST_LEVEL, 0, 0); if (ret < 0) return ret; boost_level =3D ret; @@ -263,7 +265,7 @@ static int configure_freq_table(int cpu) data->def_freq_level =3D boost_level - 1; =20 for (i =3D 0; i < freq_level; i++) { - ret =3D do_service_request(cpu, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_LEVEL_= INFO, i, 0); + ret =3D do_service_request(core, FREQ_INFO_TYPE_FREQ, CMD_GET_FREQ_LEVEL= _INFO, i, 0); if (ret < 0) { devm_kfree(&pdev->dev, data); return ret; --=20 2.52.0 From nobody Mon Sep 28 19:25:15 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8883D47143E; Tue, 18 Aug 2026 12:42:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056937; cv=none; b=u5aWWfe5d9vcBrebeUqVkuNl7rKYyrzrehHMbaRHnbUv3skAXjB4cIdsMqJOaKYqeZYE89mCqEre/VW3WMX1lxm49J88MqVizqa2qy6AgkBE9pVTVgA3vC1cQWcSZDjV8n/ddWODbX3ix8ZH0zOgR2I8BK/qYJ4fqFCHP4G90Jw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787056937; c=relaxed/simple; bh=rvVCy0lGTiwRffJS0blVAtfXnYu48gpn6Ijb5zYGLTQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WO+52v7Stq6fqcCT9nCNKMyN5EuRfgcDoUH7RV9YgWjIK5axSVD4UtAA5KmkhdxAWq3c08d3Vm7w3QED2hJOrExlGZRbUjpLCzToyctaI7Z9evsX7/vio5QMPXx6Jg1u8IK5J4P87bV14TjXjHAaf9rw5qAGkQ3A0EBcgb9RrnM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 005CB1F000E9; Tue, 18 Aug 2026 12:42:07 +0000 (UTC) From: Huacai Chen To: "Rafael J . Wysocki" , Viresh Kumar , Huacai Chen Cc: loongarch@lists.linux.dev, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Xuerui Wang , Jiaxun Yang , Huacai Chen , stable@vger.kernel.org Subject: [PATCH 5/5] cpufreq: loongson3: Replace IOCSR read/write with MMIO ones Date: Tue, 18 Aug 2026 20:39:21 +0800 Message-ID: <20260818123921.3600606-6-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260818123921.3600606-1-chenhuacai@loongson.cn> References: <20260818123921.3600606-1-chenhuacai@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our server productions (e.g. Loongson-3D6000/3E6000) can have multiple nodes in one package and SMC mailboxes are also per-node. However, IOCSR read/write can only perform on the current node, while sometimes we want to perform on other nodes (e.g. when switch governor, the get and target callbacks are not run on target core). So replace IOCSR read/write with MMIO ones. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen Tested-by: Xi Ruoyao # on XA61200 --- drivers/cpufreq/loongson3_cpufreq.c | 31 ++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/loongson3_cpufreq.c b/drivers/cpufreq/loongson= 3_cpufreq.c index c75c0e30e881..e5062cd62390 100644 --- a/drivers/cpufreq/loongson3_cpufreq.c +++ b/drivers/cpufreq/loongson3_cpufreq.c @@ -164,6 +164,12 @@ union smc_message { =20 #define FREQ_MAX_LEVEL 16 =20 +#define MMIO_SMCMBX(node) \ + ((void __iomem *)(IO_BASE | (u64)(node) << NODE_ADDRSPACE_SHIFT | LOONGSO= N_REG_BASE | LOONGARCH_IOCSR_SMCMBX)) + +#define MMIO_MISC_FUNC(node) \ + ((void __iomem *)(IO_BASE | (u64)(node) << NODE_ADDRSPACE_SHIFT | LOONGSO= N_REG_BASE | LOONGARCH_IOCSR_MISC_FUNC)) + struct loongson3_freq_data { unsigned int def_freq_level; struct cpufreq_frequency_table table[]; @@ -176,13 +182,25 @@ static DEFINE_PER_CPU(struct loongson3_freq_data *, f= req_data); static inline int do_service_request(u32 id, u32 info, u32 cmd, u32 val, u= 32 extra) { int retries; - unsigned int cpu =3D raw_smp_processor_id(); - unsigned int nid =3D cpu_to_node(cpu); + unsigned int cpu, nid; union smc_message msg, last; =20 + switch (cmd) { + case CMD_GET_FREQ_INFO: + case CMD_SET_FREQ_INFO: + case CMD_GET_FREQ_LEVEL_NUM: + case CMD_GET_FREQ_LEVEL_INFO: + case CMD_GET_FREQ_BOOST_LEVEL: + cpu =3D cpu_number_map(id); + break; + default: + cpu =3D raw_smp_processor_id(); + } + nid =3D cpu_to_node(cpu); + mutex_lock(&cpufreq_mutex[nid]); =20 - last.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); + last.value =3D readl(MMIO_SMCMBX(nid)); if (!last.complete) { mutex_unlock(&cpufreq_mutex[nid]); return -EPERM; @@ -195,12 +213,11 @@ static inline int do_service_request(u32 id, u32 info= , u32 cmd, u32 val, u32 ext msg.extra =3D extra; msg.complete =3D 0; =20 - iocsr_write32(msg.value, LOONGARCH_IOCSR_SMCMBX); - iocsr_write32(iocsr_read32(LOONGARCH_IOCSR_MISC_FUNC) | IOCSR_MISC_FUNC_S= OFT_INT, - LOONGARCH_IOCSR_MISC_FUNC); + writel(msg.value, MMIO_SMCMBX(nid)); + writel(readl(MMIO_MISC_FUNC(nid)) | IOCSR_MISC_FUNC_SOFT_INT, MMIO_MISC_F= UNC(nid)); =20 for (retries =3D 0; retries < 10000; retries++) { - msg.value =3D iocsr_read32(LOONGARCH_IOCSR_SMCMBX); + msg.value =3D readl(MMIO_SMCMBX(nid)); if (msg.complete) break; =20 --=20 2.52.0