From nobody Mon Sep 28 23:11:42 2026 Received: from mta1.migadu.com (out-156.mta1.migadu.com [95.215.58.156]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9E88349B19 for ; Sat, 15 Aug 2026 10:31:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.156 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786789896; cv=none; b=mxKOYe7w7nCbWyaIYZuXz++GlznWCsDkDAFh0rZKzH3+wWTAgER1PiNlr+bXx3B5yvP+cFZ0ZWqNOF2zGOn5JyAz8sjLejkAuUZCm8i9jZKJoFuUF1/2yf94oFMq6i2+vEql87EyWxLHG/+Ib93iu9MFC72vpdIknPw02IImHzQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786789896; c=relaxed/simple; bh=yH/agCXDCZtwBki0zGE0wtxh6FsJiZ2Vyl/5PTnHoLo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Fv87DarzXZ9k+tCyfMsVk0LOY0vJTsKyjHTiO4gi7pKGaUTPxAwhX5duyx7SSluedmIFoAe/UXXm1TvccyM+reIH5I3eu530BurfLx1xmr7zlTQslbRwQ+ygryjRNAyUwY0zq4yUMkFIs/NbomNa0ujZ4JN3AL1vxU+bLX2NOJg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ak9uo2Kv; arc=none smtp.client-ip=95.215.58.156 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ak9uo2Kv" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=yH/agCXDCZtwBki0zGE0wtxh6FsJiZ2Vyl/5PTnHoLo=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786789893; v=1; x=1787394693; b=ak9uo2Kv+7pS7iihnmYHi3OUnwxn5K3N3VqnD6BYy4/DDTLoMaJGj625C6OoPuVffZ4y1rUb x4VmEzrUdNuWwfjMJVANdQoiqHM8x2Cj5NzEsqztVDabAPI3wLWk+UMW1FAB8RPvd9O7Bm2HfMs W7pJWIPdWiLr/GRD3mHlGvXw= X-Envelope-To: linux-kernel@vger.kernel.org Received: from localhost.localdomain (2408:823d:2011:2c0:e810:54f9:f0a3:99d) by smtp.migadu.com with ESMTPS id 2aea94ff0226619a; Sat, 15 Aug 2026 10:31:32 +0000 X-Migadu-Flow: FLOW_OUT From: Jinyu Tang To: Anup Patel , Anup Patel , Atish Patra Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Sean Christopherson , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Conor Dooley , Yong-Xuan Wang , Nutty Liu , Jinyu Tang Subject: [PATCH v4 RESEND 1/5] KVM: riscv: Avoid overwriting G-stage tables with huge leaves Date: Sat, 15 Aug 2026 06:31:23 -0400 Message-ID: <20260815103123.864738-1-jinyu.tang@linux.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260815102833.864330-1-jinyu.tang@linux.dev> References: <20260815102833.864330-1-jinyu.tang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RISC-V KVM can overwrite an existing G-stage table entry when installing a huge leaf mapping. If the target huge range already has a lower-level page table, kvm_riscv_gstage_set_pte() can replace the non-leaf entry with a leaf PTE and disconnect the lower-level page table. Reject replacing a valid table entry with a leaf PTE. If huge-page installation hits such a conflict, fall back to a 4K mapping for the original faulting GPA in the MMU fault path, where the original GPA and HFN are still available. Suggested-by: Sashiko Fixes: 9d05c1fee837 ("RISC-V: KVM: Implement stage2 page table programming") Signed-off-by: Jinyu Tang --- arch/riscv/kvm/gstage.c | 6 ++++++ arch/riscv/kvm/mmu.c | 24 +++++++++++++++++++++++- 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c index e5002cb9cbef..54d45addf18f 100644 --- a/arch/riscv/kvm/gstage.c +++ b/arch/riscv/kvm/gstage.c @@ -174,6 +174,12 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage, =20 if (pte_val(*ptep) !=3D pte_val(map->pte)) { bool was_invalid =3D !pte_val(*ptep); + + /* Avoid replacing an existing lower-level table with a leaf mapping. */ + if (!gstage_pte_leaf(ptep) && !was_invalid && + gstage_pte_leaf(&map->pte)) + return -EEXIST; + set_pte(ptep, map->pte); if (gstage_pte_leaf(ptep) && !(was_invalid && riscv_has_extension_unlikely(RISCV_ISA_EXT_SVVPTC))) diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c index 6035b5ec9503..bfd6168ebe30 100644 --- a/arch/riscv/kvm/mmu.c +++ b/arch/riscv/kvm/mmu.c @@ -625,10 +625,11 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct k= vm_memory_slot *memslot, struct kvm_gstage_mapping *out_map) { int ret; - kvm_pfn_t hfn; + kvm_pfn_t fault_hfn, hfn; bool is_hugetlb; bool writable; unsigned int vma_pageshift; + gpa_t fault_gpa =3D gpa; gfn_t gfn =3D gpa >> PAGE_SHIFT; struct vm_area_struct *vma; struct kvm *kvm =3D vcpu->kvm; @@ -709,6 +710,7 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm= _memory_slot *memslot, } if (is_error_noslot_pfn(hfn)) return -EFAULT; + fault_hfn =3D hfn + ((fault_gpa >> PAGE_SHIFT) - gfn); =20 /* * If logging is active then we allow writable pages only @@ -734,9 +736,29 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kv= m_memory_slot *memslot, mark_page_dirty_in_slot(kvm, memslot, gfn); ret =3D kvm_riscv_gstage_map_page(&gstage, pcache, gpa, hfn << PAGE_SHIF= T, vma_pagesize, false, true, out_map); + if (ret =3D=3D -EEXIST) { + /* + * Retry at 4K granularity for the original faulting GPA + * when a huge leaf cannot replace an existing table. + */ + ret =3D kvm_riscv_gstage_map_page(&gstage, pcache, fault_gpa, + fault_hfn << PAGE_SHIFT, + PAGE_SIZE, false, true, + out_map); + } } else { ret =3D kvm_riscv_gstage_map_page(&gstage, pcache, gpa, hfn << PAGE_SHIF= T, vma_pagesize, true, true, out_map); + if (ret =3D=3D -EEXIST) { + /* + * Retry at 4K granularity for the original faulting GPA + * when a huge leaf cannot replace an existing table. + */ + ret =3D kvm_riscv_gstage_map_page(&gstage, pcache, fault_gpa, + fault_hfn << PAGE_SHIFT, + PAGE_SIZE, true, true, + out_map); + } } =20 if (ret) --=20 2.43.0 From nobody Mon Sep 28 23:11:42 2026 Received: from mta1.migadu.com (out-172.mta1.migadu.com [95.215.58.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3BDA370D47 for ; Sat, 15 Aug 2026 10:32:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786789974; cv=none; b=SZkuA6xxjttU6q1VXJmzVA9HAT7WIIbMWCmCqLaXUiRqfVkrXp3HwNsvWaxJ3N6n5uCgxlB1lqBoKQGeMwfj9mooxOs01XJaTJQtNy9hZyu6elDgwh/h3feMN9BduYMFgMIQOn0nVNKhMgsPUivDYJH1A6BBvoTyaKhZF/MX6gM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786789974; c=relaxed/simple; bh=Ibq8FmFzfS79pa12j1e6KYtVVh8objCmcS0oBVDNFx4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Jhrmu4XrFhWn1Ivki+WCmVJEfwGuNusW7ZDK1rkdn5YHtKuqvvWZEFGGkXSSWc259xtTDb7VGoIwvRtv38EhPcW0ALIDm+UVFgEomkrqxlOpIA2+Ti9wvpgxvYRkRP1LadbvZ3/UykrcHzaDTX9zRJXa9iDJBXn6gxv10T1L9dg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=g8ivNWyO; arc=none smtp.client-ip=95.215.58.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="g8ivNWyO" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=Ibq8FmFzfS79pa12j1e6KYtVVh8objCmcS0oBVDNFx4=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786789970; v=1; x=1787394770; b=g8ivNWyO3v3Dij2KONxAnpatucSpKfXzw+XfxpIKqN/3zbljg4ePgHMhbnVnUICOELUn8LCR 7njT5k+rmYDbRwV/jz1nHX3jxONhCApLOrYFPRDjsAev7oGN5GalgKCiyUek38M4JDNEunBsaP/ 2i6foFGgIP8ywmnaHIgtntiQ= X-Envelope-To: linux-kernel@vger.kernel.org Received: from localhost.localdomain (2408:823d:2011:2c0:e810:54f9:f0a3:99d) by smtp.migadu.com with ESMTPS id 970a23246370098d; Sat, 15 Aug 2026 10:32:50 +0000 X-Migadu-Flow: FLOW_OUT From: Jinyu Tang To: Anup Patel , Anup Patel , Atish Patra Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Sean Christopherson , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Conor Dooley , Yong-Xuan Wang , Nutty Liu , Jinyu Tang Subject: [PATCH v4 RESEND 2/5] KVM: riscv: Avoid THP adjustment for existing 4K G-stage leaves Date: Sat, 15 Aug 2026 06:32:45 -0400 Message-ID: <20260815103245.864925-1-jinyu.tang@linux.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260815102833.864330-1-jinyu.tang@linux.dev> References: <20260815102833.864330-1-jinyu.tang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When dirty logging is disabled after a G-stage PMD mapping has been split, the fault path may see a 4K G-stage leaf while the backing host page is still THP-backed. The existing kvm_riscv_gstage_map_page() comment says that this path should update the small leaf and leave huge mapping recovery to a later ioctl path. However, transparent_hugepage_adjust() runs before that G-stage lookup and rewrites the fault GPA to the PMD base. If the original fault is not at the PMD base, the lookup can find and update the wrong 4K leaf. Check the original fault GPA in transparent_hugepage_adjust(). If it already has a 4K G-stage leaf, skip THP adjustment and keep handling the fault at PAGE_SIZE granularity. Signed-off-by: Jinyu Tang --- arch/riscv/kvm/mmu.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c index bfd6168ebe30..2fabcd409991 100644 --- a/arch/riscv/kvm/mmu.c +++ b/arch/riscv/kvm/mmu.c @@ -500,10 +500,21 @@ static int get_hva_mapping_size(struct kvm *kvm, =20 static unsigned long transparent_hugepage_adjust(struct kvm *kvm, struct kvm_memory_slot *memslot, + struct kvm_gstage *gstage, unsigned long hva, kvm_pfn_t *hfnp, gpa_t *gpa) { kvm_pfn_t hfn =3D *hfnp; + u32 ptep_level; + pte_t *ptep; + + /* + * Keep the existing split G-stage leaf and update the original + * faulting 4K page in the vCPU fault path. + */ + if (kvm_riscv_gstage_get_leaf(gstage, *gpa, &ptep, &ptep_level) && + !ptep_level) + return PAGE_SIZE; =20 /* * Make sure the adjustment is done only for THP pages. Also make @@ -730,7 +741,8 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm= _memory_slot *memslot, * so do not promote them through the THP helper. */ if (!logging && !is_hugetlb && vma_pagesize =3D=3D PAGE_SIZE) - vma_pagesize =3D transparent_hugepage_adjust(kvm, memslot, hva, &hfn, &g= pa); + vma_pagesize =3D transparent_hugepage_adjust(kvm, memslot, &gstage, + hva, &hfn, &gpa); =20 if (writable) { mark_page_dirty_in_slot(kvm, memslot, gfn); --=20 2.43.0 From nobody Mon Sep 28 23:11:42 2026 Received: from mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCD843AAF44 for ; Sat, 15 Aug 2026 10:33:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790031; cv=none; b=Pmpg5ed00UFTBBgnGGyXS3biz3N6NG2cY1wy0bu2s2CK7Aq6BBx7Ow/GlCn2U0/8UtfJ42wn3IB8NhxAyK4HDiehtAgfv3qYtvd1FXpjZ3ys0ZbRfmEn1htcZB4Oairu4PeVa271FQ1HrEOrS8bmmG8wGYtE+mvC8Wd14j/qzwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790031; c=relaxed/simple; bh=V5XVfLEQRMIUdVa1VN5yR7RiRSe4x0lsprp3ClMwZ+c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hDdFBwHZovNHNlIiTwvFeIMA3exoZ0jh0g/XhTaf7wIrYEILgpjIEydQmQrrb4C/MF3kEWYzDVTLp1WoHoU5Npw7PsN1MfcMT4Pmk5UaN5FxOEk5qZ92/Bdjb2D66JdMnJ7/YgNCsejksqp6HdJRQjmVzNoLgPwb3qKpah1VsB4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=pmhqp9Ya; arc=none smtp.client-ip=95.215.58.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="pmhqp9Ya" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=V5XVfLEQRMIUdVa1VN5yR7RiRSe4x0lsprp3ClMwZ+c=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786790027; v=1; x=1787394827; b=pmhqp9Yau6CQ4YLSuW9Rc8MRUe/bwHW4VljwplgH5ciKrsD/xHe+WzkCB1Qk8vLgixylOtyb cXMZnGY00QomzoioyapM7kSJoISqQQ/1dSY0uIgwkoSMC7r3Uj03oHt/m/TCpoDWHSktxzsUKA5 FhFqZwSp9kheMpX9smGf538k= X-Envelope-To: linux-kernel@vger.kernel.org Received: from localhost.localdomain (2408:823d:2011:2c0:e810:54f9:f0a3:99d) by smtp.migadu.com with ESMTPS id 817f575780072dfb; Sat, 15 Aug 2026 10:33:47 +0000 X-Migadu-Flow: FLOW_OUT From: Jinyu Tang To: Anup Patel , Anup Patel , Atish Patra Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Sean Christopherson , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Conor Dooley , Yong-Xuan Wang , Nutty Liu , Jinyu Tang Subject: [PATCH v4 RESEND 3/5] KVM: riscv: Implement KVM_PRE_FAULT_MEMORY Date: Sat, 15 Aug 2026 06:33:41 -0400 Message-ID: <20260815103341.865013-1-jinyu.tang@linux.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260815102833.864330-1-jinyu.tang@linux.dev> References: <20260815102833.864330-1-jinyu.tang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The generic KVM_PRE_FAULT_MEMORY ioctl lets userspace populate KVM page tables before running a vCPU over a GPA range. x86 already supports the ioctl, but RISC-V does not expose the capability and has no arch hook. Add the RISC-V arch hook and reuse the existing G-stage fault mapping path with a read access. Report progress using the G-stage mapping returned by the map path, so the ioctl can advance by the actual leaf size that covers the requested GPA. Retry until a mapping is installed or a signal, VM-dead request, or real error is observed. Signed-off-by: Jinyu Tang --- arch/riscv/kvm/Kconfig | 1 + arch/riscv/kvm/gstage.c | 3 +++ arch/riscv/kvm/mmu.c | 45 ++++++++++++++++++++++++++++++++++++++++- arch/riscv/kvm/vm.c | 1 + 4 files changed, 49 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig index ec2cee0a39e0..8ac209e8ac87 100644 --- a/arch/riscv/kvm/Kconfig +++ b/arch/riscv/kvm/Kconfig @@ -28,6 +28,7 @@ config KVM select KVM_COMMON select KVM_GENERIC_DIRTYLOG_READ_PROTECT select KVM_GENERIC_HARDWARE_ENABLING + select KVM_GENERIC_PRE_FAULT_MEMORY select KVM_MMIO select VIRT_XFER_TO_GUEST_WORK select SCHED_INFO diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c index 54d45addf18f..dff315dfd24e 100644 --- a/arch/riscv/kvm/gstage.c +++ b/arch/riscv/kvm/gstage.c @@ -286,6 +286,9 @@ int kvm_riscv_gstage_map_page(struct kvm_gstage *gstage, out_map->level, true); } else if (ALIGN_DOWN(PFN_PHYS(pte_pfn(ptep_get(ptep))), page_size) =3D= =3D hpa) { kvm_riscv_gstage_update_pte_prot(gstage, ptep_level, gpa, ptep, prot); + out_map->addr =3D ALIGN_DOWN(gpa, page_size); + out_map->level =3D ptep_level; + out_map->pte =3D ptep_get(ptep); return 0; } } diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c index 2fabcd409991..f6ca86da53eb 100644 --- a/arch/riscv/kvm/mmu.c +++ b/arch/riscv/kvm/mmu.c @@ -717,7 +717,7 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm= _memory_slot *memslot, if (hfn =3D=3D KVM_PFN_ERR_HWPOISON) { send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva, vma_pageshift, current); - return 0; + return -EFAULT; } if (is_error_noslot_pfn(hfn)) return -EFAULT; @@ -782,6 +782,49 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kv= m_memory_slot *memslot, return ret; } =20 +long kvm_arch_vcpu_pre_fault_memory(struct kvm_vcpu *vcpu, + struct kvm_pre_fault_memory *range) +{ + struct kvm_gstage_mapping out_map =3D { 0 }; + struct kvm_memory_slot *memslot; + unsigned long map_size; + unsigned long hva; + gpa_t end; + gfn_t gfn; + int ret; + + gfn =3D gpa_to_gfn(range->gpa); + memslot =3D kvm_vcpu_gfn_to_memslot(vcpu, gfn); + if (!memslot) + return -ENOENT; + + hva =3D gfn_to_hva_memslot_prot(memslot, gfn, NULL); + if (kvm_is_error_hva(hva)) + return -ENOENT; + + for (;;) { + if (signal_pending(current)) + return -EINTR; + + if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) + return -EIO; + + cond_resched(); + ret =3D kvm_riscv_mmu_map(vcpu, memslot, range->gpa, hva, false, &out_ma= p); + if (ret) + return ret; + + if (!pte_val(out_map.pte)) + continue; + + map_size =3D PAGE_SIZE << (out_map.level * kvm_riscv_gstage_index_bits); + end =3D out_map.addr + map_size; + break; + } + + return min_t(u64, range->size, end - range->gpa); +} + int kvm_riscv_mmu_alloc_pgd(struct kvm *kvm) { struct page *pgd_page; diff --git a/arch/riscv/kvm/vm.c b/arch/riscv/kvm/vm.c index a9f083feeb76..58500a19b33b 100644 --- a/arch/riscv/kvm/vm.c +++ b/arch/riscv/kvm/vm.c @@ -187,6 +187,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long = ext) case KVM_CAP_MP_STATE: case KVM_CAP_IMMEDIATE_EXIT: case KVM_CAP_SET_GUEST_DEBUG: + case KVM_CAP_PRE_FAULT_MEMORY: r =3D 1; break; case KVM_CAP_NR_VCPUS: --=20 2.43.0 From nobody Mon Sep 28 23:11:42 2026 Received: from mta0.migadu.com (out-228.mta0.migadu.com [91.218.175.228]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03DA83A7F51 for ; Sat, 15 Aug 2026 10:34:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.228 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790067; cv=none; b=HOscnsR8BOYOmDyAnEt9vxV/gmX2EEdQEqdI465WZrMr0sRKwvFDdNkZZR4ArOhxurwKlOKDaY4+C7cyah5FgQmlikF7dUywHDbbHq9sPsHBk4Ct3HtsfXW8rJ5Kbox/0pbOaqplR3FwCAHPQB4BuYmLyFFV3O0ykgG2y32Q72E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790067; c=relaxed/simple; bh=/XslhWPc8YWLKIGexGYeoNDF4BcQhquKIMzXN8FIw8M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=usIs7FcHvTjAzyLXlQeqgqqtPD5QtT4pX/wXb0nAiH3F2ZSRJFtDS9cSL2XFJAImal25BHTLPF5DKXKWO27wQVfUoFzyEhLru6Z+ZLzyZjdmE1zi2PoJyPKaVmZWaXsxnfD7EKLVJzzTn0F+f5fdGtZVdQpc69Q0OuHPgX/ATWA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=s830HcPW; arc=none smtp.client-ip=91.218.175.228 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="s830HcPW" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=/XslhWPc8YWLKIGexGYeoNDF4BcQhquKIMzXN8FIw8M=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786790063; v=1; x=1787394863; b=s830HcPWdB6TepSyWmegU74KNRBoTc6dPyTJ+SDO06T64jh4VEClGFCBC2JVmrE7pYrBsnmh U1TVorbcAcuEq0pZnU+muWag5wde0/l+nlCWK8wrA6rg9Cr1KEq2391HL6vROV+7PMwC2lp7HAS b37m/cD9bIzxZg4Pg4zbUpPk= X-Envelope-To: linux-kernel@vger.kernel.org Received: from localhost.localdomain (2408:823d:2011:2c0:e810:54f9:f0a3:99d) by smtp.migadu.com with ESMTPS id 1054ad670fe58b2a; Sat, 15 Aug 2026 10:34:23 +0000 X-Migadu-Flow: FLOW_OUT From: Jinyu Tang To: Anup Patel , Anup Patel , Atish Patra Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Sean Christopherson , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Conor Dooley , Yong-Xuan Wang , Nutty Liu , Jinyu Tang Subject: [PATCH v4 RESEND 4/5] KVM: selftests: Add RISC-V Sv57 page table indexing Date: Sat, 15 Aug 2026 06:34:18 -0400 Message-ID: <20260815103418.865047-1-jinyu.tang@linux.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260815102833.864330-1-jinyu.tang@linux.dev> References: <20260815102833.864330-1-jinyu.tang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RISC-V selftests can create guests with five page-table levels, for example when the selected guest mode is Sv57. The RISC-V page-table walker only had index arrays for levels 0 through 3, so virt_arch_pg_map() indexed past the end of the arrays when level 4 was used. Add the missing L4 index mask and shift so selftests can build guest page tables for Sv57 VMs. Reviewed-by: Nutty Liu Signed-off-by: Jinyu Tang --- tools/testing/selftests/kvm/include/riscv/processor.h | 3 +++ tools/testing/selftests/kvm/lib/riscv/processor.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/= testing/selftests/kvm/include/riscv/processor.h index e3acf2ae9881..abde3c71c891 100644 --- a/tools/testing/selftests/kvm/include/riscv/processor.h +++ b/tools/testing/selftests/kvm/include/riscv/processor.h @@ -127,6 +127,9 @@ void vm_install_exception_handler(struct kvm_vm *vm, in= t vector, exception_handl =20 void vm_install_interrupt_handler(struct kvm_vm *vm, exception_handler_fn = handler); =20 +/* L4 index Bit[56:48] */ +#define PGTBL_L4_INDEX_MASK 0x01FF000000000000ULL +#define PGTBL_L4_INDEX_SHIFT 48 /* L3 index Bit[47:39] */ #define PGTBL_L3_INDEX_MASK 0x0000FF8000000000ULL #define PGTBL_L3_INDEX_SHIFT 39 diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/test= ing/selftests/kvm/lib/riscv/processor.c index ded5429f3448..b4d41a407553 100644 --- a/tools/testing/selftests/kvm/lib/riscv/processor.c +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c @@ -43,6 +43,7 @@ static u64 pte_index_mask[] =3D { PGTBL_L1_INDEX_MASK, PGTBL_L2_INDEX_MASK, PGTBL_L3_INDEX_MASK, + PGTBL_L4_INDEX_MASK, }; =20 static u32 pte_index_shift[] =3D { @@ -50,6 +51,7 @@ static u32 pte_index_shift[] =3D { PGTBL_L1_INDEX_SHIFT, PGTBL_L2_INDEX_SHIFT, PGTBL_L3_INDEX_SHIFT, + PGTBL_L4_INDEX_SHIFT, }; =20 static u64 pte_index(struct kvm_vm *vm, gva_t gva, int level) --=20 2.43.0 From nobody Mon Sep 28 23:11:42 2026 Received: from mta0.migadu.com (out-236.mta0.migadu.com [91.218.175.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E87F6349B19 for ; Sat, 15 Aug 2026 10:34:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.236 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790094; cv=none; b=LZrvgP8jsTxK75iV8OLZwW5yPTFJ6OXshizurMtpjc7sQpiu6znHbKlE6oyZV1g5pX5AkrXZ72bLWuQjwXLDtJ8mySuchl7jkHa7VXDnbMIBi0i39vKosga3dxbfYazSqJ8PjLhW4ILBKvNp+hyBsqsPm6y1BRFkDw36vAKo9tM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786790094; c=relaxed/simple; bh=pBGNsphtwvKUMT19aojQRvWbbD9gZSFI8gT/RJcmfQM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uEV9bASOc1RRcNpq01thN5VmmZ/65PfngjcsGJ5BmYsGVma/xf686EyeaphZ1X6GX+s9Z7g5zFNK4IfHcdEOBnoZVmLgcPfh4u42tFZ+EKe6zVNVkgN76MXcV6IjMtAbDjdSJ4JdVhLRdR3LTnEETYh9cCEj1ibevW8J4t7kQlY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=wzKMFc+z; arc=none smtp.client-ip=91.218.175.236 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="wzKMFc+z" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=pBGNsphtwvKUMT19aojQRvWbbD9gZSFI8gT/RJcmfQM=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786790091; v=1; x=1787394891; b=wzKMFc+zIYpGkZFMV7uprkN6uskeVSt0lbNpSpP8LC+HMdX7FXqu1wbcLnoqg+4wdzNHK6ma SCYG0hAQZXJmo7CfyFwLDrF0BxgjZpFLwhCGtF5X6QyDuG9aA1fbQe8VdrVvO0WQKLvIHckPjFG UzVHcw809gbzHrvtzCXkEya0= X-Envelope-To: linux-kernel@vger.kernel.org Received: from localhost.localdomain (2408:823d:2011:2c0:e810:54f9:f0a3:99d) by smtp.migadu.com with ESMTPS id ee0bac32ec84a1c6; Sat, 15 Aug 2026 10:34:51 +0000 X-Migadu-Flow: FLOW_OUT From: Jinyu Tang To: Anup Patel , Anup Patel , Atish Patra Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Paolo Bonzini , Sean Christopherson , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Andrew Jones , Conor Dooley , Yong-Xuan Wang , Nutty Liu , Jinyu Tang Subject: [PATCH v4 RESEND 5/5] KVM: selftests: Enable pre_fault_memory_test for RISC-V Date: Sat, 15 Aug 2026 06:34:41 -0400 Message-ID: <20260815103441.865076-1-jinyu.tang@linux.dev> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260815102833.864330-1-jinyu.tang@linux.dev> References: <20260815102833.864330-1-jinyu.tang@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RISC-V now supports KVM_PRE_FAULT_MEMORY, so include the generic pre_fault_memory_test in the RISC-V KVM selftest build. The test uses PAGE_SIZE from the architecture processor header. Define the normal 4K RISC-V selftest page size so the generic test can build for RISC-V. Reviewed-by: Nutty Liu Signed-off-by: Jinyu Tang --- tools/testing/selftests/kvm/Makefile.kvm | 1 + tools/testing/selftests/kvm/include/riscv/processor.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index 6fc34e9bf8e1..ac64ac92fd4b 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -225,6 +225,7 @@ TEST_GEN_PROGS_riscv +=3D coalesced_io_test TEST_GEN_PROGS_riscv +=3D dirty_log_perf_test TEST_GEN_PROGS_riscv +=3D get-reg-list TEST_GEN_PROGS_riscv +=3D mmu_stress_test +TEST_GEN_PROGS_riscv +=3D pre_fault_memory_test TEST_GEN_PROGS_riscv +=3D rseq_test TEST_GEN_PROGS_riscv +=3D steal_time =20 diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/= testing/selftests/kvm/include/riscv/processor.h index abde3c71c891..70487c8ed155 100644 --- a/tools/testing/selftests/kvm/include/riscv/processor.h +++ b/tools/testing/selftests/kvm/include/riscv/processor.h @@ -12,6 +12,9 @@ #include #include "kvm_util.h" =20 +#define PAGE_SHIFT 12 +#define PAGE_SIZE BIT_ULL(PAGE_SHIFT) + #define INSN_OPCODE_MASK 0x007c #define INSN_OPCODE_SHIFT 2 #define INSN_OPCODE_SYSTEM 28 --=20 2.43.0