From nobody Mon Sep 28 23:51:23 2026 Received: from mta0.migadu.com (out-106.mta0.migadu.com [91.218.175.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E7E238F93B for ; Fri, 14 Aug 2026 23:52:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751545; cv=none; b=KSKPqXHWR3HE6dgrhVP52p5nqC1lpS/oVkZPwCpethmuhmRsQD2+Kvv27lQLXQS2XSEgLWCoEdlYO+2CvfzAgC02N2nH6x4CF/A4Y675joX1KyvRKj1chg1lFjKgu5irKZr1mmZpIwshR4gvfk8YBM6Wj8HHTMAnJHuEv2RcxpA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751545; c=relaxed/simple; bh=XUGVDWJoU3RK9p8QNyvMPr/HlvJCp2imwGONSk/iOCQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eMXPsJaQU4e40J2E9nARvFTOcqQBv7cuU4wJDCjs3O9DbXTli8iwKX8VBKg6U2acp3X25qr+kJsWQOvjQkFUi+lA7pk8iqGSnzPq7KHDoBZxeYtkkVt0NNLIlQ7vp0wgO6z2Cvipu8hnTrb92AQEkYv1LYud9zZxl5KDI49PyWs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=P0IJkW99; arc=none smtp.client-ip=91.218.175.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="P0IJkW99" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=XUGVDWJoU3RK9p8QNyvMPr/HlvJCp2imwGONSk/iOCQ=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786751540; v=1; x=1787356340; b=P0IJkW99fVmwxdaNHQfpy0kwjuTOe6Bx62MS3DaeuYLgVAdbSbWG4r1SaBIDH0nIZOZv4f6U TBGD4p7b9ANYp7wP2Kkc0hzJWulc2NP8GIjWI/aM0ZAorRwE9GrBPDUEhVh888jIEJRx2sPUK// MhfyCup/qHUex2FWxDBsgMHM= X-Envelope-To: linux-kernel@vger.kernel.org Received: from isolodrai-fedora-MJ0FVMD1.thefacebook.com (2620:10d:c090:500::4:b8fe) by mta10.migadu.com with ESMTPS id 999b0796c06f0297; Fri, 14 Aug 2026 23:52:20 +0000 X-Migadu-Flow: FLOW_OUT From: Ihor Solodrai To: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner Cc: Alexei Starovoitov , Andrii Nakryiko , Andrey Ryabinin , Andrew Morton , "H . Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v2 1/5] x86/cpu: Factor init_cpu_info() out of identify_cpu() Date: Fri, 14 Aug 2026 16:51:30 -0700 Message-ID: <20260814235134.3461435-2-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260814235134.3461435-1-ihor.solodrai@linux.dev> References: <20260814235134.3461435-1-ihor.solodrai@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" identify_cpu() unconditionally resets the struct cpuinfo_x86 fields to their default values and clears the capability arrays with memset() before rescanning the CPU to fill it in again. However the boot CPU capabilities have already been scanned by early_identify_cpu(), with interrupts disabled. Introduce init_cpu_info() helper in preparation for letting the callers decide whether the reset is needed. early_identify_cpu() starts using the helper in the next patch. No functional changes. Signed-off-by: Ihor Solodrai Suggested-by: Borislav Petkov --- arch/x86/kernel/cpu/common.c | 51 ++++++++++++++++++++---------------- 1 file changed, 28 insertions(+), 23 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index a3df21d26460..bb4525523222 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1772,6 +1772,32 @@ static void __init cpu_parse_early_param(void) } } =20 +static void init_cpu_info(struct cpuinfo_x86 *c) +{ + c->x86_cache_size =3D 0; + c->x86_vendor =3D X86_VENDOR_UNKNOWN; + c->x86_model =3D c->x86_stepping =3D 0; /* So far unknown... */ + c->x86_vendor_id[0] =3D '\0'; /* Unset */ + c->x86_model_id[0] =3D '\0'; /* Unset */ +#ifdef CONFIG_X86_64 + c->x86_clflush_size =3D 64; + c->x86_phys_bits =3D 36; + c->x86_virt_bits =3D 48; +#else + c->cpuid_level =3D -1; /* CPUID not detected */ + c->x86_clflush_size =3D 32; + c->x86_phys_bits =3D 32; + c->x86_virt_bits =3D 32; +#endif + c->x86_cache_alignment =3D c->x86_clflush_size; + memset(&c->x86_capability, 0, sizeof(c->x86_capability)); + memset(&c->cpuid, 0, sizeof(c->cpuid)); +#ifdef CONFIG_X86_VMX_FEATURE_NAMES + memset(&c->vmx_capability, 0, sizeof(c->vmx_capability)); +#endif + c->extended_cpuid_level =3D 0; +} + /* * Do minimum CPU detection early. * Fields really needed: vendor, cpuid_level, family, model, mask, @@ -1956,8 +1982,6 @@ void check_null_seg_clears_base(struct cpuinfo_x86 *c) =20 static void generic_identify(struct cpuinfo_x86 *c) { - c->extended_cpuid_level =3D 0; - if (!cpuid_feature()) identify_cpu_without_cpuid(c); =20 @@ -2001,27 +2025,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) int i; =20 c->loops_per_jiffy =3D loops_per_jiffy; - c->x86_cache_size =3D 0; - c->x86_vendor =3D X86_VENDOR_UNKNOWN; - c->x86_model =3D c->x86_stepping =3D 0; /* So far unknown... */ - c->x86_vendor_id[0] =3D '\0'; /* Unset */ - c->x86_model_id[0] =3D '\0'; /* Unset */ -#ifdef CONFIG_X86_64 - c->x86_clflush_size =3D 64; - c->x86_phys_bits =3D 36; - c->x86_virt_bits =3D 48; -#else - c->cpuid_level =3D -1; /* CPUID not detected */ - c->x86_clflush_size =3D 32; - c->x86_phys_bits =3D 32; - c->x86_virt_bits =3D 32; -#endif - c->x86_cache_alignment =3D c->x86_clflush_size; - memset(&c->x86_capability, 0, sizeof(c->x86_capability)); - memset(&c->cpuid, 0, sizeof(c->cpuid)); -#ifdef CONFIG_X86_VMX_FEATURE_NAMES - memset(&c->vmx_capability, 0, sizeof(c->vmx_capability)); -#endif + + init_cpu_info(c); =20 generic_identify(c); =20 --=20 2.55.0 From nobody Mon Sep 28 23:51:23 2026 Received: from mta1.migadu.com (out-37.mta1.migadu.com [95.215.58.37]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF61F30CD85 for ; Fri, 14 Aug 2026 23:52:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.37 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751552; cv=none; b=rJK5HDLL+zex4rBBqKHPVNLR4dtFXJJuQQrRXSiULNuDpXuWaCxlW9wFtjDPvwyXqxLNiFfihazI2p6ze3xkNcb2C1QeSj15OgcRaIR4eVAXERZChOx+VzbnFb2n9Tl8iG6VyBQ9L8YuPFVViwKBWKqbIiJGF+1HT1SOQ1gQH8U= ARC-Message-Signature: i=1; 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bh=3SbJTWKQRPJhm3xT71jRLeUekhnVMPArD1wBhzIMjeA=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786751548; v=1; x=1787356348; b=lXV7KOmzqR8iGl6VoV5rXX+OFnis7m4KHdy+5IWTA86+ds9jZWZ6CUWjcz/mn/sN3AffirvW OwUszsqFGuOTT2g8RbkhiAGahro2O1LmQyfjdJsvVTPB+CVvBX2Chfo1JTfaEhgfNtu5SyEKC9b fXkG8B6whRtYKo2wHkNc5rEk= X-Envelope-To: linux-kernel@vger.kernel.org Received: from isolodrai-fedora-MJ0FVMD1.thefacebook.com (2620:10d:c090:500::4:b8fe) by mta10.migadu.com with ESMTPS id 781dcae87522a580; Fri, 14 Aug 2026 23:52:28 +0000 X-Migadu-Flow: FLOW_OUT From: Ihor Solodrai To: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner Cc: Alexei Starovoitov , Andrii Nakryiko , Andrey Ryabinin , Andrew Morton , "H . Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v2 2/5] x86/cpu: Initialize boot CPU cpuinfo defaults early Date: Fri, 14 Aug 2026 16:51:31 -0700 Message-ID: <20260814235134.3461435-3-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260814235134.3461435-1-ihor.solodrai@linux.dev> References: <20260814235134.3461435-1-ihor.solodrai@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" early_identify_cpu() clears the capability array, the CPUID table and extended_cpuid_level, but the architectural defaults for the rest of struct cpuinfo_x86 are set only later, in identify_cpu(). On x86_64 x86_clflush_size defaults to 64. Until that default is applied it reads as zero, which get_cpu_address_sizes() interprets as "not enumerated" and replaces with 32. So on a CPU which does not enumerate CLFLUSH the boot CPU runs with an x86_clflush_size and an x86_cache_alignment of 32 until identify_cpu() resets them to 64. Use the same defaults from the start, so that the boot CPU does not depend on a later reset to end up with the right ones. The values the boot CPU ends up with do not change. Early users of cache_line_size() on a CPU which does not enumerate CLFLUSH now see the architectural 64 instead of the 32 fallback, which is what they should have been seeing all along. This change comes before the last patch because that one removes the reset: without the defaults established here the boot CPU would be left at 32 instead of 64 on an x86_64 CPU which does not enumerate CLFLUSH. Signed-off-by: Ihor Solodrai Suggested-by: Borislav Petkov --- arch/x86/kernel/cpu/common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index bb4525523222..f43584c8aeab 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1802,16 +1802,15 @@ static void init_cpu_info(struct cpuinfo_x86 *c) * Do minimum CPU detection early. * Fields really needed: vendor, cpuid_level, family, model, mask, * cache alignment. - * The others are not touched to avoid unwanted side effects. + * The others are reset to their defaults here and only filled in later, + * by identify_cpu(). * * WARNING: this function is only called on the boot CPU. Don't add code * here that is supposed to run on all CPUs. */ static void __init early_identify_cpu(struct cpuinfo_x86 *c) { - memset(&c->x86_capability, 0, sizeof(c->x86_capability)); - memset(&c->cpuid, 0, sizeof(c->cpuid)); - c->extended_cpuid_level =3D 0; + init_cpu_info(c); =20 if (!cpuid_feature()) identify_cpu_without_cpuid(c); --=20 2.55.0 From nobody Mon Sep 28 23:51:23 2026 Received: from mta1.migadu.com (out-44.mta1.migadu.com [95.215.58.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4FDA30CD85 for ; Fri, 14 Aug 2026 23:52:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751560; cv=none; b=ZQ2QHUuqKPYZXs3vC33PxZHWEj7FO0RPbde4GKbnRi9WbHppMPSxEtOi3l9o3ubnXFzUkUL08hgi7E6agCrhR9S8Wg3oTBGj09eO6JZ7hgZfJC4yLsilu/BNS/wkwyucw5cjVRA6fpCZ1jXJNIFePAuz7fuJUm+m+8z+sJdP8GU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751560; c=relaxed/simple; bh=hlOxz5VUnYNLigWKPPNmAANwW8QKdqA0qYdZ4B7zxBU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=skOvJXyECJucpecED/JTMVDsJEQ1XHS9EUjj+ZVXLnBvvqCyzAZFBtpDHccn2x2+JHx011b8ok9M/84d3KpFIjbBhTOi8fOKLRYTq0+amC0p5h023U142ltdJWDmDuDOcWc6cKbeEZhGLHH/lI7DKbFsxm1n8/GXuameT1QlQhE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ZzKLhQFB; arc=none smtp.client-ip=95.215.58.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ZzKLhQFB" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=hlOxz5VUnYNLigWKPPNmAANwW8QKdqA0qYdZ4B7zxBU=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786751557; v=1; x=1787356357; b=ZzKLhQFBwZfEEaJpNR2214OuNvG5XpbZiCgsYAelRLnEx6Jhk7cVR4kdIjvf4W+Ja7itZDjC EepKC4Vh4xg6GDrUBNaniKy8mgORnkk1k5w58ZioOB65gJfK0BEpDWaCjdJpAEaoCMWwp33ZsiJ ah0WgKDibBUwz5J0qTJXohxM= X-Envelope-To: linux-kernel@vger.kernel.org Received: from isolodrai-fedora-MJ0FVMD1.thefacebook.com (2620:10d:c090:500::4:b8fe) by mta10.migadu.com with ESMTPS id 9d17edb13127eb6f; Fri, 14 Aug 2026 23:52:37 +0000 X-Migadu-Flow: FLOW_OUT From: Ihor Solodrai To: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner Cc: Alexei Starovoitov , Andrii Nakryiko , Andrey Ryabinin , Andrew Morton , "H . Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v2 3/5] x86/cpu: Inline generic_identify() into identify_cpu() Date: Fri, 14 Aug 2026 16:51:32 -0700 Message-ID: <20260814235134.3461435-4-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260814235134.3461435-1-ihor.solodrai@linux.dev> References: <20260814235134.3461435-1-ihor.solodrai@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" generic_identify() has exactly one call site: at the top of identify_cpu(). Fold it into identify_cpu() so that a single function does the job for both the boot CPU and the secondary CPUs. While at it, fix up both copies of the Cyrix comment. No functional changes. Signed-off-by: Ihor Solodrai Suggested-by: Borislav Petkov --- arch/x86/kernel/cpu/common.c | 32 ++++++++++++++------------------ 1 file changed, 14 insertions(+), 18 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f43584c8aeab..08c4a0162581 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1815,7 +1815,7 @@ static void __init early_identify_cpu(struct cpuinfo_= x86 *c) if (!cpuid_feature()) identify_cpu_without_cpuid(c); =20 - /* cyrix could have cpuid enabled via c_identify()*/ + /* Cyrix could have CPUID enabled via c_identify(). */ if (cpuid_feature()) { cpuid_scan_cpu(c); cpu_detect(c); @@ -1979,14 +1979,23 @@ void check_null_seg_clears_base(struct cpuinfo_x86 = *c) set_cpu_bug(c, X86_BUG_NULL_SEG); } =20 -static void generic_identify(struct cpuinfo_x86 *c) +/* + * This does the hard work of actually picking apart the CPU stuff... + */ +static void identify_cpu(struct cpuinfo_x86 *c) { + int i; + + c->loops_per_jiffy =3D loops_per_jiffy; + + init_cpu_info(c); + if (!cpuid_feature()) identify_cpu_without_cpuid(c); =20 - /* cyrix could have cpuid enabled via c_identify()*/ + /* Cyrix could have CPUID enabled via c_identify(). */ if (!cpuid_feature()) - return; + goto no_cpuid; =20 cpuid_scan_cpu(c); cpu_detect(c); @@ -2014,21 +2023,8 @@ static void generic_identify(struct cpuinfo_x86 *c) #ifdef CONFIG_X86_32 set_cpu_bug(c, X86_BUG_ESPFIX); #endif -} - -/* - * This does the hard work of actually picking apart the CPU stuff... - */ -static void identify_cpu(struct cpuinfo_x86 *c) -{ - int i; - - c->loops_per_jiffy =3D loops_per_jiffy; - - init_cpu_info(c); - - generic_identify(c); =20 +no_cpuid: cpu_parse_topology(c); =20 if (this_cpu->c_identify) --=20 2.55.0 From nobody Mon Sep 28 23:51:23 2026 Received: from mta0.migadu.com (out-123.mta0.migadu.com [91.218.175.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63B233D47A7 for ; Fri, 14 Aug 2026 23:52:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751568; cv=none; b=S1FHBWVdAEHqvnjViBtP1yhJnuvIv/WEmehe2RhRHj3jHL/0TypFIH9uqm4vZcbU7b2EoE7YkkeRjCHxX+2oEFBba5xppeI+mhEqzfHX/jo3ZOtXQXc4Wcl3NbE4X4UcwYEFUA/Sk11XEy61wZBxP9PNZ43X5Wm3kbqt+S8vjpM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751568; c=relaxed/simple; bh=AKXY3VLj5AbiyXes7sILpjywYCJvZ1tj9cAxnFQY9M4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=saJZvva34K7tY1mQsIBToVq8AiLzqwQKPFwD26Jz4MK+guk0k95GZMDrTRRk5befykq1/QyYn3p72b+lCNCuoUfliQX1JNi733bh3hdHw63T7l24LZ8oApc5l3+WP/ShO5Pf7jB1mj/dlBURhm34/8qwtF9TRJVEabuT2a+wWnw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ohgoOk1+; arc=none smtp.client-ip=91.218.175.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ohgoOk1+" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=AKXY3VLj5AbiyXes7sILpjywYCJvZ1tj9cAxnFQY9M4=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786751565; v=1; x=1787356365; b=ohgoOk1+sMpuchk0BPwF0qT2Hsdmqe4RrXbNQh97KpOmExFN6JhPGVSvREjbm4mRaVon6Dhx I9w2mJ7oofqYEso1zp/U0bQJSaidy09v2RzhZMCMJEk19ccjz5BDekQtIounohCsyVjZ7aUDs7d 9MWMBomuPsGl3kkURIBAm5g4= X-Envelope-To: linux-kernel@vger.kernel.org Received: from isolodrai-fedora-MJ0FVMD1.thefacebook.com (2620:10d:c090:500::4:b8fe) by mta10.migadu.com with ESMTPS id 89459ecddee178bb; Fri, 14 Aug 2026 23:52:45 +0000 X-Migadu-Flow: FLOW_OUT From: Ihor Solodrai To: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner Cc: Alexei Starovoitov , Andrii Nakryiko , Andrey Ryabinin , Andrew Morton , "H . Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v2 4/5] x86/cpu: Move 32-bit SEP setup into identify_cpu() Date: Fri, 14 Aug 2026 16:51:33 -0700 Message-ID: <20260814235134.3461435-5-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260814235134.3461435-1-ihor.solodrai@linux.dev> References: <20260814235134.3461435-1-ihor.solodrai@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" identify_boot_cpu() and identify_secondary_cpu() both call enable_sep_cpu() under CONFIG_X86_32 immediately after identify_cpu(). Do it once and drop the ifdefs while at it. No functional changes. Signed-off-by: Ihor Solodrai Reviewed-by: Nikolay Borisov Suggested-by: Borislav Petkov --- arch/x86/kernel/cpu/common.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 08c4a0162581..671a430994ca 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2116,6 +2116,9 @@ static void identify_cpu(struct cpuinfo_x86 *c) mcheck_cpu_init(c); =20 numa_add_cpu(smp_processor_id()); + + if (IS_ENABLED(CONFIG_X86_32)) + enable_sep_cpu(); } =20 /* @@ -2153,9 +2156,6 @@ static __init void identify_boot_cpu(void) identify_cpu(&boot_cpu_data); if (HAS_KERNEL_IBT && cpu_feature_enabled(X86_FEATURE_IBT)) pr_info("CET detected: Indirect Branch Tracking enabled\n"); -#ifdef CONFIG_X86_32 - enable_sep_cpu(); -#endif cpu_detect_tlb(&boot_cpu_data); setup_cr_pinning(); =20 @@ -2175,9 +2175,6 @@ void identify_secondary_cpu(unsigned int cpu) c->cpu_index =3D cpu; =20 identify_cpu(c); -#ifdef CONFIG_X86_32 - enable_sep_cpu(); -#endif x86_spec_ctrl_setup_ap(); update_srbds_msr(); if (boot_cpu_has_bug(X86_BUG_GDS)) --=20 2.55.0 From nobody Mon Sep 28 23:51:23 2026 Received: from mta1.migadu.com (out-54.mta1.migadu.com [95.215.58.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C12B43672A0 for ; Fri, 14 Aug 2026 23:52:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751577; cv=none; b=RaKkZUa/keYifda9w1dECLtmUDPyyfQWr9vBIPvXmoBWNzcm/13c8JGOZIli6dNFUwxb4zkYZh+ysPF83uM/0Vo9YFYvHYSV+J1A03m8eQ2HLE31vi8RvK0VpwZZBZV7v59HOOmn5A2Rns99vrMaXnknEp83RGcOIrqePMAtth8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786751577; c=relaxed/simple; bh=rmmEfBECEg9NtxdBGrSrtO8BVoQ6tFM6eCk7zrNNAuM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aU3SPOsiAQhcVr+NkmMYJX9Tzn0NU2zFt+cg7vt2QPBwlTBdh7fidUZ/mU3jzSx7UIfHxWvmtly9cmNxq40aFKJNUjse49I/gx4+GhXg+BM0bFISE2HkaV53bifOhMcl0eLeO6B387ToCMt40oFXceXrAyETlLzGJ+y/xJdwo7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=dRcRUfhS; arc=none smtp.client-ip=95.215.58.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="dRcRUfhS" X-Envelope-To: linux-kernel@vger.kernel.org DKIM-Signature: a=rsa-sha256; bh=rmmEfBECEg9NtxdBGrSrtO8BVoQ6tFM6eCk7zrNNAuM=; c=simple/simple; d=linux.dev; h=from:to:subject:date:message-id:mime-version:content-type; s=key1; t=1786751573; v=1; x=1787356373; b=dRcRUfhSmeuiGbKwsWnWwzjZe0AKOikW5JjcBYeS4jYJKA4EKmnQiIx8tUNvL9Qty0cx+iyp MAo5sVhlWq0kCTPFw1KDqb/Hq+wmW2sTUbNLhvaE2/ZbiD1zFRn9a+WHAOp+//bIlJWBhK/aRQi UkNLcY4lPO1Q5/Wxo/JTyKGY= X-Envelope-To: linux-kernel@vger.kernel.org Received: from isolodrai-fedora-MJ0FVMD1.thefacebook.com (2620:10d:c090:500::4:b8fe) by mta10.migadu.com with ESMTPS id 42315a227e488f5c; Fri, 14 Aug 2026 23:52:53 +0000 X-Migadu-Flow: FLOW_OUT From: Ihor Solodrai To: Borislav Petkov , Dave Hansen , Ingo Molnar , Thomas Gleixner Cc: Alexei Starovoitov , Andrii Nakryiko , Andrey Ryabinin , Andrew Morton , "H . Peter Anvin" , Andrey Konovalov , linux-kernel@vger.kernel.org, x86@kernel.org, bpf@vger.kernel.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, kernel-team@meta.com Subject: [PATCH v2 5/5] x86/cpu: Don't transiently clear the boot CPU's capabilities Date: Fri, 14 Aug 2026 16:51:34 -0700 Message-ID: <20260814235134.3461435-6-ihor.solodrai@linux.dev> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260814235134.3461435-1-ihor.solodrai@linux.dev> References: <20260814235134.3461435-1-ihor.solodrai@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On the boot CPU identify_cpu() runs from arch_cpu_finalize_init(), with interrupts enabled and before alternatives are patched. So cpu_feature_enabled() still evaluates against boot_cpu_data. identify_cpu() rebuilds c->x86_capability from scratch: the reset zeroes the array and the CPUID rescan fills it in again. An interrupt delivered in that window finds X86_FEATURE_LA57 clear in boot_cpu_data, so pgtable_l5_enabled() is false and KASAN checks a 5-level address against the 4-level addressability limit. The result is a bogus "wild-memory-access" report, and under kasan_multi_shot a report storm that wedges the boot. The boot CPU has already been scanned by early_identify_cpu(), with interrupts disabled, and its capabilities cannot have changed since. Reset only the CPUs which have not been scanned yet. 32-bit gets the same treatment: the window is the same, and any feature bit evaluated from interrupt context while it is open reads as clear. Its no-CPUID cpuid_level default now comes from early_identify_cpu(), and nothing writes cpuid_level again unless CPUID is there to be read. The window is as old as identify_cpu() rebuilding the capabilities. Commit 39b9552281ab ("x86/mm: Optimize boot-time paging mode switching cost") merely let KASAN notice it by making pgtable_l5_enabled() read the feature bit. So no Fixes: tag. Closes: https://lore.kernel.org/bpf/20260610175651.647515-1-ihor.solodrai@l= inux.dev/ Signed-off-by: Ihor Solodrai Suggested-by: Borislav Petkov --- arch/x86/kernel/cpu/common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 671a430994ca..e0c70a2510af 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1988,8 +1988,6 @@ static void identify_cpu(struct cpuinfo_x86 *c) =20 c->loops_per_jiffy =3D loops_per_jiffy; =20 - init_cpu_info(c); - if (!cpuid_feature()) identify_cpu_without_cpuid(c); =20 @@ -2174,6 +2172,7 @@ void identify_secondary_cpu(unsigned int cpu) *c =3D boot_cpu_data; c->cpu_index =3D cpu; =20 + init_cpu_info(c); identify_cpu(c); x86_spec_ctrl_setup_ap(); update_srbds_msr(); --=20 2.55.0