From nobody Tue Sep 29 02:00:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F9E84949E8; Thu, 13 Aug 2026 16:52:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639968; cv=none; b=TBbk9WowOArPDB3S+lcsyDqRbADKY33EwrtvjasagWNdSPiVRZ0P24vERJ/6sp0zxvgSMpvbMIgDpv8JAYSbYQlndmW8HGGpCZmNgaJNapQDn4yhm0+2+DleMfUrL60DvTvBNp/ONMqpC/EzVcWcIWqWV/9iXJT7g9sJS0fCGxs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639968; c=relaxed/simple; bh=vFj/e6yVq0C89CYYUHiixWoTWeJaKHCf7pqa24pEIUI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Gmb/xHi58riZPqHqF0bLGLN6et9IfRTG/S9mDFocYYJNZgeWFJ2dAYQzIH0VlaWUaXdTVH1YrB63LlrWDCLlhRFHjMuqH8hj0MBnTCDzcQaViXy9pvCdEhbQ1BGTqxIyTiElned/wTWCdFhBtSUKsetlq/bkt+rD0KITWGloQwY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EskXvGBf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EskXvGBf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BF6041F000E9; Thu, 13 Aug 2026 16:52:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786639966; bh=3IGl5d/grjwGqkSO3vUupkqO2T7ZXuW/ZjJ4SMMfrJc=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=EskXvGBfeVaRgG1Qk/VRwZjWcPvHrJyjYSkLiKKTuriCLlTM/F8dBFQx63u/hk24A CQKzKO0JEHomLD9DmRFLBk1h2LSuVrrY63sc1jQ+lomtTlNJa8qJkOsxhtBIwA3VRU +Gf3vN8lBj2UCEdmvEAp6Gc1JBaXEqrDBmfddPQcpG2nXGF1g8V6e8ZP48KpM+fjmr cSKhs6z1/ae1LgvTeesrRYsnqGqJBUKMQj+iHBGWo7sNhfVfND0rXsIUhO7gZuoDxD Wt5C6ZLI+vsvRbRAL0LPqLnaVc+yqwgzhMIQyPrH8QctVipU4UA+Et8Oc7G1vzDuOR jctJ86eNlkL7A== From: Danilo Krummrich To: bhelgaas@google.com, dakr@kernel.org, kwilczynski@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, tamird@kernel.org, acourbot@nvidia.com, work@onurozkan.dev, jhubbard@nvidia.com, ttabi@nvidia.com, apopple@nvidia.com, ecourtney@nvidia.com, shashanks@nvidia.com, zhiw@nvidia.com Cc: driver-core@lists.linux.dev, linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/5] rust: pci: convert IrqVectorRegistration to a lifetime-managed owning type Date: Thu, 13 Aug 2026 18:52:01 +0200 Message-ID: <20260813165234.620555-2-dakr@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260813165234.620555-1-dakr@kernel.org> References: <20260813165234.620555-1-dakr@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert IrqVectorRegistration from a devres-managed internal type to a lifetime-annotated type that owns the PCI interrupt vector allocation. Dropping it frees the vectors. IrqVector gains a reference to the IrqVectorRegistration it was derived from. Since index() borrows the registration, the compiler prevents the allocation from being dropped while any IrqVector (and hence any irq::Registration built from it) is still live. alloc_irq_vectors() returns IrqVectorRegistration<'_> directly, giving drivers explicit control over the allocation lifetime, which is needed by net and block drivers that re-allocate vectors at runtime, e.g. during queue reconfiguration or device recovery. Tested-by: John Hubbard Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo --- rust/kernel/pci.rs | 3 +- rust/kernel/pci/irq.rs | 128 ++++++++++++++++++++++------------------- 2 files changed, 70 insertions(+), 61 deletions(-) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index c6417af2bb17..2757a0cc0f11 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -51,7 +51,8 @@ pub use self::irq::{ IrqType, IrqTypes, - IrqVector, // + IrqVector, + IrqVectorRegistration, // }; =20 /// An adapter for the registration of PCI drivers. diff --git a/rust/kernel/pci/irq.rs b/rust/kernel/pci/irq.rs index fea484dcf9cf..daba86505cd2 100644 --- a/rust/kernel/pci/irq.rs +++ b/rust/kernel/pci/irq.rs @@ -7,17 +7,14 @@ bindings, device, device::Bound, - devres, error::to_result, irq::{ self, IrqRequest, // }, - prelude::*, - str::CStr, - sync::aref::ARef, // + prelude::*, // }; -use core::ops::RangeInclusive; +use core::num::NonZero; =20 /// IRQ type flags for PCI interrupt allocation. #[derive(Debug, Clone, Copy)] @@ -78,6 +75,7 @@ const fn as_raw(self) -> u32 { #[derive(Clone, Copy)] pub struct IrqVector<'a> { dev: &'a Device, + reg: &'a IrqVectorRegistration<'a>, index: u32, } =20 @@ -86,87 +84,83 @@ impl<'a> IrqVector<'a> { /// /// # Safety /// - /// - `index` must be a valid IRQ vector index for `dev`. - /// - `dev` must point to a [`Device`] that has successfully allocated= IRQ vectors. - unsafe fn new(dev: &'a Device, index: u32) -> Self { - Self { dev, index } + /// - `index` must be a valid IRQ vector index for `reg`. + /// - `dev` must be the device `reg` was allocated from. + #[inline] + unsafe fn new(dev: &'a Device, reg: &'a IrqVectorRegistration<'= a>, index: u32) -> Self { + Self { dev, reg, index } } =20 /// Returns the raw vector index. fn index(&self) -> u32 { self.index } + + /// Returns the [`IrqVectorRegistration`] this vector was derived from. + #[inline] + pub fn vectors(&self) -> &'a IrqVectorRegistration<'a> { + self.reg + } } =20 impl<'a> TryInto> for IrqVector<'a> { type Error =3D Error; =20 fn try_into(self) -> Result> { - // SAFETY: `self.as_raw` returns a valid pointer to a `struct pci_= dev`. + // SAFETY: `self.dev.as_raw()` returns a valid pointer to a `struc= t pci_dev`. let irq =3D unsafe { bindings::pci_irq_vector(self.dev.as_raw(), s= elf.index()) }; if irq < 0 { return Err(crate::error::Error::from_errno(irq)); } - // SAFETY: `irq` is guaranteed to be a valid IRQ number for `&self= `. + // SAFETY: `irq` is guaranteed to be a valid IRQ number for `self.= dev`. Ok(unsafe { IrqRequest::new(self.dev.as_ref(), irq as u32) }) } } =20 -/// Represents an IRQ vector allocation for a PCI device. +/// An allocation of PCI interrupt vectors for a device. /// -/// This type ensures that IRQ vectors are properly allocated and freed by -/// tying the allocation to the lifetime of this registration object. +/// This type owns the vector allocation; dropping it frees the vectors. I= RQ handlers borrow from +/// this registration and must be dropped before it is. /// /// # Invariants /// -/// The [`Device`] has successfully allocated IRQ vectors. -struct IrqVectorRegistration { - dev: ARef, +/// `dev` has an allocation of `len` interrupt vectors. +pub struct IrqVectorRegistration<'a> { + dev: &'a Device, + len: NonZero, } =20 -impl IrqVectorRegistration { - /// Allocate and register IRQ vectors for the given PCI device. +impl<'a> IrqVectorRegistration<'a> { + /// Returns the number of allocated vectors. /// - /// Allocates IRQ vectors and registers them with devres for automatic= cleanup. - /// Returns a range of valid IRQ vectors. - fn register<'a>( - dev: &'a Device, - min_vecs: u32, - max_vecs: u32, - irq_types: IrqTypes, - ) -> Result>> { - // SAFETY: - // - `dev.as_raw()` is guaranteed to be a valid pointer to a `stru= ct pci_dev` - // by the type invariant of `Device`. - // - `pci_alloc_irq_vectors` internally validates all other parame= ters - // and returns error codes. - let ret =3D unsafe { - bindings::pci_alloc_irq_vectors(dev.as_raw(), min_vecs, max_ve= cs, irq_types.as_raw()) - }; - - to_result(ret)?; - let count =3D ret as u32; - - // SAFETY: - // - `pci_alloc_irq_vectors` returns the number of allocated vecto= rs on success. - // - Vectors are 0-based, so valid indices are [0, count-1]. - // - `pci_alloc_irq_vectors` guarantees `count >=3D min_vecs > 0`,= so both `0` and - // `count - 1` are valid IRQ vector indices for `dev`. - let range =3D unsafe { IrqVector::new(dev, 0)..=3DIrqVector::new(d= ev, count - 1) }; + /// This is at least the `min_vecs` that [`Device::alloc_irq_vectors`]= was asked for. + #[inline] + #[allow(clippy::len_without_is_empty)] + pub fn len(&self) -> usize { + self.len.get() + } =20 - // INVARIANT: The IRQ vector allocation for `dev` above was succes= sful. - let irq_vecs =3D Self { dev: dev.into() }; - devres::register(dev.as_ref(), irq_vecs, GFP_KERNEL)?; + /// Returns the [`IrqVector`] at `index`. + /// + /// Returns [`EINVAL`] if the `index` is out of bounds for the length = reported by + /// [`Self::len()`]. + #[inline] + pub fn index(&self, index: usize) -> Result> { + if index >=3D self.len.get() { + return Err(EINVAL); + } =20 - Ok(range) + // SAFETY: `index` is within bounds of this registration's allocat= ion, and `self.dev` is + // the device it was allocated from. + Ok(unsafe { IrqVector::new(self.dev, self, index as u32) }) } } =20 -impl Drop for IrqVectorRegistration { +impl Drop for IrqVectorRegistration<'_> { + #[inline] fn drop(&mut self) { - // SAFETY: - // - By the type invariant, `self.dev.as_raw()` is a valid pointer= to a `struct pci_dev`. - // - `self.dev` has successfully allocated IRQ vectors. + // SAFETY: By the type invariant, `self.dev.as_raw()` is a valid p= ointer to a + // `struct pci_dev` that has successfully allocated IRQ vectors. unsafe { bindings::pci_free_irq_vectors(self.dev.as_raw()) }; } } @@ -214,15 +208,16 @@ pub unsafe fn request_threaded_irq<'a, T: crate::irq:= :ThreadedHandler + 'a>( }) } =20 - /// Allocate IRQ vectors for this PCI device with automatic cleanup. + /// Allocate IRQ vectors for this PCI device. /// /// Allocates between `min_vecs` and `max_vecs` interrupt vectors for = the device. /// The allocation will use MSI-X, MSI, or INTx interrupts based on th= e `irq_types` /// parameter and hardware capabilities. When multiple types are speci= fied, the kernel /// will try them in order of preference: MSI-X first, then MSI, then = INTx interrupts. /// - /// The allocated vectors are automatically freed when the device is u= nbound, using the - /// devres (device resource management) system. + /// The allocated vectors are freed when the returned [`IrqVectorRegis= tration`] is dropped. + /// IRQ handlers registered via [`Self::request_irq`] or [`Self::reque= st_threaded_irq`] + /// borrow from the registration, so the compiler ensures they are fre= ed first. /// /// # Arguments /// @@ -232,8 +227,8 @@ pub unsafe fn request_threaded_irq<'a, T: crate::irq::T= hreadedHandler + 'a>( /// /// # Returns /// - /// Returns a range of IRQ vectors that were successfully allocated, o= r an error if the - /// allocation fails or cannot meet the minimum requirement. + /// Returns the IRQ vector registration, or an error if `min_vecs` vec= tors cannot be + /// allocated. /// /// # Examples /// @@ -256,7 +251,20 @@ pub fn alloc_irq_vectors( min_vecs: u32, max_vecs: u32, irq_types: IrqTypes, - ) -> Result>> { - IrqVectorRegistration::register(self, min_vecs, max_vecs, irq_type= s) + ) -> Result> { + // SAFETY: + // - `self.as_raw()` is guaranteed to be a valid pointer to a `str= uct pci_dev` + // by the type invariant of `Device`. + // - `pci_alloc_irq_vectors` internally validates all other parame= ters + // and returns error codes. + let ret =3D unsafe { + bindings::pci_alloc_irq_vectors(self.as_raw(), min_vecs, max_v= ecs, irq_types.as_raw()) + }; + to_result(ret)?; + + let len =3D NonZero::new(ret as usize).ok_or(EINVAL)?; + + // INVARIANT: `pci_alloc_irq_vectors()` allocated `len` vectors fo= r `self`. + Ok(IrqVectorRegistration { dev: self, len }) } } --=20 2.55.0 From nobody Tue Sep 29 02:00:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 497853446AD; Thu, 13 Aug 2026 16:52:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639974; cv=none; b=B1ypDTUOZKYTrQTaAr1NP+xBsFRxBw0bdEbyJB6vLud3LMgqhRhoDV4KKMStR4oCLDzgTEVQ2bqKbJzDsS9AyMPqqm/GnM4PQY3mqW7huwTP5R3b9qpDA2S2B5dBmVdzhZ2shgK/jSxKfKwSqrOW61m6yhzRCWFRvvlvKLtwDWI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639974; c=relaxed/simple; bh=qjF9ZjN491oEVBbRaLmSQxFY64UKoX2ow/J8yxMsDlw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EY4D5UMe68HBR/jlnUH1ek3DiREuA8vWm8stftkZav5C6C7hAbdKFzBdrqI+chudimAhjzi3aAMN3tvkhiyhvHqkG1DPGtaCfqxMwPnUMFC+t3zc4YPT70mHsoT4DtNVAn8NM0BmGQQL0owfuMpY2XR8Mz/oD81PM4Pe3PhB/wE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fjwkztUc; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fjwkztUc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC5FB1F00A3A; Thu, 13 Aug 2026 16:52:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786639971; bh=Hsq3DSjGOVtc1v3UzQLGWtlptJsL4JsK+kfeVAeGja0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=fjwkztUcfSbfubDqulvgGCCCvNGJCy7LZV9xqhp6MZrEaGNEckBDsBr5L8VIngBqj MaRMQX4SVJXFX0MCEsjt5xh0ojFHuvf1U9a/+z/d5eQaGvCUKq661YjzydUddGJYw7 PUum4VpcJEvunoacvrMavFH3T6Z77EuYpEsBaEXmeIz1cEATViHdqbxDVLUcXrOHLT b77n8vZFhu6dYOugHciOlRzDk5Py0jDiENmVCiSyxu8wzp6sgDqtd+1m2BvqqszIN1 Gja7wIsgEmLi8G11Ngd/LDfyW33evnXUqYtyX8NQBlhrvjuyfiLdkMxZ2ByKPA94mI YZEq4AGF1+Dig== From: Danilo Krummrich To: bhelgaas@google.com, dakr@kernel.org, kwilczynski@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, tamird@kernel.org, acourbot@nvidia.com, work@onurozkan.dev, jhubbard@nvidia.com, ttabi@nvidia.com, apopple@nvidia.com, ecourtney@nvidia.com, shashanks@nvidia.com, zhiw@nvidia.com Cc: driver-core@lists.linux.dev, linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/5] rust: pci: resolve IRQ in index() and embed IrqRequest in IrqVector Date: Thu, 13 Aug 2026 18:52:02 +0200 Message-ID: <20260813165234.620555-3-dakr@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260813165234.620555-1-dakr@kernel.org> References: <20260813165234.620555-1-dakr@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the pci_irq_vector() call from the TryInto impl into IrqVectorRegistration::index(), so the IRQ number is resolved eagerly. IrqVector now embeds the resolved IrqRequest and a reference to the IrqVectorRegistration. The conversion to IrqRequest is infallible, which removes the need for pin_init_scope() in request_irq() / request_threaded_irq(). Tested-by: John Hubbard Inspired-by: John Hubbard Link: https://lore.kernel.org/all/20260808031120.363869-3-jhubbard@nvidia.c= om/ Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo --- rust/kernel/pci/irq.rs | 67 +++++++++++++++--------------------------- 1 file changed, 23 insertions(+), 44 deletions(-) diff --git a/rust/kernel/pci/irq.rs b/rust/kernel/pci/irq.rs index daba86505cd2..81b74c4c17d9 100644 --- a/rust/kernel/pci/irq.rs +++ b/rust/kernel/pci/irq.rs @@ -68,32 +68,25 @@ const fn as_raw(self) -> u32 { } } =20 -/// Represents an allocated IRQ vector for a specific PCI device. +/// A resolved IRQ vector from a PCI interrupt vector allocation. /// -/// This type ties an IRQ vector to the device it was allocated for, -/// ensuring the vector is only used with the correct device. -#[derive(Clone, Copy)] +/// Created by [`IrqVectorRegistration::index`] and consumed by [`Device::= request_irq`] or +/// [`Device::request_threaded_irq`]. Borrows the [`IrqVectorRegistration`= ] it was derived from, +/// so the allocation stays live until the handler is freed. pub struct IrqVector<'a> { - dev: &'a Device, + request: IrqRequest<'a>, reg: &'a IrqVectorRegistration<'a>, - index: u32, } =20 impl<'a> IrqVector<'a> { - /// Creates a new [`IrqVector`] for the given device and index. + /// Creates a new [`IrqVector`] with an already resolved [`IrqRequest`= ]. /// /// # Safety /// - /// - `index` must be a valid IRQ vector index for `reg`. - /// - `dev` must be the device `reg` was allocated from. + /// `request` must have been resolved from `reg`. #[inline] - unsafe fn new(dev: &'a Device, reg: &'a IrqVectorRegistration<'= a>, index: u32) -> Self { - Self { dev, reg, index } - } - - /// Returns the raw vector index. - fn index(&self) -> u32 { - self.index + unsafe fn new(request: IrqRequest<'a>, reg: &'a IrqVectorRegistration<= 'a>) -> Self { + Self { request, reg } } =20 /// Returns the [`IrqVectorRegistration`] this vector was derived from. @@ -103,17 +96,10 @@ pub fn vectors(&self) -> &'a IrqVectorRegistration<'a>= { } } =20 -impl<'a> TryInto> for IrqVector<'a> { - type Error =3D Error; - - fn try_into(self) -> Result> { - // SAFETY: `self.dev.as_raw()` returns a valid pointer to a `struc= t pci_dev`. - let irq =3D unsafe { bindings::pci_irq_vector(self.dev.as_raw(), s= elf.index()) }; - if irq < 0 { - return Err(crate::error::Error::from_errno(irq)); - } - // SAFETY: `irq` is guaranteed to be a valid IRQ number for `self.= dev`. - Ok(unsafe { IrqRequest::new(self.dev.as_ref(), irq as u32) }) +impl<'a> From> for IrqRequest<'a> { + #[inline] + fn from(vector: IrqVector<'a>) -> Self { + vector.request } } =20 @@ -146,13 +132,14 @@ pub fn len(&self) -> usize { /// [`Self::len()`]. #[inline] pub fn index(&self, index: usize) -> Result> { - if index >=3D self.len.get() { - return Err(EINVAL); + // SAFETY: `self.dev.as_raw()` is a valid pointer to a `struct pci= _dev`. + let irq =3D unsafe { bindings::pci_irq_vector(self.dev.as_raw(), i= ndex as u32) }; + if irq < 0 { + return Err(Error::from_errno(irq)); } =20 - // SAFETY: `index` is within bounds of this registration's allocat= ion, and `self.dev` is - // the device it was allocated from. - Ok(unsafe { IrqVector::new(self.dev, self, index as u32) }) + // SAFETY: `irq` is a valid IRQ number for `self.dev`, resolved fr= om this registration. + Ok(unsafe { IrqVector::new(IrqRequest::new(self.dev.as_ref(), irq = as u32), self) }) } } =20 @@ -179,12 +166,8 @@ pub unsafe fn request_irq<'a, T: crate::irq::Handler += 'a>( name: &'static CStr, handler: impl PinInit + 'a, ) -> impl PinInit, Error> + 'a { - pin_init::pin_init_scope(move || { - let request =3D vector.try_into()?; - - // SAFETY: Caller guarantees the Registration will not be leak= ed. - Ok(unsafe { irq::Registration::::new(request, flags, name, = handler) }) - }) + // SAFETY: Caller guarantees the Registration will not be leaked. + unsafe { irq::Registration::::new(vector.into(), flags, name, h= andler) } } =20 /// Returns a [`kernel::irq::ThreadedRegistration`] for the given IRQ = vector. @@ -200,12 +183,8 @@ pub unsafe fn request_threaded_irq<'a, T: crate::irq::= ThreadedHandler + 'a>( name: &'static CStr, handler: impl PinInit + 'a, ) -> impl PinInit, Error> + 'a { - pin_init::pin_init_scope(move || { - let request =3D vector.try_into()?; - - // SAFETY: Caller guarantees the Registration will not be leak= ed. - Ok(unsafe { irq::ThreadedRegistration::::new(request, flags= , name, handler) }) - }) + // SAFETY: Caller guarantees the Registration will not be leaked. + unsafe { irq::ThreadedRegistration::::new(vector.into(), flags,= name, handler) } } =20 /// Allocate IRQ vectors for this PCI device. --=20 2.55.0 From nobody Tue Sep 29 02:00:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03CBD35AC07; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="e+ipMQd7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 99F411F000E9; Thu, 13 Aug 2026 16:52:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786639976; bh=NyhqZ9JNtLYH1Zizz10hH1uJrjQDQO/Ha/me0m2ZwaI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=e+ipMQd7qRZiE6aNd5mLmuTBPSdN9o92BAwuYm5jstcVSzqog5aP2yJZnuVnNL9DN Nj7yGTAKh4gIcGulGBl2IMcfQSl4PNJRaAdU+GZMrXJ9YacJuzFzqqQJb0O+oGLw1d Ww1KZDjZ239A69E6Zo0lo6RT9S2XQcbIDQw6xBPjWTV16U0SzqqklDQKLV4yOeLKBr Sl7u1AP/L/jY7k60mmnq8FL2TqB5fZQqYa0hJ7eTEXfwFTS0XidZ1B5hUjFzyuDQYO SUtICenWw7ksjKJBqwYGm9NDFOKEebPlndf5jXfj0MHtrGmONgf2puX5kAmKKWuSGG Ch370+8fsXTBA== From: Danilo Krummrich To: bhelgaas@google.com, dakr@kernel.org, kwilczynski@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, tamird@kernel.org, acourbot@nvidia.com, work@onurozkan.dev, jhubbard@nvidia.com, ttabi@nvidia.com, apopple@nvidia.com, ecourtney@nvidia.com, shashanks@nvidia.com, zhiw@nvidia.com Cc: driver-core@lists.linux.dev, linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/5] rust: pci: remove request_irq() and request_threaded_irq() from Device Date: Thu, 13 Aug 2026 18:52:03 +0200 Message-ID: <20260813165234.620555-4-dakr@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260813165234.620555-1-dakr@kernel.org> References: <20260813165234.620555-1-dakr@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove the thin wrappers on Device that only forwarded to irq::Registration::new() and irq::ThreadedRegistration::new(). With IrqVector embedding a resolved IrqRequest, the conversion is infallible and drivers call irq::Registration::new(vector.into(), ...) directly. Unlike the platform equivalents, which combine a fallible IRQ lookup with handler registration, the PCI wrappers add no value beyond namespacing. They also introduce a redundant device reference. IrqVector already carries a device borrow through its embedded IrqRequest, yet the wrappers required a second, potentially unrelated, &self receiver. Tested-by: John Hubbard Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo --- rust/kernel/pci/irq.rs | 48 +++++------------------------------------- 1 file changed, 5 insertions(+), 43 deletions(-) diff --git a/rust/kernel/pci/irq.rs b/rust/kernel/pci/irq.rs index 81b74c4c17d9..b6d1699ee3eb 100644 --- a/rust/kernel/pci/irq.rs +++ b/rust/kernel/pci/irq.rs @@ -8,10 +8,7 @@ device, device::Bound, error::to_result, - irq::{ - self, - IrqRequest, // - }, + irq::IrqRequest, prelude::*, // }; use core::num::NonZero; @@ -70,9 +67,8 @@ const fn as_raw(self) -> u32 { =20 /// A resolved IRQ vector from a PCI interrupt vector allocation. /// -/// Created by [`IrqVectorRegistration::index`] and consumed by [`Device::= request_irq`] or -/// [`Device::request_threaded_irq`]. Borrows the [`IrqVectorRegistration`= ] it was derived from, -/// so the allocation stays live until the handler is freed. +/// Created by [`IrqVectorRegistration::index`]. Convert to [`IrqRequest`]= via [`From`] to register +/// a handler with [`irq::Registration::new`](crate::irq::Registration::ne= w). pub struct IrqVector<'a> { request: IrqRequest<'a>, reg: &'a IrqVectorRegistration<'a>, @@ -153,40 +149,6 @@ fn drop(&mut self) { } =20 impl Device { - /// Returns a [`kernel::irq::Registration`] for the given IRQ vector. - /// - /// # Safety - /// - /// Callers must not `mem::forget()` the resulting [`irq::Registration= `] or otherwise prevent - /// its [`Drop`] implementation from running. - pub unsafe fn request_irq<'a, T: crate::irq::Handler + 'a>( - &'a self, - vector: IrqVector<'a>, - flags: irq::Flags, - name: &'static CStr, - handler: impl PinInit + 'a, - ) -> impl PinInit, Error> + 'a { - // SAFETY: Caller guarantees the Registration will not be leaked. - unsafe { irq::Registration::::new(vector.into(), flags, name, h= andler) } - } - - /// Returns a [`kernel::irq::ThreadedRegistration`] for the given IRQ = vector. - /// - /// # Safety - /// - /// Callers must not `mem::forget()` the resulting [`irq::ThreadedRegi= stration`] or otherwise - /// prevent its [`Drop`] implementation from running. - pub unsafe fn request_threaded_irq<'a, T: crate::irq::ThreadedHandler = + 'a>( - &'a self, - vector: IrqVector<'a>, - flags: irq::Flags, - name: &'static CStr, - handler: impl PinInit + 'a, - ) -> impl PinInit, Error> + 'a { - // SAFETY: Caller guarantees the Registration will not be leaked. - unsafe { irq::ThreadedRegistration::::new(vector.into(), flags,= name, handler) } - } - /// Allocate IRQ vectors for this PCI device. /// /// Allocates between `min_vecs` and `max_vecs` interrupt vectors for = the device. @@ -195,8 +157,8 @@ pub unsafe fn request_threaded_irq<'a, T: crate::irq::T= hreadedHandler + 'a>( /// will try them in order of preference: MSI-X first, then MSI, then = INTx interrupts. /// /// The allocated vectors are freed when the returned [`IrqVectorRegis= tration`] is dropped. - /// IRQ handlers registered via [`Self::request_irq`] or [`Self::reque= st_threaded_irq`] - /// borrow from the registration, so the compiler ensures they are fre= ed first. + /// Use [`IrqVectorRegistration::index`] to obtain an [`IrqVector`] fo= r a given vector + /// index. /// /// # Arguments /// --=20 2.55.0 From nobody Tue Sep 29 02:00:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCD2339734A; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="M75wEAso" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85F9A1F00A3A; Thu, 13 Aug 2026 16:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786639981; bh=Kxof0d8W6WGj+wx5sWeP30W7ePh20mC1cgGL98Rry/c=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=M75wEAsotmSi4SfTkZCHlzd4j0X80af8OVd0MwvgRh300+qTOVN/UIIXSekYv962+ 7NZ8NBGKn5GWX8eCl0p+NnWtKISOWWLWiC5720FJSmzsLGq0/3V1r17P9U4IuROgv/ 9j/7tPANeOe7qaW5IDO+Tt5tO4rOAqsHeKuZvugxw1ruXtgCGoJ0WjPFhW8jaFZlL2 GkSSnboBkHWGE/qQeAa2kyxVYDZZIBjSnR1+tVj6yM3gaDk/yrAgf+7WwCyOXeMQzh jAa5F3CLL2g8OvjH+6x5KNOWrz/FL9hkb13Q6GsB8FQwo137UbzQmSOIEACfswWVKX q8DxLCVyc3N5Q== From: Danilo Krummrich To: bhelgaas@google.com, dakr@kernel.org, kwilczynski@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, tamird@kernel.org, acourbot@nvidia.com, work@onurozkan.dev, jhubbard@nvidia.com, ttabi@nvidia.com, apopple@nvidia.com, ecourtney@nvidia.com, shashanks@nvidia.com, zhiw@nvidia.com Cc: driver-core@lists.linux.dev, linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/5] PCI: Add pci_irq_type() to query the allocated interrupt type Date: Thu, 13 Aug 2026 18:52:04 +0200 Message-ID: <20260813165234.620555-5-dakr@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260813165234.620555-1-dakr@kernel.org> References: <20260813165234.620555-1-dakr@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a helper that returns PCI_IRQ_MSIX, PCI_IRQ_MSI, or PCI_IRQ_INTX based on the interrupt type the PCI core selected after pci_alloc_irq_vectors(). Several drivers already open-code this check against pdev->msix_enabled and pdev->msi_enabled, or even open code this helper [1]. A common helper avoids the duplication and keeps drivers from accessing the bitfield directly (see also [2]). Acked-by: Bjorn Helgaas Tested-by: John Hubbard Link: https://elixir.bootlin.com/linux/v7.1/source/drivers/net/ethernet/aqu= antia/atlantic/aq_pci_func.c#L196 [1] Inspired-by: John Hubbard Link: https://lore.kernel.org/all/DKKG2QM3YJYB.Z2H2B2UXJ75N@kernel.org/ [2] Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo --- include/linux/pci.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index 64b308b6e61c..80b8561b5be0 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1783,6 +1783,26 @@ void pci_free_irq_vectors(struct pci_dev *dev); int pci_irq_vector(struct pci_dev *dev, unsigned int nr); const struct cpumask *pci_irq_get_affinity(struct pci_dev *pdev, int vec); =20 +/** + * pci_irq_type - Get the interrupt type of a PCI device + * @pdev: the PCI device to operate on + * + * Discriminate the interrupt type the PCI core selected for this device + * after a successful pci_alloc_irq_vectors() call. + * + * Return: %PCI_IRQ_MSIX, %PCI_IRQ_MSI, or %PCI_IRQ_INTX. + */ +static inline unsigned int pci_irq_type(struct pci_dev *pdev) +{ + if (pdev->msix_enabled) + return PCI_IRQ_MSIX; + + if (pdev->msi_enabled) + return PCI_IRQ_MSI; + + return PCI_IRQ_INTX; +} + #else static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS;= } static inline void pci_disable_msi(struct pci_dev *dev) { } @@ -1845,6 +1865,11 @@ static inline const struct cpumask *pci_irq_get_affi= nity(struct pci_dev *pdev, { return cpu_possible_mask; } + +static inline unsigned int pci_irq_type(struct pci_dev *pdev) +{ + return PCI_IRQ_INTX; +} #endif =20 /** --=20 2.55.0 From nobody Tue Sep 29 02:00:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA5D64968EB; Thu, 13 Aug 2026 16:53:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639992; cv=none; b=CfCFtValTvYM9wIeB1I4TQBHKXu6B9miktTwd2lLYPDh+x6/dVtxygwy6fGz+sMLyk1MZS+PVCmakrRQt7nP/6AGvbijbeV9qvkrfk4454kazZpRUP5lHXjfLoz15hZboUcPAqh+WVG/lc3GliAAKBL5dxL9BOd5xz/m/46qMKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786639992; c=relaxed/simple; bh=+4TDnZ8BZBRfq5vXg7FAaHlmhE5Hc45YdBF8W1hFrow=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e+EtLKolBfe5E0BUFi9K17aI9+6lEoHQOm7ybnsFK60cpcVS5wWHDwrPcr+uoU9GXm4/O9UT7CyxzNrHOt7El8h/tOOQWQT0Sk1N2snh4h6llcsyE9wdBmxcgISQooh/+QtDsXzufVlFl8cdH+3JXMr7t18cVB+CCUHvb2GYXSQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=O42pm27i; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O42pm27i" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73F851F000E9; Thu, 13 Aug 2026 16:53:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786639986; bh=Kl/jmZVIL4SB1peSqKcfd75nHoFx4C0sgfY8gHPdx7I=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=O42pm27im3EQtpmhg+aAY/4eN1AV4on42GtqBsJtisHsQZgdvSdKkQlzZHO+eaELn a17weWr4ITEX/Z3rWlbS2RgjWf0nE9ONDIxwn+cnRfWPu/u+rYc9l6haJkpT35dydZ C1mOpxrtZedrbhzrEk+ETn4sf0e9+AoaR3fTs+b2kLCVdTaQFjrvO8nkqN0gUY0yIF UiaIZoauRtZPHLRt0Ph5Qc79CpfvoV6IY9535GjeDXL6dUl5i3R1WMlQW2Gdl2pKe9 K9a3V3a5pWxx93uPVcchzyRZDx3qvdkWK7sBW6OQBJZzDBazq2c1Umd74SwpoX0kUc qm5lCgKREx4aA== From: Danilo Krummrich To: bhelgaas@google.com, dakr@kernel.org, kwilczynski@kernel.org, aliceryhl@google.com, daniel.almeida@collabora.com, ojeda@kernel.org, boqun@kernel.org, gary@garyguo.net, bjorn3_gh@protonmail.com, lossin@kernel.org, a.hindborg@kernel.org, tmgross@umich.edu, tamird@kernel.org, acourbot@nvidia.com, work@onurozkan.dev, jhubbard@nvidia.com, ttabi@nvidia.com, apopple@nvidia.com, ecourtney@nvidia.com, shashanks@nvidia.com, zhiw@nvidia.com Cc: driver-core@lists.linux.dev, linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/5] rust: pci: expose the allocated interrupt type Date: Thu, 13 Aug 2026 18:52:05 +0200 Message-ID: <20260813165234.620555-6-dakr@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260813165234.620555-1-dakr@kernel.org> References: <20260813165234.620555-1-dakr@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add irq_type() on IrqVectorRegistration and IrqVector, wrapping the new pci_irq_type() C function. A driver whose interrupt acknowledgment depends on the type (MSI-X vs MSI vs INTx) queries it here rather than assuming which type the PCI core selected. Tested-by: John Hubbard Suggested-by: John Hubbard Link: https://lore.kernel.org/all/20260808031120.363869-4-jhubbard@nvidia.c= om/ Signed-off-by: Danilo Krummrich Reviewed-by: Gary Guo --- rust/helpers/pci.c | 5 +++++ rust/kernel/pci/irq.rs | 23 +++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/rust/helpers/pci.c b/rust/helpers/pci.c index e44905317d75..23b06becb448 100644 --- a/rust/helpers/pci.c +++ b/rust/helpers/pci.c @@ -24,6 +24,11 @@ __rust_helper bool rust_helper_dev_is_pci(const struct d= evice *dev) return dev_is_pci(dev); } =20 +__rust_helper unsigned int rust_helper_pci_irq_type(struct pci_dev *pdev) +{ + return pci_irq_type(pdev); +} + #ifndef CONFIG_PCI_MSI __rust_helper int rust_helper_pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, diff --git a/rust/kernel/pci/irq.rs b/rust/kernel/pci/irq.rs index b6d1699ee3eb..6741046ec1c0 100644 --- a/rust/kernel/pci/irq.rs +++ b/rust/kernel/pci/irq.rs @@ -33,6 +33,16 @@ const fn as_raw(self) -> u32 { IrqType::MsiX =3D> bindings::PCI_IRQ_MSIX, } } + + /// Construct from raw value. + #[inline] + const fn from_raw(raw: u32) -> Self { + match raw { + bindings::PCI_IRQ_MSIX =3D> IrqType::MsiX, + bindings::PCI_IRQ_MSI =3D> IrqType::Msi, + _ =3D> IrqType::Intx, + } + } } =20 /// Set of IRQ types that can be used for PCI interrupt allocation. @@ -90,6 +100,12 @@ unsafe fn new(request: IrqRequest<'a>, reg: &'a IrqVect= orRegistration<'a>) -> Se pub fn vectors(&self) -> &'a IrqVectorRegistration<'a> { self.reg } + + /// Returns the interrupt type the PCI core selected for this vector's= allocation. + #[inline] + pub fn irq_type(&self) -> IrqType { + self.reg.irq_type() + } } =20 impl<'a> From> for IrqRequest<'a> { @@ -122,6 +138,13 @@ pub fn len(&self) -> usize { self.len.get() } =20 + /// Returns the interrupt type the PCI core selected for this allocati= on. + #[inline] + pub fn irq_type(&self) -> IrqType { + // SAFETY: `self.dev.as_raw()` is a valid pointer to a `struct pci= _dev`. + IrqType::from_raw(unsafe { bindings::pci_irq_type(self.dev.as_raw(= )) }) + } + /// Returns the [`IrqVector`] at `index`. /// /// Returns [`EINVAL`] if the `index` is out of bounds for the length = reported by --=20 2.55.0