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Thu, 13 Aug 2026 09:11:03 -0700 (PDT) From: Mehmet Fide To: Shawn Guo , Sascha Hauer Cc: Frank Li , Pengutronix Kernel Team , Stefan Agner , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mehmet Fide Subject: [PATCH v4 1/4] ARM: dts: vf-colibri: apply the EXT_IO pin group Date: Thu, 13 Aug 2026 18:10:58 +0200 Message-ID: <20260813161101.2274327-2-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260813161101.2274327-1-mehmet.fide@gmail.com> References: <20260813161101.2274327-1-mehmet.fide@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mehmet Fide pinctrl_gpio_ext describes the three Colibri EXT_IO pins, but no node references it, so the pin controller never applies it and the pads keep whatever mux and bias they came up with. It is the only pin group in the Vybrid Colibri device trees that is defined and never used. The three pins are GPIOs on gpio2 and belong to no device, so hog the group on that controller. Referencing it from &iomuxc would work too, but the pin controller would then depend on one of its own children, which fw_devlink reports as a dependency cycle. Signed-off-by: Mehmet Fide --- arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/n= xp/vf/vf-colibri.dtsi index 98f9ee1b0030..74afc7b0d74b 100644 --- a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi @@ -170,6 +170,15 @@ &usbphy1 { status =3D "okay"; }; =20 +&gpio2 { + /* + * EXT_IO_0..2 belong to no device, so hog the pin group here rather + * than on the pin controller, which would depend on its own child. + */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_ext>; +}; + &iomuxc { pinctrl_flexcan0: can0grp { fsl,pins =3D < --=20 2.54.0 From nobody Tue Sep 29 02:02:24 2026 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A402E48CD77 for ; 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Thu, 13 Aug 2026 09:11:05 -0700 (PDT) Received: from deb05.proceq.com ([213.160.61.66]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4815f21a24esm449409f8f.11.2026.08.13.09.11.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2026 09:11:04 -0700 (PDT) From: Mehmet Fide To: Shawn Guo , Sascha Hauer Cc: Frank Li , Pengutronix Kernel Team , Stefan Agner , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mehmet Fide Subject: [PATCH v4 2/4] ARM: dts: vf-colibri: name the SODIMM gpio lines Date: Thu, 13 Aug 2026 18:10:59 +0200 Message-ID: <20260813161101.2274327-3-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260813161101.2274327-1-mehmet.fide@gmail.com> References: <20260813161101.2274327-1-mehmet.fide@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mehmet Fide The Colibri modules expose most of their GPIOs on numbered SODIMM pins, and the i.MX ones already carry those numbers as gpio-line-names, so the gpiod tools print SODIMM_43 rather than a bank and an offset. Do the same for the Vybrid modules. The 99 names come from the pinout table of the Colibri VFxx datasheet (Toradex 101355). Verified on a Colibri VF50, where gpioinfo now names every pin the datasheet lists. Signed-off-by: Mehmet Fide --- arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi b/arch/arm/boot/dts/n= xp/vf/vf-colibri.dtsi index 74afc7b0d74b..a9269857df2c 100644 --- a/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi @@ -170,6 +170,44 @@ &usbphy1 { status =3D "okay"; }; =20 +&gpio0 { + gpio-line-names =3D "", "", "SODIMM_89", "", + "", "SODIMM_102", "SODIMM_18", "SODIMM_134", + "SODIMM_16", "SODIMM_14", "SODIMM_23", "", + "", "", "SODIMM_47", "SODIMM_190", + "SODIMM_192", "SODIMM_49", "SODIMM_51", "SODIMM_53", + "SODIMM_37", "SODIMM_29", "", "SODIMM_30", + "SODIMM_20", "SODIMM_24", "SODIMM_21", "SODIMM_19", + "SODIMM_94", "SODIMM_81", "SODIMM_28"; +}; + +&gpio1 { + gpio-line-names =3D "SODIMM_35", "SODIMM_33", "SODIMM_27", "SODIMM_25", + "SODIMM_196", "SODIMM_194", "SODIMM_63", "SODIMM_55", + "SODIMM_65", "SODIMM_45", "SODIMM_43", "SODIMM_73", + "SODIMM_77", "SODIMM_71", "SODIMM_98", "SODIMM_101", + "SODIMM_103", "SODIMM_79", "SODIMM_97", "", + "", "SODIMM_85", "", "", + "", "", "", "", + "", "", "", "SODIMM_106"; +}; + +&gpio3 { + gpio-line-names =3D "SODIMM_105", "", "SODIMM_93", "", + "", "", "", "SODIMM_95", + "SODIMM_22", "SODIMM_68", "SODIMM_82", "SODIMM_56", + "SODIMM_131", "SODIMM_44", "SODIMM_144", "SODIMM_146", + "SODIMM_52", "SODIMM_54", "SODIMM_66", "SODIMM_64", + "SODIMM_57", "SODIMM_61", "SODIMM_140", "SODIMM_142", + "SODIMM_80", "SODIMM_46", "SODIMM_62", "SODIMM_48", + "SODIMM_74", "SODIMM_50", "SODIMM_136", "SODIMM_138"; +}; + +&gpio4 { + gpio-line-names =3D "SODIMM_76", "SODIMM_70", "SODIMM_60", "SODIMM_58", + "SODIMM_78", "SODIMM_72", "SODIMM_96"; +}; + &gpio2 { /* * EXT_IO_0..2 belong to no device, so hog the pin group here rather @@ -177,6 +215,15 @@ &gpio2 { */ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio_ext>; + + gpio-line-names =3D "SODIMM_69", "SODIMM_99", "SODIMM_104", "SODIMM_107", + "SODIMM_127", "SODIMM_184", "SODIMM_186", "", + "", "", "", "", + "", "", "", "SODIMM_38", + "SODIMM_36", "SODIMM_34", "SODIMM_32", "SODIMM_129", + "SODIMM_86", "SODIMM_90", "SODIMM_92", "SODIMM_88", + "SODIMM_133", "SODIMM_135", "SODIMM_188", "SODIMM_75", + "SODIMM_100"; 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Thu, 13 Aug 2026 09:11:05 -0700 (PDT) From: Mehmet Fide To: Shawn Guo , Sascha Hauer Cc: Frank Li , Pengutronix Kernel Team , Stefan Agner , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mehmet Fide Subject: [PATCH v4 3/4] dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris Date: Thu, 13 Aug 2026 18:11:00 +0200 Message-ID: <20260813161101.2274327-4-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260813161101.2274327-1-mehmet.fide@gmail.com> References: <20260813161101.2274327-1-mehmet.fide@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mehmet Fide The Iris is a small off-the-shelf carrier board for the Colibri family. Extend the evaluation board entries with the compatibles for a Colibri VF50 or VF61 sitting on it. Signed-off-by: Mehmet Fide Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/fsl.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 86876311ec59..6f95c17b363c 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1705,9 +1705,11 @@ properties: - fsl,vf610 - fsl,vf610m4 =20 - - description: Toradex Colibri VF50 Module on Colibri Evaluation Boa= rd + - description: Toradex Colibri VF50 Module on a carrier board items: - - const: toradex,vf500-colibri_vf50-on-eval + - enum: + - toradex,vf500-colibri_vf50-on-eval + - toradex,vf500-colibri-vf50-on-iris - const: toradex,vf500-colibri_vf50 - const: fsl,vf500 =20 @@ -1719,9 +1721,11 @@ properties: - phytec,vf610-cosmic # PHYTEC Cosmic/Cosmic+ Board - const: fsl,vf610 =20 - - description: Toradex Colibri VF61 Module on Colibri Evaluation Boa= rd + - description: Toradex Colibri VF61 Module on a carrier board items: - - const: toradex,vf610-colibri_vf61-on-eval + - enum: + - toradex,vf610-colibri_vf61-on-eval + - toradex,vf610-colibri-vf61-on-iris - const: toradex,vf610-colibri_vf61 - const: fsl,vf610 =20 --=20 2.54.0 From nobody Tue Sep 29 02:02:24 2026 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AD78494818 for ; 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Thu, 13 Aug 2026 09:11:07 -0700 (PDT) Received: from deb05.proceq.com ([213.160.61.66]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4815f21a24esm449409f8f.11.2026.08.13.09.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2026 09:11:06 -0700 (PDT) From: Mehmet Fide To: Shawn Guo , Sascha Hauer Cc: Frank Li , Pengutronix Kernel Team , Stefan Agner , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mehmet Fide Subject: [PATCH v4 4/4] ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61 Date: Thu, 13 Aug 2026 18:11:01 +0200 Message-ID: <20260813161101.2274327-5-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260813161101.2274327-1-mehmet.fide@gmail.com> References: <20260813161101.2274327-1-mehmet.fide@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mehmet Fide The Iris is a small off-the-shelf carrier board for the Colibri family. Describe what the board itself provides: Ethernet, one USB host and one OTG port, the pin header UARTs, i2c with the carrier RTC on it, the PWM pins on the X16 header, SPI and the microSD slot. The host port gets its VBUS through a regulator on SODIMM 129, and the two GPIOs that turn the RS232 transceivers on, SODIMM 102 and 104, are hogged. The touchscreen is an add-on rather than part of the board, so it is left out. This describes an Iris V1.1. A V2.0 carries the same signals on the same pins; what it adds, and what this does not describe, is the regulator on SODIMM 100 that can cut power to the uSD slot. Tested on a Colibri VF50 on an Iris V1.1 running 6.18: Ethernet at 100Mbps/Full, a USB dongle enumerating once the VBUS regulator is in place, the RTC read back over i2c0, all three UARTs, the SPI controller registering, both PWM chips registering, the microSD slot, the EXT_IO pin group still applied next to the carrier hog group, and both hogs holding their pins. Signed-off-by: Mehmet Fide Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/vf/Makefile | 2 + arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi | 126 ++++++++++++++++++ .../boot/dts/nxp/vf/vf500-colibri-iris.dts | 14 ++ .../boot/dts/nxp/vf/vf610-colibri-iris.dts | 14 ++ 4 files changed, 156 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts create mode 100644 arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts diff --git a/arch/arm/boot/dts/nxp/vf/Makefile b/arch/arm/boot/dts/nxp/vf/M= akefile index 0a4a7f9dd43e..47be8bc318e2 100644 --- a/arch/arm/boot/dts/nxp/vf/Makefile +++ b/arch/arm/boot/dts/nxp/vf/Makefile @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_SOC_VF610) +=3D \ vf500-colibri-eval-v3.dtb \ + vf500-colibri-iris.dtb \ vf610-bk4.dtb \ vf610-colibri-eval-v3.dtb \ + vf610-colibri-iris.dtb \ vf610m4-colibri.dtb \ vf610-cosmic.dtb \ vf610m4-cosmic.dtb \ diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi b/arch/arm/boot/= dts/nxp/vf/vf-colibri-iris.dtsi new file mode 100644 index 000000000000..36e34dd766ae --- /dev/null +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2026 Mehmet Fide + * + * Toradex Iris carrier board V1.1, common part for Colibri VF50 and VF61. + * + * The Colibri modules are pin compatible, so the carrier signals sit on t= he + * same SODIMM pins as they do for the i.MX modules, whose Iris device tre= es + * are already upstream. The two SODIMM pins below are taken from the Coli= bri + * VFxx datasheet (102 -> PTA12 -> PORT0[5], 104 -> PTD28 -> PORT2[2]). + * + * An Iris V2.0 carries the same signals on the same pins, so everything h= ere + * works on it as well. What it adds is a regulator on SODIMM 100 that can= cut + * power to the uSD slot, which this file does not describe. + */ + +/ { + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usbh1_reg>; + regulator-name =3D "VCC_USB[1-4]"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio2 19 GPIO_ACTIVE_LOW>; /* SODIMM 129, USBH_PEN */ + }; +}; + +&gpio0 { + /* + * The RS232 transceivers on the carrier are switched on by these two + * lines. Delete the hog to turn a transceiver off from userspace. + * The pin group belongs to the gpio controller rather than to iomuxc, + * which would depend on its own child and log a dependency cycle. + */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_iris_uart1_tx_on>; + + uart1-tx-on-hog { + gpio-hog; + gpios =3D <5 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; +}; + +&gpio2 { + pinctrl-names =3D "default"; + /* keep the EXT_IO group from vf-colibri.dtsi alongside ours */ + pinctrl-0 =3D <&pinctrl_gpio_ext>, <&pinctrl_iris_uart25_tx_on>; + + uart25-tx-on-hog { + gpio-hog; + gpios =3D <2 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +&iomuxc { + pinctrl_iris_uart1_tx_on: irisuart1txongrp { + fsl,pins =3D < + VF610_PAD_PTA12__GPIO_5 0x22ef + >; + }; + + pinctrl_iris_uart25_tx_on: irisuart25txongrp { + fsl,pins =3D < + VF610_PAD_PTD28__GPIO_66 0x22ef + >; + }; +}; + +/* Colibri SSP, on the extension connector */ +&dspi1 { + status =3D "okay"; +}; + +&esdhc1 { + status =3D "okay"; +}; + +&fec1 { + status =3D "okay"; +}; + +&pwm0 { + status =3D "okay"; +}; + +&pwm1 { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + /* M41T0M6 real time clock on the carrier */ + rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +&uart0 { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&usbdev0 { + status =3D "okay"; +}; + +&usbh1 { + vbus-supply =3D <®_usbh_vbus>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts b/arch/arm/boo= t/dts/nxp/vf/vf500-colibri-iris.dts new file mode 100644 index 000000000000..aa91537cab37 --- /dev/null +++ b/arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2026 Mehmet Fide + */ + +/dts-v1/; +#include "vf500-colibri.dtsi" +#include "vf-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri VF50 on Iris Carrier Board"; + compatible =3D "toradex,vf500-colibri-vf50-on-iris", "toradex,vf500-colib= ri_vf50", + "fsl,vf500"; +}; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts b/arch/arm/boo= t/dts/nxp/vf/vf610-colibri-iris.dts new file mode 100644 index 000000000000..7db5aa490966 --- /dev/null +++ b/arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2026 Mehmet Fide + */ + +/dts-v1/; +#include "vf610-colibri.dtsi" +#include "vf-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri VF61 on Iris Carrier Board"; + compatible =3D "toradex,vf610-colibri-vf61-on-iris", "toradex,vf610-colib= ri_vf61", + "fsl,vf610"; +}; --=20 2.54.0