From nobody Tue Sep 29 02:33:43 2026 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7666343D8A for ; Thu, 13 Aug 2026 03:03:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786590196; cv=none; b=VxC3XLLPewXl9gcQLKq/euW445MtdY7/eOUuN4ULNOUlAYAoqPlcaq27WpDeUR2sbQFrDl8Vw+BG7xZrki+0MifHkqRwIRwFYiQtOqGxMaJCACCt5X9uUFfsIKz/X8bmxOlMo/xhn14/rZHlH9UcX556t5j1m/sODPZGTZJBlXc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786590196; c=relaxed/simple; bh=S+Dk0LjP2FtBtdRYlhKcN5jnGUH3EuaODenKZWSMowc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XCQ4bwt89lVrNUpypLYJr5E4CyVhd6+hXlcl5LROqoRkKdZX3TRAJtwVPcrxOGJGPdBuWwO11Dt17fCsB4ZN24zJkddsscxoQNn+F3ohw9ZjB6bFQ3ZvGEYX2a8nDCpaMy7/vQUnYSrYTRnmenfiTebfyQNb+xQsFwzDZ8NXRg8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JBkU+mGp; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JBkU+mGp" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2cfbbdfa60bso16396585ad.3 for ; Wed, 12 Aug 2026 20:03:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1786590194; x=1787194994; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=h699JProhDKp3MIMt9nw4/C+o75sOR4hsWlNILLfWhs=; b=JBkU+mGpNislgQiCOSsO9xS4y3UexM0gyjFntM5NA6EUhHr3JeboX7VBedl+7EBag0 hFXDxsLR7qZU+lHlm95EunZxI9ivhb4sNE8RV2Ye2C7MDPspEDgIF74Ma3qBic0ytQGS wddMjgSe/NkDC5qgFRWo3DHZuM6WMAlkEv8NVRKRQJtisz2orKywwqtYQRqzMdEeE2IG s86C1+2KFNFg0/mKOCz40d2yJ/xSxyEotG67zD58fcYeFjIDCcJX7nJFiJ4/vyyyNVC2 EBgxFYNRlGNnf28TeWO+ff0akWx9dGZCeEk2CnZK1mlFIGJqlzlOVp7alJ1PwLFyzLXi 0GxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786590194; x=1787194994; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=h699JProhDKp3MIMt9nw4/C+o75sOR4hsWlNILLfWhs=; b=pejE/jSDZ7x5IZNQPLlWN91phJ8xAPoQLFMyszZICkmwa1k0H5MOfMKf5sbApbSkEn 0DzFq7knEpCKo5V1xpXOsIwR0t4XBZMgKi5CJMHVLm+3pmFy7lA2j4epmgK9YKCzlmIs Bw71ItB8qaN9MmxVelB8cSjnDwUzRxIb+6JSOvzY7KSkB65QqXAcNny/Bso4I9kPcFGQ eZB4HB0scG8vsSE6SkcZBQkRVsBa47M1e82ZUOXEh8CWbtoANAPuCzO/auAmPfDdO1h0 zl+wnt9xrB0pMNtP1LytDF5fVrzxdXQXFAW8Jb1dIyfbQ1AxrcQjthyL20OKYZ8V/Fq0 x8tg== X-Forwarded-Encrypted: i=1; AHgh+Rq0PLow78hQB1Kj+FLIcsVm1l+7aryv8TeIg9uPEyj0k3YDj8G85aAYDZAH3Byh4N4Y020njfUTRZ5Sxuo=@vger.kernel.org X-Gm-Message-State: AOJu0YxagjCPl0lJ5AIWm0CTTMR2I3CVQl0oPmGx2+/k59hTSWX1erJe 3wXCA4PfVZ88kjH3yORgTqjmtXqu8ukOyMbVX7zzfxSbRBEKpqcdjpxe X-Gm-Gg: AR+sD11ILCZTbfOsVkl/OT7vbBb7mWOyeX6ugbvEovYAUTKFd6MkQHpoANGRLCZjNAm gQvIk/u/XRzkFj8E9ACDpl1iFhEhOX0skaxa+yxWLXZ1Ze/f/qsphTV6a+S89McEbu3cIYbjcbB RhRBJDXf99yOVOpAaTy9dCYXtv/HukRqxgTeMfo52m91q53sf4NYBrmfZ6l08TvJLqvF0VaQpQ2 KAR9WwYlD0Mx9R54+h8+2q1XZt1hEMLcEZ9EGzXJ7Inh3CV55m6+yReNjlAIxQCeoSR8NDz20lW R0Tzyap+db/TmVuEkrKc4aqZppIJrujYFMlcpFwFtUUTEX7sEn5kzmh67YCGCMwgMCRddVsPPx8 qIIRazV2Exkr57yZ1c9GhstHt869Qe/Qjtqet2qzOTXh+N+y8UY0OmvGk+n9yMMEFKRamqPdA6y UpJyn38dvJbeFFQ6Ub4ZfjtcB4h/hYRD9j8QymyRK4z6R6DAIPsIs4nRxobW4QSIaGXReOjju8i gBJ1UPm49zmj6y15zbRjnW+rMZj X-Received: by 2002:a17:90b:4d08:b0:38e:9ef9:eb97 with SMTP id 98e67ed59e1d1-3931e2bc877mr2602933a91.16.1786590193920; Wed, 12 Aug 2026 20:03:13 -0700 (PDT) Received: from [127.0.1.1] (61-220-246-151.hinet-ip.hinet.net. [61.220.246.151]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3931d9dc198sm517931a91.1.2026.08.12.20.03.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 20:03:13 -0700 (PDT) From: Kyle Hsieh Date: Thu, 13 Aug 2026 11:06:02 +0800 Subject: [PATCH v5 1/2] dt-bindings: iio: adc: ti,ads112c04: Add binding for ADS112C04 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260813-ti-ads112c04-driver-v5-1-79dff9e249cd@gmail.com> References: <20260813-ti-ads112c04-driver-v5-0-79dff9e249cd@gmail.com> In-Reply-To: <20260813-ti-ads112c04-driver-v5-0-79dff9e249cd@gmail.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kyle Hsieh , Conor Dooley X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=5391; i=kylehsieh1995@gmail.com; h=from:subject:message-id; bh=S+Dk0LjP2FtBtdRYlhKcN5jnGUH3EuaODenKZWSMowc=; b=owGbwMvMwMW4tNlpO2fYkUbG02pJDFm1JvOX3lbbslH1lM0J8T3t0uc5Ga0XT2Ha8vJZq1vIB fWbDiu/dTIaszAwcjHIiimynJQ71pvyPOKn4bEV02EGsTKBTGHg4hSAiei0czBMDZdytC8RUd9n raZ8/d2b+/ZhacoZOnq2EUsPdeiKpPD2XbS0m+gczxlbbPjTKi7jxvZJxalavZbN/jEXTWzm/fB zVHRhO3lTQ+vabMnF2b36hio37OqrnoqsvP97q1lNQ9Tc/S9VE93b+kwlfThqVcS/FC3IajnNP7 Gz/hibePqqFB+NbF6j0LDS/cyP5zjs+pOeV/Kk7IEA8yM+K6UXRco5ghP11Wape3zZyTvp3tzSZ vYjPx2ldm15N7HgmXh5wD/OwB3KbslGsidW+IuqyDxT0z0Tfrfa9fi5zb/Ns2/OZa1lyviks/KF 6ZazNsutUuquMMofKjmt7HDKTDdk5p3DSzZs1d8Y47EaAA== X-Developer-Key: i=kylehsieh1995@gmail.com; a=openpgp; fpr=C91EC68D64E758F931C6A897A58342B70956C481 Add device tree binding documentation for Texas Instruments ADS112C04 I2C Analog-to-Digital Converters. These devices provide 4-channel, 16-bit delta-sigma ADCs with an I2C interface, programmable gain amplifier (PGA), and data-ready (DRDY) interrupt output. The binding uses child nodes to dynamically define the connected single-ended or differential channels. Excitation current, burn-out current, and reference source properties are also included to fully describe the chip's hardware capabilities, aligned with the ti,ads112c14 binding conventions. Reviewed-by: David Lechner Acked-by: Conor Dooley Signed-off-by: Kyle Hsieh --- .../devicetree/bindings/iio/adc/ti,ads112c04.yaml | 148 +++++++++++++++++= ++++ MAINTAINERS | 6 + 2 files changed, 154 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads112c04.yaml b/= Documentation/devicetree/bindings/iio/adc/ti,ads112c04.yaml new file mode 100644 index 000000000000..68a0df21cedd --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads112c04.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads112c04.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS112C04 ADC + +maintainers: + - Kyle Hsieh + +description: + The ADS112C04 (16-bit) are precision analog-to-digital converters (ADCs) + with an I2C interface. They feature a flexible input multiplexer, a + low-noise programmable gain amplifier (PGA), two programmable excitation + current sources, a voltage reference, and a precision temperature sensor. + +properties: + compatible: + enum: + - ti,ads112c04 + + reg: + maxItems: 1 + description: I2C address of the device. + + interrupts: + maxItems: 1 + description: Data ready (DRDY) interrupt output. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reset-gpios: + maxItems: 1 + description: GPIO connected to the RESET pin. Active low. + + avdd-supply: true + dvdd-supply: true + + refp-supply: true + refn-supply: true + + ti,refp-refn-resistor-ohms: + description: Resistance of the external resistor between REFP and REFN. + +patternProperties: + "^channel@[0-9a-b]$": + $ref: adc.yaml + unevaluatedProperties: false + properties: + reg: + items: + - maximum: 11 + + single-channel: + maximum: 3 + + diff-channels: + items: + maximum: 3 + + excitation-channels: + maxItems: 2 + items: + maximum: 5 + description: + Additionally to AIN0-AIN3, IDAC1/IDAC2 can also be routed to + REFP0 (4) and REFN0 (5). + + excitation-current-nanoamp: + items: + - enum: [10000, 50000, 100000, 250000, 500000, 1000000, 1500000] + + burn-out-current-nanoamp: + items: + - const: 10000 + + reference-sources: + items: + - enum: [internal, external, avdd] + default: internal + + dependencies: + excitation-channels: [ excitation-current-nanoamp ] + excitation-current-nanoamp: [ excitation-channels ] + + oneOf: + - required: [ single-channel ] + - required: [ diff-channels ] + +required: + - compatible + - reg + - avdd-supply + - dvdd-supply + +dependencies: + refn-supply: [ refp-supply ] + +oneOf: + - required: + - refp-supply + - required: + - ti,refp-refn-resistor-ohms + - properties: + refp-supply: false + refn-supply: false + ti,refp-refn-resistor-ohms: false + +unevaluatedProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@40 { + compatible =3D "ti,ads112c04"; + reg =3D <0x40>; + interrupt-parent =3D <&gpio>; + interrupts =3D <12 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios =3D <&gpio 13 GPIO_ACTIVE_LOW>; + avdd-supply =3D <&vdd_3v3_reg>; + dvdd-supply =3D <&vdd_3v3_reg>; + refp-supply =3D <&vref_reg>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + channel@0 { + reg =3D <0>; + diff-channels =3D <0>, <1>; + }; + + channel@1 { + reg =3D <1>; + single-channel =3D <2>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 04fa5322d9f7..417d74b6d6cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26987,6 +26987,12 @@ S: Maintained F: Documentation/devicetree/bindings/iio/adc/ti,ads1119.yaml F: drivers/iio/adc/ti-ads1119.c =20 +TI ADS112C04 ADC DRIVER +M: Kyle Hsieh +L: linux-iio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/iio/adc/ti,ads112c04.yaml + TI ADS112C14 ADC DRIVER M: David Lechner L: linux-iio@vger.kernel.org --=20 2.34.1 From nobody Tue Sep 29 02:33:43 2026 Received: from mail-pj1-f44.google.com (mail-pj1-f44.google.com [209.85.216.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9EB633F8B4 for ; Thu, 13 Aug 2026 03:03:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786590200; cv=none; b=RqI+2F12PFDIWPmW/FC8J+FceMLNWsUuN+Fy+YQ05z3OQXXHf6++Am4VsY6xvY8jlTT6wdCoY4sjgX6ITp1/clkcDQPxl5ux13C3tJsgBa3CZpm3RAM6n69plWb1SSZ6XeBdkMO9KYFX0nYv++BDqui7ZMTyqVyYc3YXTodkuG4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786590200; c=relaxed/simple; bh=ZxDACZevbQmyx+XQ6TNQ8pnT7JsJGgLrwf8GXfgXyjQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=h/oWzdk9WwZFfXeIlJu0kOXkP1vOqgrS/YC6up1ZGeoQvze2ZMYheOsm9Cy5htxUt9AjKck9eYq3AzMbvP2DV0v/9CzzxNRTyDuEjsWnNtlUl4ieLrPEFgq6s+ZPilPVUTrBJqSsEToTa68csmT8F/0GxwTZvD/ZvfzSLVrrrR8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=B7rkEroG; arc=none smtp.client-ip=209.85.216.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="B7rkEroG" Received: by mail-pj1-f44.google.com with SMTP id 98e67ed59e1d1-383cb94f742so344940a91.3 for ; Wed, 12 Aug 2026 20:03:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1786590198; x=1787194998; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=wRMhuT9kXtoo1tyO+kVs4jxFusRjIH+TeupB6ThpU9k=; b=B7rkEroGiO3Iu7MlaF6vCEO+BKXXZXq4S+YKWCmf39NlZTSXA4U5SfzQDi2Yih7eHU Yi5vVnkzoAvjJRHCWmEVxOFhOIKUHN61HcfK6BbGdjzr0NnvRnUyc2W6XI6wHWMiukqP CPULNGpMHKi1OiGqTD5YdmKrHEBmNUUeBWnj+9J6Jmd7ZJjDZX7E24qyZqqi4+WHg0Ab tGZ38kCY7l8ttKQ+070Q/MlsQ3OklKOeM9PzFLuc9ID4hL0MSkRZD/4277uMWyWgMUUu v4zwDwzY7k5+qONkXmjEPO9Xz5yAeuCtkOu1mZYy1+OOuKle2BnVAkn/kL3p2fqXiZJ9 /V2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786590198; x=1787194998; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=wRMhuT9kXtoo1tyO+kVs4jxFusRjIH+TeupB6ThpU9k=; b=iYtvNUrNpT1o/iXhOCgnE+2+ZRJ2sRQAVX4kptqfjr4cS/JBCRu4BIy7RqMFTfVsyN pl9G4OC9Gt6j9iZvebY//Fk+SoP4LyanFst/DWrgipkWHpxbOYzTEs4KlpV9slNtyT9b yNBit8zOzCvSulVTCZ1n+bmONsF7FBEvY6EPU98m8q+1frdfXS5mV4QozpXU7OFqhAkH 9s+oJ/8Iz2r37c75nLNxjLhIfqGoD0gHTxOo/yZYtPv/5Gal+rC+U19GEpv4G+ufXlKF le2M2LmVKi1CmF/bIWqTO/58br1cGwjmzS62IGTvrSJadh/4KVK2bdu70Q4zJBOdJXhI fWoA== X-Forwarded-Encrypted: i=1; AHgh+RqnLgUwyxO3Ai+RqFettnVihb9pFMDGtRpL634Zuy7Fs48/3ydZHdGkXe5uZxbkpKrPmaB395kodpM9HyE=@vger.kernel.org X-Gm-Message-State: AOJu0YyoqRIPLVXwvtgjLrfwOahETWMiEPGUmyEcO5AIzQ9GKFid3CgG nCp4k7e7Tpfq6a/X3GQx7B7SHwRJ9pvuvefgw60hbEBDK02rETcfsdMX X-Gm-Gg: AR+sD12xgIOiBa5TrCh43TmrkhqfCh9bFE6FrJNfE1eY++Zm5TitZb7XDS4kGNDzD5W e+NJBVmTtHK2O+EtvV/DHs7ho/4pYb9X8vx4MadBAbsSufKZi+zikjZVQ0lEW/g61Tar/dhpMAO uYbhQ0ZUBah1cuNRSHt+BFMYh7CpcDU+ag3xCtU8/+SdygZUwstrAOSWDMZdS0B9ayNlic8B1tY SBoW+897e4m8VdZtCoGO+sq9J6Di6YuxvSp8O0ahtw4evk+qOI5Z0BPE1+9N+mFSr/q+mrbt06s NC1+PUdZWYBki++V09NQlm1Zz+m4CGlqsvpUC189ZOckgxLlw8EBN5hVPUoAu+6IH9Oidvpd6dx YKWa6htpop94GelNu1khBko4wEwYtl+GGrZJ404J76cXaXD7OmOmW6QCc6CkDZchaau4xqI55eF lEOUj8ROSYWKOioZl7x4r4xO3Gl9KSYcS4rIvPYvyraecbGdWwiYnsbyAKUW0ryNagHjpM6UJcr QeWU0f2VreklX21VuX8CladBz5V X-Received: by 2002:a17:90b:57c6:b0:390:b41a:b92a with SMTP id 98e67ed59e1d1-3931dfe3decmr3272240a91.4.1786590197884; Wed, 12 Aug 2026 20:03:17 -0700 (PDT) Received: from [127.0.1.1] (61-220-246-151.hinet-ip.hinet.net. [61.220.246.151]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3931d9dc198sm517931a91.1.2026.08.12.20.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 20:03:17 -0700 (PDT) From: Kyle Hsieh Date: Thu, 13 Aug 2026 11:06:03 +0800 Subject: [PATCH v5 2/2] iio: adc: ti-ads112c04: Add support for TI ADS112C04 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260813-ti-ads112c04-driver-v5-2-79dff9e249cd@gmail.com> References: <20260813-ti-ads112c04-driver-v5-0-79dff9e249cd@gmail.com> In-Reply-To: <20260813-ti-ads112c04-driver-v5-0-79dff9e249cd@gmail.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kyle Hsieh X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=18217; i=kylehsieh1995@gmail.com; h=from:subject:message-id; bh=ZxDACZevbQmyx+XQ6TNQ8pnT7JsJGgLrwf8GXfgXyjQ=; b=owEBbQGS/pANAwAKAaWDQrcJVsSBAcsmYgBqfTSgDchcrBM3FukP2HbUamE2VAshmtDbYPxPc jTy4tU7m2CJATMEAAEKAB0WIQTJHsaNZOdY+THGqJelg0K3CVbEgQUCan00oAAKCRClg0K3CVbE gegiB/9ufqbf2D2hPMSmF8QQJuZM1jIxRXc4S6eSysXJFTDVnOyzyegr3HiKKT7RY805iuNmus1 UKc3Uxp1xIdlROQxRiJAjX66ereSmSWhraX+6lsngEjRwVrJOwe5WOoQlKFmjxnIKTLaChqv8dK qYDTaNDMBO/Ox7xmwWqM9iDJbw196gjSRWVPrhNOpNJ6Rpy/ZOICGtu/kOTTwdBeJXOSVeI5KWr Xb2XPHyi3DqAs/o54wIH6ins/pIul3d4f9dP2HOFlva2zO33ZZlgB7vCsyD3fqUrj0Axft1Pzgy m/so+15Vo1UBQjEAEBcPT4qBxmVsG8lSMwnMJ45GuNdcUjDG X-Developer-Key: i=kylehsieh1995@gmail.com; a=openpgp; fpr=C91EC68D64E758F931C6A897A58342B70956C481 Add IIO driver support for the Texas Instruments ADS112C04 (16-bit) delta-sigma ADCs. The driver implements: - Single-shot conversions using the IIO raw read interface. - Dynamic parsing of single-ended and differential channels from device tree child nodes. - Hardware interrupt support via the DRDY pin, falling back to software polling if no IRQ is provided. - Per-channel reference source selection (internal 2.048V, external REFP/REFN, or AVDD) via the reference-sources device tree property. refn-supply is not yet supported. - Hardware reset via the reset controller framework, falling back to the RESET command when no reset controller is present. Signed-off-by: Kyle Hsieh --- MAINTAINERS | 1 + drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ti-ads112c04.c | 525 +++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 537 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 417d74b6d6cc..f51fbda9d4b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26992,6 +26992,7 @@ M: Kyle Hsieh L: linux-iio@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/iio/adc/ti,ads112c04.yaml +F: drivers/iio/adc/ti-ads112c04.c =20 TI ADS112C14 ADC DRIVER M: David Lechner diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 990e7b3e7212..037fc7df8415 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1817,6 +1817,16 @@ config TI_ADS1119 This driver can also be built as a module. If so, the module will= be called ti-ads1119. =20 +config TI_ADS112C04 + tristate "Texas Instruments ADS112C04 ADC" + depends on I2C + help + If you say yes here you get support for Texas Instruments + ADS112C04 (16-bit) I2C analog to digital converters. + + This driver can also be built as a module. If so, the module will be + called ti-ads112c04. + config TI_ADS112C14 tristate "Texas Instruments ADS112C14/ADS122C14" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index dcec0abb03b7..d8acf2831fd2 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -155,6 +155,7 @@ obj-$(CONFIG_TI_ADS1015) +=3D ti-ads1015.o obj-$(CONFIG_TI_ADS1018) +=3D ti-ads1018.o obj-$(CONFIG_TI_ADS1100) +=3D ti-ads1100.o obj-$(CONFIG_TI_ADS1119) +=3D ti-ads1119.o +obj-$(CONFIG_TI_ADS112C04) +=3D ti-ads112c04.o obj-$(CONFIG_TI_ADS112C14) +=3D ti-ads112c14.o obj-$(CONFIG_TI_ADS124S08) +=3D ti-ads124s08.o obj-$(CONFIG_TI_ADS1298) +=3D ti-ads1298.o diff --git a/drivers/iio/adc/ti-ads112c04.c b/drivers/iio/adc/ti-ads112c04.c new file mode 100644 index 000000000000..c2995e94c4f8 --- /dev/null +++ b/drivers/iio/adc/ti-ads112c04.c @@ -0,0 +1,525 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Texas Instruments ADS112C04 16-bit I2C ADC driver + * + * Copyright (c) 2026 Kyle Hsieh + * + * Datasheet: https://www.ti.com/lit/ds/symlink/ads112c04.pdf + * Based on TI Reference Code and standard Linux IIO framework. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define ADS112C04_CMD_RESET 0x06 +#define ADS112C04_CMD_START_SYNC 0x08 +#define ADS112C04_CMD_RDATA 0x10 +#define ADS112C04_CMD_RREG(reg) (0x20 | ((reg) << 2)) +#define ADS112C04_CMD_WREG(reg) (0x40 | ((reg) << 2)) + +#define ADS112C04_REG_CONFIG0 0x00 +#define ADS112C04_CONF0_MUX GENMASK(7, 4) +#define ADS112C04_CONF0_MUX_AIN0_AIN1 0 +#define ADS112C04_CONF0_MUX_AIN_SINGLE_BASE 8 +#define ADS112C04_CONF0_GAIN GENMASK(3, 1) +#define ADS112C04_CONF0_GAIN_X1 0 +#define ADS112C04_CONF0_PGA_BYPASS BIT(0) + +#define ADS112C04_REG_CONFIG1 0x01 +#define ADS112C04_CONF1_DR GENMASK(7, 5) +#define ADS112C04_CONF1_DR_20SPS 0 +#define ADS112C04_CONF1_MODE BIT(4) +#define ADS112C04_CONF1_MODE_NORMAL 0 +#define ADS112C04_CONF1_CM BIT(3) +#define ADS112C04_CONF1_CM_SINGLE_SHOT 0 +#define ADS112C04_CONF1_VREF GENMASK(2, 1) +#define ADS112C04_CONF1_VREF_INTERNAL 0 +#define ADS112C04_CONF1_VREF_EXTERNAL 1 +#define ADS112C04_CONF1_VREF_AVDD 2 +#define ADS112C04_CONF1_TS BIT(0) +#define ADS112C04_CONF1_TS_DISABLED 0 + +#define ADS112C04_REG_CONFIG2 0x02 +#define ADS112C04_CONF2_DRDY BIT(7) + +#define ADS112C04_INT_REF_mV 2048 + +#define ADS112C04_MAX_CHANNELS 12 + +enum { + ADS112C04_VREF_SOURCE_INTERNAL, + ADS112C04_VREF_SOURCE_EXTERNAL, + ADS112C04_VREF_SOURCE_AVDD, +}; + +static const char * const ads112c04_vref_names[] =3D { + [ADS112C04_VREF_SOURCE_INTERNAL] =3D "internal", + [ADS112C04_VREF_SOURCE_EXTERNAL] =3D "external", + [ADS112C04_VREF_SOURCE_AVDD] =3D "avdd", +}; + +static const u8 ads112c04_vref_reg_val[] =3D { + [ADS112C04_VREF_SOURCE_INTERNAL] =3D ADS112C04_CONF1_VREF_INTERNAL, + [ADS112C04_VREF_SOURCE_EXTERNAL] =3D ADS112C04_CONF1_VREF_EXTERNAL, + [ADS112C04_VREF_SOURCE_AVDD] =3D ADS112C04_CONF1_VREF_AVDD, +}; + +/* Indexed by [AINP][AINN], -1 means the combination is not available. */ +static const s8 ads112c04_diff_mux[4][4] =3D { + { -1, 0, 1, 2 }, + { 3, -1, 4, 5 }, + { -1, -1, -1, 6 }, + { -1, -1, 7, -1 }, +}; + +struct ads112c04_state { + struct i2c_client *client; + /* Protects concurrent ADC reads and device configuration */ + struct mutex lock; + struct completion completion; + u32 avdd_mV; + u32 ext_ref_mV; + u8 *vref_source; /* one entry per channel, indexed by scan order */ + u8 config0; + u8 config1; +}; + +static int ads112c04_write_cmd(struct i2c_client *client, u8 cmd) +{ + return i2c_smbus_write_byte(client, cmd); +} + +static int ads112c04_read_reg(struct i2c_client *client, u8 reg, u8 *val) +{ + int ret; + + ret =3D i2c_smbus_read_byte_data(client, ADS112C04_CMD_RREG(reg)); + if (ret < 0) + return ret; + + *val =3D ret; + + return 0; +} + +static int ads112c04_write_reg(struct i2c_client *client, u8 reg, u8 val) +{ + return i2c_smbus_write_byte_data(client, ADS112C04_CMD_WREG(reg), val); +} + +static int ads112c04_wait_for_data(struct ads112c04_state *st) +{ + int ret, err; + u8 val; + + if (st->client->irq > 0) { + /* Timeout is 100ms (slowest data rate is 20 SPS) */ + if (!wait_for_completion_timeout(&st->completion, msecs_to_jiffies(100))) + return -ETIMEDOUT; + + return 0; + } + + ret =3D read_poll_timeout(ads112c04_read_reg, err, + (err < 0 || (val & ADS112C04_CONF2_DRDY)), + 1 * USEC_PER_MSEC, 100 * USEC_PER_MSEC, false, + st->client, ADS112C04_REG_CONFIG2, &val); + if (err < 0) + return err; + + return ret; +} + +static int ads112c04_read_data(struct ads112c04_state *st, int *val) +{ + int ret; + + ret =3D i2c_smbus_read_word_swapped(st->client, ADS112C04_CMD_RDATA); + if (ret < 0) + return ret; + + *val =3D sign_extend32(ret, 15); + + return 0; +} + +static int ads112c04_get_adc_result(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val) +{ + struct ads112c04_state *st =3D iio_priv(indio_dev); + unsigned int idx =3D chan - indio_dev->channels; + u8 new_config0, new_config1; + int ret; + + new_config0 =3D st->config0; + FIELD_MODIFY(ADS112C04_CONF0_MUX, &new_config0, chan->address); + + if (st->config0 !=3D new_config0) { + ret =3D ads112c04_write_reg(st->client, ADS112C04_REG_CONFIG0, + new_config0); + if (ret < 0) + return ret; + + st->config0 =3D new_config0; + } + + new_config1 =3D st->config1; + FIELD_MODIFY(ADS112C04_CONF1_VREF, &new_config1, + ads112c04_vref_reg_val[st->vref_source[idx]]); + + if (st->config1 !=3D new_config1) { + ret =3D ads112c04_write_reg(st->client, ADS112C04_REG_CONFIG1, + new_config1); + if (ret < 0) + return ret; + + st->config1 =3D new_config1; + } + + reinit_completion(&st->completion); + + ret =3D ads112c04_write_cmd(st->client, ADS112C04_CMD_START_SYNC); + if (ret < 0) + return ret; + + ret =3D ads112c04_wait_for_data(st); + if (ret < 0) + return ret; + + return ads112c04_read_data(st, val); +} + +static int ads112c04_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct ads112c04_state *st =3D iio_priv(indio_dev); + unsigned int idx =3D chan - indio_dev->channels; + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&st->lock); + ret =3D ads112c04_get_adc_result(indio_dev, chan, val); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + return IIO_VAL_INT; + + case IIO_CHAN_INFO_SCALE: + switch (st->vref_source[idx]) { + case ADS112C04_VREF_SOURCE_EXTERNAL: + *val =3D st->ext_ref_mV; + break; + case ADS112C04_VREF_SOURCE_AVDD: + *val =3D st->avdd_mV; + break; + default: + *val =3D ADS112C04_INT_REF_mV; + break; + } + *val2 =3D 15; + return IIO_VAL_FRACTIONAL_LOG2; + + default: + return -EINVAL; + } +} + +static irqreturn_t ads112c04_irq_handler(int irq, void *private) +{ + struct iio_dev *indio_dev =3D private; + struct ads112c04_state *st =3D iio_priv(indio_dev); + + complete(&st->completion); + + return IRQ_HANDLED; +} + +static const struct iio_info ads112c04_info =3D { + .read_raw =3D ads112c04_read_raw, +}; + +static int ads112c04_parse_vref_source(struct fwnode_handle *child) +{ + if (!fwnode_property_present(child, "reference-sources")) + return ADS112C04_VREF_SOURCE_INTERNAL; + + return fwnode_property_match_property_string(child, "reference-sources", + ads112c04_vref_names, + ARRAY_SIZE(ads112c04_vref_names)); +} + +static int ads112c04_parse_channels(struct iio_dev *indio_dev, + bool *need_avdd_ref, bool *need_ext_ref) +{ + struct device *dev =3D indio_dev->dev.parent; + struct ads112c04_state *st =3D iio_priv(indio_dev); + struct iio_chan_spec *channels; + u32 num_channels, pair[2], channel; + unsigned int i; + int ret; + + num_channels =3D device_get_named_child_node_count(dev, "channel"); + if (!num_channels) + return dev_err_probe(dev, -EINVAL, "no channel subnodes found\n"); + + if (num_channels > ADS112C04_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, + "num of channel nodes exceeds %d\n", + ADS112C04_MAX_CHANNELS); + + channels =3D devm_kcalloc(dev, num_channels, sizeof(*channels), GFP_KERNE= L); + if (!channels) + return -ENOMEM; + + st->vref_source =3D devm_kcalloc(dev, num_channels, + sizeof(*st->vref_source), GFP_KERNEL); + if (!st->vref_source) + return -ENOMEM; + + i =3D 0; + device_for_each_named_child_node_scoped(dev, child, "channel") { + struct iio_chan_spec *spec =3D &channels[i]; + + if (fwnode_property_present(child, "excitation-channels")) + return dev_err_probe(dev, -EOPNOTSUPP, + "excitation-channels is not supported yet\n"); + + st->vref_source[i] =3D ADS112C04_VREF_SOURCE_INTERNAL; + + if (fwnode_property_present(child, "reference-sources")) { + ret =3D ads112c04_parse_vref_source(child); + if (ret < 0) + return dev_err_probe(dev, ret, + "invalid reference-sources value\n"); + + st->vref_source[i] =3D ret; + } + + if (st->vref_source[i] =3D=3D ADS112C04_VREF_SOURCE_EXTERNAL) + *need_ext_ref =3D true; + if (st->vref_source[i] =3D=3D ADS112C04_VREF_SOURCE_AVDD) + *need_avdd_ref =3D true; + + /* + * REVISIT: when ti,refp-refn-resistor-ohms is implemented, a + * channel using an external resistor reference is effectively + * a resistance measurement and should use IIO_RESISTANCE. + */ + spec->type =3D IIO_VOLTAGE; + spec->indexed =3D 1; + spec->info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_= SCALE); + + if (fwnode_property_present(child, "single-channel")) { + ret =3D fwnode_property_read_u32(child, "single-channel", &channel); + if (ret) + return dev_err_probe(dev, ret, + "failed to read single-channel property\n"); + + if (channel > 3) + return dev_err_probe(dev, -EINVAL, + "single-channel must be 0-3\n"); + + spec->channel =3D channel; + spec->address =3D ADS112C04_CONF0_MUX_AIN_SINGLE_BASE + channel; + } else if (fwnode_property_present(child, "diff-channels")) { + ret =3D fwnode_property_read_u32_array(child, "diff-channels", + pair, ARRAY_SIZE(pair)); + if (ret) + return dev_err_probe(dev, ret, + "failed to read diff-channels property\n"); + + if (pair[0] > 3 || pair[1] > 3) + return dev_err_probe(dev, -EINVAL, + "diff-channels must be 0-3\n"); + + spec->channel =3D pair[0]; + spec->channel2 =3D pair[1]; + spec->differential =3D 1; + + if (ads112c04_diff_mux[pair[0]][pair[1]] < 0) + return dev_err_probe(dev, -EINVAL, + "invalid diff-channels combination\n"); + + spec->address =3D ads112c04_diff_mux[pair[0]][pair[1]]; + } else { + return dev_err_probe(dev, -EINVAL, + "channel node must have single-channel or diff-channels\n"); + } + + i++; + } + + indio_dev->channels =3D channels; + indio_dev->num_channels =3D i; + + return 0; +} + +static int ads112c04_probe(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + struct iio_dev *indio_dev; + struct ads112c04_state *st; + struct reset_control *reset; + bool need_avdd_ref =3D false, need_ext_ref =3D false; + int ret; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st =3D iio_priv(indio_dev); + st->client =3D client; + + ret =3D devm_mutex_init(dev, &st->lock); + if (ret) + return ret; + + init_completion(&st->completion); + + indio_dev->name =3D "ads112c04"; + indio_dev->modes =3D INDIO_DIRECT_MODE; + indio_dev->info =3D &ads112c04_info; + + /* Forward compatibility checks for unimplemented DT properties */ + if (device_property_present(dev, "refn-supply") || + device_property_present(dev, "ti,refp-refn-resistor-ohms")) + return dev_err_probe(dev, -EOPNOTSUPP, + "refn-supply and external resistors are not supported yet\n"); + + ret =3D ads112c04_parse_channels(indio_dev, &need_avdd_ref, &need_ext_ref= ); + if (ret) + return ret; + + if (need_avdd_ref) { + ret =3D devm_regulator_get_enable_read_voltage(dev, "avdd"); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get avdd voltage\n"); + + st->avdd_mV =3D ret / (MICRO / MILLI); + } else { + ret =3D devm_regulator_get_enable(dev, "avdd"); + if (ret) + return dev_err_probe(dev, ret, "failed to get avdd regulator\n"); + } + + ret =3D devm_regulator_get_enable(dev, "dvdd"); + if (ret) + return dev_err_probe(dev, ret, "failed to get dvdd regulator\n"); + + if (device_property_present(dev, "refp-supply")) { + ret =3D devm_regulator_get_enable_read_voltage(dev, "refp"); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get refp voltage\n"); + + st->ext_ref_mV =3D ret / (MICRO / MILLI); + } + + if (need_ext_ref && !st->ext_ref_mV) + return dev_err_probe(dev, -EINVAL, + "external reference measurements require refp-supply\n"); + + /* Datasheet: POR releases ~500us after supplies are stable */ + fsleep(500); + + reset =3D devm_reset_control_get_optional_exclusive(dev, NULL); + if (IS_ERR(reset)) + return dev_err_probe(dev, PTR_ERR(reset), "failed to get reset\n"); + + if (reset) { + ret =3D reset_control_reset(reset); + if (ret) + return dev_err_probe(dev, ret, "failed to reset device\n"); + } else { + ret =3D ads112c04_write_cmd(client, ADS112C04_CMD_RESET); + if (ret < 0) + return ret; + } + + fsleep(1 * USEC_PER_MSEC); + + /* + * Initialize CONFIG0 with all fields explicit: gain of 1 with the PGA + * bypassed, which allows full-scale single-ended measurements. The MUX + * field is updated per channel before each conversion. + */ + st->config0 =3D FIELD_PREP(ADS112C04_CONF0_MUX, + ADS112C04_CONF0_MUX_AIN0_AIN1) | + FIELD_PREP(ADS112C04_CONF0_GAIN, + ADS112C04_CONF0_GAIN_X1) | + ADS112C04_CONF0_PGA_BYPASS; + + ret =3D ads112c04_write_reg(client, ADS112C04_REG_CONFIG0, st->config0); + if (ret) + return ret; + + st->config1 =3D FIELD_PREP(ADS112C04_CONF1_DR, + ADS112C04_CONF1_DR_20SPS) | + FIELD_PREP(ADS112C04_CONF1_MODE, + ADS112C04_CONF1_MODE_NORMAL) | + FIELD_PREP(ADS112C04_CONF1_CM, + ADS112C04_CONF1_CM_SINGLE_SHOT) | + FIELD_PREP(ADS112C04_CONF1_VREF, + ADS112C04_CONF1_VREF_INTERNAL) | + FIELD_PREP(ADS112C04_CONF1_TS, + ADS112C04_CONF1_TS_DISABLED); + + ret =3D ads112c04_write_reg(client, ADS112C04_REG_CONFIG1, st->config1); + if (ret) + return ret; + + if (client->irq > 0) { + ret =3D devm_request_irq(dev, client->irq, ads112c04_irq_handler, 0, + indio_dev->name, indio_dev); + if (ret) + return ret; + } + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct i2c_device_id ads112c04_id[] =3D { + { .name =3D "ads112c04" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ads112c04_id); + +static const struct of_device_id ads112c04_of_match[] =3D { + { .compatible =3D "ti,ads112c04" }, + { } +}; +MODULE_DEVICE_TABLE(of, ads112c04_of_match); + +static struct i2c_driver ads112c04_driver =3D { + .driver =3D { + .name =3D "ads112c04", + .of_match_table =3D ads112c04_of_match, + }, + .probe =3D ads112c04_probe, + .id_table =3D ads112c04_id, +}; +module_i2c_driver(ads112c04_driver); + +MODULE_AUTHOR("Kyle Hsieh "); +MODULE_DESCRIPTION("Texas Instruments ADS112C04 ADC driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1