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Wed, 12 Aug 2026 07:19:45 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Liam Girdwood , Mark Brown , Philipp Zabel Cc: Biju Das , linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH v7 1/9] regulator: renesas-usb-vbus-regulator: Rename platform device to rzg2l-vbus-regulator Date: Wed, 12 Aug 2026 15:19:19 +0100 Message-ID: <20260812141940.246223-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> References: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Rename the platform device name from "rzg2l-usb-vbus-regulator" to "rzg2l-vbus-regulator" so that it fits within the platform device ID table's name size restriction, allowing the driver to be converted to use ID table based matching (struct platform_device_id) instead of matching purely on driver name string. Update both the driver name in the regulator driver and the matching platform_device_alloc() call in reset-rzg2l-usbphy-ctrl.c to keep the two in sync. Signed-off-by: Biju Das Acked-by: Mark Brown --- v6->v7: * No change. v6: * New patch --- drivers/regulator/renesas-usb-vbus-regulator.c | 2 +- drivers/reset/reset-rzg2l-usbphy-ctrl.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/renesas-usb-vbus-regulator.c b/drivers/regul= ator/renesas-usb-vbus-regulator.c index 9ba791bd72ec..22fcf0d10c85 100644 --- a/drivers/regulator/renesas-usb-vbus-regulator.c +++ b/drivers/regulator/renesas-usb-vbus-regulator.c @@ -58,7 +58,7 @@ static int rzg2l_usb_vbus_regulator_probe(struct platform= _device *pdev) static struct platform_driver rzg2l_usb_vbus_regulator_driver =3D { .probe =3D rzg2l_usb_vbus_regulator_probe, .driver =3D { - .name =3D "rzg2l-usb-vbus-regulator", + .name =3D "rzg2l-vbus-regulator", .probe_type =3D PROBE_PREFER_ASYNCHRONOUS, }, }; diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-= rzg2l-usbphy-ctrl.c index f003b360629c..f90fdb7e6ea4 100644 --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -241,7 +241,7 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_devi= ce *pdev) if (error) goto err_pm_runtime_put; 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Wed, 12 Aug 2026 07:19:47 -0700 (PDT) Received: from localhost.localdomain ([2a00:23c4:a702:d301:94c0:1825:d248:50ae]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4997ad78f2fsm47352235e9.1.2026.08.12.07.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 07:19:46 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Biju Das , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v7 2/9] dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3L support Date: Wed, 12 Aug 2026 15:19:20 +0100 Message-ID: <20260812141940.246223-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> References: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Document Renesas RZ/G3L (r9a08g046) USB PHY controller bindings. The RZ/G3L USB PHY block is similar to RZ/G3S but differs in that each port has its own OTG controller, whereas RZ/G3S only has one on port 1. To reflect this, RZ/G3L uses a regulators sub-node with per-port vbus0 and vbus1 entries instead of the single regulator-vbus property used by other compatible SoCs. Signed-off-by: Biju Das Reviewed-by: Krzysztof Kozlowski --- v6->v7: * Added additionalProperties: false in regulators node. v5->v6: * No change. v4->v5: * Dropped renesas,sysc-pwrrdy for RZ/G3L as pwrrdy signal is modelled as power sequence. * Dropped the tag from Conor due to above change . v3->v4: * No change. v2->v3: * Replaced items->enum * Collected tag. v1->v2: * Updated commit description. * Added enum instead of const in the compatible section. * Dropped regulator1-vbus and added a regulators group node. * Updated schema check. --- .../reset/renesas,rzg2l-usbphy-ctrl.yaml | 41 ++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-c= trl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctr= l.yaml index c83469a1b379..75e034fa7ce7 100644 --- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml +++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml @@ -23,6 +23,7 @@ properties: - renesas,r9a07g054-usbphy-ctrl # RZ/V2L - const: renesas,rzg2l-usbphy-ctrl - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S + - const: renesas,r9a08g046-usbphy-ctrl # RZ/G3L =20 reg: maxItems: 1 @@ -50,6 +51,29 @@ properties: $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false =20 + regulators: + type: object + additionalProperties: false + description: + list of vbus regulators provided by this controller. + + properties: + vbus0: + type: object + description: Port 1 USB VBUS regulator + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + vbus1: + type: object + description: Port 2 USB VBUS regulator + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + required: + - vbus0 + - vbus1 + renesas,sysc-pwrrdy: description: The system controller PWRRDY indicates to the USB PHY if the power s= upply @@ -71,7 +95,6 @@ required: - resets - power-domains - '#reset-cells' - - regulator-vbus =20 allOf: - if: @@ -86,6 +109,22 @@ allOf: properties: renesas,sysc-pwrrdy: false =20 + - if: + properties: + compatible: + contains: + const: renesas,r9a08g046-usbphy-ctrl + then: + properties: + regulator-vbus: false + required: + - regulators + else: + properties: + regulators: false + required: + - regulator-vbus + additionalProperties: false =20 examples: --=20 2.43.0 From nobody Wed Sep 30 05:01:34 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D58F45BD4B for ; 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charset="utf-8" From: Biju Das Replace the integer flag RZG2L_USBPHY_CTRL_PWRRDY with a structured rzg2l_usbphy_ctrl_info type to hold per-compatible configuration data. The new struct currently carries a pwrrdy boolean. The probe function now retrieves this struct via device_get_match_data() and conditionally calls rzg2l_usbphy_ctrl_pwrrdy_init() based on the pwrrdy flag, removing the previous integer cast approach. This refactoring prepares the driver for RZ/G3L (r9a08g046) support, which requires a different regulator configuration with two per-port VBUS regulators. Signed-off-by: Biju Das --- v6->v7: * No change. v5->v6: * No change. v4->v5: * No change. v3->v4: * Updated the commit description. * Moved the handling of regulator_driver_name to patch #3 in preparation for id_table match. v2->v3: * No change. v1->v2: * Updated commit description. --- drivers/reset/reset-rzg2l-usbphy-ctrl.c | 32 ++++++++++++++----------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-= rzg2l-usbphy-ctrl.c index f90fdb7e6ea4..79503f6f4b23 100644 --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -41,6 +41,10 @@ struct rzg2l_usbphy_ctrl_priv { spinlock_t lock; }; =20 +struct rzg2l_usbphy_ctrl_info { + bool pwrrdy; +}; + #define rcdev_to_priv(x) container_of(x, struct rzg2l_usbphy_ctrl_priv, rc= dev) =20 static int rzg2l_usbphy_ctrl_assert(struct reset_controller_dev *rcdev, @@ -106,14 +110,15 @@ static void rzg2l_usbphy_ctrl_init(struct rzg2l_usbph= y_ctrl_priv *priv) spin_unlock_irqrestore(&priv->lock, flags); } =20 -#define RZG2L_USBPHY_CTRL_PWRRDY 1 +static const struct rzg2l_usbphy_ctrl_info rzg2l_info =3D {}; + +static const struct rzg2l_usbphy_ctrl_info rzg3s_info =3D { + .pwrrdy =3D true, +}; =20 static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] =3D { - { .compatible =3D "renesas,rzg2l-usbphy-ctrl" }, - { - .compatible =3D "renesas,r9a08g045-usbphy-ctrl", - .data =3D (void *)RZG2L_USBPHY_CTRL_PWRRDY - }, + { .compatible =3D "renesas,rzg2l-usbphy-ctrl", .data =3D &rzg2l_info }, + { .compatible =3D "renesas,r9a08g045-usbphy-ctrl", .data =3D &rzg3s_info = }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table); @@ -153,14 +158,9 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device= *dev, { struct reg_field field; struct regmap *regmap; - const int *data; u32 args[2]; int ret; =20 - data =3D device_get_match_data(dev); - if ((uintptr_t)data !=3D RZG2L_USBPHY_CTRL_PWRRDY) - return 0; - regmap =3D syscon_regmap_lookup_by_phandle_args(dev->of_node, "renesas,sysc-pwrrdy", ARRAY_SIZE(args), args); @@ -188,6 +188,7 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device = *dev, =20 static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev) { + const struct rzg2l_usbphy_ctrl_info *info; struct device *dev =3D &pdev->dev; struct rzg2l_usbphy_ctrl_priv *priv; struct platform_device *vdev; @@ -206,9 +207,12 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_dev= ice *pdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); =20 - error =3D rzg2l_usbphy_ctrl_pwrrdy_init(dev, priv); - if (error) - return error; + info =3D device_get_match_data(dev); + if (info->pwrrdy) { + error =3D rzg2l_usbphy_ctrl_pwrrdy_init(dev, priv); + if (error) + return error; + } =20 priv->rstc =3D devm_reset_control_get_exclusive(&pdev->dev, NULL); if (IS_ERR(priv->rstc)) --=20 2.43.0 From nobody Wed Sep 30 05:01:34 2026 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D72845C6FF for ; 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charset="utf-8" From: Biju Das Add the renesas,r9a08g046-usbphy-ctrl compatible string to the OF match table for the RZ/G3L (r9a08g046) SoC, using a dedicated rzg3l_info struct with pwrrdy set, similar to RZ/G3S. The RZ/G3L SoC has 2 OTG controllers compared to one on RZ/G3S, so it uses a separate rzg3l-vbus-regulator driver to handle the additional VBUSEN control for port 2. The regulator_name field is used as the platform device name passed to platform_device_alloc(), and must exactly match the name the corresponding regulator driver registers via its id_table for platform bus matching to succeed. Signed-off-by: Biju Das --- v6->v7: * No change. v5->v6: * No change. v4->v5: * Replaced the variable regulator_driver_name->regulator_name in struct rzg2l_usbphy_ctrl_info * Switched to power sequence consumer for controlling pwrrdy signal. * Updated commit description. v3->v4: * Updated the commit description. * Migrated to id_table match using driver_name and reduced the length < 24. v2->v3: * No change. v1->v2: * No change. --- drivers/reset/reset-rzg2l-usbphy-ctrl.c | 79 +++++++++++++++++++++++-- 1 file changed, 73 insertions(+), 6 deletions(-) diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-= rzg2l-usbphy-ctrl.c index 79503f6f4b23..f332ef9ef3e5 100644 --- a/drivers/reset/reset-rzg2l-usbphy-ctrl.c +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -37,11 +38,13 @@ struct rzg2l_usbphy_ctrl_priv { void __iomem *base; struct platform_device *vdev; struct regmap_field *pwrrdy; + struct pwrseq_desc *pwrseq; =20 spinlock_t lock; }; =20 struct rzg2l_usbphy_ctrl_info { + const char *regulator_name; bool pwrrdy; }; =20 @@ -110,15 +113,24 @@ static void rzg2l_usbphy_ctrl_init(struct rzg2l_usbph= y_ctrl_priv *priv) spin_unlock_irqrestore(&priv->lock, flags); } =20 -static const struct rzg2l_usbphy_ctrl_info rzg2l_info =3D {}; +static const struct rzg2l_usbphy_ctrl_info rzg2l_info =3D { + .regulator_name =3D "rzg2l-vbus-regulator", +}; =20 static const struct rzg2l_usbphy_ctrl_info rzg3s_info =3D { + .regulator_name =3D "rzg2l-vbus-regulator", + .pwrrdy =3D true, +}; + +static const struct rzg2l_usbphy_ctrl_info rzg3l_info =3D { + .regulator_name =3D "rzg3l-vbus-regulator", .pwrrdy =3D true, }; =20 static const struct of_device_id rzg2l_usbphy_ctrl_match_table[] =3D { { .compatible =3D "renesas,rzg2l-usbphy-ctrl", .data =3D &rzg2l_info }, { .compatible =3D "renesas,r9a08g045-usbphy-ctrl", .data =3D &rzg3s_info = }, + { .compatible =3D "renesas,r9a08g046-usbphy-ctrl", .data =3D &rzg3l_info = }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg2l_usbphy_ctrl_match_table); @@ -150,11 +162,16 @@ static int rzg2l_usbphy_ctrl_set_pwrrdy(struct regmap= _field *pwrrdy, =20 static void rzg2l_usbphy_ctrl_pwrrdy_off(void *data) { - rzg2l_usbphy_ctrl_set_pwrrdy(data, false); + struct rzg2l_usbphy_ctrl_priv *priv =3D data; + + if (priv->pwrrdy) + rzg2l_usbphy_ctrl_set_pwrrdy(priv->pwrrdy, false); + else + pwrseq_power_off(priv->pwrseq); } =20 -static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev, - struct rzg2l_usbphy_ctrl_priv *priv) +static int rzg2l_usbphy_ctrl_pwrrdy_syscon_init(struct device *dev, + struct rzg2l_usbphy_ctrl_priv *priv) { struct reg_field field; struct regmap *regmap; @@ -183,7 +200,43 @@ static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device= *dev, if (ret) return ret; =20 - return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv->= pwrrdy); + return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv); +} + +static int rzg2l_usbphy_ctrl_pwrrdy_powerseq_init(struct device *dev, + struct rzg2l_usbphy_ctrl_priv *priv) +{ + int ret; + + priv->pwrseq =3D devm_pwrseq_get(dev, "usb-pwrrdy"); + if (IS_ERR(priv->pwrseq)) { + /* + * This platform requires a sequencer. If we can't get it, we + * must return the error (including -EPROBE_DEFER to wait for + * the provider to appear) + */ + return dev_err_probe(dev, PTR_ERR(priv->pwrseq), + "Failed to get required power sequencer\n"); + } + + ret =3D pwrseq_power_on(priv->pwrseq); + if (ret) + return ret; + + return devm_add_action_or_reset(dev, rzg2l_usbphy_ctrl_pwrrdy_off, priv); +} + +static int rzg2l_usbphy_ctrl_pwrrdy_init(struct device *dev, + struct rzg2l_usbphy_ctrl_priv *priv) +{ + int ret; + + if (of_property_present(dev->of_node, "renesas,sysc-pwrrdy")) + ret =3D rzg2l_usbphy_ctrl_pwrrdy_syscon_init(dev, priv); + else + ret =3D rzg2l_usbphy_ctrl_pwrrdy_powerseq_init(dev, priv); + + return ret; } =20 static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev) @@ -245,7 +298,7 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_devi= ce *pdev) if (error) goto err_pm_runtime_put; =20 - vdev =3D platform_device_alloc("rzg2l-vbus-regulator", pdev->id); + vdev =3D platform_device_alloc(info->regulator_name, pdev->id); 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charset="utf-8" From: Biju Das Add dual USB VBUS regulator support for the RZ/G3L (r9a08g046) SoC, which has two OTG controllers (one per port), unlike RZ/G3S which has only one. Introduce a RZG3L_USB_VBUS_REG macro and a rzg3l_usb_vbus_regulators array with two descriptors: vbus0 (BIT(0)) and vbus1 (BIT(1)), both sourced from a regulators sub-node as defined in the binding. Add a dedicated rzg3l_usb_vbus_regulator_probe() that iterates over the array and registers both regulators using devm_regulator_register(). Convert the existing platform driver to use an id_table, allowing it to dispatch to either the RZ/G2L or RZ/G3L probe function based on the matched platform device name. Acked-by: Mark Brown Signed-off-by: Biju Das --- v6->v7: * No change. v5->v6: * Replaced dev_err->dev_err_probe() in error path of rzg3l_usb_vbus_regulator_probe(). * Retained the tag as the change is trivial. v4->v5: * Collected the tag. v3->v4: * Dropped rzg3l specific platform driver. * Dropped the tag as there are new changes. * Added id_table handling by introducing a common probe(). v2->v3: * No change. v1->v2: * Passing pointer to an array of regulators to make it scalable. * Updated commit description. --- .../regulator/renesas-usb-vbus-regulator.c | 73 ++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/renesas-usb-vbus-regulator.c b/drivers/regul= ator/renesas-usb-vbus-regulator.c index 22fcf0d10c85..050820a30efb 100644 --- a/drivers/regulator/renesas-usb-vbus-regulator.c +++ b/drivers/regulator/renesas-usb-vbus-regulator.c @@ -55,8 +55,79 @@ static int rzg2l_usb_vbus_regulator_probe(struct platfor= m_device *pdev) return 0; } =20 +#define RZG3L_USB_VBUS_REG(rname, en_mask) \ + { \ + .name =3D #rname, \ + .of_match =3D of_match_ptr(#rname), \ + .regulators_node =3D of_match_ptr("regulators"), \ + .type =3D REGULATOR_VOLTAGE, \ + .owner =3D THIS_MODULE, \ + .ops =3D &rzg2l_usb_vbus_reg_ops, \ + .enable_reg =3D 0, \ + .enable_mask =3D (en_mask), \ + .enable_is_inverted =3D true, \ + .fixed_uV =3D 5000000, \ + .n_voltages =3D 1, \ + } + +static const struct regulator_desc rzg3l_usb_vbus_regulators[] =3D { + RZG3L_USB_VBUS_REG(vbus0, BIT(0)), + RZG3L_USB_VBUS_REG(vbus1, BIT(1)), +}; + +static int rzg3l_usb_vbus_regulator_probe(struct platform_device *pdev) +{ + struct regulator_config config =3D { }; + struct device *dev =3D &pdev->dev; + struct regulator_dev *rdev; + + config.dev =3D pdev->dev.parent; + config.regmap =3D dev_get_regmap(dev->parent, NULL); + if (!config.regmap) + return dev_err_probe(dev, -ENOENT, "Failed to get regmap\n"); + + for (unsigned int i =3D 0; i < ARRAY_SIZE(rzg3l_usb_vbus_regulators); i++= ) { + rdev =3D devm_regulator_register(dev, &rzg3l_usb_vbus_regulators[i], + &config); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + rzg3l_usb_vbus_regulators[i].name); + } + + return 0; +} + +static int rzg2l_usb_vbus_regulator_common_probe(struct platform_device *p= dev) +{ + int (*probe_func)(struct platform_device *pdev); + const struct platform_device_id *id; + + id =3D platform_get_device_id(pdev); + if (!id) + return dev_err_probe(&pdev->dev, -ENODEV, "No ID match found\n"); + + probe_func =3D (int (*)(struct platform_device *))id->driver_data; + + return probe_func(pdev); +} + +static const struct platform_device_id rzg2l_usb_vbus_regulator_ids[] =3D { + { + .name =3D "rzg2l-vbus-regulator", + .driver_data =3D (kernel_ulong_t)rzg2l_usb_vbus_regulator_probe + }, + { + .name =3D "rzg3l-vbus-regulator", + .driver_data =3D (kernel_ulong_t)rzg3l_usb_vbus_regulator_probe + }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(platform, rzg2l_usb_vbus_regulator_ids); + static struct platform_driver rzg2l_usb_vbus_regulator_driver =3D { - .probe =3D rzg2l_usb_vbus_regulator_probe, + .probe =3D rzg2l_usb_vbus_regulator_common_probe, + .id_table =3D rzg2l_usb_vbus_regulator_ids, .driver =3D { .name =3D "rzg2l-vbus-regulator", .probe_type =3D PROBE_PREFER_ASYNCHRONOUS, --=20 2.43.0 From nobody Wed Sep 30 05:01:34 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E951045FFB1 for ; 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Wed, 12 Aug 2026 07:19:52 -0700 (PDT) Received: from localhost.localdomain ([2a00:23c4:a702:d301:94c0:1825:d248:50ae]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4997ad78f2fsm47352235e9.1.2026.08.12.07.19.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 07:19:51 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v7 6/9] arm64: dts: renesas: r9a08g046: Add USB2.0 host/phy device nodes Date: Wed, 12 Aug 2026 15:19:24 +0100 Message-ID: <20260812141940.246223-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> References: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Add USB2.0 device nodes to the RZ/G3L (r9a08g046) SoC DTSI, covering the USB PHY controller, OHCI/EHCI host controllers, and USB2 PHYs for both ports. Signed-off-by: Biju Das --- v6->v7: * Updated commit header v5->v6: * No change v4->v5: * Dropped renesas,sysc-pwrrdy property. v3->v4: * No change v2->v3: * No change v1->v2: * Updated commit description. * Added regulators group node and its children. --- arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 104 +++++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/d= ts/renesas/r9a08g046.dtsi index 85e409ac8d5c..bf0dbac66d14 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi @@ -1198,6 +1198,110 @@ queue3 { }; }; =20 + phyrst: usbphy-ctrl@11e00000 { + compatible =3D "renesas,r9a08g046-usbphy-ctrl"; + reg =3D <0 0x11e00000 0 0x10000>; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>; + resets =3D <&cpg R9A08G046_USB_PRESETN>; + power-domains =3D <&cpg>; + #reset-cells =3D <1>; + status =3D "disabled"; + + regulators { + usb0_vbus_otg: vbus0 { + regulator-name =3D "usb0_vbus"; + }; + + usb1_vbus_otg: vbus1 { + regulator-name =3D "usb1_vbus"; + }; + }; + }; + + ohci0: usb@11e10000 { + compatible =3D "generic-ohci"; + reg =3D <0 0x11e10000 0 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>; + resets =3D <&phyrst 0>, + <&cpg R9A08G046_USB_U2H0_HRESETN>; + phys =3D <&usb2_phy0 1>; + phy-names =3D "usb"; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + ohci1: usb@11e90000 { + compatible =3D "generic-ohci"; + reg =3D <0 0x11e90000 0 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2H1_HCLK>; + resets =3D <&phyrst 1>, + <&cpg R9A08G046_USB_U2H1_HRESETN>; + phys =3D <&usb2_phy1 1>; + phy-names =3D "usb"; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + ehci0: usb@11e10100 { + compatible =3D "generic-ehci"; + reg =3D <0 0x11e10100 0 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>; + resets =3D <&phyrst 0>, + <&cpg R9A08G046_USB_U2H0_HRESETN>; + phys =3D <&usb2_phy0 2>; + phy-names =3D "usb"; + companion =3D <&ohci0>; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + ehci1: usb@11e90100 { + compatible =3D "generic-ehci"; + reg =3D <0 0x11e90100 0 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2H1_HCLK>; + resets =3D <&phyrst 1>, + <&cpg R9A08G046_USB_U2H1_HRESETN>; + phys =3D <&usb2_phy1 2>; + phy-names =3D "usb"; + companion =3D <&ohci1>; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + usb2_phy0: usb-phy@11e10200 { + compatible =3D "renesas,usb2-phy-r9a08g046"; + reg =3D <0 0x11e10200 0 0x700>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2H0_HCLK>; + resets =3D <&phyrst 0>, + <&cpg R9A08G046_USB_U2H0_HRESETN>; + #phy-cells =3D <1>; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + usb2_phy1: usb-phy@11e90200 { + compatible =3D "renesas,usb2-phy-r9a08g046"; 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Wed, 12 Aug 2026 07:19:55 -0700 (PDT) Received: from localhost.localdomain ([2a00:23c4:a702:d301:94c0:1825:d248:50ae]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4997ad78f2fsm47352235e9.1.2026.08.12.07.19.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 07:19:53 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Biju Das , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v7 7/9] arm64: dts: renesas: r9a08g046: Add USB2.0 function device nodes Date: Wed, 12 Aug 2026 15:19:25 +0100 Message-ID: <20260812141940.246223-8-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> References: <20260812141940.246223-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Add USB2.0 function device nodes to the RZ/G3L (r9a08g046) SoC DTSI. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v7: * Moved the patch from [1] * Collected the tag. [1] https://lore.kernel.org/all/20260707145135.247565-3-biju.das.jz@bp.rene= sas.com/ --- arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/d= ts/renesas/r9a08g046.dtsi index bf0dbac66d14..08d919470830 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi @@ -1302,6 +1302,44 @@ usb2_phy1: usb-phy@11e90200 { status =3D "disabled"; }; =20 + hsusb0: usb@11e30000 { + compatible =3D "renesas,usbhs-r9a08g046", + "renesas,rzg2l-usbhs"; + reg =3D <0 0x11e30000 0 0x10000>; + interrupts =3D , + , + , + ; + clocks =3D <&cpg CPG_MOD R9A08G046_USB_PCLK>, + <&cpg CPG_MOD R9A08G046_USB_U2P0_EXR_CPUCLK>; + resets =3D <&phyrst 0>, + <&cpg R9A08G046_USB_U2P0_EXL_SYSRST>; + renesas,buswait =3D <7>; + phys =3D <&usb2_phy0 3>; + phy-names =3D "usb"; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + hsusb1: usb@11eb0000 { + compatible =3D "renesas,usbhs-r9a08g046", + "renesas,rzg2l-usbhs"; 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charset="utf-8" From: Biju Das Enable USB2.0 Host on the RZ/G3L SMARC board (r9a08g046l48-smarc). Port 0 (ehci0, ohci0, usb2_phy0) is configured as OTG with usb0_pins pinmux (USB20_OVRCUR, USB20_VBUSEN) and usb0_vbus_otg as the VBUS supply. Port 1 (ehci1, ohci1, usb2_phy1) is configured as host-only with usb1_pins pinmux (USB21_OVRCUR, USB21_VBUSEN), usb1_vbus_otg as the VBUS supply, and renesas,no-otg-pins set to indicate no OTG pin routing. The phyrst USB PHY reset controller is also enabled. Signed-off-by: Biju Das --- v6->v7: * Moved the patch. * dr_mode changed to 'host' as function is not enabled yet. v5->v6: * No change. v4->v5: * No change. v3->v4: * No change. v2->v3: * No change. v1->v2: * Updated commit description. --- .../boot/dts/renesas/r9a08g046l48-smarc.dts | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a08g046l48-smarc.dts index 96cc7ee46a6a..522cfde4b66a 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts @@ -87,6 +87,16 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd { #endif }; =20 +&ehci0 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&ehci1 { + dr_mode =3D "host"; + status =3D "okay"; +}; + &i2c2 { pinctrl-0 =3D <&i2c2_pins>; pinctrl-names =3D "default"; @@ -138,6 +148,20 @@ &keys { #endif }; =20 +&ohci0 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&ohci1 { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&phyrst { + status =3D "okay"; +}; + &pinctrl { audio_clk_pins: audio-clock { pinmux =3D , /* AUDIO_CLK_B */ @@ -259,6 +283,16 @@ ssi0_pins: ssi0 { , /* SSIF0_RCK */ ; /* SSIF0_TXD */ }; + + usb0_pins: usb0 { + pinmux =3D , /* USB20_OVRCUR */ + ; /* USB20_VBUSEN */ + }; + + usb1_pins: usb1 { + pinmux =3D , /* USB21_OVRCUR */ + ; /* USB21_VBUSEN */ + }; }; =20 #if SW_SER0_PMOD @@ -330,3 +364,18 @@ &ssi0 { status =3D "okay"; }; #endif + +&usb2_phy0 { + pinctrl-0 =3D <&usb0_pins>; + pinctrl-names =3D "default"; + vbus-supply =3D <&usb0_vbus_otg>; + status =3D "okay"; +}; + +&usb2_phy1 { + pinctrl-0 =3D <&usb1_pins>; + pinctrl-names =3D "default"; + vbus-supply =3D <&usb1_vbus_otg>; + renesas,no-otg-pins; + status =3D "okay"; +}; --=20 2.43.0 From nobody Wed Sep 30 05:01:34 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 401BE46A602 for ; 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charset="utf-8" From: Biju Das Switch ehci0 and ohci0 from dr_mode =3D "host" to "otg", and enable the hsusb0 USB2.0 function controller node with dr_mode =3D "otg" and status =3D "okay", so USB2.0 device/OTG mode is supported on the RZ/G3L SMARC (r9a08g046l48) board. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- v7: * Moved the patch from [1] * Updated commit description * Updated dr_mode =3D "host" to "otg" in {e,o}hci0 device nodes. * Retained the tag as change is trivial. [1] https://lore.kernel.org/all/20260707145135.247565-4-biju.das.jz@bp.ren= esas.com/ --- arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts b/arch/arm6= 4/boot/dts/renesas/r9a08g046l48-smarc.dts index 522cfde4b66a..a3c491778aba 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts @@ -88,7 +88,7 @@ vqmmc_sd1_pvdd: regulator-vqmmc-sd1-pvdd { }; =20 &ehci0 { - dr_mode =3D "host"; + dr_mode =3D "otg"; status =3D "okay"; }; =20 @@ -97,6 +97,11 @@ &ehci1 { status =3D "okay"; }; =20 +&hsusb0 { + dr_mode =3D "otg"; + status =3D "okay"; +}; + &i2c2 { pinctrl-0 =3D <&i2c2_pins>; pinctrl-names =3D "default"; @@ -149,7 +154,7 @@ &keys { }; =20 &ohci0 { - dr_mode =3D "host"; + dr_mode =3D "otg"; status =3D "okay"; }; =20 --=20 2.43.0