From nobody Tue Sep 29 04:14:02 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBFED3FFFA5 for ; Wed, 12 Aug 2026 21:30:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570260; cv=none; b=bsNwEEWBlgPvbdAyNbFgCznX9xs41GJ2SUQXiazABFL2CQyKO0nDVmR6Du0Nq/lanPsKVVn307TuuH7hstvKUCVQWCeaeuD/BzFMRjOcviil++GbWKxOzPqBeLO2B4JRxmXpjW1cQ7UzdpOIdfHfTpekMn4JTYZl/pFpkN5eMPE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570260; c=relaxed/simple; bh=ZauFLZdTU+txgWmmv356NEPEzXfMT8LD2hrE87LiP44=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QLjTa+DS4b4gvLt9yU99UbytOSJ1Ezo9vocqt6BQhQPfqId3zvGN0yi5x8o1ZYPPqaObNsV8AKO3DT9gMoHrDmQCU7n9ddDCXHHgKTSoqXtd/p/91yHCS5Iv5Foj2mH4vO+slQ2rphBgaE73rgMbLT3KuSgFcT9Htzulj5a7vns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=koVw9TPX; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="koVw9TPX" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4954dff6536so10672805e9.0 for ; Wed, 12 Aug 2026 14:30:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1786570256; x=1787175056; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=OefaEnBP+Xtfr9MuFwvtjIyVzZPHMg8J6vmP5uhECmY=; b=koVw9TPXnkRvauq0fZEUkgIVAA2gBV+Tnb7bbjrtvf8Cz94mUCSQnDqL0zJaUaHAxV w6G7QEdN1TN5oGEpL5gVkrFNjDU8v3WQQPpAS9qftJk5teMS/vKc9vvuQN8B0UFxJXOs AO/19njDKz9rIpIYUZkfisfou+5WU0Wb7XhcWgvntP9AeIDkRdVKiQlUWc0tEQaiRbVP zFRMyIkubN/t1PDnETt52uzS4+VpiEu/L3F/fGYVAVlfEs8o8kydiCesE3ychyOm0lAd MLToFVeK9jboHF1ggP+GIvBG3diSYaAzymw/AGq9hGGHhp1N2IORwmn20n6tU9YaUvoK JewQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786570256; x=1787175056; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=OefaEnBP+Xtfr9MuFwvtjIyVzZPHMg8J6vmP5uhECmY=; b=WH9KTB0e+a005/nrklRmA7BLTyJKETIRRTy+yzuofxIq1p0al59hWxu69HV80328ad Rtf9dNN3BFvQbj1TTN6dw20R6t+K/b0VFmcN5l1jIxJYAErGOeee+YGq96c9ZNg2eDTz JpqE30gzpawDv7MoW2ljLquF5Q0qi8IKGVMOXzDSb2NPuUuTz3pW1kulJkWM3w7k6y83 BrxB2itDA0QrtVrgErotg/WM9HnvhBMrepcZwkGy/14Z3Df0EcSB2n7UTPcWjb6dnfrJ suhrajfnWBHfoyafq1LjAoPY275KSih0mj+LNkjSVqjNOaKYoZYzMOKtQh+cP4tdKeMz SvXw== X-Forwarded-Encrypted: i=1; AHgh+Rpbjq5GEF4hU0gJ/Vmzx/IOmXzm/iwtdYulQZaq3QJxlc4sOWVJ74shWYIWfxIZJtIdhECqA5OrNDAQbos=@vger.kernel.org X-Gm-Message-State: AOJu0YxFCTqYTAb9H1J0XG0ygfl+htiD6PxiWjW9e/xu8nX5r1ADB2yn oqCja/PJTBYC3O9YfqWgSEkfnoTo4iNMTGd0Eq+FbhCykbMQGgjnFHAkBK5L4oDPz/Q= X-Gm-Gg: AR+sD10JtEmIjTdIhc2StDi2UXzyFysafRLJfuqdtBAtgHIevy3HYnbY0JFZpQNV01c N25qeK+mSR7JuPUP0451DnVT5BGUzN1/BHUxbj0HD10z5VGPriMWUfHEyuy3QCCZZLem1YCtgdp oWwS2+BbpoMciDVb9f/oYfrS2eEgiBRlQ5CALZq3TLeZd62LjStKj5AL8e8/0pgj0TTcQVSRyHS XXIhO5pGEz3dbfVBtYXdzIcIlhzvQliVoM0mlzaxrKPMXUw31PHZZX6l7hvZLKBY4WqrWaEtHYh ePrfjXHUGOvgR8DFRNixCbojVKlCrTpoeK5tlh8by/vJgyule6q8HBlbXAp4R1jVInZFojOy/NR FGAxcG9UeG2GnjMIye63DTDyXgS3/15l7xkE55+okUiK/2kcdXqPO3ItzX6nKbxDAQ7/7e5yBy8 lxNkwD8AMC/Efs8bXSTmusy0WzyznvhhzJ4b4ThpLZpc4mViEDkL/3/3aiPUo= X-Received: by 2002:a05:600c:310e:b0:499:51f0:a9b2 with SMTP id 5b1f17b1804b1-499821881d3mr6458585e9.1.1786570256121; Wed, 12 Aug 2026 14:30:56 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:282d:879b:d1fe:f977]) by smtp.gmail.com with UTF8SMTPSA id ffacd0b85a97d-4815a5b6fabsm665009f8f.31.2026.08.12.14.30.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 14:30:55 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mfd@lists.linux.dev Subject: [PATCH RESEND v6 1/5] mfd: axp20x: Constify axp313 and axp717 cells Date: Wed, 12 Aug 2026 23:30:39 +0200 Message-ID: <20260812-axp318-regulator-v6-1-d6b84b55c000@baylibre.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> References: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1161; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=ZauFLZdTU+txgWmmv356NEPEzXfMT8LD2hrE87LiP44=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqfOJ7z3JPOXfs4Us1c2cB9/AAeP3CY1Ezg1C34 l1B3hrwpCSJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCanziewAKCRDm/A8cN/La hTUND/47kRYTvrK0p1t/Rk3HhntWINVaH9muZct9+QebiCYZqJbRo/8rcv9meluUuO8DXATwMyV 8gFSIzRjpaXXpvT/yWmqyP3d+c3s29Q09JmQWEpiN7WH8/dubwUmIEp3lOr7fFcDzc1JirQH0vI jK7EX4gFH/r8MUt03NeK9FnBpxqnwFT9ZUS/b9Mlb3+EVQxRxFGjAbAQrUEPTaKmKk1UHpHsLBc RWXZlDZsgpwh/GTg5NDzKlv4uNh5DOvQQ7Akn35eJhyg+h0TDd/ZBPCGrx99TzQsI7FvLVdp81j JRxomU2g6WcCQ45z/0aeGw1GQFDFh6mDxamuMDHQ6NejbvI0KZa0EN5zuV1cW+NQv2MHQOMF6BJ zXkIEIBEFi6/P5ZEYQwci+aWiR3c2LlBo3z0T42572uOFj25d66fvEQEu8BW+fcGehRk6ttORMU ATC/styss9CimyiSvVp4hR/XR3/TKvAl6HJOvlIXS+GH/1qk7PZQjoZ2+1DTE/ff2bNya6VRj70 /YBOXC8TtkoFrvgxZosP8ntTKtmaXB/++zRMPSqAX+pvy1OJQ1hezQSM7nxtaUZ1jojxzqR0LJp q+NS/ENacR6/Oc0zR7yEWfopEFv4NZm+KyRCA3HIDVUB2iK3yCfmG3Qmzf/EQkY4VBJCH+7MH2T g9TjSBSn+QxhUoA== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Content-Transfer-Encoding: quoted-printable mfd_cells array should generally be const and there does not seem to be anything against it for the axp313 and axp717. Constify the mfd_cells array for the axp313 and axp717 to be consistent with the other supported chips Acked-by: Chen-Yu Tsai Signed-off-by: Jerome Brunet --- drivers/mfd/axp20x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 679364189ea5..22baab6e10fa 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -1055,13 +1055,13 @@ static const struct mfd_cell axp152_cells[] =3D { }, }; =20 -static struct mfd_cell axp313a_cells[] =3D { +static const struct mfd_cell axp313a_cells[] =3D { /* AXP323 is sometimes paired with AXP717 as sub-PMIC */ MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1), MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), }; =20 -static struct mfd_cell axp717_cells[] =3D { +static const struct mfd_cell axp717_cells[] =3D { MFD_CELL_NAME("axp20x-regulator"), MFD_CELL_RES("axp20x-pek", axp717_pek_resources), MFD_CELL_OF("axp717-adc", --=20 2.47.3 From nobody Tue Sep 29 04:14:02 2026 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C9663FFF94 for ; Wed, 12 Aug 2026 21:31:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570262; cv=none; b=g210d6CiO6QMz43TDYAFQ+Q98FhIcTN66Z3osd7YUvwsNtzZy71OH3aC8T+VGE8Fpjse8ygq/YIHMIma66i83GjHv+W01+1F5WHEyH0uAp/Y1IsJh3pv2DzAxrz58qUTbbn3uZ/2MO7KaCvuWJXXGv52VSCt99KyoMntADnC+oQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570262; c=relaxed/simple; bh=lhJoISafn130K97b4c6QzeXIJVjYvF5ziHC2eS4rk3o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pELGyfUZqmqvmm8kj6Hyk9xTZoVBwCioNdN3mq9bE7E37VBIFMuGrZ2eNEFX8cDubBoSFdHyj8S+b91bHPkNd1YM/jBN7GbNu3td0nL54cYx7kdOIVwLdMW5Nk9qfEu/t889NRYWsJLi88IBrA625E03EP1c86IcBSkL6+fIm7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=Y2WFcvJO; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="Y2WFcvJO" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-4956242332dso12875815e9.2 for ; Wed, 12 Aug 2026 14:31:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1786570259; x=1787175059; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=PVrDmVbcjU7nFx3A1HBZefbtcBqMyRdnqfkjiEa3Df8=; b=Y2WFcvJOmnynKhofnSCeaxYmZatAgwfG5mc/yU6cOUQcxux/xkCb7eJd2vNJEQngA2 vQtMq4OZpUPK91JW7Ou3QEz+r9tKyp71dtqbeZjIiQMxQPbD9QNM9r8gqNMMn3WS9SqB +aK3e1P8AwV1omjcyL8ABd5yDcrO4ytbo8NiVFiC9LrwKVGtMYiPC1oqOoY6/Xgm0ryf zArJG9eSpM8K9S+XW5P4GscnhD8Y5VGfWTljYuFTXNdr+/Oof6ZZepp52RtsRUsHR6dA 5k3lFUDrf4tyRT4yzGRsEKTxB0zoij6UazSVHX6+5O1RYyw4pjV97o8c52y5Fngi4+AO bQ+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786570259; x=1787175059; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=PVrDmVbcjU7nFx3A1HBZefbtcBqMyRdnqfkjiEa3Df8=; b=B/aSFjhLhxQSnSMRBBe0aLtCZBpbNtQJ6OeiBo/gF+aCRNHAJydwuzHVMbj7DIOSA8 /gvqEOKwgqcf8zrnl6kvgNbz/B09p80PMcUyggU5dK4mFRsVr+D233k1uiq7AdrRtlAp 8o+Hp0RLl4UooVDYF5MpGjG6RzqXrVjN8/8dK1fxRtvZtSeWB29BlTheW/oxwvpNM265 H5o52+MeH87GMdFhuYqbOOuL0QMQQKDmyXzKz7j7DEsCXTiXSNzSwpQZv0SLnJyjGNsw ZTxj2cV3K0kVmQka2QLXoxwYIzyPij7euGd4JwUS+HYHsc/oWiZdHNHLElEuCjNtuBvq d/6A== X-Forwarded-Encrypted: i=1; AHgh+Ro/d3C4VqJoAS7vrl2zWKQvDuT3F5ErQ/lLAUyQQ2Du5Fk+9LYAEStvHW9TlBUyR8yLuTt0dL0QCIhVXdE=@vger.kernel.org X-Gm-Message-State: AOJu0Yx5lOmyXFyB2Cy6riewHZxQenrWwFSFHynimgLAycg8jGDbsKYP nfqw1JKsNB68RAZ8ne6BtqeLic00DSYOYio/VsOTeJMypjbSd0LIjKDoyhxjPYEYb34= X-Gm-Gg: AR+sD12zEm+NyKoAIm1Za5iQUSfa5UInBTpq6ZbNkAb7DOtn+kebnxF3AqEuNCwhxZ5 pkCFVZ3oZg0gj1xuBypYtefh1fAE/EI84OYk9R+hQ9CRU3FGTga+Z57GPt35TE6uVKC9zevlbTf lvKbK4ACdk2vc9kx/DleUlk2e7UFtEOy90/cF6JudJ8rTPML1Hi1wZ1uYOGHSYeJBUjxTkGWlbO YocVd2b2s2jAIJQLYewXvMlCd9Roqgpg0Rmb3dPSZALwxZpa2QHT3eOuddiVwrxDoPlyktlXsvF Mrrr1PO1oc1nQRkUP6WgEuwt53INqmXxYnRrNzD0G1OTz5O8B5id2pVto5RZMq8uoCivLupgV9v xfr8RpoDmXrXw9hS8s2MUyjn1Ooxk0XKOlmUChprhpodmLeGdd8H7aRHR4MCsIA63IR7sHfLX/r TvVJke2KUbsTrKESQOlb2/tDdMK5LoU5jAHKU1xx+FPe1HDsvZJPxnhL00i1A= X-Received: by 2002:a05:600c:1c25:b0:499:726c:d658 with SMTP id 5b1f17b1804b1-499821d91d9mr4677455e9.19.1786570258706; Wed, 12 Aug 2026 14:30:58 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:282d:879b:d1fe:f977]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-49981b03e70sm17057795e9.3.2026.08.12.14.30.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 14:30:57 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mfd@lists.linux.dev, Sashiko Subject: [PATCH RESEND v6 2/5] mfd: axp20x-i2c: Fix i2c instantiation Date: Wed, 12 Aug 2026 23:30:40 +0200 Message-ID: <20260812-axp318-regulator-v6-2-d6b84b55c000@baylibre.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> References: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3852; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=lhJoISafn130K97b4c6QzeXIJVjYvF5ziHC2eS4rk3o=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqfOJ8GssRUp0id/wW+PgZRYXJs6i+NxkYzRuqd xDvs7vlpE6JAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCanzifAAKCRDm/A8cN/La he3tD/434BdrVWmDaRcxPKKCJsUJhKLWKDN3D8dspR0zLW3cyUl81/vbWA8wMM9+tiEB9idAx2s NG/7MCygEp9I5lYtckiOOsMGSo70m5Fh05d7HdtW2Xu1qLQh1YYYOMpyAiygyfLsTZVWPQ3Xakm 6QS/HhH03fZeDTdYYB+pOwUCntSFs52w8uc01w5AWoUzJ7mihiBWHHZEBQSqplQMnAU6JKU1EGt MTXExgPkP7AuxH4O3tK66VtiaaCIE39ivZMsd2UH9vw6J6FCKC7l5qrZi6xOQXeSB0ZCRaiwKyQ M+EG2FtOJP18LuSdqcaS80RAEh/c7eOfrzosfaDwwQM24b9VDIbk4TEuAyE4oNwUP1v4Ofby8HY u8DwZwhBLlfYrB1PdhTFOdard8f9OQnZlIx4MO84OXI9kDzOBVbSM+m8l1+LRJK4kw08jtTZV6N zDQZtpu0gAedtIcd4zK4xpct6A8R2TCDyq0GZ7+oFwK6Z5ExXqJ9xtsexLnTq+13DngNh3x5SBr kTBmDcxo0OUu0aKJUkA2XsNREBAmFnNnXMysxsOxeEVzxHF5mjpnUD9IiEJD3B/fFwQNiTKJ3gJ zJPr8XPsU7Vfx+zH7okUEVt/2NIV/Q7v3wEua3uJptHN1dz+XwFxOpnBvIvYl8YCakTnNo6nCJo tzsRRY1pG2V5h/Q== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Content-Transfer-Encoding: quoted-printable Apparently this device never really supported i2c instantiation via sysfs, because the driver does not even look at the i2c device data, which are not set. It would only probe if the device matched through DT. Fix that for correctness, even-though it is probably useless. Add the missing AXP323 while at it. Reported-by: Sashiko Closes: https://lore.kernel.org/r/20260717090209.2A09B1F000E9@smtp.kernel.o= rg Fixes: 41751b033aaa ("mfd: axp20x-i2c: Add i2c-ids to fix module auto-loadi= ng") Acked-by: Chen-Yu Tsai Signed-off-by: Jerome Brunet --- drivers/mfd/axp20x-i2c.c | 24 +++++++++++++----------- drivers/mfd/axp20x-rsb.c | 1 + drivers/mfd/axp20x.c | 1 - include/linux/mfd/axp20x.h | 3 +-- 4 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c index 5c93136f977e..a76bec5604c4 100644 --- a/drivers/mfd/axp20x-i2c.c +++ b/drivers/mfd/axp20x-i2c.c @@ -35,6 +35,7 @@ static int axp20x_i2c_probe(struct i2c_client *i2c) axp20x->irq =3D i2c->irq; dev_set_drvdata(axp20x->dev, axp20x); =20 + axp20x->variant =3D (kernel_ulong_t)i2c_get_match_data(i2c); ret =3D axp20x_match_device(axp20x); if (ret) return ret; @@ -76,17 +77,18 @@ MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); #endif =20 static const struct i2c_device_id axp20x_i2c_id[] =3D { - { "axp152" }, - { "axp192" }, - { "axp202" }, - { "axp209" }, - { "axp221" }, - { "axp223" }, - { "axp313a" }, - { "axp717" }, - { "axp803" }, - { "axp806" }, - { "axp15060" }, + { .name =3D "axp152", .driver_data =3D AXP152_ID }, + { .name =3D "axp192", .driver_data =3D AXP192_ID }, + { .name =3D "axp202", .driver_data =3D AXP202_ID }, + { .name =3D "axp209", .driver_data =3D AXP209_ID }, + { .name =3D "axp221", .driver_data =3D AXP221_ID }, + { .name =3D "axp223", .driver_data =3D AXP223_ID }, + { .name =3D "axp313a", .driver_data =3D AXP313A_ID }, + { .name =3D "axp323", .driver_data =3D AXP323_ID }, + { .name =3D "axp717", .driver_data =3D AXP717_ID }, + { .name =3D "axp803", .driver_data =3D AXP803_ID }, + { .name =3D "axp806", .driver_data =3D AXP806_ID }, + { .name =3D "axp15060", .driver_data =3D AXP15060_ID }, { } }; MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c index 059656f2a1bd..8fdc870c1fe4 100644 --- a/drivers/mfd/axp20x-rsb.c +++ b/drivers/mfd/axp20x-rsb.c @@ -35,6 +35,7 @@ static int axp20x_rsb_probe(struct sunxi_rsb_device *rdev) axp20x->irq =3D rdev->irq; dev_set_drvdata(&rdev->dev, axp20x); =20 + axp20x->variant =3D (kernel_ulong_t)device_get_match_data(axp20x->dev); ret =3D axp20x_match_device(axp20x); if (ret) return ret; diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 22baab6e10fa..84839d4aa1ca 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -1267,7 +1267,6 @@ int axp20x_match_device(struct axp20x_dev *axp20x) const struct mfd_cell *cells_no_irq =3D NULL; int nr_cells_no_irq =3D 0; =20 - axp20x->variant =3D (long)device_get_match_data(dev); switch (axp20x->variant) { case AXP152_ID: axp20x->nr_cells =3D ARRAY_SIZE(axp152_cells); diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index b352661d99a1..1badb4868d17 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -997,8 +997,7 @@ static inline int axp20x_read_variable_width(struct reg= map *regmap, /** * axp20x_match_device(): Setup axp20x variant related fields * - * @axp20x: axp20x device to setup (.dev field must be set) - * @dev: device associated with this axp20x device + * @axp20x: axp20x device to setup (.dev and variant fields must be set) * * This lets the axp20x core configure the mfd cells and register maps * for later use. --=20 2.47.3 From nobody Tue Sep 29 04:14:02 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BB69400DF6 for ; Wed, 12 Aug 2026 21:31:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570264; cv=none; b=ukPqlOS/ypy2DY4JxvYzm+Mkg8d9WzWlYsomDGrBjwpXJARKp1LvTXG0dX5pAEZP3OwpC+8f0+sz3sVLvg1VRp4xbBbEKo/FtxfWCWjT1HYfTL+qpryfEA+IT1TMVIGLDlng8lZiu4iE0PaULRHZjyb74ua3AZV7SpY+Eyif/No= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570264; c=relaxed/simple; bh=HNKPooQDA/uxDpi0iVReus05wyumo6SSu/JRjgFGHnI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Z/hOVTwtc6jUC7Gqm5ezWjlvpaQDOi7UxattJDS2sV6hrAd3yA9o48DxPTgo5clCAmTm3SBrzWQjtBf5Qr+T3hqjA7xJnhwIpu2bDhZkjUTRbdoN8YXNiXa0eH5KKqgz0LHnx9K1OG9QzAtvyaCBi8tawpH/2D2gtUyIZ2dxp8c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=ju35CkvD; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="ju35CkvD" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4956869750eso233005e9.2 for ; Wed, 12 Aug 2026 14:31:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1786570261; x=1787175061; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=sMG++y6EWSQXnyGqXgGD2YHD3WKXzWPkbseer/BOl7g=; b=ju35CkvD3UG4ksekdPaPn4eMfhRu4jOT3p1x5JkjgHXFWWBu46gSCgSSC+IctS82R7 RoZk/FuB4QfqgYuzsi96zIkI0yZxYeSDcPH3IHjWBYYp/5Z66JsvhX1e/GfNxQ/PqxPb HcjF+l5OnuJbCsTACUHsPPKUAtzFjri4Kejn+5GeFfEuoLAyPfXkD5e5WdSwxrjrq1Zd Ae3PZU+5+pSaDc4JFCXYZQHYv9stHYzgQYYfEcsW0ZbbtrdPH+cr7ykUMKVceU0JZE5G seE7m+Rf3JYGIt7cwhTJAz2WPW/OV9TK+KkGQqizeeOYiP2PbyRJRublbv0E+KGklwB5 YsMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786570261; x=1787175061; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=sMG++y6EWSQXnyGqXgGD2YHD3WKXzWPkbseer/BOl7g=; b=JiloEZQH3kBLv6s1UuR7IQKizZxW40NWgz+ke1kn1/5y5SKYllSc0CVKZWiLEeiFHZ tMAIivhEoifLXg2DdzBXKp5N7Jc2uN5ECLAxka1g4UUrSziNsYDpiWqPxIvQeXn3lXE2 XdrCIlE1PSik/CF8N2LnA3GADQzyGthNzrQcQ0HnzURL6LSF0yatRoFNr82X8e7gXz/g ovqxltyBLH9ITM+CmDgsPPXm2wgFsrWIbdSVWP4Ssbf1QZmNiszfWR/b6s/O1DMWRgGV t7VlNtl2LJS74IKYHGQo91UC1mzID7vLY6zTCFTSKZrwYPDIF8qrth8KnHbaiRoEci8q xrLw== X-Forwarded-Encrypted: i=1; AHgh+Rrglqg8RrSetKw6COsaoCOEUShvkv3FLzHkVO6eQaOKyq+K+qNaSmYUPzSc4Meu6xRUZyifQ2S6s4kOhqA=@vger.kernel.org X-Gm-Message-State: AOJu0YxOne+OX9JCLNg+KspFnQWfe2SRzvSI1gVsUJ2+XUcVf9osptkF O4XYH5wqPcg/2IlQz9kACynpG783Z0xgRNIU5W+RYRon5qxQWwXc071Xrb9z0fBgS20= X-Gm-Gg: AR+sD124b7MsVuS6o+Ba5FS9XaSUMnOu1JXLVAA+DPgZhjqT9QAYy5NtA/Co0QnVfu6 tASCpfCo4pQHA1P8btdoKHCE4PQNNPIsw/2pJdtabGfv9lX+siDnBlnls3oY3jEnFcGLu7ER/pY O4zB/KZLhFny1jCPqFNa24AVuO20GkyybGU9gblMRmcaJA70zPiOdL+jfc+qHo4xy51FddF5I+B 6iPdh3Sc+9JVTSILncabZihEL7ky9KOmx+t1BY5FnaJ8h5LilczKQDiVTW8dDDVKGNZxXJhKGtE c9ohMfSrXPv8L9D11qHmUWGVfZwsn9ruqMSNRL0EPMFJMMfQxJrVE+qlG5aBYs8rgz6RjO8tEaz wg03PkTTfs7pZv4TJ9QReXBb8UWK+x9FS0Yp3tl0XCtOnbXgh3/X5BLYFL7z4nYg9QrXF7yhPvl CNdZnhiyWW+X0NArGyBlPXQtWlcq+UmMknPMfollWMxyY7DkG2EylryuwkyEg= X-Received: by 2002:a05:600c:c177:b0:498:1595:be7b with SMTP id 5b1f17b1804b1-499821c5be9mr6759415e9.4.1786570260889; Wed, 12 Aug 2026 14:31:00 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:282d:879b:d1fe:f977]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-49982165351sm6314125e9.10.2026.08.12.14.31.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 14:31:00 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mfd@lists.linux.dev, Conor Dooley Subject: [PATCH RESEND v6 3/5] dt-bindings: mfd: x-powers,axp152: Document AXP318W Date: Wed, 12 Aug 2026 23:30:41 +0200 Message-ID: <20260812-axp318-regulator-v6-3-d6b84b55c000@baylibre.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> References: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3753; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=hsuv5cpXOmqMVqVOdS3Ga8YcCzGfBUQhLGlSYAfReNA=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqfOJ8dDhs1bfNHi0MQ0Ue7kcC2Hyl4pxxtcGNl ZVimVyhWlSJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCanzifAAKCRDm/A8cN/La hdRDEACKZWGPCosu2FYJsYRBrh/QnLeeS6tlhiGjbm/0wljxSeJqqaeA/Zj6PKxRmTsir0UwkiX ynGIan7e3xLw5jVx7s9CowpD1WfgMUXsjQDSm7vqspJPSNdOsgoIbQTqDvVk6eBqCa7sPgElAX6 JweYM9T9S70qw9FsSEikWeogGvnqVVqX0XU6kcGLe/7zAtAgfC+9d3PwtFvyNnQv0vBOkXGhCDF BhtteNDXaWbFLr2BizXR+ACt3RDa27WSCc2gi7m0BlDUY1gfstso3BMS7MTS3iTbeQ6J4laNLcX 7df2duGl3oKlqSyp2ECnah1cWJB4wBS3Nvpx+XgyXSssxxPONZRnrccih7mtMMCCo7mnNjXWTWQ jInxx8+b+OMY3F59ZUBVFqHQKSCh4R/4IVwpaDu+dTxRA6M28N9MjmTnP62MKdBt1XSq4lZ+iQr aeqlZBP4wlaIGOdrp9pXp+aR1/Afuo8BEgUCx3xMAbvX8SLyt1T34yRB1McwKcQx4IzSRHKs2Ma bVpTAu4fYP5ByLD0ee3qDvbjwHfypt01CEkPuvB20xWsT+5OcG5F2SY6tJKa4acJL+JfXrCLvV5 Sze+mDXAOn29Z6zU2U/9NPKuf6FgTbF6NLsSs6su8ZjwPaNa+NncfhrKFgBhE8gyA/uYjnpSVLq gsuZtQ/bnVA+VSg== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Content-Transfer-Encoding: quoted-printable From: Andre Przywara The X-Powers AXP318W is a PMIC used on some newer Allwinner devices. Among a large number of both DCDC and LDO regulators it features the usual ADC/IRQ/power key parts. Like other recent PMICs, it lacks the DC/DC converter PWM frequency control register, that rate is fixed here (1.5MHz on DCDC1, 3 MHz on the others). Add the new compatible string, and add that to the list of PMICs without the PWM frequency property. Also add more input supply properties, for the split DCDC and ALDO supplies. The PMIC features *two* switched outputs, hanging of DCDC1, and the manual calls them swout1 and swout2, so follow suit here and add those names to the pattern for matching the node names. Signed-off-by: Andre Przywara Reviewed-by: Chen-Yu Tsai Acked-by: Conor Dooley Signed-off-by: Jerome Brunet --- .../devicetree/bindings/mfd/x-powers,axp152.yaml | 28 ++++++++++++++++++= +++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/D= ocumentation/devicetree/bindings/mfd/x-powers,axp152.yaml index 45f015d63df1..38556c32417b 100644 --- a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml +++ b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml @@ -83,6 +83,7 @@ allOf: contains: enum: - x-powers,axp313a + - x-powers,axp318w - x-powers,axp323 - x-powers,axp15060 - x-powers,axp717 @@ -102,6 +103,7 @@ properties: - x-powers,axp221 - x-powers,axp223 - x-powers,axp313a + - x-powers,axp318w - x-powers,axp323 - x-powers,axp717 - x-powers,axp803 @@ -156,10 +158,18 @@ properties: description: > DCDC1 power supply node, if present. =20 + vin19-supply: + description: > + Combined DCDC1/DCDC9 power supply node, if present. + vin2-supply: description: > DCDC2 power supply node, if present. =20 + vin23-supply: + description: > + Combined DCDC2/DCDC3 power supply node, if present. + vin3-supply: description: > DCDC3 power supply node, if present. @@ -168,6 +178,10 @@ properties: description: > DCDC4 power supply node, if present. =20 + vin45-supply: + description: > + Combined DCDC4/DCDC5 power supply node, if present. + vin5-supply: description: > DCDC5 power supply node, if present. @@ -176,6 +190,10 @@ properties: description: > DCDC6 power supply node, if present. =20 + vin678-supply: + description: > + Combined DCDC6/DCDC7/DCDC8 power supply node, if present. + vin7-supply: description: > DCDC7 power supply node, if present. @@ -220,6 +238,14 @@ properties: description: > ALDO* power supply node, if present. =20 + aldo156in-supply: + description: > + ALDO* power supply node, if present. + + aldo234in-supply: + description: > + ALDO* power supply node, if present. + bldoin-supply: description: > BLDO* power supply node, if present. @@ -277,7 +303,7 @@ properties: Defines the work frequency of DC-DC in kHz. =20 patternProperties: - "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ld= o|cpusldo|drivevbus|dc5ldo|boost)$": + "^(([a-f])?ldo[0-9]|dcdc[0-9a-e]|ldo(_|-)io(0|1)|(dc1)?sw|swout[1-2]= |rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo|boost)$": $ref: /schemas/regulator/regulator.yaml# type: object unevaluatedProperties: false --=20 2.47.3 From nobody Tue Sep 29 04:14:02 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9F8F401494 for ; Wed, 12 Aug 2026 21:31:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570267; cv=none; b=D/G1JaMtTuit0F62C4PWzVbGrWpZuPrQn5NKRhZSoCGcDPZgR0gzLVJBEWOck0H5CeXV29kv/9wPgQ0H1xFXIMHJlwzrGD0VRU21TMJmQLr015jMsoW0AyL/FrrH9w0DVD79RIQUd8siR3OcrdTpHBLT9wDxldJDXUcp80shr/I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570267; c=relaxed/simple; bh=wXqZSdqvIcJKWS3NHh7hSZzb0Fy4RHTv7j5v15ANLnU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=az9j8eVPTEHVpXZJvPtlrllYgVXv+o+QP9ZlCOLlhAwAY+Y/wortLEQwzWBqayq2oUzASSuUHS7bWziO3R+BdkMD3975MDI4/kkg9nLXd/q7Qt1hQ4Dzu/OJltOIF2TyJgRd00RafaewPXSBxeCoiyLSnxcGUqfuODTs5UQvCTc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=BHik5dFw; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="BHik5dFw" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-4954a9e8490so1794685e9.1 for ; Wed, 12 Aug 2026 14:31:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1786570263; x=1787175063; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=nLCXRdYBbzsqqU+KjFO/DdbrpddiifvGaDhMVqXEjUY=; b=BHik5dFwAOzZ/9+HOpu/TfGMqoRGZxpN7cEgadvpgIl9+5SlTvvDKuHbbmkoIufzDL yDrjxQciSviIPxbyiTqXXdhF0tPytWRxj0TOufBe2bSokZM0MzLipTr3gsnx7A160sDD XwvDaC3fcxdN+H+fV9fwwXZGmf8PK01O67Gok2aS4amixHs+Sf/kj/9AAd9qwN8nZuXP uNVr1KK2r2IuPYDCMD7w5smTjOWFJ/lJ0cdOlR0vvNESr+ArOCLfJODtkSOX9KwCeYAn rNP5O2OLiiZC4m1FuRjDuHcrRZH9FeZ6XOf8Kla75JYXSQEIUDjYJ0rvv353tYe2E27R W3Nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786570263; x=1787175063; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=nLCXRdYBbzsqqU+KjFO/DdbrpddiifvGaDhMVqXEjUY=; b=fulXgGSnQY4wGVYE7+/vZOxSdTuPECOHPc0Y7q3PY/Rp9ULmGG+uGCkH5643nm0E6n KqS7larmXAA1Iz5N/Nvs6vjwuEleHYbBOb8oSy9uBzllGsj2Yzhcpu+n50Oox5XnZIhm bjbn/BK2bl1dSsPm7jwizlDfO0eOPcltleybu4LFxxVlZ+k4FWfKucxDdONQLWlcMCIa EDkpPCpzqdCXxLZt+gELxkmVNsr3ukyYGCNpFA1EeUkfsVqBCm2AB5lRBLUgX3ZC6oIG mw2jt4dzvDJSOi2JDdCWYvI4AvgZjKHcqdvANJ/RHU+aqUXe6HGHsE8SQLo3mW158R+8 ybQA== X-Forwarded-Encrypted: i=1; AHgh+RqbKh+iZPBJJjfkjvgtvpBRt9volVLfh8ahwJwRA0YduXRVvyE7BzwgRZV7kNWm+jYkDktMicW+PqEssns=@vger.kernel.org X-Gm-Message-State: AOJu0Yygov9wmg6GR++TXPtp6DcwJxveNtcNazpKQ+VVC9JhiV/aUdp7 XQP3/MTGiBCzMThiJaLbpZ4UGUJ1uXBYI7HAuiSKVREWCX447J6b7DzqjfWVpS0yU/s= X-Gm-Gg: AR+sD11y+tDtZfXPc+l35FUdZmMslisFJRWkUNJaODrlDcgsjstBgPVsRpeyDx5qEb7 06zRRyqnJHBCH7jumbOcYWe+ZmQXzFE37HjQ2gynTuCs/X4pRI5+PtMHMc48peYZnzL8Ct4+9+4 cmpmIgMQzp7lZQ8RNVcvxGxNzlINBMiXuFJ+AjTBv10dHD19jW8vPuglHjoOALeFYcKTTRKQiOT 444NR4f3O4FioyCnM7pBq4c4wKgE7xLBtTkG5clPQm8NgrZkdL32PNxY0qIW023gy+22V37/kql Dnie3CVNRPrfzLHO/BgsjGDyQ2Eps3dCbslPHiTjZLdY+Y6EYIogKhkdFUcZP2b1GGovC0uWAGg 7b5xqOQPJA0ubEicZ8P9GgnyOVmxQbr9vJuUm5B10GzeRSgN0zUXQ5YrNIM4JHAXspjpkVZvG3g Kl+U5wb3Ur/x6rgSOzVKZv2Z8edWJtudtmf0UuXHAbhbewazTu8ynkEnFJK50= X-Received: by 2002:a05:600c:1546:b0:499:5f80:83ac with SMTP id 5b1f17b1804b1-4998220bc5fmr3913175e9.7.1786570263197; Wed, 12 Aug 2026 14:31:03 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:282d:879b:d1fe:f977]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-49981b585b3sm17032085e9.10.2026.08.12.14.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 14:31:02 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mfd@lists.linux.dev Subject: [PATCH RESEND v6 4/5] mfd: axp20x: Add support for AXP318W PMIC Date: Wed, 12 Aug 2026 23:30:42 +0200 Message-ID: <20260812-axp318-regulator-v6-4-d6b84b55c000@baylibre.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> References: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=11128; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=lCIoI2OR8DW2EqdOmZne0ZKTXbwoT8DKQPeKDXJ7r8I=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqfOJ9eFIGVG0EGpVi6ADrY8YTa6EOsa/iF5TkS R5dYdXdWtmJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCanzifQAKCRDm/A8cN/La hfrpD/9LsBtnP9l07c3Fvr+Wcs/sEGoxAHR6N9kBbm897kZ+QUz8SGQvrkXkIY534nLgfZV1Ph8 G/T1CL2p8Z7Ky5D+/ObS0UbaYcE5UrAHpMahXbbQr7Sx83Zeni2dDPIESDhVOzTbI/cAIaSsG5A wfxf3h0xidviB6WJRDFW92bmhFKBPxIILHUyrl2Su6IYOuZ+6KOM6xffOzK2t7Kha677d04CZ1+ 8jh7EhPiTjWHWc+nbC2YOuS3TT1s9adA4xqzrgPo1kftZh1kmNT2K6yHYPwirGcOTCS07io2jCE XmkuVouDLGHynmJmc329/amHXTxjHa7AVSgRljvxJwPwE5TmnWbNFdbhuNr2+PYMztKVIq/OQ/p nZvpm53buAfa6mfGJv8p1lFlujPGFqv7+oaUey5kMjslN3BVphRSkKQwwwZbsEujHtXCybt0aJ3 vX/DgvkfmeW4fL/6XjstvvVF78o86IHjJbZAXVQP+ppLi+cN1beBYYhWlocctnP+DPt5wYXkpXZ KUzRNOKXW9w084x8Vlcx6cOWeJSRouih0eFrKbQVqCtsnF5HGRWI2M+1hDpJeSkVYJ3aqbYSOg4 y7lnvw9cTrnCtR8/vRaS4dm/FuUjjWkaeNvWp/bdY+BW0iFwHSIP9wAafKAA6vTr1q2qdBYmVbY ckUame60TANbSQA== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Content-Transfer-Encoding: quoted-printable From: Andre Przywara The AXP318W is a PMIC chip produced by X-Powers, it can be connected to an I2C bus. It has a large number of regulators: 9(!) DCDC buck converters, and 28 LDOs, also some ADCs, interrupts, and a power key. Describe the regmap and the MFD bits, along with the registers exposed via I2C only. This covers the regulators and interrupts for now. Advertise the device using the new compatible string. We use just "318" for the internal identifiers, for easier typing and less churn, but use "318W" for anything externally visible. If something else other than the "AXP318W" shows up, that's an easy change then. Signed-off-by: Andre Przywara Signed-off-by: Jerome Brunet Reviewed-by: Chen-Yu Tsai --- drivers/mfd/axp20x-i2c.c | 2 ++ drivers/mfd/axp20x.c | 81 ++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/axp20x.h | 88 ++++++++++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 171 insertions(+) diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c index a76bec5604c4..64c212b76e5e 100644 --- a/drivers/mfd/axp20x-i2c.c +++ b/drivers/mfd/axp20x-i2c.c @@ -66,6 +66,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = =3D { { .compatible =3D "x-powers,axp221", .data =3D (void *)AXP221_ID }, { .compatible =3D "x-powers,axp223", .data =3D (void *)AXP223_ID }, { .compatible =3D "x-powers,axp313a", .data =3D (void *)AXP313A_ID }, + { .compatible =3D "x-powers,axp318w", .data =3D (void *)AXP318_ID }, { .compatible =3D "x-powers,axp323", .data =3D (void *)AXP323_ID }, { .compatible =3D "x-powers,axp717", .data =3D (void *)AXP717_ID }, { .compatible =3D "x-powers,axp803", .data =3D (void *)AXP803_ID }, @@ -84,6 +85,7 @@ static const struct i2c_device_id axp20x_i2c_id[] =3D { { .name =3D "axp221", .driver_data =3D AXP221_ID }, { .name =3D "axp223", .driver_data =3D AXP223_ID }, { .name =3D "axp313a", .driver_data =3D AXP313A_ID }, + { .name =3D "axp318w", .driver_data =3D AXP318_ID }, { .name =3D "axp323", .driver_data =3D AXP323_ID }, { .name =3D "axp717", .driver_data =3D AXP717_ID }, { .name =3D "axp803", .driver_data =3D AXP803_ID }, diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 84839d4aa1ca..ea00c0cdce58 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -42,6 +42,7 @@ static const char * const axp20x_model_names[] =3D { [AXP223_ID] =3D "AXP223", [AXP288_ID] =3D "AXP288", [AXP313A_ID] =3D "AXP313a", + [AXP318_ID] =3D "AXP318W", [AXP323_ID] =3D "AXP323", [AXP717_ID] =3D "AXP717", [AXP803_ID] =3D "AXP803", @@ -218,6 +219,31 @@ static const struct regmap_access_table axp313a_volati= le_table =3D { .n_yes_ranges =3D ARRAY_SIZE(axp313a_volatile_ranges), }; =20 +static const struct regmap_range axp318_writeable_ranges[] =3D { + regmap_reg_range(AXP318_DCDC_OUTPUT_CONTROL1, AXP318_IRQ_STATE4), + regmap_reg_range(AXP318_SHUTDOWN_SRC_CTRL1, AXP318_TEMP_ADC_H_EN), + regmap_reg_range(AXP318_DIE_TEMP_ADC_H_EN, AXP318_DIE_TEMP_ADC_H_EN), + regmap_reg_range(AXP318_GPADC_H_EN, AXP318_GPADC_H_EN), + regmap_reg_range(AXP318_GPIO_CTRL, AXP318_WDOG_CTRL), +}; + +static const struct regmap_range axp318_volatile_ranges[] =3D { + regmap_reg_range(AXP318_IRQ_EN1, AXP318_IRQ_STATE4), + regmap_reg_range(AXP318_POWER_REASON, AXP318_SHUTDOWN_SOURCE), + regmap_reg_range(AXP318_TEMP_ADC_H_EN, AXP318_GPADC_L), + regmap_reg_range(AXP318_GPIO_INPUT, AXP318_GPIO_INPUT), +}; + +static const struct regmap_access_table axp318_writeable_table =3D { + .yes_ranges =3D axp318_writeable_ranges, + .n_yes_ranges =3D ARRAY_SIZE(axp318_writeable_ranges), +}; + +static const struct regmap_access_table axp318_volatile_table =3D { + .yes_ranges =3D axp318_volatile_ranges, + .n_yes_ranges =3D ARRAY_SIZE(axp318_volatile_ranges), +}; + static const struct regmap_range axp717_writeable_ranges[] =3D { regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1), regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL), @@ -447,6 +473,15 @@ static const struct regmap_config axp313a_regmap_confi= g =3D { .cache_type =3D REGCACHE_MAPLE, }; =20 +static const struct regmap_config axp318_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .wr_table =3D &axp318_writeable_table, + .volatile_table =3D &axp318_volatile_table, + .max_register =3D AXP318_WDOG_CTRL, + .cache_type =3D REGCACHE_MAPLE, +}; + static const struct regmap_config axp323_regmap_config =3D { .reg_bits =3D 8, .val_bits =3D 8, @@ -663,6 +698,28 @@ static const struct regmap_irq axp313a_regmap_irqs[] = =3D { INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), }; =20 +static const struct regmap_irq axp318_regmap_irqs[] =3D { + INIT_REGMAP_IRQ(AXP318, DCDC8_V_LOW, 0, 7), + INIT_REGMAP_IRQ(AXP318, DCDC7_V_LOW, 0, 6), + INIT_REGMAP_IRQ(AXP318, DCDC6_V_LOW, 0, 5), + INIT_REGMAP_IRQ(AXP318, DCDC5_V_LOW, 0, 4), + INIT_REGMAP_IRQ(AXP318, DCDC4_V_LOW, 0, 3), + INIT_REGMAP_IRQ(AXP318, DCDC3_V_LOW, 0, 2), + INIT_REGMAP_IRQ(AXP318, DCDC2_V_LOW, 0, 1), + INIT_REGMAP_IRQ(AXP318, DCDC1_V_LOW, 0, 0), + INIT_REGMAP_IRQ(AXP318, PEK_RIS_EDGE, 1, 6), + INIT_REGMAP_IRQ(AXP318, PEK_FAL_EDGE, 1, 5), + INIT_REGMAP_IRQ(AXP318, PEK_LONG, 1, 4), + INIT_REGMAP_IRQ(AXP318, PEK_SHORT, 1, 3), + INIT_REGMAP_IRQ(AXP318, DIE_TEMP_HIGH_LV2, 1, 2), + INIT_REGMAP_IRQ(AXP318, DIE_TEMP_HIGH_LV1, 1, 1), + INIT_REGMAP_IRQ(AXP318, DCDC9_V_LOW, 1, 0), + INIT_REGMAP_IRQ(AXP318, GPIO3_INPUT, 2, 6), + INIT_REGMAP_IRQ(AXP318, GPIO2_INPUT, 2, 5), + INIT_REGMAP_IRQ(AXP318, GPIO1_INPUT, 2, 4), + INIT_REGMAP_IRQ(AXP318, WDOG_EXPIRE, 3, 0), +}; + static const struct regmap_irq axp717_regmap_irqs[] =3D { INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7), INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6), @@ -884,6 +941,17 @@ static const struct regmap_irq_chip axp313a_regmap_irq= _chip =3D { .num_regs =3D 1, }; =20 +static const struct regmap_irq_chip axp318_regmap_irq_chip =3D { + .name =3D "axp318w_irq_chip", + .status_base =3D AXP318_IRQ_STATE1, + .ack_base =3D AXP318_IRQ_STATE1, + .unmask_base =3D AXP318_IRQ_EN1, + .init_ack_masked =3D true, + .irqs =3D axp318_regmap_irqs, + .num_irqs =3D ARRAY_SIZE(axp318_regmap_irqs), + .num_regs =3D 4, +}; + static const struct regmap_irq_chip axp717_regmap_irq_chip =3D { .name =3D "axp717_irq_chip", .status_base =3D AXP717_IRQ0_STATE, @@ -1061,6 +1129,10 @@ static const struct mfd_cell axp313a_cells[] =3D { MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), }; =20 +static const struct mfd_cell axp318_cells[] =3D { + MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1), +}; + static const struct mfd_cell axp717_cells[] =3D { MFD_CELL_NAME("axp20x-regulator"), MFD_CELL_RES("axp20x-pek", axp717_pek_resources), @@ -1248,6 +1320,9 @@ static int axp20x_power_off(struct sys_off_data *data) case AXP313A_ID: shutdown_reg =3D AXP313A_SHUTDOWN_CTRL; break; + case AXP318_ID: + shutdown_reg =3D AXP318_SHUTDOWN_CTRL; + break; default: shutdown_reg =3D AXP20X_OFF_CTRL; break; @@ -1312,6 +1387,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x) axp20x->regmap_cfg =3D &axp313a_regmap_config; axp20x->regmap_irq_chip =3D &axp313a_regmap_irq_chip; break; + case AXP318_ID: + axp20x->nr_cells =3D ARRAY_SIZE(axp318_cells); + axp20x->cells =3D axp318_cells; + axp20x->regmap_cfg =3D &axp318_regmap_config; + axp20x->regmap_irq_chip =3D &axp318_regmap_irq_chip; + break; case AXP323_ID: axp20x->nr_cells =3D ARRAY_SIZE(axp313a_cells); axp20x->cells =3D axp313a_cells; diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index 1badb4868d17..0191467de4ec 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -19,6 +19,7 @@ enum axp20x_variants { AXP223_ID, AXP288_ID, AXP313A_ID, + AXP318_ID, AXP323_ID, AXP717_ID, AXP803_ID, @@ -116,6 +117,71 @@ enum axp20x_variants { #define AXP313A_IRQ_STATE 0x21 #define AXP323_DCDC_MODE_CTRL2 0x22 =20 +#define AXP318_DCDC_OUTPUT_CONTROL1 0x10 +#define AXP318_DCDC_OUTPUT_CONTROL2 0x11 +#define AXP318_DCDC1_CONTROL 0x12 +#define AXP318_DCDC2_CONTROL 0x13 +#define AXP318_DCDC3_CONTROL 0x14 +#define AXP318_DCDC4_CONTROL 0x15 +#define AXP318_DCDC5_CONTROL 0x16 +#define AXP318_DCDC6_CONTROL 0x17 +#define AXP318_DCDC7_CONTROL 0x18 +#define AXP318_DCDC8_CONTROL 0x19 +#define AXP318_DCDC9_CONTROL 0x1a +#define AXP318_LDO_OUTPUT_CONTROL1 0x20 +#define AXP318_LDO_OUTPUT_CONTROL2 0x21 +#define AXP318_LDO_OUTPUT_CONTROL3 0x22 +#define AXP318_LDO_OUTPUT_CONTROL4 0x23 +#define AXP318_ALDO1_CONTROL 0x24 +#define AXP318_ALDO2_CONTROL 0x25 +#define AXP318_ALDO3_CONTROL 0x26 +#define AXP318_ALDO4_CONTROL 0x27 +#define AXP318_ALDO5_CONTROL 0x28 +#define AXP318_ALDO6_CONTROL 0x29 +#define AXP318_BLDO1_CONTROL 0x2a +#define AXP318_BLDO2_CONTROL 0x2b +#define AXP318_BLDO3_CONTROL 0x2c +#define AXP318_BLDO4_CONTROL 0x2d +#define AXP318_BLDO5_CONTROL 0x2e +#define AXP318_CLDO1_CONTROL 0x2f +#define AXP318_CLDO2_CONTROL 0x30 +#define AXP318_CLDO3_CONTROL 0x31 +#define AXP318_CLDO4_CONTROL 0x32 +#define AXP318_CLDO5_CONTROL 0x33 +#define AXP318_DLDO1_CONTROL 0x34 +#define AXP318_DLDO2_CONTROL 0x35 +#define AXP318_DLDO3_CONTROL 0x36 +#define AXP318_DLDO4_CONTROL 0x37 +#define AXP318_DLDO5_CONTROL 0x38 +#define AXP318_DLDO6_CONTROL 0x39 +#define AXP318_ELDO1_CONTROL 0x3a +#define AXP318_ELDO2_CONTROL 0x3b +#define AXP318_ELDO3_CONTROL 0x3c +#define AXP318_ELDO4_CONTROL 0x3d +#define AXP318_ELDO5_CONTROL 0x3e +#define AXP318_ELDO6_CONTROL 0x3f +#define AXP318_IRQ_EN1 0x40 +#define AXP318_IRQ_EN2 0x41 +#define AXP318_IRQ_EN3 0x42 +#define AXP318_IRQ_EN4 0x43 +#define AXP318_IRQ_STATE1 0x48 +#define AXP318_IRQ_STATE2 0x49 +#define AXP318_IRQ_STATE3 0x4a +#define AXP318_IRQ_STATE4 0x4b +#define AXP318_POWER_REASON 0x50 +#define AXP318_SHUTDOWN_SOURCE 0x51 +#define AXP318_SHUTDOWN_SRC_CTRL1 0x52 +#define AXP318_SHUTDOWN_SRC_CTRL2 0x53 +#define AXP318_SHUTDOWN_CTRL 0x55 +#define AXP318_TEMP_ADC_H_EN 0x65 +#define AXP318_TEMP_ADC_L 0x66 +#define AXP318_DIE_TEMP_ADC_H_EN 0x67 +#define AXP318_GPADC_H_EN 0x69 +#define AXP318_GPADC_L 0x6a +#define AXP318_GPIO_CTRL 0x70 +#define AXP318_GPIO_INPUT 0x71 +#define AXP318_WDOG_CTRL 0x77 + #define AXP717_ON_INDICATE 0x00 #define AXP717_PMU_STATUS_2 0x01 #define AXP717_BC_DETECT 0x05 @@ -819,6 +885,28 @@ enum axp313a_irqs { AXP313A_IRQ_PEK_RIS_EDGE, }; =20 +enum axp318_irqs { + AXP318_IRQ_DCDC1_V_LOW, + AXP318_IRQ_DCDC2_V_LOW, + AXP318_IRQ_DCDC3_V_LOW, + AXP318_IRQ_DCDC4_V_LOW, + AXP318_IRQ_DCDC5_V_LOW, + AXP318_IRQ_DCDC6_V_LOW, + AXP318_IRQ_DCDC7_V_LOW, + AXP318_IRQ_DCDC8_V_LOW, + AXP318_IRQ_DCDC9_V_LOW, + AXP318_IRQ_DIE_TEMP_HIGH_LV1, + AXP318_IRQ_DIE_TEMP_HIGH_LV2, + AXP318_IRQ_PEK_SHORT, + AXP318_IRQ_PEK_LONG, + AXP318_IRQ_PEK_FAL_EDGE, + AXP318_IRQ_PEK_RIS_EDGE, + AXP318_IRQ_GPIO1_INPUT =3D 20, + AXP318_IRQ_GPIO2_INPUT, + AXP318_IRQ_GPIO3_INPUT, + AXP318_IRQ_WDOG_EXPIRE =3D 24, +}; + enum axp717_irqs { AXP717_IRQ_VBUS_FAULT, AXP717_IRQ_VBUS_OVER_V, --=20 2.47.3 From nobody Tue Sep 29 04:14:02 2026 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 229B6401A38 for ; Wed, 12 Aug 2026 21:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570271; cv=none; b=XPVb1sMUbRtgazY2PWSjjmmL6Cth/H23l0Fpko1H4Z+KRoMfUYfbpICReo95JeH89sfPOtaCMzejuvCZas3x0DMOeAwLoQhp9s5t02pzAcDomrGJrM9NODBOTbsVcfFUuJ9rc+GJqPMvFEnnzNnA+CrVX2JcD2ifMzl+W4KN7js= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786570271; c=relaxed/simple; bh=cPlCNpAmkXW66Y4FH05sass5lvTqJtGFtyB1OWNY78w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YI3ttr39nI8wo6m2Wz1D70JFHqBYvxX/nirACxP5e+lzIFJANS+gaI0nBIw4m7aepZHfe+QRB8diljdaj/fOvRLJXP85A9L/vjkfrWhcir0OAY8iHB2sbtOkHf+YyaEmBGJcgvNXYIVE81jDC/w+uNlzqXkLvLtjYiXJkS6Gnp4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b=CnHX/Rrn; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre.com header.i=@baylibre.com header.b="CnHX/Rrn" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4956869750eso233455e9.2 for ; Wed, 12 Aug 2026 14:31:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre.com; s=google; t=1786570266; x=1787175066; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=8QdM7aDJ6BUm8/+T7aYi5rYCae/1VGfhBTecUKPKjBE=; b=CnHX/RrnWHEBDSRdvhYW4HvGMV/DLDVLOIfNsHdl/GIBE+jEKL08XKiIp/1N7WMPNu FMcDYlUjBPvPt9qI4Deg4FknKQZTYS+l6fpalf3Foq8IgHdn8HZ2wqj8MzjYkMjLFGUv CT5sa+m2MiL6vW5rte1oUfDrf3V6WEhg8pnXtzHeHDqhhsLqcTnFkBiprQUvlJPQEKVc 6paHmOHnn7N5dWYZDJYcTeyeL1+yMyaDcYBQ0I1030MNfgKGqKLzSkm0hpSbormz8PyJ OI+wrqf8cKe15hbMCDtkpoyC9tDa5RUxPtG4yfjb4oDP2th5wNAr4wCIrVf1aI+Voov+ gTiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786570266; x=1787175066; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=8QdM7aDJ6BUm8/+T7aYi5rYCae/1VGfhBTecUKPKjBE=; b=NY5D+uHbIy1JZSAKncfUBMlmqcKAqJIuI0G0XyyS5BMouIBnSbUdzyaVNLKkTH3H/a S8c34aNv6V2s+6QqsdtpNth1PphAG7Nu4rQr8zyK2lzWQ8SW2mgiKp0kMDVZOEFMPP/7 1OZEtQdClypaJEK9VRkgtqNzj6xMhALF73RfS1dJIEm4ru9u52Cgr+7Kpezoo1UeYJbd RUJJizofO2JSiTH/cz91KIb+g/e+7EH7lNoHWOAlQzop/iV7p+GrkpduqofSI/PkAzGh mARpIOYG7ZBdOkyQ8yC9P7173HX4Ob/CjjGUgwC4iHf8YLF8+SafkFATwWEr7m/DuKRX WWOw== X-Forwarded-Encrypted: i=1; AHgh+Rrg+KpmFZ9XCORkHZ1nkba8BMZpz+JoUE4UIuypkJ+AOySVVhbtwAWP93Is8KsDEb2MT4Uk1VAzQD1rlvc=@vger.kernel.org X-Gm-Message-State: AOJu0YzkqpI7XboJt5Fkrazx6ERKgzW4Q5TfB2XqVat0BQ7GPula5Uld iCpVLC5e0JEmetTGt4e6kpGNl18ak+jxRioN1qxYJ97UDgffS9QYtpmfMshaxE+27C0= X-Gm-Gg: AR+sD10cFshMFHTzKL+SxEp45ikfoXifNrNh5WN/OP7oYehs+4dnXOyoVSfVV3IJLLG RQ42xhAEU0/YH7vCqwbpfhocuBE5Gjf7K35STz6d255pbmYkyQDmlmDgro9Zx9W/wb9QA/UWlOi LhBHm4ZobIWt4I63mxqA5K2maAHL5+VFqPpl8uTyD+2kVbLbQUgnoocKpStB/nd0AB7ebRCcmno vjWjDLO0uCHYklqzJmgVtmxMf24bJHAabSy6/Sw8WuoHiS1EfAuAdMAdzx08shbyOy4vBIA4B4X iVHVU3L/T5Pc6DMuNir5n2mxZtVmVDw9wid+TgYIMNHsK6/S8eDWhUPiaHBgeRlNiT4td9Wfn4g tmrcgCZB/IFmGZvyoC5OVrQToQuhs8CSATKi5VVrLM0niV7IO8NUNYDblgqWbxqMCnG/wqI/YMC b7X92ptNiC2DeF7kbulHR/cO4gRoeHyylxPLWPAJUi3OCzLNEpYI7nfAiQcw4= X-Received: by 2002:a05:600c:3143:b0:498:ff3:71ed with SMTP id 5b1f17b1804b1-49982204d2fmr4807435e9.17.1786570266344; Wed, 12 Aug 2026 14:31:06 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:282d:879b:d1fe:f977]) by smtp.gmail.com with UTF8SMTPSA id 5b1f17b1804b1-49981b03e70sm17064145e9.3.2026.08.12.14.31.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Aug 2026 14:31:05 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Liam Girdwood , Mark Brown Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mfd@lists.linux.dev Subject: [PATCH RESEND v6 5/5] regulator: axp20x: add support for the AXP318W Date: Wed, 12 Aug 2026 23:30:43 +0200 Message-ID: <20260812-axp318-regulator-v6-5-d6b84b55c000@baylibre.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> References: <20260812-axp318-regulator-v6-0-d6b84b55c000@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=21087; i=jbrunet@baylibre.com; h=from:subject:message-id; bh=4RVYcCbWmpUy7Aem4G3dzn5By1vjwTdoe6KYKqM0p+M=; b=owEBbQKS/ZANAwAKAeb8Dxw38tqFAcsmYgBqfOJ+6SDSDIKki52nC8/PqNv7JiHZXspD1SWVj xbsWl/uHEyJAjMEAAEKAB0WIQT04VmuGPP1bV8btxvm/A8cN/LahQUCanzifgAKCRDm/A8cN/La hfuDD/9GrPfdcsyTZc2S4CzcYdeWJRaJvOuyxW+z5jL+94J9kxvZNBaVZYLB9T9/nW3G8vAicsP N1+QIfYXl1qB/zCzdn176VpRuiFPDczbtd3mP0mK5rEod2+TA7Nly8roZbIs1vV7TRSRYICQ0vF FC7ugiVcYxk28VVbm2vCp5oAxAtKXpUOqmtU6N5b3o9DXBl/VCcLqpJ/thc3PCgGtWzAwv8XHQp bFfL49xZU8Nsn0Fl8euAVursdlpUUPopOPken374FS8KdmrL5UCBmM0+J/cG4AXoksqAFJ0U+TD HvfrlZRJtnpIlDiPFao2tjucU+DwlxNyYUSaeWPMjfMPHJY0SBdCcQanbIlwFFSo5QNKpfkYFZE mA+V8mGEJE+A+tQN00QFNgUtL1tJVr6Y6PekXe/JcSYY2si1Hen7ziQI3rCSA7hhxCh5/U4kfoC VsEtoAgSjkc0iYICL/LMISgRwZA/qcj91hUplMhMqLvUf58vne7UR9O6nOV6fKI5CU36SLqWiah TUeHAO81ihoU17MjHNvui4M0yyYKdQDmOy/Aw6LehYcX3zOKjGYzEcxQEnKDuQsz0WFxYORW6db JEh6DuljgkkDLA73fxhFEC7OOKGnYbhDFKalnHlqZ5GFFhY8arce6z9wrxt+vcXmA3heOyVebj0 OLxWP2Lgk47E5rg== X-Developer-Key: i=jbrunet@baylibre.com; a=openpgp; fpr=F29F26CF27BAE1A9719AE6BDC3C92AAF3E60AED9 Content-Transfer-Encoding: quoted-printable From: Andre Przywara The X-Powers AXP318W is a typical PMIC from X-Powers, featuring nine DC/DC converters and 28 LDOs, on the regulator side. Describe the chip's voltage settings and switch registers, how the voltages are encoded, and connect this to the MFD device via its regulator ID. We use just "318" for the internal identifiers, for easier typing and less churn. If something else other than the "AXP318W" shows up, that's an easy change, externally visible strings carry the additional letter already. Reviewed-by: Mark Brown Signed-off-by: Andre Przywara Co-developed-by: Jerome Brunet Signed-off-by: Jerome Brunet Reviewed-by: Chen-Yu Tsai --- drivers/regulator/axp20x-regulator.c | 324 +++++++++++++++++++++++++++++++= +++- include/linux/mfd/axp20x.h | 45 +++++ 2 files changed, 360 insertions(+), 9 deletions(-) diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20= x-regulator.c index da891415efc0..9e81e2cb7542 100644 --- a/drivers/regulator/axp20x-regulator.c +++ b/drivers/regulator/axp20x-regulator.c @@ -138,6 +138,29 @@ #define AXP313A_DCDC_V_OUT_MASK GENMASK(6, 0) #define AXP313A_LDO_V_OUT_MASK GENMASK(4, 0) =20 +#define AXP318_DCDC1_PFM_PWM_CTRL BIT(7) +#define AXP318_DCDC23_POLYPHASE_CTRL BIT(6) +#define AXP318_DCDC45_POLYPHASE_CTRL BIT(7) +#define AXP318_DCDC1_V_OUT_MASK GENMASK(4, 0) +#define AXP318_DCDC2_V_OUT_MASK GENMASK(6, 0) +#define AXP318_LDO_V_OUT_MASK GENMASK(4, 0) +#define AXP318_ELDO_V_OUT_MASK GENMASK(5, 0) +#define AXP318_THRESHOLD_VOLTAGE 1540000 +/* + * FIXME: + * Some LDOs of the AXP318 may be fed by different supplies and + * the documentation repeatedly warns that output voltage must + * be less than the supply, which is the case for any LDO really. + * + * The best way to let the framework handle this is to set the + * min_dropout_uV field. However the AXP318 documentation + * does not provide any information about this. + * + * Realistically, it can't be less than 1uV so use this + * for all LDOs until we know more. + */ +#define AXP318_LDO_MIN_DROPOUT 1 /* uV */ + #define AXP717_DCDC1_NUM_VOLTAGES 88 #define AXP717_DCDC2_NUM_VOLTAGES 107 #define AXP717_DCDC3_NUM_VOLTAGES 103 @@ -371,8 +394,8 @@ .ops =3D &axp20x_ops, \ } =20 -#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ - _vmask, _ereg, _emask) \ +#define AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vr= eg, \ + _vmask, _ereg, _emask, _ops, _bpreg, _bpmask, _dropout) \ [_family##_##_id] =3D { \ .name =3D (_match), \ .supply_name =3D (_supply), \ @@ -384,13 +407,32 @@ .owner =3D THIS_MODULE, \ .min_uV =3D (_min) * 1000, \ .uV_step =3D (_step) * 1000, \ + .min_dropout_uV =3D (_dropout), \ .vsel_reg =3D (_vreg), \ .vsel_mask =3D (_vmask), \ .enable_reg =3D (_ereg), \ .enable_mask =3D (_emask), \ - .ops =3D &axp20x_ops, \ + .bypass_reg =3D (_bpreg), \ + .bypass_mask =3D (_bpmask), \ + .ops =3D (_ops), \ } =20 +#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_ops, 0, 0, 0) + +#define AXP_DESC_DO(_family, _id, _match, _supply, _min, _max, _step, _vre= g, \ + _vmask, _ereg, _emask, _dropout) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_ops, 0, 0, _dropout) + +#define AXP_DESC_BYPASS(_family, _id, _match, _supply, _min, _max, _step, = _vreg,\ + _vmask, _ereg, _emask, _bpreg, _bpmask, _dropout) \ + AXP_DESC_EXT(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, &axp20x_bypass_ops, _bpreg, \ + _bpmask, _dropout) + #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask) \ [_family##_##_id] =3D { \ .name =3D (_match), \ @@ -419,8 +461,9 @@ .ops =3D &axp20x_ops_fixed \ } =20 -#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, _n_v= oltages, \ - _vreg, _vmask, _ereg, _emask, _ramp_delay) \ +#define AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay, _ops) \ [_family##_##_id] =3D { \ .name =3D (_match), \ .supply_name =3D (_supply), \ @@ -436,10 +479,23 @@ .enable_mask =3D (_emask), \ .linear_ranges =3D (_ranges), \ .n_linear_ranges =3D ARRAY_SIZE(_ranges), \ - .ramp_delay =3D (_ramp_delay), \ - .ops =3D &axp20x_ops_range, \ + .ramp_delay =3D (_ramp_delay), \ + .ops =3D (_ops), \ } =20 +#define AXP_DESC_RANGES_THRESHOLD(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask) \ + AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + 0, &axp318_threshold_ops_range) + +#define AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay) \ + AXP_DESC_RANGES_DELAY_OPS(_family, _id, _match, _supply, _ranges, \ + _n_voltages, _vreg, _vmask, _ereg, _emask, \ + _ramp_delay, &axp20x_ops_range) + #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltage= s, \ _vreg, _vmask, _ereg, _emask) \ AXP_DESC_RANGES_DELAY(_family, _id, _match, _supply, _ranges, \ @@ -567,6 +623,50 @@ static int axp20x_regulator_enable_regmap(struct regul= ator_dev *rdev) return regulator_enable_regmap(rdev); }; =20 +static int axp318_threshold_check(struct regulator_dev *rdev, + unsigned int sel) +{ + int old_sel, old_uV, new_uV, enabled; + + /* Only applicable if the regulator is enabled */ + enabled =3D rdev->desc->ops->is_enabled(rdev); + if (enabled <=3D 0) + return enabled; + + old_sel =3D rdev->desc->ops->get_voltage_sel(rdev); + if (old_sel < 0) + return old_sel; + + old_uV =3D rdev->desc->ops->list_voltage(rdev, old_sel); + if (old_uV < 0) + return old_uV; + + new_uV =3D rdev->desc->ops->list_voltage(rdev, sel); + if (new_uV < 0) + return new_uV; + + /* Crossing the threshold ? */ + if ((old_uV <=3D AXP318_THRESHOLD_VOLTAGE && + new_uV > AXP318_THRESHOLD_VOLTAGE) || + (new_uV <=3D AXP318_THRESHOLD_VOLTAGE && + old_uV > AXP318_THRESHOLD_VOLTAGE)) + return -EBUSY; + + return 0; +} + +static int axp318_threshold_set_voltage_sel(struct regulator_dev *rdev, + unsigned int sel) +{ + int ret; + + ret =3D axp318_threshold_check(rdev, sel); + if (ret < 0) + return ret; + + return regulator_set_voltage_sel_regmap(rdev, sel); +} + static const struct regulator_ops axp20x_ops_fixed =3D { .list_voltage =3D regulator_list_voltage_linear, }; @@ -580,6 +680,15 @@ static const struct regulator_ops axp20x_ops_range =3D= { .is_enabled =3D regulator_is_enabled_regmap, }; =20 +static const struct regulator_ops axp318_threshold_ops_range =3D { + .set_voltage_sel =3D axp318_threshold_set_voltage_sel, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .list_voltage =3D regulator_list_voltage_linear_range, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, +}; + static const struct regulator_ops axp20x_ops =3D { .set_voltage_sel =3D regulator_set_voltage_sel_regmap, .get_voltage_sel =3D regulator_get_voltage_sel_regmap, @@ -590,6 +699,18 @@ static const struct regulator_ops axp20x_ops =3D { .set_ramp_delay =3D axp20x_set_ramp_delay, }; =20 +static const struct regulator_ops axp20x_bypass_ops =3D { + .set_voltage_sel =3D regulator_set_voltage_sel_regmap, + .get_voltage_sel =3D regulator_get_voltage_sel_regmap, + .list_voltage =3D regulator_list_voltage_linear, + .enable =3D axp20x_regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .set_ramp_delay =3D axp20x_set_ramp_delay, + .get_bypass =3D regulator_get_bypass_regmap, + .set_bypass =3D regulator_set_bypass_regmap, +}; + static const struct regulator_ops axp20x_ops_sw =3D { .enable =3D regulator_enable_regmap, .disable =3D regulator_disable_regmap, @@ -765,6 +886,158 @@ static const struct regulator_desc axp313a_regulators= [] =3D { AXP_DESC_FIXED(AXP313A, RTC_LDO, "rtc-ldo", "vin1", 1800), }; =20 +static const struct linear_range axp318_dcdc2_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), +}; + +static const struct linear_range axp318_dcdc6_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), + REGULATOR_LINEAR_RANGE(1800000, 88, 118, 20000), + REGULATOR_LINEAR_RANGE(2440000, 119, 127, 40000), +}; + +static const struct linear_range axp318_dcdc7_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), +}; + +static const struct linear_range axp318_dcdc8_ranges[] =3D { + REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), + REGULATOR_LINEAR_RANGE(1220000, 71, 102, 20000), + REGULATOR_LINEAR_RANGE(1900000, 103, 118, 100000), +}; + +static const struct regulator_desc axp318_regulators[] =3D { + AXP_DESC(AXP318, DCDC1, "dcdc1", "vin19", 1000, 3400, 100, + AXP318_DCDC1_CONTROL, AXP318_DCDC1_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(0)), + AXP_DESC_RANGES(AXP318, DCDC2, "dcdc2", "vin23", + axp318_dcdc2_ranges, 88, + AXP318_DCDC2_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(1)), + AXP_DESC_RANGES(AXP318, DCDC3, "dcdc3", "vin23", + axp318_dcdc2_ranges, 88, + AXP318_DCDC3_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(2)), + AXP_DESC_RANGES(AXP318, DCDC4, "dcdc4", "vin45", + axp318_dcdc2_ranges, 88, + AXP318_DCDC4_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(3)), + AXP_DESC_RANGES(AXP318, DCDC5, "dcdc5", "vin45", + axp318_dcdc2_ranges, 88, + AXP318_DCDC5_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(4)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC6, "dcdc6", "vin678", + axp318_dcdc6_ranges, 128, + AXP318_DCDC6_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(5)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC7, "dcdc7", "vin678", + axp318_dcdc7_ranges, 103, + AXP318_DCDC7_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(6)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC8, "dcdc8", "vin678", + axp318_dcdc8_ranges, 119, + AXP318_DCDC8_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL1, BIT(7)), + AXP_DESC_RANGES_THRESHOLD(AXP318, DCDC9, "dcdc9", "vin19", + axp318_dcdc8_ranges, 119, + AXP318_DCDC9_CONTROL, AXP318_DCDC2_V_OUT_MASK, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(0)), + AXP_DESC_SW(AXP318, SWOUT1, "swout1", NULL, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(3)), + AXP_DESC_SW(AXP318, SWOUT2, "swout2", NULL, + AXP318_DCDC_OUTPUT_CONTROL2, BIT(4)), + AXP_DESC_DO(AXP318, ALDO1, "aldo1", "aldo156in", 500, 3400, 100, + AXP318_ALDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO2, "aldo2", "aldo234in", 500, 3400, 100, + AXP318_ALDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO3, "aldo3", "aldo234in", 500, 3400, 100, + AXP318_ALDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO4, "aldo4", "aldo234in", 500, 3400, 100, + AXP318_ALDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO5, "aldo5", "aldo156in", 500, 3400, 100, + AXP318_ALDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ALDO6, "aldo6", "aldo156in", 500, 3400, 100, + AXP318_ALDO6_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO1, "bldo1", "bldoin", 500, 3400, 100, + AXP318_BLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO2, "bldo2", "bldoin", 500, 3400, 100, + AXP318_BLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL1, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO3, "bldo3", "bldoin", 500, 3400, 100, + AXP318_BLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO4, "bldo4", "bldoin", 500, 3400, 100, + AXP318_BLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, BLDO5, "bldo5", "bldoin", 500, 3400, 100, + AXP318_BLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO1, "cldo1", "cldoin", 500, 3400, 100, + AXP318_CLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO2, "cldo2", "cldoin", 500, 3400, 100, + AXP318_CLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO3, "cldo3", "cldoin", 500, 3400, 100, + AXP318_CLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO4, "cldo4", "cldoin", 500, 3400, 100, + AXP318_CLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, CLDO5, "cldo5", "cldoin", 500, 3400, 100, + AXP318_CLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL2, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO1, "dldo1", "dldoin", 500, 3400, 100, + AXP318_DLDO1_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO2, "dldo2", "dldoin", 500, 3400, 100, + AXP318_DLDO2_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(1), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO3, "dldo3", "dldoin", 500, 3400, 100, + AXP318_DLDO3_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(2), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO4, "dldo4", "dldoin", 500, 3400, 100, + AXP318_DLDO4_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO5, "dldo5", "dldoin", 500, 3400, 100, + AXP318_DLDO5_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(4), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, DLDO6, "dldo6", "dldoin", 500, 3400, 100, + AXP318_DLDO6_CONTROL, AXP318_LDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(5), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO1, "eldo1", "eldoin", 500, 1500, 25, + AXP318_ELDO1_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO2, "eldo2", "eldoin", 500, 1500, 25, + AXP318_ELDO2_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL3, BIT(7), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO3, "eldo3", "eldoin", 500, 1500, 25, + AXP318_ELDO3_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(0), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_BYPASS(AXP318, ELDO4, "eldo4", "eldoin", 500, 1500, 25, + AXP318_ELDO4_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(1), + AXP318_ELDO4_CONTROL, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_BYPASS(AXP318, ELDO5, "eldo5", "eldoin", 500, 1500, 25, + AXP318_ELDO5_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(2), + AXP318_ELDO5_CONTROL, BIT(6), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_DO(AXP318, ELDO6, "eldo6", "eldoin", 500, 1500, 25, + AXP318_ELDO6_CONTROL, AXP318_ELDO_V_OUT_MASK, + AXP318_LDO_OUTPUT_CONTROL4, BIT(3), AXP318_LDO_MIN_DROPOUT), + AXP_DESC_FIXED(AXP318, RTC_LDO, "rtc-ldo", "ips", 1800), +}; + static const struct linear_range axp717_dcdc1_ranges[] =3D { REGULATOR_LINEAR_RANGE(500000, 0, 70, 10000), REGULATOR_LINEAR_RANGE(1220000, 71, 87, 20000), @@ -1347,6 +1620,7 @@ static int axp20x_set_dcdc_freq(struct platform_devic= e *pdev, u32 dcdcfreq) step =3D 150; break; case AXP313A_ID: + case AXP318_ID: case AXP323_ID: case AXP717_ID: case AXP15060_ID: @@ -1430,6 +1704,20 @@ static int axp20x_set_dcdc_workmode(struct regulator= _dev *rdev, int id, u32 work workmode <<=3D ffs(mask) - 1; break; =20 + case AXP318_ID: + /* + * Only DCDC1 has PWM control on the AXP318 + * The other DCDCs control DVM through bit 7 of the related + * registers. Work mode could possibly extended to deal with + * this but it is not how it is documented at the moment + */ + if (id !=3D AXP318_DCDC1) + return -EINVAL; + reg =3D AXP318_DCDC1_CONTROL; + mask =3D AXP318_DCDC1_PFM_PWM_CTRL; + workmode <<=3D ffs(mask) - 1; + break; + case AXP806_ID: /* * AXP806 DCDC regulator IDs have the same range as AXP22X. @@ -1543,6 +1831,17 @@ static bool axp20x_is_polyphase_slave(struct axp20x_= dev *axp20x, int id) } break; =20 + case AXP318_ID: + regmap_read(axp20x->regmap, AXP318_DCDC_CONTROL1, ®); + + switch (id) { + case AXP318_DCDC3: + return !!(reg & AXP318_DCDC23_POLYPHASE_CTRL); + case AXP318_DCDC5: + return !!(reg & AXP318_DCDC45_POLYPHASE_CTRL); + } + break; + default: return false; } @@ -1585,6 +1884,10 @@ static int axp20x_regulator_probe(struct platform_de= vice *pdev) regulators =3D axp313a_regulators; nregulators =3D AXP313A_REG_ID_MAX; break; + case AXP318_ID: + regulators =3D axp318_regulators; + nregulators =3D AXP318_REG_ID_MAX; + break; case AXP717_ID: regulators =3D axp717_regulators; nregulators =3D AXP717_REG_ID_MAX; @@ -1651,7 +1954,9 @@ static int axp20x_regulator_probe(struct platform_dev= ice *pdev) if ((regulators =3D=3D axp22x_regulators && i =3D=3D AXP22X_DC1SW) || (regulators =3D=3D axp803_regulators && i =3D=3D AXP803_DC1SW) || (regulators =3D=3D axp809_regulators && i =3D=3D AXP809_DC1SW) || - (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_SW)) { + (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_SW) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_SWOUT1) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_SWOUT2)) { new_desc =3D devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL); if (!new_desc) @@ -1709,7 +2014,8 @@ static int axp20x_regulator_probe(struct platform_dev= ice *pdev) */ if ((regulators =3D=3D axp22x_regulators && i =3D=3D AXP22X_DCDC1) || (regulators =3D=3D axp809_regulators && i =3D=3D AXP809_DCDC1) || - (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_DCDC1)) + (regulators =3D=3D axp15060_regulators && i =3D=3D AXP15060_DCDC1) || + (regulators =3D=3D axp318_regulators && i =3D=3D AXP318_DCDC1)) of_property_read_string(rdev->dev.of_node, "regulator-name", &dcdc1_name); diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index 0191467de4ec..251f057ea76d 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -128,6 +128,7 @@ enum axp20x_variants { #define AXP318_DCDC7_CONTROL 0x18 #define AXP318_DCDC8_CONTROL 0x19 #define AXP318_DCDC9_CONTROL 0x1a +#define AXP318_DCDC_CONTROL1 0x1b #define AXP318_LDO_OUTPUT_CONTROL1 0x20 #define AXP318_LDO_OUTPUT_CONTROL2 0x21 #define AXP318_LDO_OUTPUT_CONTROL3 0x22 @@ -564,6 +565,50 @@ enum { AXP313A_REG_ID_MAX, }; =20 +enum { + AXP318_DCDC1 =3D 0, + AXP318_DCDC2, + AXP318_DCDC3, + AXP318_DCDC4, + AXP318_DCDC5, + AXP318_DCDC6, + AXP318_DCDC7, + AXP318_DCDC8, + AXP318_DCDC9, + AXP318_ALDO1, + AXP318_ALDO2, + AXP318_ALDO3, + AXP318_ALDO4, + AXP318_ALDO5, + AXP318_ALDO6, + AXP318_BLDO1, + AXP318_BLDO2, + AXP318_BLDO3, + AXP318_BLDO4, + AXP318_BLDO5, + AXP318_CLDO1, + AXP318_CLDO2, + AXP318_CLDO3, + AXP318_CLDO4, + AXP318_CLDO5, + AXP318_DLDO1, + AXP318_DLDO2, + AXP318_DLDO3, + AXP318_DLDO4, + AXP318_DLDO5, + AXP318_DLDO6, + AXP318_ELDO1, + AXP318_ELDO2, + AXP318_ELDO3, + AXP318_ELDO4, + AXP318_ELDO5, + AXP318_ELDO6, + AXP318_SWOUT1, + AXP318_SWOUT2, + AXP318_RTC_LDO, + AXP318_REG_ID_MAX, +}; + enum { AXP717_DCDC1 =3D 0, AXP717_DCDC2, --=20 2.47.3