From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E94F834678E; Tue, 11 Aug 2026 22:15:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486528; cv=none; b=nCGjo5UClPBjzQGCYeYBoFtLu3M7U45igFHMdqTNKs1bt4JdvM3oVCCzTObUDmwNHoRev7xMsK3lcEUxMEmsjON5kUsTmRWOOJzFvRl0jMjQaZqkCq9egjQj6GZEz3x2zBVNwOUurYa8wbsH2YocOjq9OyfWsY5tdMn2aCe7agE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486528; c=relaxed/simple; bh=YPrG4nrZElGOdTsycHzrRfWO4pDavR67fOeBSr39O78=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=of/tRedGpCFEfTFEJ3Q25Q1+MZil3x5ywNVQWvJvzFtc6GQNh2ROLlkiAKct7VaCMDK5MUtSZlEZY/s3ZfGBzTZ6LEfGCqCLmtn2L7WoGeXffSs3IaK9/my9PaDOKITSB5ugt9yJ/97dCic90Wz01H0wRtsCxRgxllXpFvjzykk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=D8Id2yQz; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="D8Id2yQz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1786486526; x=1818022526; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YPrG4nrZElGOdTsycHzrRfWO4pDavR67fOeBSr39O78=; b=D8Id2yQzEE56STqu6AsPNm9zwhLc37ygFc8IfudNSyc35mCZfAyatQGM 3LsyNMzwrkzTy/hVOBCocRlVWkK/kcg2KvB7Lc8OCEZ/TtGMj6li8QrjD MWGvwrdHiku4sbkXEJ4mQA8VMvJYRd8I8/NT+OGgbEIaDD54JPAigO5vu lN/Xeuvp0vyu5NqUsj70h97CTMTRkm3mS/cj7e/SqTFWwmTs7sH74+NIf oiaHJtzm5dVHvsIpQ2CES4KPUaxhH9CRdjtvRtpeTQLs4Mc3y1QQnwE3B 1H8ruvMMwqq471ME8LztIB9KtTPgFXov2YbSgqTxmnZ2N82L3KYBlyO69 w==; X-CSE-ConnectionGUID: IsthR/AuRq2JhHcGWkF+jQ== X-CSE-MsgGUID: CFfLsppnRPKRGe3+JTR8Zg== X-IronPort-AV: E=McAfee;i="6800,10657,11872"; a="97374768" X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="97374768" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2026 15:15:24 -0700 X-CSE-ConnectionGUID: KSECPpFGR/e7TFH7wF1AQQ== X-CSE-MsgGUID: 9G+EX+P8RuCthCOwJRGFAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="262138180" Received: from spandruv-desk.jf.intel.com ([10.54.55.20]) by orviesa010.jf.intel.com with ESMTP; 11 Aug 2026 15:15:25 -0700 From: Srinivas Pandruvada To: ilpo.jarvinen@linux.intel.com, hansg@kernel.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, sammiee5311@gmail.com, Srinivas Pandruvada , stable@vger.kernel.org Subject: [PATCH 1/6] platform/x86: ISST: Validate logical CPU id and clos id Date: Tue, 11 Aug 2026 15:15:09 -0700 Message-ID: <20260811221514.3905817-2-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> References: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Validate max CLOS ID and logical CPU ID for core power feature. Reject any clos level or logical CPU number greater than the supported maximum. These are used to calculate MMIO offset. Fixes: 12a7d2cb811d ("platform/x86: ISST: Add SST-CP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- .../x86/intel/speed_select_if/isst_tpmi_core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index f1b6109521c5..a5ab3be92afa 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -649,6 +649,8 @@ static long isst_if_core_power_state(void __user *argp) #define SST_CLOS_CONFIG_MAX_START 16 #define SST_CLOS_CONFIG_MAX_WIDTH 8 =20 +#define SST_MAX_CLOS 3 + static long isst_if_clos_param(void __user *argp) { struct tpmi_per_power_domain_info *power_domain_info; @@ -657,6 +659,9 @@ static long isst_if_clos_param(void __user *argp) if (copy_from_user(&clos_param, argp, sizeof(clos_param))) return -EFAULT; =20 + if (clos_param.clos > SST_MAX_CLOS) + return -EINVAL; + power_domain_info =3D get_instance(clos_param.socket_id, clos_param.power= _domain_id); if (!power_domain_info) return -EINVAL; @@ -703,6 +708,8 @@ static long isst_if_clos_param(void __user *argp) #define SST_CLOS_ASSOC_CPUS_PER_REG 16 #define SST_CLOS_ASSOC_BITS_PER_CPU 4 =20 +#define SST_CLOS_ASSOC_MAX_LOGICAL_CPU 63 + static long isst_if_clos_assoc(void __user *argp) { struct isst_if_clos_assoc_cmds assoc_cmds; @@ -729,9 +736,15 @@ static long isst_if_clos_assoc(void __user *argp) if (copy_from_user(&clos_assoc, ptr, sizeof(clos_assoc))) return -EFAULT; =20 + if (clos_assoc.clos > SST_MAX_CLOS) + return -EINVAL; + if (clos_assoc.socket_id >=3D topology_max_packages()) return -EINVAL; =20 + if (clos_assoc.logical_cpu > SST_CLOS_ASSOC_MAX_LOGICAL_CPU) + return -EINVAL; + cpu =3D clos_assoc.logical_cpu; clos =3D clos_assoc.clos; =20 --=20 2.53.0 From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C53094248A5; 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charset="utf-8" Validate the level before setting, so that it fails early instead of failing later when checking the bit mask for allowed levels. Fixes: ea009e4769fa3 ("platform/x86: ISST: Add SST-PP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index a5ab3be92afa..7be50d4167be 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -947,6 +947,9 @@ static int isst_if_set_perf_level(void __user *argp) if (!power_domain_info) return -EINVAL; =20 + if (perf_level.level > power_domain_info->max_level) + return -EINVAL; + if (power_domain_info->write_blocked || !capable(CAP_SYS_ADMIN)) return -EPERM; =20 --=20 2.53.0 From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4451E42E8D6; Tue, 11 Aug 2026 22:15:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486529; cv=none; b=tCnQGWG6knNS514YtiPr3awoY/AwpLHALHf19M8BbrEFQWr7Ps4OFmhWkfmDI7LfyD2LVmX+lseCyBawNu9bPhLg7s8z0ztbIkH4QpKL6cAt9AZ7fNZTisrOPDudBEOZjiVmIqLF4xjEkSlXE7N66tZK/Wy5otLrCdt7ialXX/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486529; c=relaxed/simple; bh=wen2TTivPfcuzyaIwp4PjkL8MEdm4AHGvn+e9kYX3Mw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gfgaCYLIbSZM4Cu33adYIDFdqQsX5WJeH578QHrNPjCwolTXUMmaa09vYPolznhTHAkrHk6J4F1o8rs2cgRsIt0cuPXRXPiqXyjTbz08qGIiGMCHhO1r2/bCiqAuAJxO8mQSsP0HQ+oBIqoMoJWJqosKVp7hKzcgErqsLrwooNI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mEP1EKO4; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mEP1EKO4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1786486528; x=1818022528; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wen2TTivPfcuzyaIwp4PjkL8MEdm4AHGvn+e9kYX3Mw=; b=mEP1EKO4NpYBrv6gWu/r55H4+eMEZjFFeu19IuuoBX3x/lImvTEl6I+D mCNuRN55XS9Y7aaRtDUULyY+DffaLWVE0iPWz217nrsaaF0xhgFEZuqls Yx10pAmAR+WOOfAH+WzrzQbxKFSLJwxGQOIq7xikLlISmlX4M3bPtv0OV ArwNJYq3PtQh2ZTGYD6E5oidILLf8FXFBU4plXe+8gqkThieEyiJatwxD UuhvkETt5/DyTJ8ioolmLKDu9+sTQ7rorbe8Qq35BJ6FSB+yRFoOXzN3s gpxSZH2vCSUG2dZeeTl22MXrMjw3GUCGKnOHLOjwzjwxg0cJ4CHdwcLsK w==; X-CSE-ConnectionGUID: 30IskS8bT52TCQGBplw11Q== X-CSE-MsgGUID: y5BHxSbXSK2hdjsFfStfJw== X-IronPort-AV: E=McAfee;i="6800,10657,11872"; a="97374785" X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="97374785" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2026 15:15:25 -0700 X-CSE-ConnectionGUID: yvnZYH9BQdWYUqQp9YGLbQ== X-CSE-MsgGUID: GGDcIW//S1SAM4ReIn613w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="262138182" Received: from spandruv-desk.jf.intel.com ([10.54.55.20]) by orviesa010.jf.intel.com with ESMTP; 11 Aug 2026 15:15:25 -0700 From: Srinivas Pandruvada To: ilpo.jarvinen@linux.intel.com, hansg@kernel.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, sammiee5311@gmail.com, Srinivas Pandruvada , stable@vger.kernel.org Subject: [PATCH 3/6] platform/x86: ISST: Validate parameter for core power state Date: Tue, 11 Aug 2026 15:15:11 -0700 Message-ID: <20260811221514.3905817-4-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> References: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allow only 0 or 1 for core_power enable and priority_type parameters. Fixes: 12a7d2cb811d ("platform/x86: ISST: Add SST-CP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- .../platform/x86/intel/speed_select_if/isst_tpmi_core.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index 7be50d4167be..8f63694da897 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -599,6 +599,9 @@ static bool disable_dynamic_sst_features(void) #define SST_CP_PRIORITY_TYPE_START 1 #define SST_CP_PRIORITY_TYPE_WIDTH 1 =20 +#define SST_CP_MAX_ENABLE 1 +#define SST_CP_MAX_PRIORITY_TYPE 1 + static long isst_if_core_power_state(void __user *argp) { struct tpmi_per_power_domain_info *power_domain_info; @@ -618,6 +621,10 @@ static long isst_if_core_power_state(void __user *argp) if (power_domain_info->write_blocked || !capable(CAP_SYS_ADMIN)) return -EPERM; =20 + if (core_power.enable > SST_CP_MAX_ENABLE || + core_power.priority_type > SST_CP_MAX_PRIORITY_TYPE) + return -EINVAL; + _write_cp_info("cp_enable", core_power.enable, SST_CP_CONTROL_OFFSET, SST_CP_ENABLE_START, SST_CP_ENABLE_WIDTH, SST_MUL_FACTOR_NONE) _write_cp_info("cp_prio_type", core_power.priority_type, SST_CP_CONTROL_= OFFSET, --=20 2.53.0 From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F18A42AFAA; Tue, 11 Aug 2026 22:15:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486529; cv=none; b=tgizJpYUAyJBcYCUmGWRmNCsSjHjQ9TzNLicZjFhCjA9GWyPxiaUSAL3qHXDrHhmI85flL+HMfUkUtCJTNMjh30Tduuu4oNQgh9jqvL5tIsBjTAcOA+mLn2t1YpfDm7S5fj+SUVy5/HWcoNUfwRInGZrqpTJM56CF8JDglr2lEY= ARC-Message-Signature: i=1; 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d="scan'208";a="262138184" Received: from spandruv-desk.jf.intel.com ([10.54.55.20]) by orviesa010.jf.intel.com with ESMTP; 11 Aug 2026 15:15:25 -0700 From: Srinivas Pandruvada To: ilpo.jarvinen@linux.intel.com, hansg@kernel.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, sammiee5311@gmail.com, Srinivas Pandruvada , stable@vger.kernel.org Subject: [PATCH 4/6] platform/x86: ISST: Validate parameter for frequency and priority Date: Tue, 11 Aug 2026 15:15:12 -0700 Message-ID: <20260811221514.3905817-5-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> References: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Validate range for frequency and proportional priority while setting CLOS parameters. Fixes: 12a7d2cb811d ("platform/x86: ISST: Add SST-CP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- .../x86/intel/speed_select_if/isst_tpmi_core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index 8f63694da897..ee2e1ec1b103 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -658,6 +658,9 @@ static long isst_if_core_power_state(void __user *argp) =20 #define SST_MAX_CLOS 3 =20 +#define SST_MAX_FREQ 0xff +#define SST_CLOS_MAX_PRIORITY 0x0f + static long isst_if_clos_param(void __user *argp) { struct tpmi_per_power_domain_info *power_domain_info; @@ -677,6 +680,15 @@ static long isst_if_clos_param(void __user *argp) if (power_domain_info->write_blocked || !capable(CAP_SYS_ADMIN)) return -EPERM; =20 + if (!in_range(clos_param.min_freq_mhz / SST_MUL_FACTOR_FREQ, 0, SST_MAX_= FREQ + 1)) + return -EINVAL; + + if (!in_range(clos_param.max_freq_mhz / SST_MUL_FACTOR_FREQ, 0, SST_MAX_= FREQ + 1)) + return -EINVAL; + + if (!in_range(clos_param.prop_prio, 0, SST_CLOS_MAX_PRIORITY + 1)) + return -EINVAL; + _write_cp_info("clos.min_freq", clos_param.min_freq_mhz, (SST_CLOS_CONFIG_0_OFFSET + clos_param.clos * SST_REG_SIZE), SST_CLOS_CONFIG_MIN_START, SST_CLOS_CONFIG_MIN_WIDTH, --=20 2.53.0 From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8885D47ACFE; Tue, 11 Aug 2026 22:15:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786486530; cv=none; b=O/JTK8XpwI6DyH8cKU9jZ4EbBRaGLxkg/oWtYnnH42eUsxcLv5kOsZQiPmU3emMigRdlqsbGsovwCQvsgS3AIZ05D8Z05CFQy9IV1jQDZcpq/aI6/G+BPOdbUIO0gMsJOJ5Fb6VSWQDnDlb4onRK9MlyMGE7z/goZKSBJPM5g5o= ARC-Message-Signature: i=1; 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d="scan'208";a="262138185" Received: from spandruv-desk.jf.intel.com ([10.54.55.20]) by orviesa010.jf.intel.com with ESMTP; 11 Aug 2026 15:15:25 -0700 From: Srinivas Pandruvada To: ilpo.jarvinen@linux.intel.com, hansg@kernel.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, sammiee5311@gmail.com, Srinivas Pandruvada , stable@vger.kernel.org Subject: [PATCH 5/6] platform/x86: ISST: Use PP level enable mask Date: Tue, 11 Aug 2026 15:15:13 -0700 Message-ID: <20260811221514.3905817-6-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> References: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add check for enabled levels only when reading MMIO. Some levels can be disabled by BIOS. If the level is not enabled, return an error. Reset the enable and allowed level masks if there is a failure to add a perf level. Fixes: ea009e4769fa3 ("platform/x86: ISST: Add SST-PP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- .../x86/intel/speed_select_if/isst_tpmi_core.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index ee2e1ec1b103..f1b35714a4e9 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -336,8 +336,11 @@ static int sst_add_perf_profiles(struct auxiliary_devi= ce *auxdev, int i; =20 pd_info->perf_levels =3D devm_kcalloc(dev, levels, sizeof(struct perf_lev= el), GFP_KERNEL); - if (!pd_info->perf_levels) + if (!pd_info->perf_levels) { + pd_info->pp_header.allowed_level_mask =3D 0; + pd_info->pp_header.level_en_mask =3D 0; return 0; + } =20 pd_info->ratio_unit =3D pd_info->pp_header.ratio_unit; pd_info->avx_levels =3D SST_MAX_AVX_LEVELS; @@ -911,7 +914,7 @@ static int isst_if_get_perf_level(void __user *argp) SST_PP_FEATURE_STATE_START, SST_PP_FEATURE_STATE_WIDTH, SST_MUL_FA= CTOR_NONE) perf_level.enabled =3D !!(power_domain_info->sst_header.cap_mask & BIT(1)= ); =20 - level_mask =3D perf_level.level_mask; + level_mask =3D perf_level.level_mask & power_domain_info->pp_header.level= _en_mask; perf_level.sst_bf_support =3D 0; for_each_set_bit(level, &level_mask, BITS_PER_BYTE) { /* @@ -1349,6 +1352,9 @@ static int isst_if_get_base_freq_info(void __user *ar= gp) if (base_freq.level > power_domain_info->max_level) return -EINVAL; =20 + if (!(power_domain_info->pp_header.level_en_mask & BIT(base_freq.level))) + return -EINVAL; + _read_bf_level_info("p1_high", base_freq.high_base_freq_mhz, base_freq.le= vel, SST_BF_INFO_0_OFFSET, SST_BF_P1_HIGH_START, SST_BF_P1_HIGH_WIDTH, SST_MUL_FACTOR_FREQ) @@ -1388,6 +1394,9 @@ static int isst_if_get_base_freq_mask(void __user *ar= gp) if (cpumask.level > power_domain_info->max_level) return -EINVAL; =20 + if (!(power_domain_info->pp_header.level_en_mask & BIT(cpumask.level))) + return -EINVAL; + _read_bf_level_info("BF-cpumask", mask, cpumask.level, SST_BF_INFO_1_OFFS= ET, P1_HI_CORE_MASK_START, P1_HI_CORE_MASK_WIDTH, SST_MUL_FACTOR_NONE) @@ -1483,6 +1492,9 @@ static int isst_if_get_turbo_freq_info(void __user *a= rgp) if (turbo_freq.level > power_domain_info->max_level) return -EINVAL; =20 + if (!(power_domain_info->pp_header.level_en_mask & BIT(turbo_freq.level))) + return -EINVAL; + turbo_freq.max_buckets =3D TRL_MAX_BUCKETS; turbo_freq.max_trl_levels =3D TRL_MAX_LEVELS; turbo_freq.max_clip_freqs =3D SST_TF_MAX_LP_CLIP_RATIOS; --=20 2.53.0 From nobody Tue Sep 29 05:34:24 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB3EA47DF96; Tue, 11 Aug 2026 22:15:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="97374790" X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="97374790" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2026 15:15:25 -0700 X-CSE-ConnectionGUID: GrvKTo82SROrSmoYyqqdHg== X-CSE-MsgGUID: Pa7Yk7/pSpykWwl8Wo6m1Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,218,1779174000"; d="scan'208";a="262138186" Received: from spandruv-desk.jf.intel.com ([10.54.55.20]) by orviesa010.jf.intel.com with ESMTP; 11 Aug 2026 15:15:26 -0700 From: Srinivas Pandruvada To: ilpo.jarvinen@linux.intel.com, hansg@kernel.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, sammiee5311@gmail.com, Srinivas Pandruvada , stable@vger.kernel.org Subject: [PATCH 6/6] platform/x86: ISST: Just allow 2 bits for SST feature enable Date: Tue, 11 Aug 2026 15:15:14 -0700 Message-ID: <20260811221514.3905817-7-srinivas.pandruvada@linux.intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> References: <20260811221514.3905817-1-srinivas.pandruvada@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently only 2 features SST-TF and SST-BF are supported, so only allow bit 0 and bit 1. Fixes: ea009e4769fa3 ("platform/x86: ISST: Add SST-PP support via TPMI") Cc: stable@vger.kernel.org Signed-off-by: Srinivas Pandruvada --- drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index f1b35714a4e9..92d420e706f6 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -882,6 +882,7 @@ static long isst_if_clos_assoc(void __user *argp) =20 #define SST_PP_FEATURE_STATE_START 8 #define SST_PP_FEATURE_STATE_WIDTH 8 +#define SST_PP_FEATURE_STATE_VALID_MASK GENMASK(1, 0) =20 #define SST_BF_FEATURE_SUPPORTED_START 12 #define SST_BF_FEATURE_SUPPORTED_WIDTH 1 @@ -1035,6 +1036,9 @@ static int isst_if_set_perf_feature(void __user *argp) if (power_domain_info->write_blocked || !capable(CAP_SYS_ADMIN)) return -EPERM; =20 + if (perf_feature.feature & ~SST_PP_FEATURE_STATE_VALID_MASK) + return -EINVAL; + _write_pp_info("perf_feature", perf_feature.feature, SST_PP_CONTROL_OFFSE= T, SST_PP_FEATURE_STATE_START, SST_PP_FEATURE_STATE_WIDTH, SST_MUL_FACTOR_NONE) --=20 2.53.0