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Mon, 10 Aug 2026 11:55:16 -0700 (PDT) From: Bhargav Joshi Date: Tue, 11 Aug 2026 00:24:59 +0530 Subject: [PATCH v4] dt-bindings: clock: ti,clockdomain: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-ti-clockdomain-v4-1-3ae0c0be94a8@gmail.com> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/2XMSwrCMBSF4a1IxkaSm77iyH2Ig9vkxga1kbQUp XTvpkWw1OE58P0j6yh66thxN7JIg+98aNPI9jtmGmyvxL1Nm4GAQhRS8N5zcw/mZsMDfcsRSmu FQ4k2Zwk9Izn/WoLnS9qN7/oQ30t/kPP7TYHcpgbJJSetMS/Q6YrwdE3//WDCg82pAdYc/jgkn qnM1iTKShNsufrxUpZ/XCWuDBQKXUba1Ws+TdMHoq5IeCoBAAA= X-Change-ID: 20260610-ti-clockdomain-a27dd0fa1ad5 To: Michael Turquette , Stephen Boyd , Brian Masney , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tero Kristo Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786388111; l=4769; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=syIuRtPhY3tn7wtaIDeJfEtBlmwR0eFM9qA1M64mqKk=; b=nLCEMgGHJJiYDAdNacVRVgLnAxb0nzpd+/0mSubvAlhrDd3oaWm3BPyDPal0u6ve13bAOCoTm ERfw0lqJefyDGDln2z9+wAU1X2jnWizk7neg7YqQIj7vqDeKIcPPiPX X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert TI clockdomain to yaml DT schema. Drop '#clock-cells' from the required list as this binding doesn't define a new clock binding type, it is used to group existing clock nodes under hardware hierarchy. Most existing dts omit '#clock-cells'. Update the reference to the old legacy text binding in the description of bindings/clock/ti/ti,gate-clock.yaml to point to the new YAML file. Reviewed-by: Rob Herring (Arm) Signed-off-by: Bhargav Joshi --- Changes in v4: - Rebased to Latest mainline=20 - Link to v3: https://lore.kernel.org/r/20260717-ti-clockdomain-v3-1-3c263a= f4e9fb@gmail.com Changes in v3: - set limits for clock-output-names and clocks properties - Link to v2: https://lore.kernel.org/r/20260622-ti-clockdomain-v2-1-434dbe= 0789e2@gmail.com Changes in v2: - updating the stale reference to the legacy .txt file inside bindings/clock/ti/ti,gate-clock.yaml to fix make refcheckdocs error - Link to v1: https://lore.kernel.org/r/20260621-ti-clockdomain-v1-1-e99a56= af98ea@gmail.com --- .../devicetree/bindings/clock/ti/clockdomain.txt | 25 ------------ .../bindings/clock/ti/ti,clockdomain.yaml | 44 ++++++++++++++++++= ++++ .../bindings/clock/ti/ti,gate-clock.yaml | 2 +- 3 files changed, 45 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/D= ocumentation/devicetree/bindings/clock/ti/clockdomain.txt deleted file mode 100644 index edf0b5d42768..000000000000 --- a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt +++ /dev/null @@ -1,25 +0,0 @@ -Binding for Texas Instruments clockdomain. - -This binding uses the common clock binding[1] in consumer role. -Every clock on TI SoC belongs to one clockdomain, but software -only needs this information for specific clocks which require -their parent clockdomain to be controlled when the clock is -enabled/disabled. This binding doesn't define a new clock -binding type, it is used to group existing clock nodes under -hardware hierarchy. - -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt - -Required properties: -- compatible : shall be "ti,clockdomain" -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : link phandles of clocks within this domain - -Optional properties: -- clock-output-names : from common clock binding. - -Examples: - dss_clkdm: dss_clkdm { - compatible =3D "ti,clockdomain"; - clocks =3D <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; - }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml= b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml new file mode 100644 index 000000000000..95746bfdced4 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti/ti,clockdomain.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments clockdomain + +maintainers: + - Tero Kristo + +description: + This binding uses the common clock binding in consumer role. Every clock= on TI + SoC belongs to one clockdomain, but software only needs this information= for + specific clocks which require their parent clockdomain to be controlled = when + the clock is enabled/disabled. This binding doesn't define a new clock b= inding + type, it is used to group existing clock nodes under hardware hierarchy. + +properties: + compatible: + const: ti,clockdomain + + "#clock-cells": + const: 0 + + clocks: + minItems: 1 + maxItems: 64 + + clock-output-names: + maxItems: 1 + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + dss_clkdm { + compatible =3D "ti,clockdomain"; + clocks =3D <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; + }; diff --git a/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml = b/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml index eaa727ab0d7f..438e190d1067 100644 --- a/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml +++ b/Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml @@ -19,7 +19,7 @@ description: | that is used. =20 [1] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml - [2] Documentation/devicetree/bindings/clock/ti/clockdomain.txt + [2] Documentation/devicetree/bindings/clock/ti/ti,clockdomain.yaml =20 properties: compatible: --- base-commit: d58772d8520c7ef247c4b95c9bd76d3a25da9ff5 change-id: 20260610-ti-clockdomain-a27dd0fa1ad5 Best regards, --=20 Bhargav