From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0AEB4772A9 for ; Tue, 11 Aug 2026 21:43:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484586; cv=pass; b=b4tHNyW39TZ1gdeaRW/Y/AbplWIffMfQCz27bWlzw/Wci9NGenW9QllLh1hTAfD3+4YmHsoUqc2H4gAul5mEVjhWorfKcy6zAeZEbRa1p11BnB/cXbBt3L0stOgbLDS73ZuyTvjA+jOB8YaoFLvGC4ga8v5G6wcZUrvdgHTmD/A= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484586; c=relaxed/simple; bh=s+TFqnBLyffcvvRdt+XgtQK5ewLRucmgSP4lvTByoVM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CFVLjtQiinOezwZnB7XefIRlmHtfdYav5BPtoG7KuQFuOoVzrnPBJmg0GuE2sbcvVzApt59BGxHm1G5RiVub8cPFN/vZGeAkg5hiVh1Y/2aR81Bv0X8kuYN/hlZiixo+0AVUH3rhg8+X5uVYvW608xddJOhkiFQNu9noGTCfh/0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=N7RO/C4F; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="N7RO/C4F" ARC-Seal: i=1; a=rsa-sha256; t=1786484545; cv=none; d=zohomail.com; s=zohoarc; b=oGRWu0A2+hlAJ+8Ysy3jkVqiitkyOMICzLd82pspoZcnOIbs5dq5GUpmr7JySO/SG6QxHgkPXi6ZWnV/lMPZbfh0VYP4i0xLvhkGnANWe6ETy/yxikmop7UQkk4P+druDPsZpbEGRuAguSYGMgLBxgblbc58g1Z0oHbAxtqcCR0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786484545; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=nzqJgETVkBIGkNjZS88+/BocleoPmjMybUJQH20vWSY=; b=K9JriZL6BhtVZ6YldJOwc7/uCf3g059kKhE7dOvrxB5N2rJbEWppYI7GTBCdv/wj6Y0HHKP77mrdb90lxvA/BGj4GXnQNVC7PUuOavMjQCpKk48055KREEnIPArNGYrC1Acux9KkFryN49TRFPUNLoy8Tdf6uK+t8tD5hHPFZKg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1786484545; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=nzqJgETVkBIGkNjZS88+/BocleoPmjMybUJQH20vWSY=; b=N7RO/C4FD8D6VSHfW5jxie5qdg+isjF1vIXxWKsZlpclHsgvfmTBNT/A7l48DSY/ JdvyVXIxTB987K58bf9EjJKiZh4bfQfDfjDQW1bTZuafRBQOSBDZPi5Puk5nt0Zvngd 83pYesD9wGP2lwX+gepWuFUWXlB2spcYv6AszERM= Received: by mx.zohomail.com with SMTPS id 1786484544225488.93534318001866; Tue, 11 Aug 2026 14:42:24 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:10 +0100 Subject: [PATCH v5 01/11] drm/panfrost: Check another bo field for cache option query Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-1-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong , Claude X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1159; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=s+TFqnBLyffcvvRdt+XgtQK5ewLRucmgSP4lvTByoVM=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5cy0OE5MEVyNG4NAAAs2UStS7ZGndVN3i6MB 8FHg0KBQyiJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMgAKCRAOJn5M7lND PQt8DAC48FmOum/0vyi91Vg/eEq3LD2URB/ERL3vg6abvo/heAARXtYizc1KZD3/O0Thml+g7RQ SvaEqrjnawZ67Zviz5UFyVpFOrtzUD4ZLWG8brgBVPLXIkAHGsK5/vIep8Q5MDrpn0lZ0vW2Z2x 4T1+rWimFmZmgjkPgOhvu2Gm5xpOi8r+a2WzWMaSnyTRU4RHEDpwH2xsn7kVvHotIKBcREm5dzr bRT739eZeH2JvEXHLhSG0X6gQKGrLkXx5+xvpNn05ERmnvPs+eVsPnUY0n05O46WDprxZfOqTxq E5M8zE8LCDoBRHUzHswKkgIX1Oj7Zb222PlMRuyHzxHn69qtxvvYmc6izv/sRTvp+NguB4Iz7SP EcO1h4UWY51Q07+bMg/hD7M5CV1u1RyIukfcGt+mjkH/DHPEvLqHQCk8OTPqyehGgF9CIofzuJl Lk8Gqqr4s3MUYB7YnIoQ8Qv2mD+KRV87HO+M3undMbXxswVWCIVyESyRJ2CfuPvDO8k8A= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D When querying the properties of a BO, whether it was created in Writeback caching mode for userspace mappings, is recorded in a Panfrost BO's wb_mmap field. Reported-by: Claude Closes: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/88 Fixes: 62eedf1ccba5 ("drm/panfrost: Add flag to map GEM object Write-Back C= acheable") Reviewed-by: Steven Price Reviewed-by: Boris Brezillon Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 784e36d72c2b..2e931fa90da0 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -661,7 +661,7 @@ static int panfrost_ioctl_query_bo_info(struct drm_devi= ce *dev, void *data, if (bo->is_heap) args->create_flags |=3D PANFROST_BO_HEAP; =20 - if (!bo->base.map_wc) + if (bo->wb_mmap) args->create_flags |=3D PANFROST_BO_WB_MMAP; } =20 --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40E2E47D947 for ; Tue, 11 Aug 2026 21:43:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484599; cv=pass; b=HF4GgVXNPMMmSUAYz5vvkujs45MW+MWN3ffpCnUHV5PcimMgFu63q8O1JITfbu0CQDlGUm9Invr/vLEub1MMlhUGqSs5NH2W3Mks2csjAqAJxUCzBrnAthOoW93CeJlFr3ADsNXiXXhnnbepml5+1IupqklQ8afoHp6Ifb4wE4Y= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484599; c=relaxed/simple; bh=kl4fy4ui72Fh+RD+K3B6m4ExNC9Qrv3fOS3tpchSf74=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ICTeiM7j7h49BIl2S2vOSbwpBm8iOPrkHmJMlb6gw6X9uaTbTsK4S/MH3imLydl0uy+A7DTQM+uJd0Pwy5kVuzeC9Tg45xYXxK3p2p9k90+DfHylqk6a8mc0ksEukx7ffSA+9HsbqSL4VtRwnPjZULvroNSqQZ0MUk2l4xDDRuQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=Pi6QukWN; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="Pi6QukWN" ARC-Seal: i=1; a=rsa-sha256; t=1786484551; cv=none; d=zohomail.com; s=zohoarc; b=OGRjR0mKgOlJD35gXStSzB73enRnuhvzBIK3rTzPi+l5fwbvpurHQd2kX1mDroYTYfbf0I0AHPu8foHdtZQPxQWIZHHxX6ixS/sc6niEjzITrTqjBdhlYjEzqWVoOxUNDuRQHXrp5Bs9Po433UdUBF3vmCU3iD5WD+VpiRpWV4Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786484551; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=czRVsGoDhUYjh47WNCfN5jXfKsBYe+ZKrefmwoTVP38=; b=EffMh7Pvm10N9EnVcZtGxZo5+6bMEBle/2MUMArSoQVsishIrsm1d0nX8wfUqswaO3TLn0w26Vg1/R2nlox7CtjJgoYFT5h1whmkpONAt9/0wcHJF1BP9CE9IUR9fclhlrwd+zFfkxpd0vBt39nkev5770+Vcl2MnuHGIIDQSW4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1786484551; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=czRVsGoDhUYjh47WNCfN5jXfKsBYe+ZKrefmwoTVP38=; b=Pi6QukWNikwNaQ2dQl2qzVbdETMXSNwykgG4BUOTOOc01AuYzDdliTaHFH2+6ogI Yac/lI5YbyuuAL4Ti60FVI9iZ3DFZlQcStFGodIFHzvOt/lFmj6t49LDpWxynOofwuY qB04tlZCA2SLHQ4WPybciIOauzBLibTsOXf8FP9A= Received: by mx.zohomail.com with SMTPS id 1786484549674128.65685693522425; Tue, 11 Aug 2026 14:42:29 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:11 +0100 Subject: [PATCH v5 02/11] drm/panfrost: Prevent division by 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-2-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong , Claude X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1249; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=kl4fy4ui72Fh+RD+K3B6m4ExNC9Qrv3fOS3tpchSf74=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czDhlrwpmjftleSK3KG4Wtw5rS5iDVls7Th GA7xwqEMlOJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PZCFDACiG0rgthHEXzxUU8F0SKf03NisGG292ffPvOFWoghY6bLFVdWlfnlWwU/QKt2kRX9ExdI q74oeLOJoSoTEYyQEWGHtghY4O8nJxOwNjlbqgbKi6ARq5ZMqNnI2ry1L45+8KEZbJ9hLba8NJB DOH6ard97nAr1Tb7VXzqnWUW0RlOLIjfr/vmqRiXFRXqFUcWCVYzq6SzFXWs7pf1XKwAYNgxW3e NHBKMoLaqPuAryyx+nDbPECUyDeA4JC7+cxIexv9tRM3HLVqxtLmCge4eFSEF3s51fhT+P8eI79 SwYN0cPXu54duPg0g9OD94NOhO4zryHW2cdcpHhsdsS0BYqdgX29V2xtxJoa5guGQ4SmN08Fup/ U9BnyNM/erHKMeQyCIHAnQNsO6PECCfpLykGi2Tjf64pig0Qcug5qPlP/UtePpV23hVYzRDfl5L LDcAcPmUm4DBQoyxabhYywCiwCq9A2oV8ue4r+WvH2Rj/lXmUPXC0DDUcXWZiSDWc3+zc= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D When updating and debug-printing devfreq stats, in the very unlikely off-chance that total device time is less than 100 ns, division by 0 would happen. Fix the divisor when relevant and rearrange operands. Reported-by: Claude Closes: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/88 Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver") Reviewed-by: Steven Price Signed-off-by: Adri=C3=A1n Larumbe Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/= panfrost/panfrost_devfreq.c index b51c30778811..0fe81d259274 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -78,7 +78,7 @@ static int panfrost_devfreq_get_dev_status(struct device = *dev, =20 dev_dbg(pfdev->base.dev, "busy %lu total %lu %lu %% freq %lu MHz\n", status->busy_time, status->total_time, - status->busy_time / (status->total_time / 100), + status->busy_time * 100 / MAX(status->total_time, 1), status->current_frequency / 1000 / 1000); =20 return 0; --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15319361DBA for ; Tue, 11 Aug 2026 21:43:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484597; cv=pass; b=GYlNlSEm8YxQx/NH1WPZd8cbf2aYtrjLrgF5iY1nGybB04vRcNDpTUIv7ig4CCsTR9koin/QTPKihCr5I/Cu7J5GvJ6zceA0hSeV0oxYf75RgnR9QIGLrHI6HjLA9LmJTWhjlUhubPk+uQLov1VawaEzOheqSzi5EXtJWbuY9UA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484597; c=relaxed/simple; bh=6nL0tsxwnvYrZa+4jvA0fd4D06LAvqIIkYS1wNcDSWs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iAjWwkD01DYuuusoZvxM/Xq76XdXRosdRnaf/F8Ml7IElMBYslj9PqnDX8Jl3UUz+WKY73GWNoKyZOah3nek6DzQmVr7EXFL8fg9YTlFpZpZ1HsEJDbvzv1qHXdcmwbgQYA9zWLe5f7Gv4f6P9G90V3n/mhBAqIy2GEej8MVfKk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=A6mnGtya; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="A6mnGtya" ARC-Seal: i=1; a=rsa-sha256; t=1786484557; cv=none; d=zohomail.com; s=zohoarc; b=QnYHyXaDzyFCcXnDONLKLdRgzOQp4Imz8eq9U+LOX2cb3dJTdPvu4AtSccnsm4aS4/bVP7bW1J4ZwLN7Fwvqfqv0y78qQJnLpEjFWoFWQtpiZm3KLn1CHyMAeGcQnTXqG+vJIB72BYguKgbrUT1h53zxSqXfu2g6xTZlWotPKFs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786484557; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=gXWqn0PSzICWH5EslTMaIg4HCbPgNoAL5LmLrMrJfYk=; b=g26XQPXIzzyyYzHg0N4x9I+phTSNEM7sypmDvFy5FiO3bKbxeaZ0A5xaLtZ8lO856y5txDuateMfxL9nOkh4nV4dQUDrqy+wJncRjXGW/thMpddyeFekGvjpsGJgFZj3o2ywBnB15+c36b/C8IW/qrAVRVMvFPHrcOsi+1zFtUA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1786484557; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=gXWqn0PSzICWH5EslTMaIg4HCbPgNoAL5LmLrMrJfYk=; b=A6mnGtyapXKQueHoBcONjtWGxAc8fKTKlVwuoLRuvccj51Sz/hn9SR9oOjtbaaqU eE0FnLeltW2sn7W8q1biSknLEIyN0870QCGLSLx2qVtwdSbeGsboMzEZ6ATAJd0OgUh ZWqkijooEdvbbNK9wj1A6cz867dBRV/6nk5YYBnI= Received: by mx.zohomail.com with SMTPS id 1786484554872304.6230937100481; Tue, 11 Aug 2026 14:42:34 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:12 +0100 Subject: [PATCH v5 03/11] drm/panfrost: Remove unnecessary header file include Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-3-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. 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a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D None of panfrost_features.h definitions are used in panfrost_device.c Reviewed-by: Steven Price Signed-off-by: Adri=C3=A1n Larumbe Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_device.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 7fed22d555a5..d8421fd6a662 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -11,7 +11,6 @@ =20 #include "panfrost_device.h" #include "panfrost_devfreq.h" -#include "panfrost_features.h" #include "panfrost_gem.h" #include "panfrost_issues.h" #include "panfrost_gpu.h" --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF99547D95F for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-4-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6358; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=UFNiKZL/rzU1NBLU1fwmVnBxoqcD8qxLdv88oUCYWyU=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czPNnwDJSJZND5NMu+fSDYNhgGW8AaIZ2fN VqqU78NkCSJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PfLCC/4na0YE7Avjd3p8lWWZX4frYokKP1Z9XWbAv6ZGFSOJxTKD1jLTr+skLVog2YxMX3i9HKC 9AomnzMcFLD1IkokXsng+tKrEVm8W8vs7M+Maduo0IGFHI47X3QyZMVYEgi0n9DKINCon3RUNqD M+TPoTSFFzOno4rMXiE1ndqPA9aL+U87gN+j00eB/k0tWn6yWxkrojOe4SXyVFMb+RGulIw0Rah bLUz+DJrlsTKLP8I9kEUz2dV9yFci1rUH4F0NnvQqI33BoMHBwyvpyi7aHrXm61AeXS5WqVT8wQ b13dmmBkQAGUYJGd0+yWxfoBNZbg7gTIsbiEfhLz1lWi/su1P4w/YtgPkYMKm1jHIwDqf2B8RrX 3dHREwxZG4vOv/9IPzwCkN7MTpo+rtMy/OK4XJJfGZuTZMOmDs+r6O1c6+OM9fffo04WbM9nBwK ZyHV6SYjUxZ/eniNKeIJgTD0MqTqAgemZzoye0SwPz2k1grPIlP+T4ON/i/kKRlajL5/s= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Since the moment we call drm_dev_register() the device should be in a position to accept jobs, so it's best if the shrinker is already initialized by then. On top of that, make shrinker functions take an panfrost_device pointer like other functions in the same sequence and rename them accordingly. Essentially mimic the init/fini behaviour in Panthor. On top of that, remove the config feature check, because it's unnecessary. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 8 +++++++- drivers/gpu/drm/panfrost/panfrost_drv.c | 6 ------ drivers/gpu/drm/panfrost/panfrost_gem.c | 25 ++++++++++++++------= ---- drivers/gpu/drm/panfrost/panfrost_gem.h | 7 ++++--- drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c | 8 ++------ 5 files changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index d8421fd6a662..74992deb0b3a 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -281,9 +281,14 @@ int panfrost_device_init(struct panfrost_device *pfdev) if (err) goto out_job; =20 - panfrost_gem_init(pfdev); + err =3D panfrost_gem_init(pfdev); + if (err) + goto out_perfcnt; =20 return 0; + +out_perfcnt: + panfrost_perfcnt_fini(pfdev); out_job: panfrost_jm_fini(pfdev); out_mmu: @@ -305,6 +310,7 @@ int panfrost_device_init(struct panfrost_device *pfdev) =20 void panfrost_device_fini(struct panfrost_device *pfdev) { + panfrost_gem_fini(pfdev); panfrost_perfcnt_fini(pfdev); panfrost_jm_fini(pfdev); panfrost_mmu_fini(pfdev); diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 2e931fa90da0..331a3bd5b98c 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -1002,14 +1002,9 @@ static int panfrost_probe(struct platform_device *pd= ev) if (err < 0) goto err_out1; =20 - err =3D panfrost_gem_shrinker_init(&pfdev->base); - if (err) - goto err_out2; =20 return 0; =20 -err_out2: - drm_dev_unregister(&pfdev->base); err_out1: pm_runtime_disable(pfdev->base.dev); panfrost_device_fini(pfdev); @@ -1023,7 +1018,6 @@ static void panfrost_remove(struct platform_device *p= dev) struct panfrost_device *pfdev =3D platform_get_drvdata(pdev); =20 drm_dev_unregister(&pfdev->base); - panfrost_gem_shrinker_cleanup(&pfdev->base); =20 pm_runtime_get_sync(pfdev->base.dev); pm_runtime_disable(pfdev->base.dev); diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panf= rost/panfrost_gem.c index 3a7fce428898..7b993a089af2 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.c +++ b/drivers/gpu/drm/panfrost/panfrost_gem.c @@ -15,20 +15,25 @@ #include "panfrost_gem.h" #include "panfrost_mmu.h" =20 -void panfrost_gem_init(struct panfrost_device *pfdev) +int panfrost_gem_init(struct panfrost_device *pfdev) { int err; =20 - if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE) && - !panfrost_transparent_hugepage) - return; + if (panfrost_transparent_hugepage) { + err =3D drm_gem_huge_mnt_create(&pfdev->base, "within_size"); + if (drm_gem_get_huge_mnt(&pfdev->base)) + drm_info(&pfdev->base, "Using Transparent Hugepage\n"); + else if (err) + drm_warn(&pfdev->base, + "Can't use Transparent Hugepage (%d)\n", err); + } =20 - err =3D drm_gem_huge_mnt_create(&pfdev->base, "within_size"); - if (drm_gem_get_huge_mnt(&pfdev->base)) - drm_info(&pfdev->base, "Using Transparent Hugepage\n"); - else if (err) - drm_warn(&pfdev->base, "Can't use Transparent Hugepage (%d)\n", - err); + return panfrost_gem_shrinker_init(pfdev); +} + +void panfrost_gem_fini(struct panfrost_device *pfdev) +{ + panfrost_gem_shrinker_fini(pfdev); } =20 #ifdef CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panf= rost/panfrost_gem.h index 79d4377019e9..5c823cdbd980 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.h +++ b/drivers/gpu/drm/panfrost/panfrost_gem.h @@ -129,7 +129,8 @@ drm_mm_node_to_panfrost_mapping(struct drm_mm_node *nod= e) return container_of(node, struct panfrost_gem_mapping, mmnode); } =20 -void panfrost_gem_init(struct panfrost_device *pfdev); +int panfrost_gem_init(struct panfrost_device *pfdev); +void panfrost_gem_fini(struct panfrost_device *pfdev); =20 struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, = size_t size); =20 @@ -154,8 +155,8 @@ panfrost_gem_mapping_get(struct panfrost_gem_object *bo, void panfrost_gem_mapping_put(struct panfrost_gem_mapping *mapping); void panfrost_gem_teardown_mappings_locked(struct panfrost_gem_object *bo); =20 -int panfrost_gem_shrinker_init(struct drm_device *dev); -void panfrost_gem_shrinker_cleanup(struct drm_device *dev); +int panfrost_gem_shrinker_init(struct panfrost_device *pfdev); +void panfrost_gem_shrinker_fini(struct panfrost_device *pfdev); =20 void panfrost_gem_set_label(struct drm_gem_object *obj, const char *label); int panfrost_gem_sync(struct drm_gem_object *obj, u32 type, diff --git a/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c b/drivers/gpu= /drm/panfrost/panfrost_gem_shrinker.c index 2fe967a90bcb..fefae87535d6 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c +++ b/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c @@ -95,10 +95,8 @@ panfrost_gem_shrinker_scan(struct shrinker *shrinker, st= ruct shrink_control *sc) * * This function registers and sets up the panfrost shrinker. */ -int panfrost_gem_shrinker_init(struct drm_device *dev) +int panfrost_gem_shrinker_init(struct panfrost_device *pfdev) { - struct panfrost_device *pfdev =3D to_panfrost_device(dev); - pfdev->shrinker =3D shrinker_alloc(0, "drm-panfrost"); if (!pfdev->shrinker) return -ENOMEM; @@ -118,10 +116,8 @@ int panfrost_gem_shrinker_init(struct drm_device *dev) * * This function unregisters the panfrost shrinker. */ -void panfrost_gem_shrinker_cleanup(struct drm_device *dev) +void panfrost_gem_shrinker_fini(struct panfrost_device *pfdev) { - struct panfrost_device *pfdev =3D to_panfrost_device(dev); - if (pfdev->shrinker) shrinker_free(pfdev->shrinker); } --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10CE6388E69 for ; Tue, 11 Aug 2026 21:43:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484607; cv=pass; b=lorx6UGGXQtx9OXZ16IeJvnnL2Y6YcfAW5oDfPOIwA20wJsKhweU4Wqzwfu8c51w7GuzUzhKCRI8ORwOGnSs/UqeEhjOQ4/kW39Pc0m15C/W7RqEJuhLo8Sgyjy0TEt6g177BGT+Q44BEhjoVfoiANiB1jHsOR/ZV5Ad6zRRh3A= ARC-Message-Signature: i=2; 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h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=2O8DNA9VQ31kDWqzdW/bycCh+EkKhsOK7ju/9PYEgCM=; b=gGdW/PFdrVwb5f3uw1B1ir2G/5KpzM0c+W5EEe85K8ZIG9j8p1ieXw0YqX96FALN og12GC4f5Ra7CKQdntCo2xALvHC1XPlyqkutyQLF5oTpU4ucHpSr+znLTtIT+AjGxHC 5YES6fczMu61hue5tRThQaX47MQVwFbyFapXy8kM= Received: by mx.zohomail.com with SMTPS id 1786484565565358.3485040358163; Tue, 11 Aug 2026 14:42:45 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:14 +0100 Subject: [PATCH v5 05/11] drm/panfrost: Move all device power up and down into RPM callbacks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-5-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=20807; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=gjlUq2K6GpDlK8BXfi9BaYyowTFnJf6CmMMlet9p6VI=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5cz6633CiIzm20dLdZtgpgseJzEwJAARlfSR QB8+DS2nZKJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PfWEC/957tDSzhgD5jy3ZTyM2fkHUt+R3LmnOwmyWdRYJIyw3Kwsr0v4T46xfWufEqvVqbVPwRx IUs5IR/P+GL1e0uhbpssJ+wAVq/AUVejvVRGubOvJ6pJcFE86Sd1mysqiF2PLnYOpe/3Nn+Jhkd UxEH5pkCKt5anSe3IOvyEQBUQ7WLEtFiLWcgv+fy4RJJCHa3jpJGLxW+ONoCJG1v0XSdDPYaq9G HRh0+Kzq1NKPz/CRPO4Uz+g5fCmXpz9ca5QeV5kz9hRDhYltLfKICTqofbNKzOINZs0O8xGZP0S oSFgZUVaYrwp9OX1UIAJdy13at2MXSFm08aV9mXmVmEeGI35diCAk6r/toytx/RO/Sq3FD5a+Hy IktM4cDw7ucT7GQ7vwMMcbK94rNk7DsIhXt7Fs9s9DaNicfGbcyKdK461DwcAXa5YnSMfJHItXY 846SQVSxaY9plt/HESiZ/Kr9qaq6pLoCQiwXdoxcJOEQ8n2AqiKtbLoqVEwHmLLk0MGKI= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D During device probe(), failure to do a PM get() will leave the usage_count set to 0, which is the value assigned at device creation time. That means when the autosuspend delay expires, runtime suspend callback won't be invoked, so the device will remain powered on forever. On top of that, failure to call PM put() during device unplug means Panfrost device's PM usage_count increases monotonically for every new module reload. The combined outcome of both of the above was that devfreq OPP transition notifications would be printed all the time, even when no jobs are being submitted. This quickly fills the kernel ring buffer with junk. Even direr than that was the fact MMU interrupts are only enabled when the device is reset, so after device probe() the very first job targeting the tiler heap BO would always time out, because the driver's PM runtime resume callback would not be invoked. Fix all that by moving all GPU enabling and disabling into RPM resume and suspend callbacks, and making sure we resume the device right before touching any HW registers. This is done in imitation of the Panthor model. Signed-off-by: Adri=C3=A1n Larumbe Fixes: 635430797d3f ("drm/panfrost: Rework runtime PM initialization") Fixes: 876b15d2c88d ("drm/panfrost: Fix module unload") --- drivers/gpu/drm/panfrost/panfrost_device.c | 389 ++++++++++++++++---------= ---- drivers/gpu/drm/panfrost/panfrost_device.h | 8 + drivers/gpu/drm/panfrost/panfrost_drv.c | 11 +- drivers/gpu/drm/panfrost/panfrost_gpu.c | 9 +- drivers/gpu/drm/panfrost/panfrost_gpu.h | 1 - drivers/gpu/drm/panfrost/panfrost_job.c | 7 +- drivers/gpu/drm/panfrost/panfrost_mmu.c | 9 +- drivers/gpu/drm/panfrost/panfrost_mmu.h | 1 - 8 files changed, 236 insertions(+), 199 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 74992deb0b3a..52f4b8c6a05f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -26,11 +26,46 @@ static int panfrost_reset_init(struct panfrost_device *= pfdev) return PTR_ERR(pfdev->rstc); } =20 - return reset_control_deassert(pfdev->rstc); + return 0; } =20 -static void panfrost_reset_fini(struct panfrost_device *pfdev) +static int panfrost_clk_enable_deassert_reset(struct panfrost_device *pfde= v) { + int err; + + err =3D reset_control_deassert(pfdev->rstc); + if (err) + return err; + + err =3D clk_enable(pfdev->clock); + if (err) + goto assert_reset; + + err =3D clk_enable(pfdev->bus_clock); + if (err) + goto disable_clock; + + err =3D clk_enable(pfdev->bus_ace_clock); + if (err) + goto disable_bus_clock; + + return 0; + +disable_bus_clock: + clk_disable(pfdev->bus_clock); +disable_clock: + clk_disable(pfdev->clock); +assert_reset: + reset_control_assert(pfdev->rstc); + + return err; +} + +static void panfrost_clk_disable_assert_reset(struct panfrost_device *pfde= v) +{ + clk_disable(pfdev->bus_ace_clock); + clk_disable(pfdev->bus_clock); + clk_disable(pfdev->clock); reset_control_assert(pfdev->rstc); } =20 @@ -48,7 +83,7 @@ static int panfrost_clk_init(struct panfrost_device *pfde= v) rate =3D clk_get_rate(pfdev->clock); dev_info(pfdev->base.dev, "clock rate =3D %lu\n", rate); =20 - err =3D clk_prepare_enable(pfdev->clock); + err =3D clk_prepare(pfdev->clock); if (err) return err; =20 @@ -57,44 +92,55 @@ static int panfrost_clk_init(struct panfrost_device *pf= dev) dev_err(pfdev->base.dev, "get bus_clock failed %ld\n", PTR_ERR(pfdev->bus_clock)); err =3D PTR_ERR(pfdev->bus_clock); - goto disable_clock; + goto unprepare_clock; } =20 if (pfdev->bus_clock) { rate =3D clk_get_rate(pfdev->bus_clock); dev_info(pfdev->base.dev, "bus_clock rate =3D %lu\n", rate); =20 - err =3D clk_prepare_enable(pfdev->bus_clock); + err =3D clk_prepare(pfdev->bus_clock); if (err) - goto disable_clock; + goto unprepare_clock; } =20 pfdev->bus_ace_clock =3D devm_clk_get_optional(pfdev->base.dev, "bus_ace"= ); if (IS_ERR(pfdev->bus_ace_clock)) { err =3D PTR_ERR(pfdev->bus_ace_clock); dev_err(pfdev->base.dev, "get bus_ace_clock failed %d\n", err); - goto disable_bus_clock; + goto unprepare_bus_clock; } =20 - err =3D clk_prepare_enable(pfdev->bus_ace_clock); + err =3D clk_prepare(pfdev->bus_ace_clock); if (err) - goto disable_bus_clock; + goto unprepare_bus_clock; + + if (!(pfdev->comp->pm_features & BIT(GPU_PM_RT))) { + err =3D panfrost_clk_enable_deassert_reset(pfdev); + if (err) + goto unprepare_bus_ace_clock; + } =20 return 0; =20 -disable_bus_clock: - clk_disable_unprepare(pfdev->bus_clock); -disable_clock: - clk_disable_unprepare(pfdev->clock); +unprepare_bus_ace_clock: + clk_unprepare(pfdev->bus_ace_clock); +unprepare_bus_clock: + clk_unprepare(pfdev->bus_clock); +unprepare_clock: + clk_unprepare(pfdev->clock); =20 return err; } =20 static void panfrost_clk_fini(struct panfrost_device *pfdev) { - clk_disable_unprepare(pfdev->bus_ace_clock); - clk_disable_unprepare(pfdev->bus_clock); - clk_disable_unprepare(pfdev->clock); + if (!(pfdev->comp->pm_features & BIT(GPU_PM_RT))) + panfrost_clk_disable_assert_reset(pfdev); + + clk_unprepare(pfdev->bus_ace_clock); + clk_unprepare(pfdev->bus_clock); + clk_unprepare(pfdev->clock); } =20 static int panfrost_regulator_init(struct panfrost_device *pfdev) @@ -212,6 +258,127 @@ static int panfrost_pm_domain_init(struct panfrost_de= vice *pfdev) return err; } =20 +static int panfrost_device_runtime_resume(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { + ret =3D panfrost_clk_enable_deassert_reset(pfdev); + if (ret) + return ret; + } + + panfrost_devfreq_resume(pfdev); + + if (panfrost_device_started(pfdev)) + panfrost_device_reset(pfdev, true); + + return 0; +} + +static int panfrost_device_runtime_suspend(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + + if (panfrost_device_started(pfdev) && + !panfrost_jm_is_idle(pfdev)) + return -EBUSY; + + panfrost_jm_suspend_irq(pfdev); + panfrost_mmu_suspend_irq(pfdev); + panfrost_gpu_suspend_irq(pfdev); + panfrost_gpu_power_off(pfdev); + panfrost_devfreq_suspend(pfdev); + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) + panfrost_clk_disable_assert_reset(pfdev); + + return 0; +} + +static int panfrost_device_resume(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { + unsigned long freq =3D pfdev->pfdevfreq.fast_rate; + struct dev_pm_opp *opp; + + opp =3D dev_pm_opp_find_freq_ceil(dev, &freq); + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_set_opp(dev, opp); + dev_pm_opp_put(opp); + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + ret =3D clk_enable(pfdev->clock); + if (ret) + goto err_clk; + + if (pfdev->bus_clock) { + ret =3D clk_enable(pfdev->bus_clock); + if (ret) + goto err_bus_clk; + } + } + + ret =3D pm_runtime_force_resume(dev); + if (ret) + goto err_resume; + + return 0; + +err_resume: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) + clk_disable(pfdev->bus_clock); +err_bus_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) + clk_disable(pfdev->clock); +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + return ret; +} + +static int panfrost_device_suspend(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_force_suspend(dev); + if (ret) + return ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + if (pfdev->bus_clock) + clk_disable(pfdev->bus_clock); + + clk_disable(pfdev->clock); + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + + return 0; +} + +EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) =3D { + RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_r= esume, NULL) + SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) +}; + +void panfrost_try_suspend_device(struct panfrost_device *pfdev) +{ + pm_runtime_put_sync_suspend(pfdev->base.dev); + + /* If PM is disabled, we need to call the suspend handler manually. */ + if (!IS_ENABLED(CONFIG_PM)) + panfrost_device_runtime_suspend(pfdev->base.dev); +} + int panfrost_device_init(struct panfrost_device *pfdev) { int err; @@ -242,7 +409,7 @@ int panfrost_device_init(struct panfrost_device *pfdev) err =3D panfrost_clk_init(pfdev); if (err) { dev_err(pfdev->base.dev, "clk init failed %d\n", err); - goto out_reset; + goto out_pm_domain; } =20 err =3D panfrost_devfreq_init(pfdev); @@ -265,60 +432,70 @@ int panfrost_device_init(struct panfrost_device *pfde= v) goto out_regulator; } =20 - err =3D panfrost_gpu_init(pfdev); + err =3D devm_pm_runtime_enable(pfdev->base.dev); if (err) goto out_regulator; =20 - err =3D panfrost_mmu_init(pfdev); + err =3D pm_runtime_resume_and_get(pfdev->base.dev); if (err) - goto out_gpu; + goto out_regulator; =20 - err =3D panfrost_jm_init(pfdev); + /* If PM is disabled, we need to call panfrost_device_runtime_resume() ma= nually. */ + if (!IS_ENABLED(CONFIG_PM)) { + err =3D panfrost_device_runtime_resume(pfdev->base.dev); + if (err) + goto out_regulator; + } + + err =3D panfrost_gpu_init(pfdev); if (err) - goto out_mmu; + goto out_rpm_put; + + err =3D panfrost_mmu_init(pfdev); + if (err) + goto out_rpm_put; =20 err =3D panfrost_perfcnt_init(pfdev); if (err) - goto out_job; + goto out_rpm_put; =20 err =3D panfrost_gem_init(pfdev); if (err) goto out_perfcnt; =20 + err =3D panfrost_jm_init(pfdev); + if (err) + goto out_gem; + return 0; =20 +out_gem: + panfrost_gem_fini(pfdev); out_perfcnt: panfrost_perfcnt_fini(pfdev); -out_job: - panfrost_jm_fini(pfdev); -out_mmu: - panfrost_mmu_fini(pfdev); -out_gpu: - panfrost_gpu_fini(pfdev); +out_rpm_put: + panfrost_try_suspend_device(pfdev); out_regulator: panfrost_regulator_fini(pfdev); out_devfreq: panfrost_devfreq_fini(pfdev); out_clk: panfrost_clk_fini(pfdev); -out_reset: - panfrost_reset_fini(pfdev); out_pm_domain: panfrost_pm_domain_fini(pfdev); return err; } =20 -void panfrost_device_fini(struct panfrost_device *pfdev) +void +panfrost_device_fini(struct panfrost_device *pfdev) { + panfrost_jm_fini(pfdev); panfrost_gem_fini(pfdev); panfrost_perfcnt_fini(pfdev); - panfrost_jm_fini(pfdev); - panfrost_mmu_fini(pfdev); - panfrost_gpu_fini(pfdev); - panfrost_devfreq_fini(pfdev); + panfrost_try_suspend_device(pfdev); panfrost_regulator_fini(pfdev); + panfrost_devfreq_fini(pfdev); panfrost_clk_fini(pfdev); - panfrost_reset_fini(pfdev); panfrost_pm_domain_fini(pfdev); } =20 @@ -425,147 +602,9 @@ bool panfrost_exception_needs_reset(const struct panf= rost_device *pfdev, void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int) { panfrost_gpu_soft_reset(pfdev); - panfrost_gpu_power_on(pfdev); panfrost_mmu_reset(pfdev); - panfrost_jm_reset_interrupts(pfdev); if (enable_job_int) panfrost_jm_enable_interrupts(pfdev); } - -static int panfrost_device_runtime_resume(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - int ret; - - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { - ret =3D reset_control_deassert(pfdev->rstc); - if (ret) - return ret; - - ret =3D clk_enable(pfdev->clock); - if (ret) - goto err_clk; - - ret =3D clk_enable(pfdev->bus_clock); - if (ret) - goto err_bus_clk; - - ret =3D clk_enable(pfdev->bus_ace_clock); - if (ret) - goto err_bus_ace_clk; - } - - panfrost_device_reset(pfdev, true); - panfrost_devfreq_resume(pfdev); - - return 0; - -err_bus_ace_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - clk_disable(pfdev->bus_clock); -err_bus_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - clk_disable(pfdev->clock); -err_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - reset_control_assert(pfdev->rstc); - return ret; -} - -static int panfrost_device_runtime_suspend(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - - if (!panfrost_jm_is_idle(pfdev)) - return -EBUSY; - - panfrost_devfreq_suspend(pfdev); - panfrost_jm_suspend_irq(pfdev); - panfrost_mmu_suspend_irq(pfdev); - panfrost_gpu_suspend_irq(pfdev); - panfrost_gpu_power_off(pfdev); - - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { - clk_disable(pfdev->bus_ace_clock); - clk_disable(pfdev->bus_clock); - clk_disable(pfdev->clock); - reset_control_assert(pfdev->rstc); - } - - return 0; -} - -static int panfrost_device_resume(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - int ret; - - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { - unsigned long freq =3D pfdev->pfdevfreq.fast_rate; - struct dev_pm_opp *opp; - - opp =3D dev_pm_opp_find_freq_ceil(dev, &freq); - if (IS_ERR(opp)) - return PTR_ERR(opp); - dev_pm_opp_set_opp(dev, opp); - dev_pm_opp_put(opp); - } - - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { - ret =3D clk_enable(pfdev->clock); - if (ret) - goto err_clk; - - if (pfdev->bus_clock) { - ret =3D clk_enable(pfdev->bus_clock); - if (ret) - goto err_bus_clk; - } - } - - ret =3D pm_runtime_force_resume(dev); - if (ret) - goto err_resume; - - return 0; - -err_resume: - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) - clk_disable(pfdev->bus_clock); -err_bus_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) - clk_disable(pfdev->clock); -err_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) - dev_pm_opp_set_opp(dev, NULL); - return ret; -} - -static int panfrost_device_suspend(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - int ret; - - ret =3D pm_runtime_force_suspend(dev); - if (ret) - return ret; - - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { - if (pfdev->bus_clock) - clk_disable(pfdev->bus_clock); - - clk_disable(pfdev->clock); - } - - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) - dev_pm_opp_set_opp(dev, NULL); - - return 0; -} - -EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) =3D { - RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_r= esume, NULL) - SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) -}; diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index ec55c136b1b6..0fd33bc5b86f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -253,6 +253,8 @@ int panfrost_device_init(struct panfrost_device *pfdev); void panfrost_device_fini(struct panfrost_device *pfdev); void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int); =20 +void panfrost_try_suspend_device(struct panfrost_device *pfdev); + extern const struct dev_pm_ops panfrost_pm_ops; =20 enum drm_panfrost_exception_type { @@ -342,4 +344,10 @@ panfrost_device_schedule_reset(struct panfrost_device = *pfdev) queue_work(pfdev->reset.wq, &pfdev->reset.work); } =20 +static inline bool +panfrost_device_started(struct panfrost_device *pfdev) +{ + return pfdev->js; +} + #endif diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 331a3bd5b98c..8410de95e364 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -988,9 +988,6 @@ static int panfrost_probe(struct platform_device *pdev) goto err_out0; } =20 - pm_runtime_set_active(pfdev->base.dev); - pm_runtime_mark_last_busy(pfdev->base.dev); - pm_runtime_enable(pfdev->base.dev); pm_runtime_set_autosuspend_delay(pfdev->base.dev, 50); /* ~3 frames */ pm_runtime_use_autosuspend(pfdev->base.dev); =20 @@ -1002,13 +999,12 @@ static int panfrost_probe(struct platform_device *pd= ev) if (err < 0) goto err_out1; =20 + pm_runtime_put_autosuspend(pfdev->base.dev); =20 return 0; =20 err_out1: - pm_runtime_disable(pfdev->base.dev); panfrost_device_fini(pfdev); - pm_runtime_set_suspended(pfdev->base.dev); err_out0: return err; } @@ -1019,10 +1015,9 @@ static void panfrost_remove(struct platform_device *= pdev) =20 drm_dev_unregister(&pfdev->base); =20 - pm_runtime_get_sync(pfdev->base.dev); - pm_runtime_disable(pfdev->base.dev); + drm_WARN_ON(&pfdev->base, pm_runtime_get_sync(pfdev->base.dev) < 0); + panfrost_device_fini(pfdev); - pm_runtime_set_suspended(pfdev->base.dev); } =20 static ssize_t profiling_show(struct device *dev, diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panf= rost/panfrost_gpu.c index 7d555e63e21a..0a3a68b561c9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -509,7 +509,9 @@ void panfrost_gpu_suspend_irq(struct panfrost_device *p= fdev) set_bit(PANFROST_COMP_BIT_GPU, pfdev->is_suspended); =20 gpu_write(pfdev, GPU_INT_MASK, 0); - synchronize_irq(pfdev->gpu_irq); + + if (pfdev->gpu_irq > 0) + synchronize_irq(pfdev->gpu_irq); } =20 int panfrost_gpu_init(struct panfrost_device *pfdev) @@ -548,11 +550,6 @@ int panfrost_gpu_init(struct panfrost_device *pfdev) return 0; } =20 -void panfrost_gpu_fini(struct panfrost_device *pfdev) -{ - panfrost_gpu_power_off(pfdev); -} - u32 panfrost_gpu_get_latest_flush_id(struct panfrost_device *pfdev) { u32 flush_id; diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.h b/drivers/gpu/drm/panf= rost/panfrost_gpu.h index b4fef11211d5..3b39eaaa4d8f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.h +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.h @@ -8,7 +8,6 @@ struct panfrost_device; =20 int panfrost_gpu_init(struct panfrost_device *pfdev); -void panfrost_gpu_fini(struct panfrost_device *pfdev); =20 u32 panfrost_gpu_get_latest_flush_id(struct panfrost_device *pfdev); =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index 2d12b83e900a..c761379851da 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -446,7 +446,9 @@ void panfrost_jm_suspend_irq(struct panfrost_device *pf= dev) set_bit(PANFROST_COMP_BIT_JOB, pfdev->is_suspended); =20 job_write(pfdev, JOB_INT_MASK, 0); - synchronize_irq(pfdev->js->irq); + + if (pfdev->js) + synchronize_irq(pfdev->js->irq); } =20 static void panfrost_job_handle_err(struct panfrost_device *pfdev, @@ -869,7 +871,6 @@ int panfrost_jm_init(struct panfrost_device *pfdev) js =3D devm_kzalloc(pfdev->base.dev, sizeof(*js), GFP_KERNEL); if (!js) return -ENOMEM; - pfdev->js =3D js; =20 INIT_WORK(&pfdev->reset.work, panfrost_reset_work); spin_lock_init(&js->job_lock); @@ -904,6 +905,8 @@ int panfrost_jm_init(struct panfrost_device *pfdev) } } =20 + pfdev->js =3D js; + panfrost_jm_reset_interrupts(pfdev); panfrost_jm_enable_interrupts(pfdev); =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panf= rost/panfrost_mmu.c index 4a3162c3b659..3fe37dd12360 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -973,15 +973,12 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) return 0; } =20 -void panfrost_mmu_fini(struct panfrost_device *pfdev) -{ - mmu_write(pfdev, MMU_INT_MASK, 0); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-6-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1739; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=pkUQoVA/o7xB9fGZuFOjj02/lCPXGAK8d1Hu2m8L7o0=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czxwXiJTezHbtkSptyoWBVkVWsy5QWUVR6T LcQNv4BOeqJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PfHSC/9ypcWRGJcLWceL0YBGlmpVA287c8a9wHKu0RSjtAitUwkKUUVVeEYrkgWnvopbQGj2pQh pYSeT7nE0Ai8zNX9/WpdDImuYR/8RlSACPmFRQUWHvTzJmpXaFTeOf/cSewV4XxnuCOBmTnEcnU DPhKLWJtvhO+vOIY37lk73OTc2D+2Qrl0DECEJOUf+jPk3qZWiWKyKe6U4O/CFBFoZhvB2b9E7W X/Kk+hVJMGKY+kDmAKZuop+Wb43iABCgrbYGGMX9oslRBWHG2wiSlxfaaONIfsXNNJsM+eGR9Fh yJvd+hjACvcJiXQhGbUluyXQTLs/cXGhcMXJCbhBSPrgEKGExh86BANnPY7asQd+pfhvQr+DLRD o080wq3YHS4QtitJdg55tob7GSsqgmkQguGqVruCsi5RYIu7mKoEOMMNjGMcvA2MH7/Kmr/WtIo Z8Y8UBqaLoUnSaWxcpKj3W+DHNDZo+il7BdOyFMjfd/tG8fAuIneBFbUIlGKwBMekDroc= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Because the device must be in a position to accept jobs between the time drm_dev_register() is called and autosuspend first kicks in, there's a very narrow window inbetween during which jobs targeting the tiler buffer object would time out, since the device's PM status is 'Active', but no MMU interrupts were enabled at device initialisation time. Signed-off-by: Adri=C3=A1n Larumbe Fixes: 73e467f60acd ("drm/panfrost: Consolidate reset handling") Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panf= rost/panfrost_mmu.c index 3fe37dd12360..a8ce5d65825c 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -336,6 +336,12 @@ void panfrost_mmu_as_put(struct panfrost_device *pfdev= , struct panfrost_mmu *mmu WARN_ON(atomic_read(&mmu->as_count) < 0); } =20 +static void panfrost_mmu_enable_interrupts(struct panfrost_device *pfdev) +{ + mmu_write(pfdev, MMU_INT_CLEAR, ~0); + mmu_write(pfdev, MMU_INT_MASK, ~0); +} + void panfrost_mmu_reset(struct panfrost_device *pfdev) { struct panfrost_mmu *mmu, *mmu_tmp; @@ -355,8 +361,7 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev) =20 spin_unlock(&pfdev->as_lock); =20 - mmu_write(pfdev, MMU_INT_CLEAR, ~0); - mmu_write(pfdev, MMU_INT_MASK, ~0); + panfrost_mmu_enable_interrupts(pfdev); } =20 static size_t get_pgsize(u64 addr, size_t size, size_t *count) @@ -970,6 +975,8 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) return err; } =20 + panfrost_mmu_enable_interrupts(pfdev); + return 0; } =20 --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE90747CA82 for ; Tue, 11 Aug 2026 21:43:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786484619; cv=pass; b=jF3tSyvOXc4edlgt9Iw9KR1477fCw6HJMpfty2mUixNkABubyh/cU4l0aF9RtSHH97v8jmin+FiaSIwNdQMoZTNJ92770RO3ed5FhvH+J1TaKV0APXNVTKMiYD854Ssy3OmH0loRXMMofGRtLmC61AfKZp8R0jciWQCJtf0+CLI= ARC-Message-Signature: i=2; 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Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2968; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=gDNNC4oEwFRAgp5W1geDr5Ryzv+HXDM0KBvthHj2hzU=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czk/1FewOY89pGpZvy18p4FxrVT3TsMuAf0 yV7AnYnJaeJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PUBOC/4+kLEMlMbdcXNh+f5Qz2RGG0QoSzlJ3G7KQb9V0VI/2WzbpK9+zvMBjrQaSkvUC69DR6f phX+2gIu1pmlFJgddPxM1rcF5mzN1ODFPB8SHK5Grx2HQnUI+qQEuFMzMHwaeI03T6nTGG5jERq aI8lJ7VLG7d9WTUoju/6+NGsvfWwLIwduwYBgPebwfC5Atgc/714KEKveIgP+cjUlb3trgZ0CnF uUVCNM8Ln1O6MsspcembyOMuVX/q4sHE82kCSjm0+RQHKZnKzM9mgVwNeCOjmFw9u1N5WTjoekX RcprALH8xfRf4pzKkUpQ6+F5At03F49q72B78YY7s83BXrcfEmiObLUayemDqsqPcXcmJkw7TGx fRDuOuWRdo+ig3cxffVZmpBlqapQ02K/GP485Yb7nGK67Zzj/b3LpbIXWN4M/wfK4td8d96cAXy HSGIYJVFcMCFQfqdUVmxoQtGWJOCgET9e0CjIBtwoeEoerCamZofCEZpuUMqn1aKXf+Zo= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D This will be of great help when testing potential races between the GPU reset sequence and other parts of the code accessing HW registers. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 39 ++++++++++++++++++++++++++= ++++ drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 3 files changed, 43 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 52f4b8c6a05f..5b66173c75b9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -2,6 +2,7 @@ /* Copyright 2018 Marty E. Plummer */ /* Copyright 2019 Linaro, Ltd, Rob Herring */ =20 +#include #include #include #include @@ -608,3 +609,41 @@ void panfrost_device_reset(struct panfrost_device *pfd= ev, bool enable_job_int) if (enable_job_int) panfrost_jm_enable_interrupts(pfdev); } + +#ifdef CONFIG_DEBUG_FS +static int reset_get(void *data, u64 *val) +{ + struct panfrost_device *pfdev =3D + container_of(data, struct panfrost_device, base); + + *val =3D atomic_read(&pfdev->reset.pending); + return 0; +} + +static int reset_set(void *data, u64 val) +{ + struct panfrost_device *pfdev =3D + container_of(data, struct panfrost_device, base); + int ret; + + ret =3D pm_runtime_get_if_in_use(pfdev->base.dev); + + if (ret > 0) { + panfrost_device_schedule_reset(pfdev); + flush_work(&pfdev->reset.work); + pm_runtime_put(pfdev->base.dev); + } + + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(panfrost_reset_debugfs_fops, + reset_get, reset_set, + "0x%08llx\n"); + +void panfrost_reset_debugfs_init(struct drm_minor *minor) +{ + debugfs_create_file("reset", 0600, minor->debugfs_root, + minor->dev, &panfrost_reset_debugfs_fops); +} +#endif // CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 0fd33bc5b86f..4bbaaaf827a5 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -350,4 +350,7 @@ panfrost_device_started(struct panfrost_device *pfdev) return pfdev->js; } =20 +#ifdef CONFIG_DEBUG_FS +void panfrost_reset_debugfs_init(struct drm_minor *minor); +#endif // CONFIG_DEBUG_FS #endif diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 8410de95e364..958f1d36ab10 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -916,6 +916,7 @@ static void panfrost_debugfs_init(struct drm_minor *min= or) { panthor_gems_debugfs_init(minor); panfrost_sched_debugfs_init(minor); + panfrost_reset_debugfs_init(minor); } #endif =20 --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FA6F47DD4D for ; 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Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2779; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=4tGiJGWiK+TDM+P28WpbzF6ffBP1X3E56TrK7Eumeb4=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czuIqa0ef3PWXJjZNDgQd8Dey54R+0oMmew EpwCKc1kLaJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PSbhC/946iwnv3BPDbKotWayfvoASDTh6O5zbGM6TQbe3w+mvT8wR0dphJ4hc06byz5jfuLvR8y RHr6AgIQkihJP5ST2E0rEQe9ihONR/rgp/mS8EDCm0IS3ecmcxUJGfYFv61Q7GhopGaiwBvXg6+ xG7DmRv7i6EP+iSwxeOV7wO+NjepR6bgmG6pZWuTasobP1RIo0FdpXVzTSTVohpoZWqFpGOKT0c ZDXRzwjyRaU9Yd3pSyr7PM0nB5qHiTte1ukEzkIYjeYL42XM2jx85F80h6pcGXFg51RIB6sbW61 B6oZi+G/OVA7LJyyOoXcGmfDdliEQknhxfD4gkvS/7Lwgl/UcaBwdYuQ6hWXCon7M69TUx9cLWX yu1Wkte/LKUvKVHoE7jGa8VPorQcN+I21nbccyNiqc6O8ll0O9Bp7YW5y6WwxCxVBq9p/Si0E4H B9K5TbO5pUGPqE6o9DF+iiO1sELimG+Y1g/QlkCgyqhV4fhQSQecIEufsYGu9kW74qyxI= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Just for the sake of avoiding repetition. Reviewed-by: Steven Price Reviewed-by: Boris Brezillon Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 31 ++++++++++++-------------= ---- 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.c index 7020c0192e18..ad1156678e91 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c @@ -35,6 +35,16 @@ struct panfrost_perfcnt { struct completion dump_comp; }; =20 +static void panfrost_perfcnt_gpu_disable(struct panfrost_device *pfdev) +{ + gpu_write(pfdev, GPU_PERFCNT_CFG, + GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); + gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); +} + void panfrost_perfcnt_clean_cache_done(struct panfrost_device *pfdev) { complete(&pfdev->perfcnt->dump_comp); @@ -193,12 +203,7 @@ static int panfrost_perfcnt_disable_locked(struct panf= rost_device *pfdev, if (user !=3D perfcnt->user) return -EINVAL; =20 - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); + panfrost_perfcnt_gpu_disable(pfdev); =20 perfcnt->user =3D NULL; drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map); @@ -327,12 +332,7 @@ int panfrost_perfcnt_init(struct panfrost_device *pfde= v) perfcnt->bosize =3D size; =20 /* Start with everything disabled. */ - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + panfrost_perfcnt_gpu_disable(pfdev); =20 init_completion(&perfcnt->dump_comp); mutex_init(&perfcnt->lock); @@ -344,10 +344,5 @@ int panfrost_perfcnt_init(struct panfrost_device *pfde= v) void panfrost_perfcnt_fini(struct panfrost_device *pfdev) { /* Disable everything before leaving. */ - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + panfrost_perfcnt_gpu_disable(pfdev); } --=20 2.55.0 From nobody Tue Sep 29 05:34:17 2026 Received: from sender5-op-o11.zoho.com (sender5-op-o11.zoho.com [165.173.182.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 630323B27CF for ; Tue, 11 Aug 2026 21:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=165.173.182.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1786484589; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=BhoYIx6OxWdB580Z5qcbi/sQQupdEao2wwujd/LBUAk=; b=N6GYxQkDxPWPYxjDsIrAAUG75caNWQpULog8/ZTGwp79IryljN5hMwytknajiTXy X62p48zDteNbnKD7kumYpxHxjv/avGl2m5yPRSWo0/Z2R8NqRT9YyrwnRy9rONlBnMZ w5Wr9dX9C9S66wu6FJGX74HiiTcoCIah82ZVS7jg= Received: by mx.zohomail.com with SMTPS id 1786484588194430.315618178503; Tue, 11 Aug 2026 14:43:08 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:18 +0100 Subject: [PATCH v5 09/11] drm/panfrost: Introduce a reset lock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-9-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2933; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=rKhFjLvayP2FIib1Snq96DiehUFdNZVjiraV8+mKivE=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czTWX/lic3z1D1NJjyyBzDjAccZcc1cWjAS P2RC8/1CByJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PbCjC/90xecD8pLqsd16lmBZpbdIWSffxZg1Scavl74filGbG/XImyChZMq6zN1pdVWDfXp1P4Q izqopsEAnA81nfokwoP2uXeuDCFmYxadbK34CcyFJUYPsE6MtDkq3bhsNVWMFjSZ0FJEsjms0i1 zsF9b4uLML985TQFyEWogcDFOdbzR7hMc1vzb5G37k5KJUKY+2OPVvmb2Y55nnqTZyjPFyo7L0P SCBinShYON8CM5mGoCnazp3AUfyRyywI6joVcGlb9ufhF263ylFXWWEoSvNOuRVXborGirFm87p 1vwQcQL3Sz1RPqot0DV/NqM+8/700ihJg44gPvRpHEvPLfDBTA+k/tmXHdABcLGJsNo3VumUaPc np03ie0zdz2B4eQ5C3V01Vj2MLPkEAO5UPhiF0wVEQTvg1YDvyDmVmflSma+C8h+B1+MZqPL/t3 OTGM1baHOL5xBcXq4hUpv+LreTX9RF2z9zrXSZYKJdXRJhMmyj4iloJtMqvfQynSEQnzs= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D So as to avoid accessing HW register while a reset is ongoing, a read/write semaphore that envelopes the reset sequence will help driver entry points avoid racing with it. For now, the only such racy entry point is the ioctl that returns the current GPU timestmap. Signed-off-by: Adri=C3=A1n Larumbe Reviewed-by: Boris Brezillon --- drivers/gpu/drm/panfrost/panfrost_device.c | 2 ++ drivers/gpu/drm/panfrost/panfrost_device.h | 1 + drivers/gpu/drm/panfrost/panfrost_drv.c | 9 ++++++--- drivers/gpu/drm/panfrost/panfrost_job.c | 1 + 4 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 5b66173c75b9..e0390b6c0d22 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -602,6 +602,8 @@ bool panfrost_exception_needs_reset(const struct panfro= st_device *pfdev, =20 void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int) { + guard(rwsem_read)(&pfdev->reset.lock); + panfrost_gpu_soft_reset(pfdev); panfrost_gpu_power_on(pfdev); panfrost_mmu_reset(pfdev); diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 4bbaaaf827a5..a2a68e042225 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -166,6 +166,7 @@ struct panfrost_device { struct { struct workqueue_struct *wq; struct work_struct work; + struct rw_semaphore lock; atomic_t pending; } reset; =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 958f1d36ab10..ff23b1a979bb 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -41,9 +41,12 @@ static int panfrost_ioctl_query_timestamp(struct panfros= t_device *pfdev, if (ret) return ret; =20 - panfrost_cycle_counter_get(pfdev); - *arg =3D panfrost_timestamp_read(pfdev); - panfrost_cycle_counter_put(pfdev); + /* We should not read timestamp register while the GPU is being reset */ + scoped_guard(rwsem_read, &pfdev->reset.lock) { + panfrost_cycle_counter_get(pfdev); + *arg =3D panfrost_timestamp_read(pfdev); + panfrost_cycle_counter_put(pfdev); + } =20 pm_runtime_put(pfdev->base.dev); return 0; diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index c761379851da..9d7dafa29f19 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -874,6 +874,7 @@ int panfrost_jm_init(struct panfrost_device *pfdev) =20 INIT_WORK(&pfdev->reset.work, panfrost_reset_work); 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Tue, 11 Aug 2026 14:43:14 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:19 +0100 Subject: [PATCH v5 10/11] drm/panfrost: Fix races between perfcnt and reset sequence Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-10-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=13366; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=mfN1IbtfhlWpuSwaADCXDdwVC39lESIzPQKiTGDMRkw=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5czltpB8JDVVAZY5r9skHGj4ygCQ9y2tmJXB doRWn/JNz6JAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PViwC/9MdB5IOb49oYQylpeSZsr++nUOnpnqfyGyJKk+YjFI1aqfhgHYbCHFpb/Ni2jUIMd42fc MzvIDeD7Km4TeQHli5cXto2e94diZgQWqHTSQ9H9/IMLM6QuZcjWvpLIDweH9bZuKByA2D6llkp t4X0gl057RaBgvldJUFXCX2MiLhV7/LXLOHt1lDGwfNxR3VLne1myJjx39GvUQ1s/oDVHsyyiI9 1CnlzqSNDswNRljPsNx9+PAa6by+gfnZzerQzwUhlDmMnQhSS/WYQ+azTlBeTsvpyLXh1LdfVDR 09Q6EtXdwW0AfYyN3L19CBeIzzUhk4CJDbqbWqQj1WWS0K15lI0RN3iLTLdQRCCNuxHjMyyjCZt T2k9gRH+uTIUr59LdL5Z2AYquHm181r+zUs6VUhy7f31L+4hS+1ZUtAakT2He5yoN/K4GDdxV+r ABVZwfwPiiKKBga0wRnYg3B5j+FbbvOsYFZbRWoGCWVLNmD0ExEfFBh+Fs0gslNWYRxf0= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Formerly, the reset sequence would race with panfrost_mmu_as_put() when tearing down a perfcnt session. On top of that, poking GPU registers to program a perfcnt session or obtaining a dump might lead to undefined behaviour when done at the same time a reset was ongoing. Use the reset r/w semaphore to govern access to the hardware at reset time. On top of that, expand the DRM uAPI for the perfcnt DUMP operation so that userspace can be made aware of a reset having happened, because that means counters will go back to 0 and can no longer be accumulated to values previously kept in user space. The new perfcnt-aware reset sequence also takes care to reestablish perfcnt to its original configuration if there was an enabled session. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 9 +- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 220 ++++++++++++++++++++----= ---- drivers/gpu/drm/panfrost/panfrost_perfcnt.h | 2 + include/uapi/drm/panfrost_drm.h | 3 +- 4 files changed, 171 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index e0390b6c0d22..c81d8ca67ae4 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -602,14 +602,21 @@ bool panfrost_exception_needs_reset(const struct panf= rost_device *pfdev, =20 void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int) { - guard(rwsem_read)(&pfdev->reset.lock); + guard(rwsem_write)(&pfdev->reset.lock); =20 + /* Pre-reset */ + panfrost_perfcnt_reset(pfdev); + + /* Do the actual device reset */ panfrost_gpu_soft_reset(pfdev); panfrost_gpu_power_on(pfdev); + + /* Post-reset */ panfrost_mmu_reset(pfdev); panfrost_jm_reset_interrupts(pfdev); if (enable_job_int) panfrost_jm_enable_interrupts(pfdev); + panfrost_perfcnt_postreset(pfdev); } =20 #ifdef CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.c index ad1156678e91..01d477f7fce0 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c @@ -11,6 +11,7 @@ #include #include #include +#include =20 #include "panfrost_device.h" #include "panfrost_features.h" @@ -25,14 +26,18 @@ #define BYTES_PER_COUNTER 4 #define BLOCKS_PER_COREGROUP 8 #define V4_SHADERS_PER_COREGROUP 4 +#define PERFCNT_DUMP_MAX_RETRIES 5 =20 struct panfrost_perfcnt { struct panfrost_gem_mapping *mapping; + unsigned int counterset; size_t bosize; void *buf; struct panfrost_file_priv *user; struct mutex lock; struct completion dump_comp; + bool reset_happened; + bool reset_failed; }; =20 static void panfrost_perfcnt_gpu_disable(struct panfrost_device *pfdev) @@ -55,25 +60,93 @@ void panfrost_perfcnt_sample_done(struct panfrost_devic= e *pfdev) gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_CACHES); } =20 -static int panfrost_perfcnt_dump_locked(struct panfrost_device *pfdev) +static int panfrost_perfcnt_hw_enable(struct panfrost_device *pfdev) { - u64 gpuva; + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + u32 cfg, as; + int ret; + + ret =3D panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu); + if (ret < 0) + return ret; + + as =3D ret; + cfg =3D GPU_PERFCNT_CFG_AS(as) | + GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_MANUAL); + + /* + * Bifrost GPUs have 2 set of counters, but we're only interested by + * the first one for now. + */ + if (panfrost_model_is_bifrost(pfdev)) + cfg |=3D GPU_PERFCNT_CFG_SETSEL(perfcnt->counterset); + + gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0xffffffff); + gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0xffffffff); + gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0xffffffff); + + /* + * Due to PRLAM-8186 we need to disable the Tiler before we enable HW + * counters. + */ + if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + else + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + + gpu_write(pfdev, GPU_PERFCNT_CFG, cfg); + + if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + + return 0; +} + +static int panfrost_perfcnt_dump_locked(struct panfrost_device *pfdev, + u64 *reset_happened) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + u64 gpuva =3D perfcnt->mapping->mmnode.start << PAGE_SHIFT; + s64 retries =3D PERFCNT_DUMP_MAX_RETRIES; int ret; =20 - reinit_completion(&pfdev->perfcnt->dump_comp); - gpuva =3D pfdev->perfcnt->mapping->mmnode.start << PAGE_SHIFT; - gpu_write(pfdev, GPU_PERFCNT_BASE_LO, lower_32_bits(gpuva)); - gpu_write(pfdev, GPU_PERFCNT_BASE_HI, upper_32_bits(gpuva)); - gpu_write(pfdev, GPU_INT_CLEAR, - GPU_IRQ_CLEAN_CACHES_COMPLETED | - GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); - gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_SAMPLE); +dump_retry: + scoped_guard(rwsem_read, &pfdev->reset.lock) { + *reset_happened =3D perfcnt->reset_happened; + perfcnt->reset_happened =3D false; + if (perfcnt->reset_failed) { + ret =3D panfrost_perfcnt_hw_enable(pfdev); + if (ret) + return ret; + perfcnt->reset_failed =3D false; + } + + reinit_completion(&pfdev->perfcnt->dump_comp); + + gpu_write(pfdev, GPU_PERFCNT_BASE_LO, lower_32_bits(gpuva)); + gpu_write(pfdev, GPU_PERFCNT_BASE_HI, upper_32_bits(gpuva)); + gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_CLEAN_CACHES_COMPLETED | + GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); + gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_SAMPLE); + } + ret =3D wait_for_completion_interruptible_timeout(&pfdev->perfcnt->dump_c= omp, msecs_to_jiffies(1000)); - if (!ret) - ret =3D -ETIMEDOUT; - else if (ret > 0) - ret =3D 0; + + scoped_guard(rwsem_read, &pfdev->reset.lock) { + if (ret > 0) { + if (perfcnt->reset_happened) { + if (--retries >=3D 0) + goto dump_retry; + else + ret =3D -EBUSY; + } else { + ret =3D 0; + } + } else if (!ret) { + ret =3D -ETIMEDOUT; + } + } =20 return ret; } @@ -84,9 +157,8 @@ static int panfrost_perfcnt_enable_locked(struct panfros= t_device *pfdev, { struct panfrost_file_priv *user =3D file_priv->driver_priv; struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; - struct iosys_map map; struct drm_gem_shmem_object *bo; - u32 cfg, as; + struct iosys_map map; int ret; =20 if (user =3D=3D perfcnt->user) @@ -119,7 +191,9 @@ static int panfrost_perfcnt_enable_locked(struct panfro= st_device *pfdev, ret =3D drm_gem_vmap(&bo->base, &map); if (ret) goto err_put_mapping; + perfcnt->buf =3D map.vaddr; + perfcnt->counterset =3D counterset; =20 panfrost_gem_internal_set_label(&bo->base, "Perfcnt sample buffer"); =20 @@ -127,60 +201,47 @@ static int panfrost_perfcnt_enable_locked(struct panf= rost_device *pfdev, * Invalidate the cache and clear the counters to start from a fresh * state. */ - reinit_completion(&pfdev->perfcnt->dump_comp); - gpu_write(pfdev, GPU_INT_CLEAR, - GPU_IRQ_CLEAN_CACHES_COMPLETED | - GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); - gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR); - gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + reinit_completion(&pfdev->perfcnt->dump_comp); + gpu_write(pfdev, GPU_INT_CLEAR, + GPU_IRQ_CLEAN_CACHES_COMPLETED | + GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); + gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR); + gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES); + perfcnt->reset_happened =3D false; + perfcnt->user =3D user; + } + + /* + * If a reset happens during the wait for the IRQ notification that caches + * are clean and invalidated, then we know the reset sequence did the job + * for us, even if it takes long enough for the completion to time out. + */ ret =3D wait_for_completion_timeout(&pfdev->perfcnt->dump_comp, msecs_to_jiffies(1000)); - if (!ret) { + if (!ret && !perfcnt->reset_happened) { ret =3D -ETIMEDOUT; goto err_vunmap; } =20 - ret =3D panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu); - if (ret < 0) - goto err_vunmap; - - as =3D ret; - cfg =3D GPU_PERFCNT_CFG_AS(as) | - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_MANUAL); - - /* - * Bifrost GPUs have 2 set of counters, but we're only interested by - * the first one for now. - */ - if (panfrost_model_is_bifrost(pfdev)) - cfg |=3D GPU_PERFCNT_CFG_SETSEL(counterset); - - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0xffffffff); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0xffffffff); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0xffffffff); - - /* - * Due to PRLAM-8186 we need to disable the Tiler before we enable HW - * counters. - */ - if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); - else - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); - - gpu_write(pfdev, GPU_PERFCNT_CFG, cfg); - - if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + if (!perfcnt->reset_happened || perfcnt->reset_failed) { + ret =3D panfrost_perfcnt_hw_enable(pfdev); + if (ret) + goto err_vunmap; + } + perfcnt->reset_happened =3D false; + perfcnt->reset_failed =3D false; + } =20 /* The BO ref is retained by the mapping. */ drm_gem_object_put(&bo->base); =20 - perfcnt->user =3D user; - return 0; =20 err_vunmap: + scoped_guard(rwsem_read, &pfdev->reset.lock) + perfcnt->user =3D NULL; drm_gem_vunmap(&bo->base, &map); err_put_mapping: panfrost_gem_mapping_put(perfcnt->mapping); @@ -203,13 +264,15 @@ static int panfrost_perfcnt_disable_locked(struct pan= frost_device *pfdev, if (user !=3D perfcnt->user) return -EINVAL; =20 - panfrost_perfcnt_gpu_disable(pfdev); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + panfrost_perfcnt_gpu_disable(pfdev); + panfrost_mmu_as_put(pfdev, perfcnt->mapping->mmu); + perfcnt->user =3D NULL; + } =20 - perfcnt->user =3D NULL; drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map); perfcnt->buf =3D NULL; panfrost_gem_close(&perfcnt->mapping->obj->base.base, file_priv); - panfrost_mmu_as_put(pfdev, perfcnt->mapping->mmu); panfrost_gem_mapping_put(perfcnt->mapping); perfcnt->mapping =3D NULL; pm_runtime_put_autosuspend(pfdev->base.dev); @@ -263,7 +326,7 @@ int panfrost_ioctl_perfcnt_dump(struct drm_device *dev,= void *data, goto out; } =20 - ret =3D panfrost_perfcnt_dump_locked(pfdev); + ret =3D panfrost_perfcnt_dump_locked(pfdev, &req->hw_reset); if (ret) goto out; =20 @@ -346,3 +409,38 @@ void panfrost_perfcnt_fini(struct panfrost_device *pfd= ev) /* Disable everything before leaving. */ panfrost_perfcnt_gpu_disable(pfdev); } + +void panfrost_perfcnt_reset(struct panfrost_device *pfdev) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + + if (drm_WARN_ON(&pfdev->base, !perfcnt)) + return; + + lockdep_assert_held(&pfdev->reset.lock); + + if (!perfcnt->user) + return; + + perfcnt->reset_happened =3D true; + complete(&perfcnt->dump_comp); + panfrost_perfcnt_gpu_disable(pfdev); +} + +void panfrost_perfcnt_postreset(struct panfrost_device *pfdev) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + int ret; + + if (drm_WARN_ON(&pfdev->base, !perfcnt)) + return; + + lockdep_assert_held(&pfdev->reset.lock); + + if (!perfcnt->user) + return; + + ret =3D panfrost_perfcnt_hw_enable(pfdev); + if (ret) + perfcnt->reset_failed =3D true; +} diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.h b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.h index 8bbcf5f5fb33..e14e760641fd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.h +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.h @@ -14,5 +14,7 @@ int panfrost_ioctl_perfcnt_enable(struct drm_device *dev,= void *data, struct drm_file *file_priv); int panfrost_ioctl_perfcnt_dump(struct drm_device *dev, void *data, struct drm_file *file_priv); +void panfrost_perfcnt_reset(struct panfrost_device *pfdev); +void panfrost_perfcnt_postreset(struct panfrost_device *pfdev); =20 #endif diff --git a/include/uapi/drm/panfrost_drm.h b/include/uapi/drm/panfrost_dr= m.h index 50d5337f35ef..3bbf9220103d 100644 --- a/include/uapi/drm/panfrost_drm.h +++ b/include/uapi/drm/panfrost_drm.h @@ -47,7 +47,7 @@ extern "C" { * them for anything but debugging purpose. */ #define DRM_IOCTL_PANFROST_PERFCNT_ENABLE DRM_IOW(DRM_COMMAND_BASE + DRM_P= ANFROST_PERFCNT_ENABLE, struct drm_panfrost_perfcnt_enable) -#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PA= NFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump) +#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOWR(DRM_COMMAND_BASE + DRM_P= ANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump) =20 #define PANFROST_JD_REQ_FS (1 << 0) #define PANFROST_JD_REQ_CYCLE_COUNT (1 << 1) @@ -272,6 +272,7 @@ struct drm_panfrost_perfcnt_enable { =20 struct drm_panfrost_perfcnt_dump { __u64 buf_ptr; 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Tue, 11 Aug 2026 14:43:20 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Tue, 11 Aug 2026 22:42:20 +0100 Subject: [PATCH v5 11/11] drm/panfrost: Bump driver minor to reflect new DUMP IOCTL req field Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-claude-fixes-v5-11-3d692c9e98c2@collabora.com> References: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> In-Reply-To: <20260811-claude-fixes-v5-0-3d692c9e98c2@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1172; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=BujlFQSZpxg9zUWbgekPbVBq4Vs5CwXd++tBrZUliMU=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqe5cz2e8mDigV3mWTm5FmcLfp5DiEYfJ/NpTF3 Sv2R3sT1+GJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCanuXMwAKCRAOJn5M7lND PR/IC/wJcVdvbLhmvGad+4uJPd8g6YUoNjpj4YMI1RYrT4avo6g/Yt6GdK9rVJ856HSkF+DNX8h hS4HbFK/f4WqQr0Q3fAhRa2yeV41aBDRmE9bKOSqBN45vlH2BJe1+d+mratQX2jNjHqJihcta+d C4wVz2V3np4XhJOzEKcqXWQBFmn6vhTfsnPdLWOIfG9/qQWKRGH951eWfeWx86QiFzWLQ1GM3sv wlUX/4kJjBYHYXcLle4EzBaijWzxgYlNl02G4SU96SaJJJIvaxuL04C30eWUTEvxCAxa0YL/K1j drkTxKj7nFt8B0q8PCqBjHIMjJoW7iQv2xIkjgSdciGL4CeY66JwXOLk8QUvY5fwr2w6g/F6OUc BLMl/B5eUe4yxtPEbJbvXlK1gypXi4PdPqQXPcgMMHPiSntgtAFsrm9CYtW0rX0SruSt3d15cqd h+06UWGBcVgBtAUVpM1WPi2xUpftjI/77sykhupwppc1wiBvBVQIv+45nhN8NfA7roO7s= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Expose expanded PERFCNT_DUMP IOCTL interface to user mode. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index ff23b1a979bb..2949ab3ca055 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -936,6 +936,7 @@ static void panfrost_debugfs_init(struct drm_minor *min= or) * - 1.6 - adds PANFROST_BO_MAP_WB, PANFROST_IOCTL_SYNC_BO, * PANFROST_IOCTL_QUERY_BO_INFO and * DRM_PANFROST_PARAM_SELECTED_COHERENCY + * - 1.7 - adds PERFCNT_DUMP req hw_reset field */ static const struct drm_driver panfrost_drm_driver =3D { .driver_features =3D DRIVER_RENDER | DRIVER_GEM | DRIVER_SYNCOBJ, @@ -948,7 +949,7 @@ static const struct drm_driver panfrost_drm_driver =3D { .name =3D "panfrost", .desc =3D "panfrost DRM", .major =3D 1, - .minor =3D 6, + .minor =3D 7, =20 .gem_create_object =3D panfrost_gem_create_object, .gem_prime_import =3D panfrost_gem_prime_import, --=20 2.55.0