From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF35D403AE1; Tue, 11 Aug 2026 19:37:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477034; cv=none; b=WP5E9XZI6Rp4HqHQ7PCBf0DgUfg6510wF313t0m+yU2jCv9qQbizREsqlRATYIhAi/ylliA+6YrNcVA6XgA/TJhwRhf/NjOCmzZEsYi8aJ2YExC8ypT2f2jX+8TimAue/DDDtu0/QXh4DecTIdoibykZl0boaBDGtjOQ5ga8/eY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477034; c=relaxed/simple; bh=5EBBa6OVSvOCiSiPRkep3jiYn5mqqxftWQ7tp2CWrdE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HGDA0dBE/w5EQmFk9HpqT6VYzIHgD2O9UshX9x/VhFGzrbQUO5uIT0WIIc1ztBsTR6pWrl5svVEikDRBwBs0RYhSRAlcfFkdQ6/C1ZA9/hb8Ioc00hjQqoAZp58D4NbOKR8mSNpIpPzp1/xjhAIBYFb6soX/BTmzR1u9Sm/GLfc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=WCzuLyep; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="WCzuLyep" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477023; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3qOaSj38gbQXIBnLLo6XU1JtH18hHfOPNkOOi36DWfE=; b=WCzuLyepOJKNfqIVjKVe/M9wb74aq/aLu95g5L50YSjf4WvTkLGTtS685xH+rWJUyVbWQ8 2uWLaCVMcc2/i3gFjZC06lfALTfp4m0fbZe0OGsNcosa2wbliFc04wW36e/P2DIU78jE38 E1n8iCXWCp6BtPAcmzx/vqPdK2D06mY= Date: Tue, 11 Aug 2026 21:36:54 +0200 Subject: [PATCH v3 1/9] dt-bindings: arm: cpus: Add Apple M4 CPU core compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-1-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The core types of the M4 SoC no longer carry individual codenames. Apple's device trees re-use the 'everest' and 'sawtooth' codenames from the M3 generation for all later cores. Instead, we use a combination of the SoC's codename ('Donan') and the type of core ('e' and 'p' for the efficiency and performance cores respectively) as compatible for these cores. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index 5be89c584026..c328e9fb9843 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -86,6 +86,8 @@ properties: - apple,avalanche - apple,blizzard - apple,cyclone + - apple,donan-e + - apple,donan-p - apple,everest - apple,firestorm - apple,hurricane-zephyr --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43E01476CC5; Tue, 11 Aug 2026 19:37:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477037; cv=none; b=fPHdB9SKJRYyxYVsylb5JbKgstsj3ym2Zshuh9HhXDRoNWfvcxp9PZhAx1SW0P/jBtDxtOT9Q2LteqgrJfM1HiVlLPkg4bG0T0pBqGx7ZqEsB2UJa09vAODzeElWTpuuJHbnxOcAAOdBNrQT+luvIDxoo/TvWhexfCE8Q/mor1A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477037; c=relaxed/simple; bh=b1+ox9bvvZi6esBCO4i+A29vpkObZzsDgandkj048qY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eVjvU5RiW55goeTBmYEogy7DPTkXT+Ze18mNf0lxEanf35IDmn/5fQ1JH8TJBZNQQIyuE97V2L46y7pVZjXfjyFuwgozblhrMuFDFjva3bwOWsGRE8U5BegNGNqtxWubDRYyzR5cHmXz87Op8Zk2615pA1mI9J+M8MBbM77dLuQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=LxWp0Oxy; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="LxWp0Oxy" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bGqkzE9J7l8eega5eRBiLNQWdpKKNJCn7O+8KgX4WaU=; b=LxWp0Oxyiq9e4y6NZpeAvfpmPC8/Q2kmwCELrzaq6Lt8XzC33j4tS6XMKEHfW1J+HfAoEt abYHRzLxKJsVJ2w9qN/D3TT1P8bMttE3lPTdbgesCAmAVgvFsgC5WUyLuiDXQzh8we6zA6 K1QWgMsqnZ/JfQ56OOYSeAlneJWv8CM= Date: Tue, 11 Aug 2026 21:36:55 +0200 Subject: [PATCH v3 2/9] dt-bindings: interrupt-controller: apple,aic2: Add apple,t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-2-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The Apple t8132 (M4) SoC uses an AIC3 as interrupt controller, same as the M3 predecessor. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 726a6720e05f..1cb886785173 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -45,6 +45,7 @@ properties: - enum: - apple,t6030-aic3 - apple,t6031-aic3 + - apple,t8132-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A580476CCC; Tue, 11 Aug 2026 19:37:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477035; cv=none; b=O24cAtvzt832pM+oRm+UZls4eS6NWtmCb+VZy1o7HOzE+Txkh7a7hxYGNZN6o6j22ccK4QX+tRznoFhLo3bNTNL8gOl4Va1zbAU3kCGJhsgYlzoBE0GCF5t88M2fF3aGgt6ZblJ8d1rQN6LaFzQpeGbqIOx3GXSdnCPxoiDnqBQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477035; c=relaxed/simple; bh=4Ll6UalzXq5TeKpxwb4XG2sshOdGsYwoQRY2dbFg3Mw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JjAg6M0VYgXJ8CT0Lh7sXq/jxJs7e9ETAnmkiPzaL6eo/GK/buX6S43NZ1aHtskid38BVMrsGxDMBcLKOEDdcbceXarYjVS7x6MpNejXZe9t2BgML2asJCpt+h7JAquigZDjkKwvLd8587vepK+/bRa8f2CzyCGRrqZuNZsWik0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=M/yKqom8; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="M/yKqom8" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477026; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5wvhJvl8V/UCRIKi03HOG9kNnF6pjoj6mjPMcmy9q1U=; b=M/yKqom8oC0X59FtMHL36plaW/EN8JAAh2csOiwbPGvkZqy//VIZ334BqZWqGwQaFjSNQT NzMtGwDqvx5EFJ1ykHt1xRVBc6lTr8tya3lT9pXFKKeuJFVdD6e5dGCmhaLQ3n/IO2m8VB Zao3gZKwZRMmJnVtsnGDAXzPG6pgaSM= Date: Tue, 11 Aug 2026 21:36:56 +0200 Subject: [PATCH v3 3/9] dt-bindings: arm: apple: apple,pmgr: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-3-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The PMGR blocks on Apple silicon M4 SoCs (t8132) are compatible with the M1/M2/M3 predecessors. Add "apple,t8132-pmgr" as M4 specific compatible. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index 1d2001836eb4..da660fa13f77 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -41,6 +41,7 @@ properties: - apple,t6030-pmgr - apple,t6031-pmgr - apple,t8122-pmgr + - apple,t8132-pmgr - const: apple,t8103-pmgr - const: syscon - const: simple-mfd --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E9DE4779B2; Tue, 11 Aug 2026 19:37:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477037; cv=none; b=b7IqojRqMcx1CjtDZYG77H84du05aoY5yj4KrOLjBdGri9n2fJU62EPc14PnFNuTWBy9PD0JSvuXQbG66Ze/lPVoptE/VvpB5pYQrLdpQlZmRgl81tpzzD1NprBpe5AyJZSrZ4M7ggKOoIvil7OHOIO2WBu4CzuPA7KQvaKQaNs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477037; c=relaxed/simple; bh=YmFHeIB0o/O6fzGl/vGOKFOVcLF7QUtGIMGp+1SuiKE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=do7kVMW/BuDKNNc3RrUz32W3hZfOV0qG6jsUVpMnuQMZTrYmhObQ9Rg1eXeIObM3ZzrJEoVhpRAAjAmwa9SAAuIWCyOx3gLJKCe5kOgcUUijtVYRfZA4nDoZWayByWoJfR+5t/2y5LkBUYMAV/IppLF7YYc+Emkkad+/jwEapMo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=pbKuAzqj; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="pbKuAzqj" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477027; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FVJSRmVkxCrG8V5mDry6u5L6zCqB/MC8kvPzNOG+CjU=; b=pbKuAzqjoBp3xQ+4aVOL/EZUlrOIHFoopo6Ata/T5mivfilqh1z1RsmpjFe9qdf2KOWFSm gLSbs69O+mbzVARbMK8zUniUbv15dAY70aB+9kkepyGf9Xs1IfkcatRMYhYLBLYMoO7qMg o2iX5UnsBlFq96/Y96PITdvdM/iSUWU= Date: Tue, 11 Aug 2026 21:36:57 +0200 Subject: [PATCH v3 4/9] dt-bindings: power: apple,pmgr-pwrstate: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-4-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The device power state management of the PMGR blocks on Apple's t8132 SoC (M4) is compatible with t8103. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index e269f433524e..b24ea8e54e11 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -48,6 +48,7 @@ properties: - apple,t6030-pmgr-pwrstate - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate + - apple,t8132-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEE814766B5; Tue, 11 Aug 2026 19:37:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477036; cv=none; b=b6k5u9ZwKQes0tw6msE26Qq3AF4qjvtcWlgwyyTj2jV+fpbvP6QSxcEKr9l6Dk/GWqEkYCaOiRhALmGXk/xLJIoRl0jKhmjxIKJOpC7Wmi70nM7Q05DBzkO1+iAkysi38Ukc2umwusNlKXYVO2BGLZWkzfdOqfFK256Dk+zep+4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477036; c=relaxed/simple; bh=uCrZoq9hMO3BwCtPxYeBInYsLX6Ph0hM5oymw0p7uBA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KRoxUuu9PCkRAVgHRUm29RPd59rsyzM270smz1hjAotN2wra6479AqmOjdxfn0/ZEOvR7QfNQXVxQjSntttJkCUK43bOMplhqWoezLBQZ6VZmWSw7esMXwP1xhBJO8Ue45dAIuridJseCpkD1uY4PqYE5HD/d7+U1OaAkZy29e8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=dR/yBnpI; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="dR/yBnpI" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UF4U3j1h1VfITySsF+7uOQMAlNKLIP6jXfmWmWtYH5U=; b=dR/yBnpIqwWCvcwKiByw8Hybb6/LoW4y+RxsOLkr3IDeIOVBT5t7yWwYU+WRHOe3lgFYTo DXfWlXzTXPjWqGSYW6N3djdVhTUa2l5swQVtQZAKZAYM6GRlITwPhBnrMbyJn6Q3o45PZi jFK/yxh/wl/00VQUx+QS0viyxYoB0e8= Date: Tue, 11 Aug 2026 21:36:58 +0200 Subject: [PATCH v3 5/9] dt-bindings: pinctrl: apple,pinctrl: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-5-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The pin controller on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-pinctrl" as SoC specific compatible under "apple,t8103-pinctrl". Reviewed-by: Linus Walleij Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- This should be pulled via the pinctrl subtree, since it depends on "dt-bindings: pinctrl: apple,pinctrl: Add t6030 and t6031 compatibles"[1] which has been applied in the pinctrl tree. Thanks! Link: https://lore.kernel.org/all/20260709-apple-t603x-initial-devices-v1-7= -55b305833123@jannau.net/ [1] --- Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b= /Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index f08d2c4f5784..bc6d41b63b5d 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -23,6 +23,7 @@ properties: - apple,t6030-pinctrl - apple,t6031-pinctrl - apple,t8122-pinctrl + - apple,t8132-pinctrl - const: apple,t8103-pinctrl - items: # Do not add additional SoC to this list. --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB6664772AE; Tue, 11 Aug 2026 19:37:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477036; cv=none; b=kwdxqAR4K0MYFOUUPekLBTMFT45goJsR9hq0s94WN+4r3kwBLxoSpe0uqtom0UH3DDHAXl93HRx3VaCtogZK6XSEbLva413jBjyCq9TU2+JJvHy7CmQHhA1+5GbQzB5QHwquAW8ahRMdlBBv88uZkxBUtM3noffnbOw/HpzM5xE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477036; c=relaxed/simple; bh=wdRYR6S4mzZmZZ8fyC5rU/1eyECwkgN/IwONrmDjvsY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PhPrb3qL3juPmA2BNCl7DQkSAft7P4BM66Jd5uOxZ/cbL+aLVDSnzh0jCecTWwdZfeMnm15gLZEk8oJLXB9s0Ewji2DjcuMW1fUqKfQ5SyGJ605HR2ZAN/qbWXBlF8iqgFI0xV+0ts/7AK1NLaXx5uqXBd0Iw8cvdm6mH75LXt4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=b8ssyBAD; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="b8ssyBAD" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477029; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Df0qVoIieqjjEhBzdqcHOwOToHca3H1+qfzqQwJ0z38=; b=b8ssyBADm4qvUgS7OmXEcd6X22iItiyjN1pOuO1r5NM811kVzDtl/RrUF57jdc78UWMN2Y 3KCpKJYyuSdYoGGQeLT8PSOIRV72K4KE0YcZi+L/oMZwpMYIq/55Lu6TvhCA7jjarIpbsj o98ep4mCbmUJRIZvT//uwRysyHD1muA= Date: Tue, 11 Aug 2026 21:36:59 +0200 Subject: [PATCH v3 6/9] dt-bindings: i2c: apple,i2c: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-6-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The i2c block on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-i2c" as SoC specific compatible under "apple,t8103-i2c". Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documen= tation/devicetree/bindings/i2c/apple,i2c.yaml index d39f5e3f1df4..641f24b0ef4b 100644 --- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml @@ -27,6 +27,7 @@ properties: - apple,t6030-i2c - apple,t6031-i2c - apple,t8122-i2c + - apple,t8132-i2c - const: apple,t8103-i2c - items: - enum: --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B74E476CF1; Tue, 11 Aug 2026 19:37:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477038; cv=none; b=fPdMerl4k2xD8ZHxXSyktlYbStqbp0Hz//WREDZoYeFP3xldSzi0FxzIzCfhGA/PaYPodYstn00W68+8trDNnaZUMJcNHH+MBjq7e6+vAzVmAYrbKGpZpLHJFY+20MjHV4sLh8SCv1pti/mJHAqoyrRlSwQEeUndrgiaGSLltGA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477038; c=relaxed/simple; bh=JhpKQ19kWyYgLTa20tUdASpqThoMRjXuSWeNvFaBBos=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=S/vC6X3ivVwf+KKGwUlzUwdPjxOrlJczGLnjTGqUP1ecd6pM881XqYvROzTHEO0uM488bvkBPlwSbIzX4YqhvRmeFmzNYoCoUxmpflPxYcg8J8r9nR6LDAnRqUCRdVgIY5qsW0GnUXpLBqUTp9pJxk9q9Jkzy7iIDWnM7gQKCtI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=vbU1l8KR; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="vbU1l8KR" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477030; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6exrCVVV5bAtISYB5zaIXRdtD23Gj0eYc8uQWomTODw=; b=vbU1l8KRQ0L00K3g9fLL1REnxGXkyIs5A0TFdmSLOm6RQ6+oj3fZqiQAsa29J03FmfJIv7 UzAQvtX5lJC2lu2Mwv+B9TFLo9x6EqW9QgaMlCHGsNRKuwX6AmDL4093l8gpCkmzVw876q BrgZ3VaEJ3z+EJCupJ/WP9q1KfUvH+o= Date: Tue, 11 Aug 2026 21:37:00 +0200 Subject: [PATCH v3 7/9] dt-bindings: pwm: apple,s5l-fpwm: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-7-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The PWM controller on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-fpwm" as SoC specific compatible under "apple,s5l-fpwm". Acked-by: Uwe Kleine-K=C3=B6nig Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Do= cumentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml index dd95037ea5ee..ae8baa5f7bcd 100644 --- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml @@ -19,6 +19,7 @@ properties: - apple,t8103-fpwm - apple,t8112-fpwm - apple,t8122-fpwm + - apple,t8132-fpwm - apple,t6000-fpwm - apple,t6020-fpwm - apple,t6030-fpwm --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B93D47885C; Tue, 11 Aug 2026 19:37:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477038; cv=none; b=QkAX/YXpIZPM796PbK9C7nxE0z+79HtTSsKgOoczDXLx9lriWIttXiTmIZLRFdoDH7VNiCnn3pvfWJyS2hHNWpFLnoeT0nnhkIiV7dpG2LvgyfUswZ+q2p8ZtFC8XNaYXc0bHKxXBPPaKoiuztKa9kTLtD9jymtIzS04ZxbncDQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786477038; c=relaxed/simple; bh=Ouo5h3JyIMugimYHRSJnAM3nW3ibP5N13SZiBVHC8w8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=p2klP6IjhUQo1IFr9WZjgxc5kRbKmLbfkOnbytKoKYI9MYczwAn/OXFI3FfDryZvZ3fftScOb1IkXl4BYXtOCWN7N8jemku06W8JQG9Bgrv8eJfZV9WpraVx9fjhErv3LeiZcm1pHU6yVzRzCHX6X1RRxXbvpnxtd9Pdccj59SA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=ecj9ROfK; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="ecj9ROfK" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477031; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XKTfGsjHkFFOVCUzNK0jmRHph7SLAQ5ADYfLPSTB23Q=; b=ecj9ROfK+Ctm1O9qUN9c28I3MTDSiT95TJjniGfhw1E4T3edF4OXfxkldFTamFxKps9Fwy +qTSbDmLMRd7TzDtDooOgD+qgjY/BLZZdJ5Lg4AHK9vDCPlrv0pBmHVuCDZU0QoFzMNaqD kye8Fdy7aM3oPb2B3e0ONW8kzBJw8LA= Date: Tue, 11 Aug 2026 21:37:01 +0200 Subject: [PATCH v3 8/9] dt-bindings: arm: apple: Add M4 based devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-8-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The Apple devices with the t8132 SoC (M4) are very similar to their M3 predecessors. In addition to the MacBook Pro and the various MacBook Air and iMac variants, a Mac mini is offered again with the M4. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index fb277c96f341..5d87a4fef193 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -103,6 +103,15 @@ description: | - MacBook Pro (14-inch, M3, 2023) - iMac (24-inch, M3, 2023) =20 + Devices based on the "M4" SoC: + + - MacBook Pro (14-inch, M4, 2024) + - iMac (24-inch, 2x USB-C, M4, 2024) + - iMac (24-inch, 4x USB-C, M4, 2024) + - MacBook Air (13-inch, M4, 2025) + - MacBook Air (15-inch, M4, 2025) + - Mac mini (M4, 2024) + Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: =20 - MacBook Pro (14-inch, M1 Pro, 2021) @@ -323,6 +332,18 @@ properties: - const: apple,t8122 - const: apple,arm-platform =20 + - description: Apple M4 SoC based platforms + items: + - enum: + - apple,j604 # MacBook Pro (14-inch, M4, 2024) + - apple,j623 # iMac (24-inch, 2x USB-C, M4, 2024) + - apple,j624 # iMac (24-inch, 4x USB-C, M4, 2024) + - apple,j713 # MacBook Air (13-inch, M4, 2025) + - apple,j715 # MacBook Air (15-inch, M4, 2025) + - apple,j773g # Mac mini (M4, 2024) + - const: apple,t8132 + - const: apple,arm-platform + - description: Apple M1 Pro SoC based platforms items: - enum: --=20 2.55.0 From nobody Tue Sep 29 06:08:42 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5798C47986C; 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arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="pLmuRwF5" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1786477031; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zCTQpkg+HBqRlbTiz0/bnBDrPq7Af2D0qfzLApNfEbo=; b=pLmuRwF5jxnKks4AyfuyigQhB57Q6Y61fQP2n7Z4ZROmVSzjy0o3Xb02h2sIMKlZpj4NMY codcuInZst2QX4JFAgAO7Fnc77deXvaP35TtY8BOPLRQoaKBpneV/FrkfalHox2bej2eFv XtfHp6VXoMWXnPq1jlW3b61f91nhywc= Date: Tue, 11 Aug 2026 21:37:02 +0200 Subject: [PATCH v3 9/9] arm64: dts: apple: Add minimal t8132 (M4) device trees Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260811-apple-m4-initial-devicetrees-v3-9-6bf32d45ad0b@cyberchaos.dev> References: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> In-Reply-To: <20260811-apple-m4-initial-devicetrees-v3-0-6bf32d45ad0b@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian Added device trees for the following devices: - apple,j604 - MacBook Pro (14-inch, M4, 2024) - apple,j623 - iMac (24-inch, 2x USB-C, M4, 2024) - apple,j624 - iMac (24-inch, 4x USB-C, M4, 2024) - apple,j713 - MacBook Air (13-inch, M4, 2025) - apple,j715 - MacBook Air (15-inch, M4, 2025) - apple,j773g - Mac mini (M4, 2024) The device trees have a minimal set of devices limited to CPU cores, interrupt controller, power states, watchdog, serial, pin controller, i2c and framebuffer. The device trees for the notebooks add a PWM controller for the keyboard LED illumination. Using the macOS 26.6 iBoot/firmware, the Mac mini reliably boots on a single core using the stock kernel. Booting with smp requires avoiding the wfi and wfit instructions in the idle loop and `delay()` respectively, since those instructions cause a loss of architectural state on the secondary cores, and even then boot is unreliable. Signed-off-by: Yureka Lilian --- arch/arm64/boot/dts/apple/Makefile | 6 + arch/arm64/boot/dts/apple/t8132-j604.dts | 35 + arch/arm64/boot/dts/apple/t8132-j623.dts | 18 + arch/arm64/boot/dts/apple/t8132-j624.dts | 18 + arch/arm64/boot/dts/apple/t8132-j713.dts | 35 + arch/arm64/boot/dts/apple/t8132-j715.dts | 35 + arch/arm64/boot/dts/apple/t8132-j773g.dts | 25 + arch/arm64/boot/dts/apple/t8132-jxxx.dtsi | 48 ++ arch/arm64/boot/dts/apple/t8132-pmgr.dtsi | 1130 +++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8132.dtsi | 467 ++++++++++++ 10 files changed, 1817 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 9fea43f760ec..62999574a36b 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -103,3 +103,9 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j434.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j504.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j613.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j615.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j604.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j623.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j624.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j713.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j715.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j773g.dtb diff --git a/arch/arm64/boot/dts/apple/t8132-j604.dts b/arch/arm64/boot/dts= /apple/t8132-j604.dts new file mode 100644 index 000000000000..c4be915cb33a --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j604.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Pro (14-inch, M4, 2024) + * + * target-type: J604 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j604", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M4, 2024)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j623.dts b/arch/arm64/boot/dts= /apple/t8132-j623.dts new file mode 100644 index 000000000000..508e26056022 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j623.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 2x USB-C, M4, 2024) + * + * target-type: J623 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j623", "apple,t8132", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 2x USB-C, M4, 2024)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j624.dts b/arch/arm64/boot/dts= /apple/t8132-j624.dts new file mode 100644 index 000000000000..84bdd8e343eb --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j624.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 4x USB-C, M4, 2024) + * + * target-type: J624 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j624", "apple,t8132", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 4x USB-C, M4, 2024)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j713.dts b/arch/arm64/boot/dts= /apple/t8132-j713.dts new file mode 100644 index 000000000000..e1fc5d47f487 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j713.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (13-inch, M4, 2025) + * + * target-type: J713 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j713", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Air (13-inch, M4, 2025)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j715.dts b/arch/arm64/boot/dts= /apple/t8132-j715.dts new file mode 100644 index 000000000000..2672914ea76c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j715.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (15-inch, M4, 2025) + * + * target-type: J715 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j715", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Air (15-inch, M4, 2025)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j773g.dts b/arch/arm64/boot/dt= s/apple/t8132-j773g.dts new file mode 100644 index 000000000000..0583cb9d19f6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j773g.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple Mac mini (M4, 2024) + * + * target-type: J773g + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j773g", "apple,t8132", "apple,arm-platform"; + model =3D "Apple Mac mini (M4, 2024)"; +}; + +/* + * Keep the power-domains used for the HDMI port on. + */ +&framebuffer0 { + power-domains =3D <&ps_dispext0_fe>, <&ps_dptx_phy>; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8132-jxxx.dtsi new file mode 100644 index 000000000000..9882ea3f85e6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple M4 Mac mini, MacBook Air/Pro, iMac 24" (M4, 2024/2025) + * + * This file contains parts common to all Apple M4 devices using the t8132. + * + * target-type: J604, J623, J624, J713, J715, J773g + * + * Copyright The Asahi Linux Contributors + */ + +/ { + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + power-domains =3D <&ps_disp_fe>, <&ps_dptx_phy>; + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + /* To be filled by loader */ + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8132-pmgr.dtsi new file mode 100644 index 000000000000..6fbf09e8f981 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-pmgr.dtsi @@ -0,0 +1,1130 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8132 "M4" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_msg: power-controller@108 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msg"; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + apple,always-on; /* Core device */ + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_pmc: power-controller@138 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmc"; + }; + + ps_pms_fpwm0: power-controller@140 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm0"; + }; + + ps_pms_fpwm1: power-controller@148 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm1"; + }; + + ps_pms_fpwm2: power-controller@150 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm2"; + }; + + ps_pms_fpwm3: power-controller@158 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm3"; + }; + + ps_pms_fpwm4: power-controller@160 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm4"; + }; + + ps_pms_c1ppt: power-controller@168 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_c1ppt"; + }; + + ps_soc_rc: power-controller@170 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_rc"; + }; + + ps_soc_dpe: power-controller@178 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_dpe"; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@180 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmgr_soc_ocla"; + }; + + ps_ap_tmm: power-controller@1b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ap_tmm"; + }; + + ps_dispext0_sys: power-controller@1d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_sys"; + }; + + ps_dispext0_fe: power-controller@1e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_fe"; + power-domains =3D <&ps_dispext0_sys>; + }; + + ps_dispext0_cpu: power-controller@1e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_cpu"; + power-domains =3D <&ps_dispext0_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_scodec: power-controller@228 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec"; + }; + + ps_scodec_streaming: power-controller@230 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec_streaming"; + power-domains =3D <&ps_scodec>; + }; + + ps_disp_sys: power-controller@240 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_sys"; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_disp_fe: power-controller@248 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_fe"; + power-domains =3D <&ps_disp_sys>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_gfx: power-controller@250 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + }; + + ps_sio_cpu: power-controller@268 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_cpu"; + }; + + ps_fpwm0: power-controller@270 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm0"; + }; + + ps_fpwm1: power-controller@278 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm1"; + }; + + ps_fpwm2: power-controller@280 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm2"; + }; + + ps_i2c0: power-controller@288 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + }; + + ps_i2c1: power-controller@290 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + }; + + ps_i2c2: power-controller@298 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + }; + + ps_i2c3: power-controller@2a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + }; + + ps_i2c4: power-controller@2a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c4"; + }; + + ps_i2c5: power-controller@2b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c5"; + }; + + ps_i2c6: power-controller@2b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c6"; + }; + + ps_i2c7: power-controller@2c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c7"; + }; + + ps_i2c8: power-controller@2c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c8"; + }; + + ps_spi_p: power-controller@2d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi_p"; + apple,always-on; + }; + + ps_uart_p: power-controller@2d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_p"; + apple,always-on; + }; + + ps_dpa_p: power-controller@2e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa_p"; + apple,always-on; + }; + + ps_aes: power-controller@2e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes"; + }; + + ps_spi0: power-controller@2f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_spi_p>; + }; + + ps_afiaft: power-controller@300 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "afiaft"; + }; + + ps_venc_sys: power-controller@308 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_sys"; + }; + + ps_spi1: power-controller@370 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_spi_p>; + }; + + ps_atc0_common: power-controller@378 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_common"; + }; + + ps_spi2: power-controller@380 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi3: power-controller@388 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi4: power-controller@390 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi4"; + power-domains =3D <&ps_spi_p>; + }; + + ps_trace_fab: power-controller@398 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "trace_fab"; + }; + + ps_atc0_pcie: power-controller@3a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_pcie"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio: power-controller@3a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio_pcie: power-controller@3b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_pcie"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_spi5: power-controller@3b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi5"; + power-domains =3D <&ps_spi_p>; + }; + + ps_qspi: power-controller@3c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "qspi"; + power-domains =3D <&ps_spi_p>; + }; + + ps_dptx_phy: power-controller@3c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dptx_phy"; + }; + + ps_uart_n: power-controller@3d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_n"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart0: power-controller@3d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart1: power-controller@3e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart2: power-controller@3e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart3: power-controller@3f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart4: power-controller@3f8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart5: power-controller@400 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart6: power-controller@408 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x408 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart6"; + power-domains =3D <&ps_uart_p>; + }; + + ps_dpa0: power-controller@410 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x410 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa0"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_dpa1: power-controller@418 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x418 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa1"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc0_cio_usb: power-controller@420 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x420 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_usb"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc1_common: power-controller@428 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x428 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_common"; + }; + + ps_atc1_pcie: power-controller@430 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x430 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_pcie"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio: power-controller@438 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x438 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio_pcie: power-controller@440 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x440 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_pcie"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc1_cio_usb: power-controller@448 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x448 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_usb"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc2_common: power-controller@450 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x450 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_common"; + }; + + ps_atc2_pcie: power-controller@458 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x458 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_pcie"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc2_cio: power-controller@460 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x460 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc2_cio_pcie: power-controller@468 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x468 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_pcie"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_dpa2: power-controller@470 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x470 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa2"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc2_cio_usb: power-controller@478 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x478 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_usb"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_atc3_common: power-controller@480 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x480 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_common"; + }; + + ps_pmp: power-controller@488 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x488 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@490 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x490 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_sram"; + apple,always-on; + }; + + ps_atc3_pcie: power-controller@498 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x498 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_pcie"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_atc3_cio: power-controller@4a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_dpa3: power-controller@4a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa3"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc3_cio_pcie: power-controller@4b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_pcie"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_atc3_cio_usb: power-controller@4b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_usb"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_dpa4: power-controller@4c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa4"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_apcie_gp: power-controller@4d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_gp"; + }; + + ps_apcie_sys_gp: power-controller@4d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_gp"; + power-domains =3D <&ps_apcie_gp>; + }; + + ps_dispext1_sys: power-controller@4e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_sys"; + }; + + ps_dispext1_fe: power-controller@4e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_fe"; + power-domains =3D <&ps_dispext1_sys>; + }; + + ps_dispext1_cpu: power-controller@4f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_cpu"; + power-domains =3D <&ps_dispext1_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_ans: power-controller@538 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x538 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + apple,always-on; /* Device reboots after 3-5 mintues if disabled */ + }; + + ps_apcie_st: power-controller@540 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x540 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_st"; + power-domains =3D <&ps_ans>; + }; + + ps_apcie_sys_st: power-controller@548 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x548 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_st"; + power-domains =3D <&ps_ans>, <&ps_apcie_st>; + }; + + ps_apcie_phy_sw: power-controller@550 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x550 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_phy_sw"; + power-domains =3D <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>; + }; + + ps_msr: power-controller@560 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x560 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + }; + + ps_msr_ase_core: power-controller@568 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x568 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr_ase_core"; + power-domains =3D <&ps_msr>; + }; + + ps_ane_sys: power-controller@570 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x570 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_sys"; + }; + + ps_jpg: power-controller@578 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x578 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + }; + + ps_avd_sys: power-controller@580 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x580 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "avd_sys"; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; + }; + + ps_venc_dma: power-controller@8000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_dma"; + power-domains =3D <&ps_venc_sys>; + }; + + ps_venc_pipe4: power-controller@8008 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe4"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_pipe5: power-controller@8010 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe5"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me0: power-controller@8018 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me0"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me1: power-controller@8020 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me1"; + power-domains =3D <&ps_venc_me0>; + }; + + ps_ane_mpm: power-controller@c000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_mpm"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_cpu: power-controller@c008 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_cpu"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_td: power-controller@c010 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_td"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_base: power-controller@c018 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_base"; + power-domains =3D <&ps_ane_td>; + }; + + ps_disp_cpu: power-controller@10000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x10000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_cpu"; + power-domains =3D <&ps_disp_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_gated"; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi0"; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi1"; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@68 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a0"; + apple,always-on; + }; + + ps_nub_spmi_a1: power-controller@70 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a1"; + apple,always-on; + }; + + ps_nub_spi0: power-controller@80 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spi0"; + apple,always-on; + }; + + ps_nub_ocla: power-controller@88 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_ocla"; + apple,always-on; + }; + + ps_nub_gpio: power-controller@90 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_gpio"; + apple,always-on; + }; + + ps_nub_sram: power-controller@a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_sram"; + apple,always-on; + }; + + ps_debug_switch: power-controller@a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_switch"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb_aon"; + }; + + ps_atc1_usb_aon: power-controller@b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb_aon"; + }; + + ps_atc0_usb: power-controller@c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb"; + power-domains =3D <&ps_atc0_common>, <&ps_atc0_usb_aon>; + }; + + ps_atc1_usb: power-controller@c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb"; + power-domains =3D <&ps_atc1_common>, <&ps_atc1_usb_aon>; + }; + + ps_atc2_usb_aon: power-controller@d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb_aon"; + }; + + ps_atc3_usb_aon: power-controller@d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb_aon"; + }; + + ps_atc2_usb: power-controller@e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb"; + power-domains =3D <&ps_atc2_common>, <&ps_atc2_usb_aon>; + }; + + ps_atc3_usb: power-controller@e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb"; + power-domains =3D <&ps_atc3_common>, <&ps_atc3_usb_aon>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/app= le/t8132.dtsi new file mode 100644 index 000000000000..afec92a06015 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132.dtsi @@ -0,0 +1,467 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8132 "M4" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include + +/ { + compatible =3D "apple,t8132", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + core1 { + cpu =3D <&cpu_e1>; + }; + core2 { + cpu =3D <&cpu_e2>; + }; + core3 { + cpu =3D <&cpu_e3>; + }; + core4 { + cpu =3D <&cpu_e4>; + }; + core5 { + cpu =3D <&cpu_e5>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + core1 { + cpu =3D <&cpu_p1>; + }; + core2 { + cpu =3D <&cpu_p2>; + }; + core3 { + cpu =3D <&cpu_p3>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e1: cpu@1 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e2: cpu@2 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e3: cpu@3 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e4: cpu@4 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x4>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e5: cpu@5 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x5>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p0: cpu@10100 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p1: cpu@10101 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p2: cpu@10102 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p3: cpu@10103 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + + pmgr: power-management@380700000 { + compatible =3D "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x80700000 0 0x14000>; + /* child nodes are added in t8132-pmgr.dtsi */ + }; + + aic: interrupt-controller@381000000 { + compatible =3D "apple,t8132-aic3", "apple,t8122-aic3"; + #interrupt-cells =3D <3>; + interrupt-controller; + reg =3D <0x3 0x81000000 0x0 0x1cc000>, + <0x3 0x81040000 0x0 0x4000>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + + affinities { + e-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3 &cpu_e4 &cpu_e5>; + }; + + p-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>; + }; + }; + }; + + pinctrl_nub: pinctrl@3881f0000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x881f0000 0x0 0x4000>; + power-domains =3D <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_nub 0 0 32>; + apple,npins =3D <32>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pmgr_mini: power-management@388280000 { + compatible =3D "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x88280000 0 0x4000>; + /* child nodes are added in t8132-pmgr.dtsi */ + }; + + wdt: watchdog@3882b0000 { + compatible =3D "apple,t8132-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x882b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_smc: pinctrl@38c820000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x8c820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 18>; + apple,npins =3D <18>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@390824000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x90824000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 57>; + apple,npins =3D <57>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_ap: pinctrl@39a000000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x9a000000 0x0 0x100000>; + power-domains =3D <&ps_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 224>; + apple,npins =3D <224>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + i2c0_pins: i2c0-pins { + pinmux =3D , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + }; + + i2c0: i2c@3ad010000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad010000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c0>; + + status =3D "disabled"; + }; + + i2c1: i2c@3ad014000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad014000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c1>; + + status =3D "disabled"; + }; + + i2c2: i2c@3ad018000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad018000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c2>; + + status =3D "disabled"; + }; + + i2c3: i2c@3ad01c000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad01c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c3>; + + status =3D "disabled"; + }; + + i2c4: i2c@3ad020000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad020000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c4>; + + status =3D "disabled"; + }; + + fpwm1: pwm@3ad044000 { + compatible =3D "apple,t8132-fpwm", "apple,s5l-fpwm"; + reg =3D <0x3 0xad044000 0x0 0x4000>; + power-domains =3D <&ps_fpwm1>; + clocks =3D <&clkref>; + #pwm-cells =3D <2>; + + status =3D "disabled"; + }; + + serial0: serial@3ad200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0xad200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + + status =3D "disabled"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; +}; + +#include "t8132-pmgr.dtsi" --=20 2.55.0