From nobody Tue Sep 29 09:09:21 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43EE939CCF3; Mon, 10 Aug 2026 07:14:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346091; cv=none; b=fIjieRMqmOquP4m7jJcWqTO+SmAn1jlTGudFwEbEeurVq4hIujgV9s7TgnOnepsmQ7LzED7+eKX/bw8iZEy1MfcfQeVz3TeKcS0X1YD+XFynWo0E+PJHaIpfPpiUOPxqntxxAmQB0qi7niiYxRBs7KcBW6mf5PIugFvnMBzTieA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346091; c=relaxed/simple; bh=XW6AnJUPIJ/6p17ZYvKjmVPpSue826KCAQU2igzRdEQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jThY/mUy6P7Xk4E/ce0ofzCt7kF+qqT2OXLNW54FB1eOHR4dHAt6BYUzZuM2PMMa2NiR4/kQUu8MKAU9FB/GJvqKwQK9dCWYQDbFvDGpUNpWMex6+ILl2E3Izyc62tqDAqp4UVVlyDT/QXs1ZO6rMnENnbJBK2B7X4sZ3FvlMOc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=eQ7s87up; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="eQ7s87up" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1786346087; x=1786605287; bh=HryS5wCyVQBONoxwWZjTDlJMAM0CO2Fw/WwlMf9O2pA=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=eQ7s87upq72BO9ABZzY8+s9zWPsFO0L9jEjn8xHOekwqizh4+FDbRupfUnYSQeFST GTR4d+yn34+t2n9mFEPZofRfzBnw9S1dP/iXWbtNWzjR0vfA8xae/O831HKZqtF1A/ Csoz9CpOcYbT4ZjqtLw8R+T1ACqWmBqPoEtoJQl5NjF2VrmylZ5f1ZwplsF//Jetec 5W2H8x6T4TGAiWjLzBa7QAriaBx6rYeuY1Oz2+fRMIHeewTUObT9b792vKRUCF7W+q hmWM2E1YI4lNn/8fWHo8pYdMQFBunClhKuDQHunMD7zv0hZwvw90C54wFcc1XL1wuR nxsiX4NyxL8Lw== X-Pm-Submission-Id: 4hJQxK14jhz1DDLf From: Esben Haabendal Date: Mon, 10 Aug 2026 09:14:37 +0200 Subject: [PATCH v3 1/5] drm/bridge: nwl-dsi: Cleanup endpoint mux control selection Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260810-nwl-dsi-fixes-v3-1-256da9d672e1@geanix.com> References: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> In-Reply-To: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , =?utf-8?q?Guido_G=C3=BCnther?= , Fabio Estevam , Robert Chiras , Sam Ravnborg Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786346082; l=1958; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=XW6AnJUPIJ/6p17ZYvKjmVPpSue826KCAQU2igzRdEQ=; b=3611Z1XItbb5fq1kQSZa2gaINsGs3P0Q01dLmrM6v+hjI+QGBnul+gB5W2mTPu0i7h9nwRh82 HeiDpiWUDm6AFt4PjHYMV25g/W1fVjkazSJe0cEUsWDeutXeSa4jL1l X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Using the endpoint define values makes it more clear that the argument to mux_control_try_select() must be valid state integers, and not something that looks like a boolean. The endpoint value is kept, as it will be used in a following patch that changes behavior slightly based on which endpoint is selected. Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal Reviewed-by: Luca Ceresoli --- drivers/gpu/drm/bridge/nwl-dsi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 3c9ae93c4f67..39be58cf5bd2 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -110,6 +110,8 @@ struct nwl_dsi { int error; =20 struct nwl_dsi_transfer *xfer; + + unsigned int endpoint; }; =20 static const struct regmap_config nwl_dsi_regmap_config =3D { @@ -1088,13 +1090,12 @@ static int nwl_dsi_parse_dt(struct nwl_dsi *dsi) static int nwl_dsi_select_input(struct nwl_dsi *dsi) { struct device_node *remote; - u32 use_dcss =3D 1; int ret; =20 remote =3D of_graph_get_remote_node(dsi->dev->of_node, 0, NWL_DSI_ENDPOINT_LCDIF); if (remote) { - use_dcss =3D 0; + dsi->endpoint =3D NWL_DSI_ENDPOINT_LCDIF; } else { remote =3D of_graph_get_remote_node(dsi->dev->of_node, 0, NWL_DSI_ENDPOINT_DCSS); @@ -1103,11 +1104,12 @@ static int nwl_dsi_select_input(struct nwl_dsi *dsi) "No valid input endpoint found\n"); return -EINVAL; } + dsi->endpoint =3D NWL_DSI_ENDPOINT_DCSS; } =20 DRM_DEV_INFO(dsi->dev, "Using %s as input source\n", - (use_dcss) ? "DCSS" : "LCDIF"); - ret =3D mux_control_try_select(dsi->mux, use_dcss); + (dsi->endpoint =3D=3D NWL_DSI_ENDPOINT_DCSS) ? "DCSS" : "LCDIF"); + ret =3D mux_control_try_select(dsi->mux, dsi->endpoint); if (ret < 0) DRM_DEV_ERROR(dsi->dev, "Failed to select input: %d\n", ret); =20 --=20 2.55.0 From nobody Tue Sep 29 09:09:21 2026 Received: from mail-106111.protonmail.ch (mail-106111.protonmail.ch [79.135.106.111]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 307DB39DBD4 for ; Mon, 10 Aug 2026 07:14:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.111 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346094; cv=none; b=llec8QT9bRJ+H0ubGycJexwzT3j3Qq3RVNir9G6r/cokPkkT3vjKj1pjFeskOfoqVZ5e1UwmdytGNgnMo7oVyJUWCQ3895WLf1Tc8keAQmG4Ki38L63XxgUKIwAh79Kcm/jb+XfWNWxWMFZqNKAXeIxHfsSEPvf+TUe9coFwUb4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346094; c=relaxed/simple; bh=ybpHHip3mJEGeNkHM6B8y6xjeCgFvYd0piX0R4XK18g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=l92EhjO7Z9EKofhRKAgGycF5HJKMiYdbVnWMcccBp38cmkPXh5G5Mpwo8ulaHoz9imyVEwx0NRew/BpqnDiNAfXecZ/vrnSA5Ws3zBEpecMwB9hP2Hg+LP2R0JHpwtN/7WT+zoYLQp6JS0bzyZh3n4I/+ptKH6C6ccaKhWgCOgY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=OmeTkIQd; arc=none smtp.client-ip=79.135.106.111 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="OmeTkIQd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1786346089; x=1786605289; bh=JQQ9TMEugEucDHVTnXkrZEPpBuBBfgLOHL8udwc85/M=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=OmeTkIQdVjIEFLfJawa7Gx4rs5CPYVQLx+0lKlR0rPar4ySPvE15GSXAu2X3UTGXf dlQCngkmxva+9utziFSaQIYCh2u6AVGxQ60gG4NIQFZG0PlveKWilA/W1QrKpQgFmF HBuZ9he7gyT5p4Oo7+7xbxOChPZlWmPo7MagDCWtvPOcd5Oc1oQIZqATf2W9rz7m4r 07a8MmK6g84QPfoBzZ0g23rJ9lwKFjFFkiwsaheRXOSPZxjdJHEimzQiR7L40MhmEC Wf8BNiRHap5BNvmc65v0NziGWwaGqR6p/VToEwaFs2Q/JqTV0xuqa0rbg+E5TJAEvt yWgXMWJKDKUzg== X-Pm-Submission-Id: 4hJQxM039nz1DDs5 From: Esben Haabendal Date: Mon, 10 Aug 2026 09:14:38 +0200 Subject: [PATCH v3 2/5] drm/bridge: nwl-dsi: Limit LCDIF specific sync override Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260810-nwl-dsi-fixes-v3-2-256da9d672e1@geanix.com> References: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> In-Reply-To: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , =?utf-8?q?Guido_G=C3=BCnther?= , Fabio Estevam , Robert Chiras , Sam Ravnborg Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786346082; l=1455; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=ybpHHip3mJEGeNkHM6B8y6xjeCgFvYd0piX0R4XK18g=; b=WHXOY7dEpyBJTO8+q1izP0YvHBMjly2JQsYu8ZWJg7Tmt/GQMzuiUE5SbAh5fBd5DldvInrEQ ZEvY0nmm2G1DeFeOgAO5Aa+ouTfhDA1FyFw9wKoPhb9l1N3hb29xmLg X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When using DCSS with NWL, overriding the mode flags to enforce active high sync is preventing the use of active low with downstream bridges, such as ti-sn65dsi83, which will not see such mode flags set by the panel. Fixes: 44cfc6233447 ("drm/bridge: Add NWL MIPI DSI host controller support") Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal --- drivers/gpu/drm/bridge/nwl-dsi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 39be58cf5bd2..374884e76f25 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -823,10 +823,13 @@ static int nwl_dsi_bridge_atomic_check(struct drm_bri= dge *bridge, struct drm_connector_state *conn_state) { struct drm_display_mode *adjusted_mode =3D &crtc_state->adjusted_mode; + struct nwl_dsi *dsi =3D bridge_to_dsi(bridge); =20 /* At least LCDIF + NWL needs active high sync */ - adjusted_mode->flags |=3D (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); - adjusted_mode->flags &=3D ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + if (dsi->endpoint =3D=3D NWL_DSI_ENDPOINT_LCDIF) { + adjusted_mode->flags |=3D (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + adjusted_mode->flags &=3D ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + } =20 /* * Do a full modeset if crtc_state->active is changed to be true. --=20 2.55.0 From nobody Tue Sep 29 09:09:21 2026 Received: from mail-106113.protonmail.ch (mail-106113.protonmail.ch [79.135.106.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8730D39EF23 for ; Mon, 10 Aug 2026 07:14:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346094; cv=none; b=oS2HlEqTueLaFn6eAo7i9y+HZew32u9yUzUNGgTw90E52NK4wNoHWuiFvKq1qB44fx5wn8QhF3BQ+sugDLdHYisXoyrZOU9bbLRktklETbBp9J/BL9TEAXnE1CdwI5tYlakigOR3Ny/aTtxTtpEXUqzud3IHOkCe+sYinPH4jTg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346094; c=relaxed/simple; bh=twyIK5sh172Eix+t46iPONh+JjU7RoQvpo/2fCt5A9c=; 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h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=35bzjc+7VK7LnvUmPS8jxqADDU0UBmk+1gZJyCZWcm+xyqsDcOo5F7vyjDQ6n8qaO hTvLHKmENIliOWyFDjfivIA2F+gcSm8F6IaIVOd6c5Gnvvma6nawuNHPXaQEhLffQg SfgQeRYGXKICGVGTMnDb2x9vBZdawVpgLkn7TxY4Dd+fe55xG1FeAdfdwuYjzWiSPg FRbMW/SGX0BIEfkfEnsm/viac3DxjDMX2hDZWigfouBG6X8MBalt4aK9JRx0k2T6ra QsdqGepuWQ4ezGMFUBAebKfzWo7AG5iuR8aiKcD2KWcvebkUHFjwj2R+TTEd0zWUJ3 a+CcyVzF6o0RA== X-Pm-Submission-Id: 4hJQxP3KWRz1DFFM From: Esben Haabendal Date: Mon, 10 Aug 2026 09:14:39 +0200 Subject: [PATCH v3 3/5] drm/bridge: nwl-dsi: Correct auto-insert EOTP behavior Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260810-nwl-dsi-fixes-v3-3-256da9d672e1@geanix.com> References: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> In-Reply-To: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , =?utf-8?q?Guido_G=C3=BCnther?= , Fabio Estevam , Robert Chiras , Sam Ravnborg Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Laurentiu Palcu X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786346082; l=1534; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=bRbtwvzgnEM2Mg7gerRzSAOcsU1WZ5/SY9afruf1Ql4=; b=79zqXicGjDuogRTu43ng7lO6EDJ0ZVOH3b3ATysjN60YtSaZxaC7lsdG+y+VKrmSRTQPwIqj2 rSijmiFEOwhBmLD14jYYD01c9vWLw2CFAeNqmGBWBwxP9L04hPwdyu0 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= From: Robert Chiras In order to respect the DSI protocol, make sure that auto-insert EOTP is enabled according to the NO_EOT_PACKET flag instead of the CLOCK_NON_CONTINUOUS flag. Fixes: 44cfc6233447 ("drm/bridge: Add NWL MIPI DSI host controller support") Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal Cc: Robert Chiras Cc: Laurentiu Palcu --- drivers/gpu/drm/bridge/nwl-dsi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 374884e76f25..3fd41212933c 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -222,13 +222,15 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi) DRM_DEV_DEBUG_DRIVER(dsi->dev, "DSI Lanes %d\n", dsi->lanes); nwl_dsi_write(dsi, NWL_DSI_CFG_NUM_LANES, dsi->lanes - 1); =20 - if (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + if (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x01); - nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x01); - } else { + else nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x00); + + if (dsi->dsi_mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x00); - } + else + nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x01); =20 /* values in byte clock cycles */ cycles =3D ui2bc(cfg->clk_pre); --=20 2.55.0 From nobody Tue Sep 29 09:09:21 2026 Received: from mail-244107.protonmail.ch (mail-244107.protonmail.ch [109.224.244.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5E32345CAB; Mon, 10 Aug 2026 07:14:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346098; cv=none; b=pW2C9YEWUHIYayDL4O1gF5CMWzfaeToYmqYVJNmDnmFKAUUTw1fWtdEfsaGyYlK22dDuCJrEYI28utgF82GX/AQegybpvWRDgBPD7hDpUxx6fxaXH6Ql7ZdqFIAiGVYwiQxJdL5SV1fdPTtTdQNl4S5hKxbWZtnumyWR4ZQYkRk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346098; c=relaxed/simple; bh=JlqiY9bLAwlxULQ8mA0Pe0idjTV17gCgcQqBrj8zmx4=; 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h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=4LYKjDt8XsZCK80E51j1CVfVxMWMQtlyELporHB/XwTp/8biic1lIAN0fWCfRXGPk 5sAn3X+4Y6JjcOT/5t33DiMImX6dtFzItRwKp7j9McOSrAq4BvkGIgQ25/fs+OyF+j Ua+8Fl7YajU4nhdo+8GnxHBJoeRaDzc9qRcXRCQ4jI2pExWRhODMyXS3ZvpyeFdcDD nAmAlwKYle7n58fSLg6jRCmL16UQKogQkXbG8MQPQuGCzcWDa3qtVQsEIG8WTsWGCy +84x4SDuQcHY+wymROnN6K2mqnO0Mn9vAPfFWFtdJ/XlsDuJx6jWAYuU8anXOMt6sW 66FUwLivoXSBQ== X-Pm-Submission-Id: 4hJQxQ517Gz2SchD From: Esben Haabendal Date: Mon, 10 Aug 2026 09:14:40 +0200 Subject: [PATCH v3 4/5] drm/bridge: nwl-dsi: Add error handling of nwl_dsi_mode_set() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260810-nwl-dsi-fixes-v3-4-256da9d672e1@geanix.com> References: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> In-Reply-To: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , =?utf-8?q?Guido_G=C3=BCnther?= , Fabio Estevam , Robert Chiras , Sam Ravnborg Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786346082; l=910; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=JlqiY9bLAwlxULQ8mA0Pe0idjTV17gCgcQqBrj8zmx4=; b=Q246UBAXSJvY3Qxmk3u50Ea5XA0sNg6j4Pj3B+ANS5lJ3W0oKb87jQvYOJaU7qrVSx6cF/fcG p+lMGd5PR+fAu/Ptnn48gslddZr4u7y5Cb3SbVgXs0j5qwYCWmit/sv X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= There does not seem to be any good reasons for ignoring the return value of the nwl_dsi_mode_set() function. Fixes: 44cfc6233447 ("drm/bridge: Add NWL MIPI DSI host controller support") Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal --- drivers/gpu/drm/bridge/nwl-dsi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 3fd41212933c..e90588299c5e 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -884,7 +884,9 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge, } =20 /* Step 2 from DSI reset-out instructions */ - nwl_dsi_mode_set(dsi); + ret =3D nwl_dsi_mode_set(dsi); + if (ret < 0) + goto runtime_put; =20 /* Step 3 from DSI reset-out instructions */ ret =3D reset_control_deassert(dsi->rst_esc); --=20 2.55.0 From nobody Tue Sep 29 09:09:21 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0376939EF19 for ; Mon, 10 Aug 2026 07:14:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346098; cv=none; b=ZrLStI5BwK7eZXeXTEvsF3i7OUMXbXeaPYRNfTZrww3PZzSHAzIc6Me08wJLqm0Ytp1SxD/f78aumjjOh7sJKiKx/TGwM6yTUp0FudKfsGnnbzaygWn59gt8QVnjK+ET1S8xvYfLqcKHAwTeCJpiPVK33oo8d74XlvOA+Jq/RL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786346098; c=relaxed/simple; bh=bFFilPL9n/Q9d52v3UsM+SJ2cQjcjDxrD8yGnZ95O2Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WUyR/htU+3YTW7DKDcJxxKIJq3GlCpqPjRaC1k+j/z22GD25jktcyoU9J0rnTTEzoq+hMMTcGRBqu74/jdpyPz+Ha4zmSN18z503ix142RNX4DR8RfgD2XzSQJcAVf2OjCJKME0uzweANQ/F+OQ7tecHhnkWywvaLrDVpe3x8tM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=38D0UM+S; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="38D0UM+S" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1786346093; x=1786605293; bh=OtohktVyQJKXvNkAqv8snMUDoXWGxu44sYvdQA4z/zA=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=38D0UM+SZ5I5k8CA1blTNAkNOTQoCAaWw5KwMV6o5gx68jN5pddCAoab+BEpvjIJz a1LsMdH9nEY5bXwieRmnCyoJGz0vzP74Yd9U6jHlrn8p5+rdm7qalaobJ7L/s3EZEh I0Sj9mL4WXYTyqUMFmmKlKxJPubY/JPsoTcqyN7aM8RaoO2As1zo884zEO73yGxyM+ hQoC5XuyRFvcBONdUauJa5q/a5XwtrAAY4dxWZJ48e2NXA4PW7dBkAREsqyPBgnz8G KKJajakKBfWdVdrH47bnOIEe2maUW9uW/XeUvN03ftB6tzJHx9KKAKYO+Fwej20QFp gb/ZNzJQls24g== X-Pm-Submission-Id: 4hJQxS5CMCz1DFFK From: Esben Haabendal Date: Mon, 10 Aug 2026 09:14:41 +0200 Subject: [PATCH v3 5/5] drm/bridge: nwl-dsi: Correct MIPI DSI horizontal sync timing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260810-nwl-dsi-fixes-v3-5-256da9d672e1@geanix.com> References: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> In-Reply-To: <20260810-nwl-dsi-fixes-v3-0-256da9d672e1@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , =?utf-8?q?Guido_G=C3=BCnther?= , Fabio Estevam , Robert Chiras , Sam Ravnborg Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, "Oliver F. Brown" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786346082; l=4286; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=bFFilPL9n/Q9d52v3UsM+SJ2cQjcjDxrD8yGnZ95O2Q=; b=NjHe8ys8z2OUvQztvA+PHNzFQW0oVUrf3+ieaBBiHS4eCQ0BZ2Q1UnQfJw9VlU4rzMpyOw65l jtfhCIhzHjHAKWnq8HZ4j/SRvqqVxYVgloGLNGuh8B5yjB5ldWd0Pcj X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The NWL MIPI Host controller registers specifies the horizontal front porch, sync pulse, and back porch in DSI packet payload size in bytes (ie. not in pixel clocks). The calculation for this is (mostly) described in section 13.6.3.5.1.2 of the i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual (rev. 3.1). The formula shown there does not take packet header size into account though. The formula implemented here converts the hfp, hsa, and hbp to DSI packet bytes and then subtracts the number of packet header bytes. It is worth noting that these values only needs to match approximately, according to the reference manual. Based on commit in NXP vendor tree commit f2a61699749d ("LF-7981-4: drm/bridge: nwl-dsi: Correct MIPI DSI hori= zontal sync timing") Signed-off-by: Esben Haabendal Cc: Robert Chiras Cc: Oliver F. Brown --- drivers/gpu/drm/bridge/nwl-dsi.c | 64 ++++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 61 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index e90588299c5e..87d22b3bd79c 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -22,6 +22,7 @@ #include #include #include +#include =20 #include #include @@ -264,6 +265,10 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) bool burst_mode; int hfront_porch, hback_porch, vfront_porch, vback_porch; int hsync_len, vsync_len; + int hfp, hbp, hsa; + unsigned long long pclk_period; + unsigned long long hs_period; + int h_blank, pkt_hdr_len, pkt_len; =20 hfront_porch =3D dsi->mode.hsync_start - dsi->mode.hdisplay; hsync_len =3D dsi->mode.hsync_end - dsi->mode.hsync_start; @@ -317,9 +322,62 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) dsi->mode.hdisplay); } =20 - nwl_dsi_write(dsi, NWL_DSI_HFP, hfront_porch); - nwl_dsi_write(dsi, NWL_DSI_HBP, hback_porch); - nwl_dsi_write(dsi, NWL_DSI_HSA, hsync_len); + pclk_period =3D DIV_ROUND_UP_ULL(PSEC_PER_SEC, dsi->mode.clock * 1000); + DRM_DEV_DEBUG_DRIVER(dsi->dev, "pclk_period: %llu\n", pclk_period); + + hs_period =3D DIV_ROUND_UP_ULL(PSEC_PER_SEC, dsi->phy_cfg.mipi_dphy.hs_cl= k_rate); + DRM_DEV_DEBUG_DRIVER(dsi->dev, "hs_period: %llu\n", hs_period); + + /* + * Calculate the bytes needed, according to the RM formula: + * Time of DPI event =3D time to transmit x number of bytes on the DSI + * interface + * dpi_event_size * dpi_pclk_period =3D dsi_bytes * 8 * hs_bit_period / + * num_lanes + * =3D=3D=3D> + * dsi_bytes =3D dpi_event_size * dpi_pclk_period * num_lanes / + * (8 * hs_bit_period) + */ + hfp =3D hfront_porch * pclk_period * dsi->lanes / (8 * hs_period); + hbp =3D hback_porch * pclk_period * dsi->lanes / (8 * hs_period); + hsa =3D hsync_len * pclk_period * dsi->lanes / (8 * hs_period); + + /* Make sure horizontal blankins are even numbers */ + hfp =3D roundup(hfp, 2); + hbp =3D roundup(hbp, 2); + hsa =3D roundup(hsa, 2); + + /* + * We need to subtract the packet header length: 32 + * In order to make sure we don't get negative values, + * subtract a proportional value to the total length of the + * horizontal blanking duration. + */ + h_blank =3D hfp + hbp + hsa; + + if (h_blank) { + pkt_len =3D min(hfp, roundup(((hfp * 100 / h_blank) * 32) / 100, 2)); + pkt_hdr_len =3D pkt_len; + hfp -=3D pkt_len; + + pkt_len =3D min(hbp, roundup(((hbp * 100 / h_blank) * 32) / 100, 2)); + pkt_hdr_len +=3D pkt_len; + hbp -=3D pkt_len; + + pkt_len =3D min(hsa, 32 - pkt_hdr_len); + pkt_hdr_len +=3D pkt_len; + hsa -=3D pkt_len; + if (pkt_hdr_len !=3D 32) + dev_warn(dsi->dev, + "Unable to subtract packet header length fully: %d left\n", + 32 - pkt_hdr_len); + } + + DRM_DEV_DEBUG_DRIVER(dsi->dev, "Register values: hfp=3D%d hbp=3D%d hsa=3D= %d\n", hfp, hbp, hsa); + + nwl_dsi_write(dsi, NWL_DSI_HFP, hfp); + nwl_dsi_write(dsi, NWL_DSI_HBP, hbp); + nwl_dsi_write(dsi, NWL_DSI_HSA, hsa); =20 nwl_dsi_write(dsi, NWL_DSI_ENABLE_MULT_PKTS, 0x0); nwl_dsi_write(dsi, NWL_DSI_BLLP_MODE, 0x1); --=20 2.55.0