From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0B3E41F5C1 for ; Fri, 7 Aug 2026 10:14:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097665; cv=none; b=SUvInBOshZlEcBaE69bVOnIMzQNwW8BCZR6WI53nAksous8JLCE9bHSWnFqoTfmyyY/mGye90EyJog1bpDNJ9WwjXrD23wQYYYJS2GgtHcB5kzKIemJy6rogzLgf6qpESrtPm1R7gyMvL4MSK4JhVXWbQ+P2L8NlDJ7jSbOxyvk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097665; c=relaxed/simple; bh=mysECAGIM4s6fPNHuYbGKhCpxhd7dzzcbCnK7cca2hc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IJAZniGYvizFh8OrqzLr/42CGLAUfJl9O6an75w0rlYJBnlTKVhM/eKQKycz93UR2QbMeHmAtt2p0dFA0BLhA0KkBY2w+unCII/CUCF/evvWsKnWolDTLHKVSP5sUF25424fu6zgw/35NayyqSDjKVMsZr1dyBDdYdCjEVQvEjE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=hp2W1KId; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="hp2W1KId" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 94FB94E41136; Fri, 7 Aug 2026 10:14:13 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 69CF4603F0; Fri, 7 Aug 2026 10:14:13 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D3E9311C3751D; Fri, 7 Aug 2026 12:14:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097648; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=tCkzLUO8jupK5Bfyyo1EzqUcURHcXok2YUcg3cdLeVA=; b=hp2W1KId3Rp9Ta0F0jXoMfoi+RizYcnFwR+2ExycT6+ZudcGdgVf7wTfqcj7yxDgT/92Io RlRcDbikH/UrxdSL++vv9OwPFJpLwnJP/7GPIZ+0YQHGPJHVWCcUcLLc+DNtJoHbP5i9UJ Qqit5+Y745tvFVOPDwxrOtvCCIM+06oKUnCF1mP/oIkCgWajB/9YAGpRQq0Qggrr4ZizcC 6wNYtnZ+LI8N2wgXVna6LaskWi/zPd0rXebH0TVJ2lL/u+S04QRnJ36oGcvISMpHRKQbuE heH2egYiahZZLPTegSTIxuJcpWE9zNvcdMvPGQxnYMrNrgVUP0aUJ/QpsNxnKw== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:53 +0200 Subject: [PATCH v2 01/18] mtd: spi-nor: Rename BFPT_DWORD15_QER_SR2_BIT1_BUGGY Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-1-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The _BUGGY suffix is not super accurate. There is a behavior that indeed seems strange, but it is somewhat documented. The fact is, with this QER field the status register is considered 16-bit wide and if one writes the first 8 bits (SR1) without the next 8 bits (SR2) then the content of SR2 will be assumed to be 0x00 and will be cleared. Rename it BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR to align with the other namings (_NO_RD) and clarify the meaning of this field. No functional change. Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 2 +- drivers/mtd/spi-nor/sfdp.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index cf0e2dc7c120..526763c79f55 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -567,7 +567,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, params->quad_enable =3D NULL; break; =20 - case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: + case BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR: /* * Writing only one byte to the Status Register has the * side-effect of clearing Status Register 2. diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index f74a0eb339ea..d976c6c9a4ad 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -84,7 +84,7 @@ struct sfdp_bfpt { */ #define BFPT_DWORD15_QER_MASK GENMASK(22, 20) #define BFPT_DWORD15_QER_NONE (0x0UL << 20) /* Micron */ -#define BFPT_DWORD15_QER_SR2_BIT1_BUGGY (0x1UL << 20) +#define BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR (0x1UL << 20) #define BFPT_DWORD15_QER_SR1_BIT6 (0x2UL << 20) /* Macronix */ #define BFPT_DWORD15_QER_SR2_BIT7 (0x3UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68A0041DDFD for ; Fri, 7 Aug 2026 10:14:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097667; cv=none; b=rSoe3MXdYlDdPm4e2zGQZ4zw7CUVyT8AYlp3AAx5Twrw5W7z2yN0A0TKf+3cPcO/S4oOWnoBDT7M3SoFdBuKPe31WF8YovjUUnyp1eA170Zp1yUKhaF2lcRueT+fyi8vvqHQju0/NOAn7UtBBVLhB4V0xKUzLA3dT6OuWPlSARo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097667; c=relaxed/simple; bh=w95vvewAmOV7C38K4QHpidOFQKuj+dcoRPNKEcjnrPQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SPTS8ugvUmywu3B79DqPJrOvtpi6A+m5TLHPqgZU4SgRx0otmvk3Q0LA8NbbkeY6xnMifGNrkTTYuPifW+Ayd+fvB1KI9ccJTCBur46xZ7vZWtMiY+/T8egeSDBNySB6BXgsov4y54Ev3bBfSBVXeG+aFKHGWE9XhWdJtZ/vuac= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=1ZAyf6eQ; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="1ZAyf6eQ" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 8FBBF4E41137; Fri, 7 Aug 2026 10:14:19 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 64D6F603F0; Fri, 7 Aug 2026 10:14:19 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B915211C3751E; Fri, 7 Aug 2026 12:14:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097654; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=zm6Kby57e3VJB20bGEQsK4HWf4vVSVk8tsQGXoBsehk=; b=1ZAyf6eQBmzCURy6LFZ1bJoTlpPAusmAo6QIPiKA/eTBxuUDqRurif1uYJjza7k8xPHY2s /8DfaKtED3YJD0/MuncesODPs1t4plJbWQdybRCOc60NSGUhC8pPLXTrwheM8/e72+T6qR oHBLX6NbNgAb1JsSkqbi3uoLkJ9FgOVO8z7uXZBLImPtecewQwbQ7GGv6KIfHXTtkNE1Vk OShiI4P6eTgPIMAlSIQdQBs59yhZNxRR7+qucL2TbXTnBVFxpeVDl0JCyAbpcKtYAbkmDs NcnPBcNxwYeNx5KjUt7kHppdgo31zT9i1+k6XdEWHtR2gvjQUgqkD3hbpxkJJg== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:54 +0200 Subject: [PATCH v2 02/18] mtd: spi-nor: Create a structure containing the flash opcodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-2-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Create a structure named opcodes in the flash parameters structures to store all the flash specific opcodes. They are typically discovered dynamically through SFDP parsing. Move the die_erase opcode inside. Later on we will add new fields there, like the supported opcodes for accessing the status registers, which are almost vendor specific. No fonctional change. Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 6 +++--- drivers/mtd/spi-nor/core.h | 14 +++++++++++--- drivers/mtd/spi-nor/debugfs.c | 2 +- drivers/mtd/spi-nor/micron-st.c | 4 ++-- drivers/mtd/spi-nor/spansion.c | 4 ++-- 5 files changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index fef7f426a3a2..29b8fe3d1c65 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1140,7 +1140,7 @@ static int spi_nor_erase_die(struct spi_nor *nor, lof= f_t addr, size_t die_size) =20 if (nor->spimem) { struct spi_mem_op op =3D - SPI_NOR_DIE_ERASE_OP(nor->params->die_erase_opcode, + SPI_NOR_DIE_ERASE_OP(nor->params->opcodes.die_erase, nor->addr_nbytes, addr, multi_die); =20 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); @@ -3030,8 +3030,8 @@ static int spi_nor_late_init_params(struct spi_nor *n= or) return ret; } =20 - if (!nor->params->die_erase_opcode) - nor->params->die_erase_opcode =3D SPINOR_OP_CHIP_ERASE; + if (!nor->params->opcodes.die_erase) + nor->params->opcodes.die_erase =3D SPINOR_OP_CHIP_ERASE; =20 /* Default method kept for backward compatibility. */ if (!params->set_4byte_addr_mode) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index ba2d1a862c9d..2cc0c80da3fa 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -340,6 +340,16 @@ struct spi_nor_otp { const struct spi_nor_otp_ops *ops; }; =20 +/** + * struct spi_nor_opcodes - SPI NOR flash specific opcodes. + * List of variable opcodes used by the chip. + * + * @die_erase: opcode for erasing a die, defaults to SPINOR_OP_CHIP_ERASE + */ +struct spi_nor_opcodes { + u8 die_erase; +}; + /** * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. * Includes legacy flash parameters and settings that can be overwritten @@ -362,7 +372,6 @@ struct spi_nor_otp { * command in octal DTR mode. * @n_banks: number of banks. * @n_dice: number of dice in the flash memory. - * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE. * @vreg_offset: volatile register offset for each die. * @hwcaps: describes the read and page program hardware * capabilities. @@ -393,13 +402,12 @@ struct spi_nor_flash_parameter { u8 rdsr_addr_nbytes; u8 n_banks; u8 n_dice; - u8 die_erase_opcode; u32 *vreg_offset; =20 struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; - + struct spi_nor_opcodes opcodes; struct spi_nor_erase_map erase_map; struct spi_nor_otp otp; =20 diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 288e2866daed..ef6f0ffcd6bb 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -146,7 +146,7 @@ static int spi_nor_params_show(struct seq_file *s, void= *data) =20 if (!(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { string_get_size(params->size, 1, STRING_UNITS_2, buf, sizeof(buf)); - seq_printf(s, " %02x (%s)\n", params->die_erase_opcode, buf); + seq_printf(s, " %02x (%s)\n", params->opcodes.die_erase, buf); } =20 seq_puts(s, "\nsector map\n"); diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index c75b0a1cd567..031cf887318c 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -131,7 +131,7 @@ static int micron_st_nor_four_die_late_init(struct spi_= nor *nor) { struct spi_nor_flash_parameter *params =3D nor->params; =20 - params->die_erase_opcode =3D SPINOR_OP_MT_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_MT_DIE_ERASE; params->n_dice =3D 4; =20 /* @@ -147,7 +147,7 @@ static int micron_st_nor_two_die_late_init(struct spi_n= or *nor) { struct spi_nor_flash_parameter *params =3D nor->params; =20 - params->die_erase_opcode =3D SPINOR_OP_MT_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_MT_DIE_ERASE; params->n_dice =3D 2; =20 /* diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 15dcec09332a..2a8238c707e1 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -675,7 +675,7 @@ static int s25hx_t_late_init(struct spi_nor *nor) cypress_nor_ecc_init(nor); =20 if (params->n_dice > 1) - params->die_erase_opcode =3D SPINOR_OP_CYPRESS_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_CYPRESS_DIE_ERASE; =20 return 0; } @@ -763,7 +763,7 @@ static int s28hx_t_late_init(struct spi_nor *nor) cypress_nor_ecc_init(nor); =20 if (params->n_dice > 1) - params->die_erase_opcode =3D SPINOR_OP_CYPRESS_DIE_ERASE; + params->opcodes.die_erase =3D SPINOR_OP_CYPRESS_DIE_ERASE; =20 return 0; } --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B6DA41DE08 for ; Fri, 7 Aug 2026 10:14:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097677; cv=none; b=pmc184G1ELqPQft4JsGV4cJEHaou1KAqRBEujOzgLEoetBGcPaYRzssNqTlhDJip2xnN/siazrQTMZ09tbaE6cqa9XxQvLAkLcYOCj2d6Th0KCBTMUdjvBU9qKU569xNBd9Jjf4ZEXyTjUC4CliNnU5vY3LFnk0ps1aD3Evqdqg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097677; c=relaxed/simple; bh=7UvoS0nMCrekkp5tEbuGCEKo67RmLr3tJM5KzvQNcRk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZrpkktxVmVqnLHdisL72s8zDofQHm/zlrcLuHKhjJ/V+PZJ7LoSnl0KMFilKYHAZJUDv4SsxzLwZmCm6qlV5yoONyWVl6zPnRY40VyU3c7CqK2m1awXOXhk/Qjub+6HpZVwEEK3upXlpgfQyQymf2M/wiBhN1+EQueSrU4lQofA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=rCjdsZkR; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="rCjdsZkR" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 8C0CC4E41135; Fri, 7 Aug 2026 10:14:25 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 610D8603F0; Fri, 7 Aug 2026 10:14:25 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B5E5A11C3750A; Fri, 7 Aug 2026 12:14:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097660; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=MvOxJGLxl2Pav56/SJJmI3F+qgvueAa6aWiksM7DG9A=; b=rCjdsZkRcjA5YeutNFXn4L+s24RnThdoiCdsojKZjgV0VxRuTZJpYNoe6g2tnl4/wU2O3r ukkX/u/jYJHBFfekCil8BOX4hxxMiyz3k29RSfYmpvYCIxe2HVs8hfQ3Zgr3n+h6h06jQs 3MsjN81QCgiDV9AX9sQkMsUHPf3UKRfALAXpZds1CCyvU2l6jQ1wp/prx7PROMuL4tK4nr 9NWws+FXoj8NOjtENIDc/ft8ebVFgPRO9UmmE27AlIJocdfzMV8hVsV8z/PnMcI0P+A3Ky fyxRG+o6JRiswjEi7NtbM2KjCJRqfcJ2ECyOjScro4tCEBDIHiG/4Ysvmypj9A== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:55 +0200 Subject: [PATCH v2 03/18] mtd: spi-nor: Refactor Read Status/Write Status support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-3-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 SPI NOR has a lot of history. Additions over additions, the subtleties of the JESD216 specification, their implementations by the manufacturers and the hardware mistakes have generated a gigantic maze, let's try to understand what is really needed. The specification explains the QE (Quad Enable) bitfield as describing where the bit to enable the Quad capability is, but also how to set it. Unfortunately, the specification is not precise about what opcodes are supported exactly in all the cases. There is an introduction that basically states: - Opcode 0x05 reads SR1 - Opcode 0x35 reads SR2 - Opcode 0x01 writes SR1, and then SR2 if another byte is written Then the bitfield, among indicating the location of the QE bit, may indicate: - Reading SR1 and SR2 in one operation is not possible (loops over the content of SR1) - Reading SR2 directly is possible - Only writing SR1 zeroes SR2. One problem with the current implementation, is that it only focuses on the QE bit. A quad_enable function was created for each case, even though in practice, the logic was always the same: read, modify, write, read back and verify. One problem comes when other features need to play with the status registers, like software block protection or OTP: you never know how to properly handle the QE bit, nor where it is, nor how to read/write the Status registers. This lead to approximations/guessing (in swp.c, otp.c and obviously in legacy controller drivers like atmel.c) but also to the implementation of a gazillon of helpers for reading/writing/checking the status registers. In addition, I believe some design decisions had a negative impact over the years. - All possible situations had to be flagged by the core. This is likely wrong, because we no longer know why we need specific quirks. It was ineherent to the state of the SPI NOR core before the great cleanup that had happened the past few years. I believe this creates confusion in the core today, and we should push this to vendor fixups instead. As an example, in 2023 Hsin-Yi was facing an issue because his chip was setting the wrong QER value, leading to RDCR being prevented, thus falling into a condition blindly setting a random QE bit (I strongy believe it is done like that for wrong reasons). His chip actually had RDCR support! The correct fix should have been to mark the capability in a device fixup instead of handling this in the core. Link: https://lore.kernel.org/lkml/CAJMQK-hR0eaO0b4Vd0U8_KAndLyZapqdHjVLA= oe42rWi9rdLkA@mail.gmail.com/ - SFDP parsing is over cautious. I believe BFPT_DWORD15_QER_SR2_BIT1_NO_RD is abusive (nothing states that RDCR is not supported), and BFPT_DWORD15_QER_SR2_BIT1 is also out of specification when forcing 16-bit Status writes. - SNOR_F_HAS_16BIT_SR is only imposing 16bit Status writes, whereas reads can still be 8-bit wide. - The usage of helpers verifying the writes was also spread for IMHO no really good reason. Why shouldn't we trust spi operations when it comes to Status Registers? We do not read back our page reads, so why status registers should be treated with so much care, if it's not because we are unsure of what is being done? My proposal includes a check when it comes to the QE bit (done once) but we don't need these checks otherwise. If the QE bit was written properly, there are high chances that the other register accesses will just be fine, no? Asde from my main quest, I also observed no good reason to ask the read/write status register callers to use nor->bouncebuf while the low-level helpers could do it themselves (we are talking about one or two bytes being copied). So after these observations, my proposal is the following: - Create private low level helpers that just read or write a status register. They are flexible, we can give the opcode (which varies based on the SFDP QER field) and the length (1 or 2). - Create public generic accessors which will be used to read/write sr1 and/or sr2. This is where all the cleverness shall be. The helpers use the available opcodes for a given chip in order to fullfill the request. - Provide a single generic ->quad_enable() hook which generically does all the steps mentioned above (read, modify, write, read back and verify). - Create a list of opcodes for all 6 possible situations: {read, write} {sr1, sr2, sr1 and sr2}. These opcodes are filled/cleared based on the QER field. An opcode set to 0 indicates the absence of support (there is no 0x00 opcode in SPI NOR). I tried my best to analyze the current behavior and to mimic it as much as possible, but this is a risky cleanup. However, if we go for this, it will be *much* easier in the future to handle all kind of chip variations. We won't be limited to a couple of flags anymore, but rather we'll be able to just disable a read or write capability using a single line. Known deviations: - The Atmel manufacturer driver drives non SFDP chips which by default were receiving the HAS_16B_WR flag, forcing SR2 writes all the times, but it was deliberately making single bytes writes to SR1 for its locking operations. The flag is likely wrong for them, so I removed it. - I am proposing on purpose a single quad_enable helper. It should match all the cases, with 1 identified difference which I believe is harmless: in the SR2_BIT7 case, the helper would make an extra SR1 read/write which was not done before. This entry explicitly supports reading and writing the two registers. Note: no manufacturer has been identified to actually use that entry yet. Signed-off-by: Miquel Raynal --- This is a really hard to review patch, it is big, full of changes everywhere, but I cannot really split it further. The commit log is really important, it tries to explain the steps I went through when trying to refactor the whole QE/SR handling for which I received feedback from Michael, Tudor and Sashiko. Ideally we could expect test coverage of each case: - BFPT_DWORD15_QER_NONE: Probably not needed - BFPT_DWORD15_QER_SR2_BIT1_BUGGY: Expected from Hsin-Yi (flag is being renamed _NO_1B_WR) - BFPT_DWORD15_QER_SR2_BIT1_NO_RD: Tested with a chip re-enabling RDCR in a fixup - BFPT_DWORD15_QER_SR1_BIT6: TBD - BFPT_DWORD15_QER_SR2_BIT7: TBD - BFPT_DWORD15_QER_SR2_BIT1: TBD - BFPT_DWORD15_QER_SR2_BIT1_1B: Done. There will probably be breakages on older chips. These cannot be guessed because they are not properly listed in manufacturer fixups (yet). If we want a cleanup/simplification, we will have to cope with this risk. I hope the diff stats will motivate people to have a look and report their testing. I will also eagerly monitor Sashiko's output which will probably be very useful to catch niche weird cases where these changes might break. --- Documentation/driver-api/mtd/spi-nor.rst | 2 +- drivers/mtd/spi-nor/atmel.c | 52 +- drivers/mtd/spi-nor/core.c | 784 +++++++++++----------------= ---- drivers/mtd/spi-nor/core.h | 57 +-- drivers/mtd/spi-nor/debugfs.c | 2 - drivers/mtd/spi-nor/gigadevice.c | 6 +- drivers/mtd/spi-nor/issi.c | 3 +- drivers/mtd/spi-nor/macronix.c | 12 +- drivers/mtd/spi-nor/micron-st.c | 4 +- drivers/mtd/spi-nor/otp.c | 16 +- drivers/mtd/spi-nor/sfdp.c | 41 +- drivers/mtd/spi-nor/spansion.c | 16 +- drivers/mtd/spi-nor/sst.c | 5 +- drivers/mtd/spi-nor/swp.c | 58 +-- drivers/mtd/spi-nor/winbond.c | 4 +- include/linux/mtd/spi-nor.h | 4 - 16 files changed, 416 insertions(+), 650 deletions(-) diff --git a/Documentation/driver-api/mtd/spi-nor.rst b/Documentation/drive= r-api/mtd/spi-nor.rst index 747a326fb6c0..5441fa7d4f04 100644 --- a/Documentation/driver-api/mtd/spi-nor.rst +++ b/Documentation/driver-api/mtd/spi-nor.rst @@ -118,7 +118,7 @@ section, after the ``---`` marker. write size 1 page size 256 address nbytes 3 - flags HAS_LOCK | HAS_16BIT_SR | SOFT_RESET | SWP_IS_VOLATILE + flags HAS_LOCK | SOFT_RESET | SWP_IS_VOLATILE =20 opcodes read 0xeb diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 82c592f0a1e1..8741c0bda497 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -23,18 +23,28 @@ static int at25fs_nor_lock(struct spi_nor *nor, loff_t = ofs, u64 len) =20 static int at25fs_nor_unlock(struct spi_nor *nor, loff_t ofs, u64 len) { + /* Write 0x00 to the status register to disable write protection */ + u8 sr =3D 0; int ret; =20 /* We only support unlocking the whole flash array */ if (ofs || len !=3D nor->params->size) return -EINVAL; =20 - /* Write 0x00 to the status register to disable write protection */ - ret =3D spi_nor_write_sr_and_check(nor, 0); + ret =3D spi_nor_write_sr1(nor, &sr); if (ret) - dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); + return ret; =20 - return ret; + ret =3D spi_nor_read_sr1(nor, &sr); + if (ret) + return ret; + + if (sr) { + dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n"); + return -EIO; + } + + return 0; } =20 static int at25fs_nor_is_locked(struct spi_nor *nor, loff_t ofs, u64 len) @@ -50,6 +60,7 @@ static const struct spi_nor_locking_ops at25fs_nor_lockin= g_ops =3D { =20 static int at25fs_nor_late_init(struct spi_nor *nor) { + nor->params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; nor->params->locking_ops =3D &at25fs_nor_locking_ops; =20 return 0; @@ -69,6 +80,7 @@ static const struct spi_nor_fixups at25fs_nor_fixups =3D { * Return: 0 on success, -error otherwise. */ static int atmel_nor_set_global_protection(struct spi_nor *nor, loff_t ofs, + u64 len, bool is_protect) { int ret; @@ -78,19 +90,24 @@ static int atmel_nor_set_global_protection(struct spi_n= or *nor, loff_t ofs, if (ofs || len !=3D nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - sr =3D nor->bouncebuf[0]; - /* SRWD bit needs to be cleared, otherwise the protection doesn't change = */ if (sr & SR_SRWD) { sr &=3D ~SR_SRWD; - ret =3D spi_nor_write_sr_and_check(nor, sr); - if (ret) { - dev_dbg(nor->dev, "unable to clear SRWD bit, WP# asserted?\n"); + ret =3D spi_nor_write_sr1(nor, &sr); + if (ret) return ret; + + ret =3D spi_nor_read_sr1(nor, &sr); + if (ret) + return ret; + + if (sr & SR_SRWD) { + dev_dbg(nor->dev, "unable to clear SRWD bit, WP# asserted?\n"); + return -EIO; } } =20 @@ -108,14 +125,7 @@ static int atmel_nor_set_global_protection(struct spi_= nor *nor, loff_t ofs, sr &=3D ~ATMEL_SR_GLOBAL_PROTECT_MASK; } =20 - nor->bouncebuf[0] =3D sr; - - /* - * We cannot use the spi_nor_write_sr_and_check() because this command - * isn't really setting any bits, instead it is an pseudo command for - * "Global Unprotect" or "Global Protect" - */ - return spi_nor_write_sr(nor, nor->bouncebuf, 1); + return spi_nor_write_sr1(nor, &sr); } =20 static int atmel_nor_global_protect(struct spi_nor *nor, loff_t ofs, u64 l= en) @@ -131,16 +141,17 @@ static int atmel_nor_global_unprotect(struct spi_nor = *nor, loff_t ofs, u64 len) static int atmel_nor_is_global_protected(struct spi_nor *nor, loff_t ofs, u64 len) { + u8 sr; int ret; =20 if (ofs >=3D nor->params->size || (ofs + len) > nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - return ((nor->bouncebuf[0] & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_S= R_GLOBAL_PROTECT_MASK); + return ((sr & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_SR_GLOBAL_PROTEC= T_MASK); } =20 static const struct spi_nor_locking_ops atmel_nor_global_protection_ops = =3D { @@ -151,6 +162,7 @@ static const struct spi_nor_locking_ops atmel_nor_globa= l_protection_ops =3D { =20 static int atmel_nor_global_protection_late_init(struct spi_nor *nor) { + nor->params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; nor->params->locking_ops =3D &atmel_nor_global_protection_ops; =20 return 0; diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 29b8fe3d1c65..ac7812562047 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -443,75 +443,6 @@ int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 = ndummy, u8 *id, return ret; } =20 -/** - * spi_nor_read_sr() - Read the Status Register. - * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to a DMA-able buffer where the value of the - * Status Register will be written. Should be at least 2 byte= s. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDSR_OP(sr); - - if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { - op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; - op.dummy.nbytes =3D nor->params->rdsr_dummy; - /* - * We don't want to read only one byte in DTR mode. So, - * read 2 and then discard the second byte. - */ - op.data.nbytes =3D 2; - } - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR, sr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading SR\n", ret); - - return ret; -} - -/** - * spi_nor_read_cr() - Read the Configuration Register using the - * SPINOR_OP_RDCR (35h) command. - * @nor: pointer to 'struct spi_nor' - * @cr: pointer to a DMA-able buffer where the value of the - * Configuration Register will be written. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_read_cr(struct spi_nor *nor, u8 *cr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDCR_OP(cr); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDCR, cr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading CR\n", ret); - - return ret; -} - /** * spi_nor_set_4byte_addr_mode_en4b_ex4b() - Enter/Exit 4-byte address mode * using SPINOR_OP_EN4B/SPINOR_OP_EX4B. Typically used by @@ -617,12 +548,13 @@ int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *= nor, bool enable) int spi_nor_sr_ready(struct spi_nor *nor) { int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - return !(nor->bouncebuf[0] & SR_WIP); + return !(sr & SR_WIP); } =20 /** @@ -784,345 +716,297 @@ int spi_nor_global_block_unlock(struct spi_nor *nor) } =20 /** - * spi_nor_write_sr() - Write the Status Register. + * spi_nor_read_sr_ll() - Low-level Status Registers read. * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to DMA-able buffer to write to the Status Register. - * @len: number of bytes to write to the Status Register. + * @opcode: opcode for the status register read operation. + * @sr: pointer to buffer for storing the content of the status registers. + * @len: number of status registers to read (1 or 2). * * Return: 0 on success, -errno otherwise. */ -int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len) +static int spi_nor_read_sr_ll(struct spi_nor *nor, u8 opcode, u8 *sr, + unsigned int len) { - int ret; + int ret, i; =20 - ret =3D spi_nor_write_enable(nor); - if (ret) - return ret; + if (len > 2) + return -EINVAL; + + for (i =3D 0; i < len; i++) + nor->bouncebuf[i] =3D 0; =20 if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_WRSR_OP(sr, len); + struct spi_mem_op op =3D SPI_NOR_RDSR_OP(opcode, nor->bouncebuf, len); + + if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; + op.dummy.nbytes =3D nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes =3D 2; + } =20 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); =20 ret =3D spi_mem_exec_op(nor->spimem, &op); } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR, sr, - len); + ret =3D spi_nor_controller_ops_read_reg(nor, opcode, nor->bouncebuf, len= ); } =20 - if (ret) { - dev_dbg(nor->dev, "error %d writing SR\n", ret); - return ret; - } - - return spi_nor_wait_till_ready(nor); -} - -/** - * spi_nor_write_sr1_and_check() - Write one byte to the Status Register 1= and - * ensure that the byte written match the received value. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1) -{ - int ret; - - nor->bouncebuf[0] =3D sr1; - - ret =3D spi_nor_write_sr(nor, nor->bouncebuf, 1); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] !=3D sr1) { - dev_dbg(nor->dev, "SR1: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_sr_and_check() - Write the Status Register 1 and the - * Status Register 2 in one shot. Ensure that the byte written in the Stat= us - * Register 1 match the received value, and that the 16-bit Write did not - * affect what was already in the Status Register 2. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register 1. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) -{ - int ret; - u8 *sr_cr =3D nor->bouncebuf; - u8 cr_written; - - /* Make sure we don't overwrite the contents of Status Register 2. */ - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - } else if ((spi_nor_get_protocol_width(nor->read_proto) =3D=3D 4 || - spi_nor_get_protocol_width(nor->write_proto) =3D=3D 4) && - nor->params->quad_enable) { - /* - * If the Status Register 2 Read command (35h) is not - * supported, we should at least be sure we don't - * change the value of the SR2 Quad Enable bit. - * - * When the Quad Enable method is set and the buswidth is 4, we - * can safely assume that the value of the QE bit is one, as a - * consequence of the nor->params->quad_enable() call. - * - * According to the JESD216 revB standard, BFPT DWORDS[15], - * bits 22:20, the 16-bit Write Status (01h) command is - * available just for the cases in which the QE bit is - * described in SR2 at BIT(1). - */ - sr_cr[1] =3D SR2_QUAD_EN_BIT1; - } else { - sr_cr[1] =3D 0; - } - - sr_cr[0] =3D sr1; - - ret =3D spi_nor_write_sr(nor, sr_cr, 2); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - if (sr1 !=3D sr_cr[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - cr_written =3D sr_cr[1]; - - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - - if (cr_written !=3D sr_cr[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_cr_and_check() - Write the Status Register 1 and the - * Configuration Register in one shot. Ensure that the byte written in the - * Configuration Register match the received value, and that the 16-bit Wr= ite - * did not affect what was already in the Status Register 1. - * @nor: pointer to a 'struct spi_nor'. - * @cr: byte value to be written to the Configuration Register. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr) -{ - int ret; - u8 *sr_cr =3D nor->bouncebuf; - u8 sr_written; - - /* Keep the current value of the Status Register 1. */ - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - sr_cr[1] =3D cr; - - ret =3D spi_nor_write_sr(nor, sr_cr, 2); - if (ret) - return ret; - - sr_written =3D sr_cr[0]; - - ret =3D spi_nor_read_sr(nor, sr_cr); - if (ret) - return ret; - - if (sr_written !=3D sr_cr[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - ret =3D spi_nor_read_cr(nor, &sr_cr[1]); - if (ret) - return ret; - - if (cr !=3D sr_cr[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_16bit_sr_cr_and_check() - Write the Status Register 1 and= the - * Configuration Register in one shot. Ensure that the bytes written in bo= th - * registers match the received value. - * @nor: pointer to a 'struct spi_nor'. - * @regs: two-byte array with values to be written to the status and - * configuration registers. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_16bit_sr_cr_and_check(struct spi_nor *nor, const = u8 *regs) -{ - u8 written_regs[2]; - int ret; - - written_regs[0] =3D regs[0]; - written_regs[1] =3D regs[1]; - nor->bouncebuf[0] =3D regs[0]; - nor->bouncebuf[1] =3D regs[1]; - - ret =3D spi_nor_write_sr(nor, nor->bouncebuf, 2); - if (ret) - return ret; - - ret =3D spi_nor_read_sr(nor, &nor->bouncebuf[0]); - if (ret) - return ret; - - if (written_regs[0] !=3D nor->bouncebuf[0]) { - dev_dbg(nor->dev, "SR: Read back test failed\n"); - return -EIO; - } - - if (nor->flags & SNOR_F_NO_READ_CR) - return 0; - - ret =3D spi_nor_read_cr(nor, &nor->bouncebuf[1]); - if (ret) - return ret; - - if (written_regs[1] !=3D nor->bouncebuf[1]) { - dev_dbg(nor->dev, "CR: read back test failed\n"); - return -EIO; - } - - return 0; -} - -/** - * spi_nor_write_sr_and_check() - Write the Status Register 1 and ensure t= hat - * the byte written match the received value without affecting other bits = in the - * Status Register 1 and 2. - * @nor: pointer to a 'struct spi_nor'. - * @sr1: byte value to be written to the Status Register. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1) -{ - if (nor->flags & SNOR_F_HAS_16BIT_SR) - return spi_nor_write_16bit_sr_and_check(nor, sr1); - - return spi_nor_write_sr1_and_check(nor, sr1); -} - -/** - * spi_nor_write_sr_cr_and_check() - Write the Status Register 1 and ensur= e that - * the byte written match the received value. Same for the Control Registe= r if - * available. - * @nor: pointer to a 'struct spi_nor'. - * @regs: byte array to be written to the registers. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_write_sr_cr_and_check(struct spi_nor *nor, const u8 *regs) -{ - if (nor->flags & SNOR_F_HAS_16BIT_SR) - return spi_nor_write_16bit_sr_cr_and_check(nor, regs); - - return spi_nor_write_sr1_and_check(nor, regs[0]); -} - -/** - * spi_nor_write_sr2() - Write the Status Register 2 using the - * SPINOR_OP_WRSR2 (3eh) command. - * @nor: pointer to 'struct spi_nor'. - * @sr2: pointer to DMA-able buffer to write to the Status Register 2. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) -{ - int ret; - - ret =3D spi_nor_write_enable(nor); - if (ret) - return ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_WRSR2_OP(sr2); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WRSR2, - sr2, 1); - } - - if (ret) { - dev_dbg(nor->dev, "error %d writing SR2\n", ret); - return ret; - } - - return spi_nor_wait_till_ready(nor); -} - -/** - * spi_nor_read_sr2() - Read the Status Register 2 using the - * SPINOR_OP_RDSR2 (3fh) command. - * @nor: pointer to 'struct spi_nor'. - * @sr2: pointer to DMA-able buffer where the value of the - * Status Register 2 will be written. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D SPI_NOR_RDSR2_OP(sr2); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDSR2, sr2, - 1); - } + memcpy(sr, nor->bouncebuf, len); =20 if (ret) - dev_dbg(nor->dev, "error %d reading SR2\n", ret); + dev_dbg(nor->dev, "Error %d reading Status Registers\n", ret); =20 return ret; } =20 +/** + * spi_nor_write_sr_ll() - Low-level Status Registers write. + * @nor: pointer to 'struct spi_nor'. + * @opcode: opcode for the status register write operation. + * @sr: pointer to status registers buffer to write. + * @len: number of status registers to write. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_write_sr_ll(struct spi_nor *nor, u8 opcode, const u8 *s= r, + unsigned int len) +{ + int ret, i; + + if (len > 2) + return -EINVAL; + + ret =3D spi_nor_write_enable(nor); + if (ret) + return ret; + + for (i =3D 0; i < len; i++) + nor->bouncebuf[i] =3D sr[i]; + + if (nor->spimem) { + struct spi_mem_op op =3D SPI_NOR_WRSR_OP(opcode, + nor->bouncebuf, len); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, opcode, + nor->bouncebuf, len); + } + + if (ret) { + dev_dbg(nor->dev, "Error %d writing Status Registers\n", ret); + return ret; + } + + return spi_nor_wait_till_ready(nor); +} + +/** + * spi_nor_read_sr1() - Read SR1 only + * Useful for: + * - The core to offer a generic "read SR1 and SR2" capability + * - Manufacturer drivers (since they know the chip SR layout) + * - Polling the BUSY bit in the core + * + * @nor: the spi_nor structure + * @sr1: pointer to a valid SR1 buffer + * + * Return 0 or errno. + */ +int spi_nor_read_sr1(struct spi_nor *nor, u8 *sr1) +{ + return spi_nor_read_sr_ll(nor, nor->params->opcodes.read_sr1, sr1, 1); +} + +/** + * spi_nor_read_sr2() - Read SR2 only + * Useful for: + * - The core to offer a generic "read SR1 and SR2" capability + * - Manufacturer drivers (since they know the chip SR layout) + * - SR2 based OTP configuration + * + * @nor: the spi_nor structure + * @sr2: pointer to a valid SR2 buffer + * + * Return 0 or errno. + */ +int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2) +{ + struct spi_nor_flash_parameter *params =3D nor->params; + int ret; + + if (params->opcodes.read_sr2) { + ret =3D spi_nor_read_sr_ll(nor, params->opcodes.read_sr2, sr2, 1); + if (ret) + return ret; + } else if (spi_nor_get_protocol_width(nor->read_proto) =3D=3D 4 || + spi_nor_get_protocol_width(nor->write_proto) =3D=3D 4) { + /* Make sure the QE bit is persistently kept */ + *sr2 =3D params->qe_mask[1]; + } else { + *sr2 =3D 0; + } + + return 0; +} + +/** + * spi_nor_read_sr1_and_sr2() - Read SR1 then SR2 + * General purpose helper, always safe to call. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +int spi_nor_read_sr1_and_sr2(struct spi_nor *nor, u8 *sr) +{ + int ret; + + ret =3D spi_nor_read_sr1(nor, &sr[0]); + if (ret) + return ret; + + return spi_nor_read_sr2(nor, &sr[1]); +} + +/** + * spi_nor_write_sr1() - Write SR1 only + * Useful for: + * - Manufacturer drivers (since they know the chip SR layout) + * + * @nor: the spi_nor structure + * @sr1: pointer to a valid SR1 buffer + * + * Return 0 or errno. + */ +int spi_nor_write_sr1(struct spi_nor *nor, const u8 *sr1) +{ + if (WARN_ONCE(!nor->params->opcodes.write_sr1, + "Restricted helper use, write SR1 not supported")) + return -EIO; + + return spi_nor_write_sr_ll(nor, nor->params->opcodes.write_sr1, sr1, 1); +} + +/** + * spi_nor_write_sr2() - Write SR2 only + * Useful for: + * - Manufacturer drivers (since they know the chip SR layout) + * - SR2 based OTP configuration + * + * @nor: the spi_nor structure + * @sr2: pointer to a valid SR2 buffer + * + * Return 0 or errno. + */ +int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2) +{ + if (WARN_ONCE(!nor->params->opcodes.write_sr2, + "Restricted helper use, write SR2 not supported")) + return -EIO; + + return spi_nor_write_sr_ll(nor, nor->params->opcodes.write_sr2, sr2, 1); +} + +/** + * spi_nor_write_sr1_and_sr2() - Write SR1 then SR2 + * General purpose helper, always safe to call. Will expectedly ignore + * SR2 on certain chips. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +static int spi_nor_write_sr1_and_sr2(struct spi_nor *nor, const u8 *sr) +{ + struct spi_nor_flash_parameter *params =3D nor->params; + int ret; + + if (params->opcodes.write_sr1_and_sr2) + return spi_nor_write_sr_ll(nor, + params->opcodes.write_sr1_and_sr2, + sr, 2); + + ret =3D spi_nor_write_sr1(nor, &sr[0]); + if (ret) + return ret; + + if (params->opcodes.write_sr2) + return spi_nor_write_sr2(nor, &sr[1]); + + return 0; +} + +/** + * spi_nor_write_sr1_and_sr2_and_check() - Write SR1 then SR2, then read + * them back and verifies + * General purpose helper, always safe to call. Will expectedly ignore + * SR2 on certain chips. + * + * @nor: the spi_nor structure + * @sr: pointer to a valid 2-byte array + * + * Return 0 or errno. + */ +int spi_nor_write_sr1_and_sr2_and_check(struct spi_nor *nor, const u8 *sr) +{ + u8 tmp[2]; + int ret; + + ret =3D spi_nor_write_sr1_and_sr2(nor, sr); + if (ret) + return ret; + + ret =3D spi_nor_read_sr1_and_sr2(nor, tmp); + if (ret) + return ret; + + if (sr[0] !=3D tmp[0] || sr[1] !=3D tmp[1]) + return -EIO; + + return 0; +} + +/** + * spi_nor_generic_quad_enable() - Read the status registers, + * apply the QE bit mask, + * write the status registers, + * read them back and check the content. + * + * @nor: pointer to 'struct spi_nor' + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_generic_quad_enable(struct spi_nor *nor) +{ + u8 *qe_mask =3D nor->params->qe_mask; + u8 sr[2] =3D {}; + int ret; + + if (!qe_mask[0] && !qe_mask[1]) + return 0; + + ret =3D spi_nor_read_sr1_and_sr2(nor, sr); + if (ret) + return ret; + + if (sr[0] & qe_mask[0] || sr[1] & qe_mask[1]) + return 0; + + sr[0] |=3D qe_mask[0]; + sr[1] |=3D qe_mask[1]; + + return spi_nor_write_sr1_and_sr2_and_check(nor, sr); +} + /** * spi_nor_erase_die() - Erase the entire die. * @nor: pointer to 'struct spi_nor'. @@ -1904,106 +1788,6 @@ static int spi_nor_erase(struct mtd_info *mtd, stru= ct erase_info *instr) return ret; } =20 -/** - * spi_nor_sr1_bit6_quad_enable() - Set the Quad Enable BIT(6) in the Stat= us - * Register 1. - * @nor: pointer to a 'struct spi_nor' - * - * Bit 6 of the Status Register 1 is the QE bit for Macronix like QSPI mem= ories. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor) -{ - int ret; - - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] & SR1_QUAD_EN_BIT6) - return 0; - - nor->bouncebuf[0] |=3D SR1_QUAD_EN_BIT6; - - return spi_nor_write_sr1_and_check(nor, nor->bouncebuf[0]); -} - -/** - * spi_nor_sr2_bit1_quad_enable() - set the Quad Enable BIT(1) in the Stat= us - * Register 2. - * @nor: pointer to a 'struct spi_nor'. - * - * Bit 1 of the Status Register 2 is the QE bit for Spansion like QSPI mem= ories. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor) -{ - int ret; - - if (nor->flags & SNOR_F_NO_READ_CR) - return spi_nor_write_16bit_cr_and_check(nor, SR2_QUAD_EN_BIT1); - - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - if (nor->bouncebuf[0] & SR2_QUAD_EN_BIT1) - return 0; - - nor->bouncebuf[0] |=3D SR2_QUAD_EN_BIT1; - - return spi_nor_write_16bit_cr_and_check(nor, nor->bouncebuf[0]); -} - -/** - * spi_nor_sr2_bit7_quad_enable() - set QE bit in Status Register 2. - * @nor: pointer to a 'struct spi_nor' - * - * Set the Quad Enable (QE) bit in the Status Register 2. - * - * This is one of the procedures to set the QE bit described in the SFDP - * (JESD216 rev B) specification but no manufacturer using this procedure = has - * been identified yet, hence the name of the function. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor) -{ - u8 *sr2 =3D nor->bouncebuf; - int ret; - u8 sr2_written; - - /* Check current Quad Enable bit value. */ - ret =3D spi_nor_read_sr2(nor, sr2); - if (ret) - return ret; - if (*sr2 & SR2_QUAD_EN_BIT7) - return 0; - - /* Update the Quad Enable bit. */ - *sr2 |=3D SR2_QUAD_EN_BIT7; - - ret =3D spi_nor_write_sr2(nor, sr2); - if (ret) - return ret; - - sr2_written =3D *sr2; - - /* Read back and check it. */ - ret =3D spi_nor_read_sr2(nor, sr2); - if (ret) - return ret; - - if (*sr2 !=3D sr2_written) { - dev_dbg(nor->dev, "SR2: Read back test failed\n"); - return -EIO; - } - - return 0; -} - static const struct spi_nor_manufacturer *manufacturers[] =3D { &spi_nor_atmel, &spi_nor_eon, @@ -2494,6 +2278,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32= *hwcaps) { struct spi_nor_flash_parameter *params =3D nor->params; unsigned int cap; + u8 opcode; =20 /* X-X-X modes are not supported yet, mask them all. */ *hwcaps &=3D ~SNOR_HWCAPS_X_X_X; @@ -2525,14 +2310,14 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u= 32 *hwcaps) *hwcaps &=3D ~BIT(cap); } =20 - /* Some SPI controllers might not support CR read opcode. */ - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - struct spi_mem_op op =3D SPI_NOR_RDCR_OP(nor->bouncebuf); - + /* Some SPI controllers might not support reading SR2 */ + opcode =3D nor->params->opcodes.read_sr2; + if (opcode) { + struct spi_mem_op op =3D SPI_NOR_RDSR_OP(opcode, nor->bouncebuf, 1); spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); =20 if (!spi_mem_supports_op(nor->spimem, &op)) - nor->flags |=3D SNOR_F_NO_READ_CR; + nor->params->opcodes.read_sr2 =3D 0; } } =20 @@ -3107,11 +2892,14 @@ static void spi_nor_init_default_params(struct spi_= nor *nor) const struct flash_info *info =3D nor->info; struct device_node *np =3D spi_nor_get_flash_node(nor); =20 - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; - params->otp.org =3D info->otp; + /* Default to 16-bit Read/Write Status commands */ + params->opcodes.read_sr1 =3D SPINOR_OP_RDSR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; + params->opcodes.write_sr1_and_sr2 =3D SPINOR_OP_WRSR; + params->quad_enable =3D spi_nor_generic_quad_enable; + params->qe_mask[1] =3D BIT(1); =20 - /* Default to 16-bit Write Status (01h) Command */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR; + params->otp.org =3D info->otp; =20 /* Set SPI NOR sizes. */ params->writesize =3D 1; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2cc0c80da3fa..7d43d3ba47ee 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -37,36 +37,18 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_NO_DATA) =20 -#define SPI_NOR_RDSR_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \ +#define SPI_NOR_RDSR_OP(opcode, buf, len) \ + SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_IN(1, buf, 0)) + SPI_MEM_OP_DATA_IN(len, buf, 0)) =20 -#define SPI_NOR_WRSR_OP(buf, len) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \ +#define SPI_NOR_WRSR_OP(opcode, buf, len) \ + SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ SPI_MEM_OP_NO_ADDR, \ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_OUT(len, buf, 0)) =20 -#define SPI_NOR_RDSR2_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_OUT(1, buf, 0)) - -#define SPI_NOR_WRSR2_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_OUT(1, buf, 0)) - -#define SPI_NOR_RDCR_OP(buf) \ - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \ - SPI_MEM_OP_NO_ADDR, \ - SPI_MEM_OP_NO_DUMMY, \ - SPI_MEM_OP_DATA_IN(1, buf, 0)) - #define SPI_NOR_EN4B_EX4B_OP(enable) \ SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \ SPI_MEM_OP_NO_ADDR, \ @@ -129,8 +111,6 @@ enum spi_nor_option_flags { SNOR_F_4B_OPCODES =3D BIT(3), SNOR_F_HAS_4BAIT =3D BIT(4), SNOR_F_HAS_LOCK =3D BIT(5), - SNOR_F_HAS_16BIT_SR =3D BIT(6), - SNOR_F_NO_READ_CR =3D BIT(7), SNOR_F_HAS_SR_TB_BIT6 =3D BIT(8), SNOR_F_HAS_4BIT_BP =3D BIT(9), SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(10), @@ -345,9 +325,19 @@ struct spi_nor_otp { * List of variable opcodes used by the chip. * * @die_erase: opcode for erasing a die, defaults to SPINOR_OP_CHIP_ERASE + * @read_sr1: opcode for reading SR1 alone + * @read_sr2: opcode for reading SR2 alone + * @write_sr1: opcode for writing SR1 alone + * @write_sr2: opcode for writing SR2 alone + * @write_sr1_and_sr2: opcode for writing SR1 then SR2 in one operation */ struct spi_nor_opcodes { u8 die_erase; + u8 read_sr1; + u8 read_sr2; + u8 write_sr1; + u8 write_sr2; + u8 write_sr1_and_sr2; }; =20 /** @@ -384,6 +374,7 @@ struct spi_nor_opcodes { * @otp: SPI NOR OTP info. * @set_octal_dtr: enables or disables SPI NOR octal DTR mode. * @quad_enable: enables SPI NOR quad mode. + * @qe_mask: two bytes mask used to set/clear the QE bit * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. * @ready: (optional) flashes might use a different mechanism * than reading the status register to indicate they @@ -413,6 +404,7 @@ struct spi_nor_flash_parameter { =20 int (*set_octal_dtr)(struct spi_nor *nor, bool enable); int (*quad_enable)(struct spi_nor *nor); + u8 qe_mask[2]; int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); int (*ready)(struct spi_nor *nor); =20 @@ -641,18 +633,15 @@ int spi_nor_wait_till_ready(struct spi_nor *nor); int spi_nor_global_block_unlock(struct spi_nor *nor); int spi_nor_prep_and_lock(struct spi_nor *nor); void spi_nor_unlock_and_unprep(struct spi_nor *nor); -int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); -int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); -int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id, enum spi_nor_protocol reg_proto); -int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); int spi_nor_sr_ready(struct spi_nor *nor); -int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); -int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); -int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); -int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); -int spi_nor_write_sr_cr_and_check(struct spi_nor *nor, const u8 *regs); +int spi_nor_read_sr1(struct spi_nor *nor, u8 *sr1); +int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2); +int spi_nor_read_sr1_and_sr2(struct spi_nor *nor, u8 *sr); +int spi_nor_write_sr1(struct spi_nor *nor, const u8 *sr1); +int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2); +int spi_nor_write_sr1_and_sr2_and_check(struct spi_nor *nor, const u8 *sr); =20 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index ef6f0ffcd6bb..512825c3fc85 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -19,8 +19,6 @@ static const char *const snor_f_names[] =3D { SNOR_F_NAME(4B_OPCODES), SNOR_F_NAME(HAS_4BAIT), SNOR_F_NAME(HAS_LOCK), - SNOR_F_NAME(HAS_16BIT_SR), - SNOR_F_NAME(NO_READ_CR), SNOR_F_NAME(HAS_SR_TB_BIT6), SNOR_F_NAME(HAS_4BIT_BP), SNOR_F_NAME(HAS_SR_BP3_BIT6), diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index ef1edd0add70..4070a692e968 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -23,8 +23,10 @@ gd25q256_post_bfpt(struct spi_nor *nor, * GD25Q256E | SFDP_JESD216_MAJOR | SFDP_JESD216B_MINOR */ if (bfpt_header->major =3D=3D SFDP_JESD216_MAJOR && - bfpt_header->minor =3D=3D SFDP_JESD216_MINOR) - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + bfpt_header->minor =3D=3D SFDP_JESD216_MINOR) { + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; + } =20 return 0; } diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 18d9a00aa22e..04db42b5141e 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -131,7 +131,8 @@ static const struct flash_info issi_nor_parts[] =3D { =20 static void issi_nor_default_init(struct spi_nor *nor) { - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; } =20 static const struct spi_nor_fixups issi_fixups =3D { diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index e97f5cbd9aad..55612237c1ef 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -65,11 +65,12 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor) =20 /* * SFDP of MX25L3255E is JESD216, which does not include the Quad - * Enable bit Requirement in BFPT. As a result, during BFPT parsing, - * the quad_enable method is not set to spi_nor_sr1_bit6_quad_enable. - * Therefore, it is necessary to correct this setting by late_init. + * Enable bit Requirement in BFPT. As a result, during BFPT parsing + * the quad_enable mask is reset. Therefore, it is necessary to + * correct this setting by late_init. */ - params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + params->qe_mask[0] =3D BIT(6); + params->qe_mask[1] =3D 0; =20 /* * In addition, MX25L3255E also supports 1-4-4 page program in 3-byte @@ -314,7 +315,8 @@ static int macronix_nor_set_octal_dtr(struct spi_nor *n= or, bool enable) =20 static void macronix_nor_default_init(struct spi_nor *nor) { - nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + nor->params->qe_mask[0] =3D BIT(6); + nor->params->qe_mask[1] =3D 0; } =20 static int macronix_nor_late_init(struct spi_nor *nor) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 031cf887318c..344539d2a36a 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -229,7 +229,7 @@ static int mt25qu512a_post_bfpt_fixup(struct spi_nor *n= or, const struct sfdp_parameter_header *bfpt_header, const struct sfdp_bfpt *bfpt) { - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; + nor->params->opcodes.write_sr1 =3D 0; return 0; } =20 @@ -633,7 +633,7 @@ static int micron_st_nor_ready(struct spi_nor *nor) static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; + nor->params->opcodes.write_sr1 =3D 0; nor->params->quad_enable =3D NULL; } =20 diff --git a/drivers/mtd/spi-nor/otp.c b/drivers/mtd/spi-nor/otp.c index 7d0b145d78d8..1eeb33a20091 100644 --- a/drivers/mtd/spi-nor/otp.c +++ b/drivers/mtd/spi-nor/otp.c @@ -175,24 +175,24 @@ static int spi_nor_otp_lock_bit_cr(unsigned int regio= n) */ int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region) { - u8 *cr =3D nor->bouncebuf; int ret, lock_bit; + u8 sr[2]; =20 lock_bit =3D spi_nor_otp_lock_bit_cr(region); if (lock_bit < 0) return lock_bit; =20 - ret =3D spi_nor_read_cr(nor, cr); + ret =3D spi_nor_read_sr1_and_sr2(nor, sr); if (ret) return ret; =20 /* no need to write the register if region is already locked */ - if (cr[0] & lock_bit) + if (sr[1] & lock_bit) return 0; =20 - cr[0] |=3D lock_bit; + sr[1] |=3D lock_bit; =20 - return spi_nor_write_16bit_cr_and_check(nor, cr[0]); + return spi_nor_write_sr1_and_sr2_and_check(nor, sr); } =20 /** @@ -207,18 +207,18 @@ int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigne= d int region) */ int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region) { - u8 *cr =3D nor->bouncebuf; int ret, lock_bit; + u8 sr2; =20 lock_bit =3D spi_nor_otp_lock_bit_cr(region); if (lock_bit < 0) return lock_bit; =20 - ret =3D spi_nor_read_cr(nor, cr); + ret =3D spi_nor_read_sr2(nor, &sr2); if (ret) return ret; =20 - return cr[0] & lock_bit; + return sr2 & lock_bit; } =20 static loff_t spi_nor_otp_region_start(const struct spi_nor *nor, unsigned= int region) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 526763c79f55..1d799f02b8e5 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -561,10 +561,21 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, val >>=3D BFPT_DWORD11_PAGE_SIZE_SHIFT; params->page_size =3D 1U << val; =20 + /* + * The standard declares various read and write status methods, some of + * them will be overloaded based on the QER field. + */ + params->opcodes.read_sr1 =3D SPINOR_OP_RDSR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; + params->opcodes.write_sr1 =3D SPINOR_OP_WRSR; + params->opcodes.write_sr1_and_sr2 =3D SPINOR_OP_WRSR; + + params->qe_mask[0] =3D 0; + params->qe_mask[1] =3D 0; + /* Quad Enable Requirements. */ switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) { case BFPT_DWORD15_QER_NONE: - params->quad_enable =3D NULL; break; =20 case BFPT_DWORD15_QER_SR2_BIT1_NO_1B_WR: @@ -572,23 +583,28 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, * Writing only one byte to the Status Register has the * side-effect of clearing Status Register 2. */ + fallthrough; case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: /* * Read Configuration Register (35h) instruction is not - * supported. + * supported. 16-bit writes expected. */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR; - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; + params->opcodes.read_sr2 =3D 0; + params->opcodes.write_sr1 =3D 0; + params->qe_mask[1] =3D BIT(1); break; =20 case BFPT_DWORD15_QER_SR1_BIT6: - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; - params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; + params->opcodes.read_sr2 =3D 0; + params->opcodes.write_sr1_and_sr2 =3D 0; + params->qe_mask[0] =3D BIT(6); break; =20 case BFPT_DWORD15_QER_SR2_BIT7: - nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; - params->quad_enable =3D spi_nor_sr2_bit7_quad_enable; + params->opcodes.read_sr2 =3D SPINOR_OP_RDSR2; + params->opcodes.write_sr1_and_sr2 =3D 0; + params->opcodes.write_sr2 =3D SPINOR_OP_WRSR2; + params->qe_mask[1] =3D BIT(7); break; =20 case BFPT_DWORD15_QER_SR2_BIT1: @@ -598,9 +614,8 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, * Register 2, so let's be cautious and keep the default * assumption of a 16-bit Write Status (01h) command. */ - nor->flags |=3D SNOR_F_HAS_16BIT_SR; - - params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; + params->opcodes.write_sr1 =3D 0; + params->qe_mask[1] =3D BIT(1); break; =20 default: @@ -608,6 +623,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, break; } =20 + /* opcodes sanity check */ + WARN_ON(!params->opcodes.read_sr1 || + (!params->opcodes.write_sr1 && !params->opcodes.write_sr1_and_sr2)); + dword =3D bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK; if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR)) params->set_4byte_addr_mode =3D spi_nor_set_4byte_addr_mode_brwr; diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 2a8238c707e1..ca2703a5a338 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -399,8 +399,9 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, nor->bouncebuf); bool is3byte, is4byte; int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, &nor->bouncebuf[1]); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 @@ -408,7 +409,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, if (ret) return ret; =20 - is3byte =3D (nor->bouncebuf[0] =3D=3D nor->bouncebuf[1]); + is3byte =3D (nor->bouncebuf[0] =3D=3D sr); =20 op =3D (struct spi_mem_op) CYPRESS_NOR_RD_ANY_REG_OP(4, SPINOR_REG_CYPRESS_STR1V, 0, @@ -417,7 +418,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struc= t spi_nor *nor, if (ret) return ret; =20 - is4byte =3D (nor->bouncebuf[0] =3D=3D nor->bouncebuf[1]); + is4byte =3D (nor->bouncebuf[0] =3D=3D sr); =20 if (is3byte =3D=3D is4byte) return -EIO; @@ -1103,13 +1104,14 @@ static const struct flash_info spansion_nor_parts[]= =3D { static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor) { int ret; + u8 sr; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1(nor, &sr); if (ret) return ret; =20 - if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { - if (nor->bouncebuf[0] & SR_E_ERR) + if (sr & (SR_E_ERR | SR_P_ERR)) { + if (sr & SR_E_ERR) dev_err(nor->dev, "Erase Error occurred\n"); else dev_err(nor->dev, "Programming Error occurred\n"); @@ -1129,7 +1131,7 @@ static int spansion_nor_sr_ready_and_clear(struct spi= _nor *nor) return -EIO; } =20 - return !(nor->bouncebuf[0] & SR_WIP); + return !(sr & SR_WIP); } =20 static int spansion_nor_late_init(struct spi_nor *nor) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index db02c14ba16f..77a0bc41d4e5 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -21,16 +21,17 @@ static int sst26vf_nor_lock(struct spi_nor *nor, loff_t= ofs, u64 len) static int sst26vf_nor_unlock(struct spi_nor *nor, loff_t ofs, u64 len) { int ret; + u8 cr; =20 /* We only support unlocking the entire flash array. */ if (ofs !=3D 0 || len !=3D nor->params->size) return -EINVAL; =20 - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr2(nor, &cr); if (ret) return ret; =20 - if (!(nor->bouncebuf[0] & SST26VF_CR_BPNV)) { + if (!(cr & SST26VF_CR_BPNV)) { dev_dbg(nor->dev, "Any block has been permanently locked\n"); return -EINVAL; } diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 235070b215d1..b7b291e15917 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -36,7 +36,7 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) =20 static u8 spi_nor_get_sr_cmp_mask(struct spi_nor *nor) { - if (!(nor->flags & SNOR_F_NO_READ_CR) && + if (nor->params->opcodes.read_sr2 && nor->flags & SNOR_F_HAS_SR2_CMP_BIT6) return SR2_CMP_BIT6; else @@ -207,17 +207,9 @@ void spi_nor_cache_sr_lock_bits(struct spi_nor *nor, u= 8 *sr) =20 =20 if (!sr) { - if (spi_nor_read_sr(nor, nor->bouncebuf)) + if (spi_nor_read_sr1_and_sr2(nor, sr_cr)) return; =20 - sr_cr[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - if (spi_nor_read_cr(nor, nor->bouncebuf)) - return; - } - - sr_cr[1] =3D nor->bouncebuf[0]; sr =3D sr_cr; } =20 @@ -273,20 +265,10 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_= t ofs, u64 len) int ret; u8 pow; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2(nor, status_old); if (ret) return ret; =20 - status_old[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - status_old[1] =3D nor->bouncebuf[0]; - } - /* If nothing in our range is unlocked, we don't need to do anything */ if (spi_nor_is_locked_sr(nor, ofs, len, status_old)) return 0; @@ -378,10 +360,7 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t= ofs, u64 len) (ofs_old < ofs_new || (ofs_new + len_new) < (ofs_old + len_old))) return -EINVAL; =20 - if (nor->flags & SNOR_F_NO_READ_CR) - ret =3D spi_nor_write_sr_and_check(nor, best_status_new[0]); - else - ret =3D spi_nor_write_sr_cr_and_check(nor, best_status_new); + ret =3D spi_nor_write_sr1_and_sr2_and_check(nor, best_status_new); if (ret) return ret; =20 @@ -409,20 +388,10 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, lof= f_t ofs, u64 len) int ret; u8 pow; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2(nor, status_old); if (ret) return ret; =20 - status_old[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - status_old[1] =3D nor->bouncebuf[0]; - } - /* If nothing in our range is locked, we don't need to do anything */ if (spi_nor_is_unlocked_sr(nor, ofs, len, status_old)) return 0; @@ -512,10 +481,7 @@ static int spi_nor_sr_unlock(struct spi_nor *nor, loff= _t ofs, u64 len) (ofs_new < ofs_old || (ofs_old + len_old) < (ofs_new + len_new))) return -EINVAL; =20 - if (nor->flags & SNOR_F_NO_READ_CR) - ret =3D spi_nor_write_sr_and_check(nor, best_status_new[0]); - else - ret =3D spi_nor_write_sr_cr_and_check(nor, best_status_new); + ret =3D spi_nor_write_sr1_and_sr2_and_check(nor, best_status_new); if (ret) return ret; =20 @@ -536,20 +502,10 @@ static int spi_nor_sr_is_locked(struct spi_nor *nor, = loff_t ofs, u64 len) u8 sr_cr[2] =3D {}; int ret; =20 - ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + ret =3D spi_nor_read_sr1_and_sr2(nor, sr_cr); if (ret) return ret; =20 - sr_cr[0] =3D nor->bouncebuf[0]; - - if (!(nor->flags & SNOR_F_NO_READ_CR)) { - ret =3D spi_nor_read_cr(nor, nor->bouncebuf); - if (ret) - return ret; - - sr_cr[1] =3D nor->bouncebuf[0]; - } - return spi_nor_is_locked_sr(nor, ofs, len, sr_cr); } =20 diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 593429bd6cdf..01a693033448 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -520,12 +520,12 @@ static int winbond_nor_late_init(struct spi_nor *nor) * been to declare CR reads as unsupported, whereas the Jedec * specification doesn't clearly state that. In practice, all these * chips do support reading back the CR, which is needed for SWP support, - * so make sure that capability remains enabled (needed for SWP). + * so make sure that capability remains enabled. * In practice, only exclude the old W25X family (JEDEC ID: EF 30 xx) * which actually does not support this feature. */ if (nor->id[1] > 0x30) - nor->flags &=3D ~SNOR_F_NO_READ_CR; + params->opcodes.read_sr2 =3D SPINOR_OP_RDCR; =20 /* * Winbond has reused many IDs, up to four times at this diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4b92494827b1..f0b5a1989881 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -113,20 +113,16 @@ #define SR_E_ERR BIT(5) #define SR_P_ERR BIT(6) =20 -#define SR1_QUAD_EN_BIT6 BIT(6) - #define SR_BP_SHIFT 2 =20 /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ =20 /* Status Register 2 bits. */ -#define SR2_QUAD_EN_BIT1 BIT(1) #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */ #define SR2_LB2 BIT(4) /* Security Register Lock Bit 2 */ #define SR2_LB3 BIT(5) /* Security Register Lock Bit 3 */ #define SR2_CMP_BIT6 BIT(6) -#define SR2_QUAD_EN_BIT7 BIT(7) =20 /* Supported SPI protocols */ #define SNOR_PROTO_INST_MASK GENMASK(23, 16) --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C480044A40B; Fri, 7 Aug 2026 10:14:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097681; cv=none; b=VgfmsWTBvHEoe/bDhxAbqhFPNYGQLCRBK63NnsTqiseovhklkn3/KGCWjO0PMQfClAnGgVAhCA2KQHmMwQgxnXsicMepI2qojcO32vAn/YC1/2wye2gfSBD66tUwWmFe1pDTpcAoeTFaQHPc61HPs3p7MScCyGf1qXx9/yT5PG0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097681; c=relaxed/simple; bh=H4o6+KmIsUsjJF0S3EmDStAdFW6MdYIO1HEW/GWw3Xk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fIFFF2VzYqysE6fHes7N7W3vj+Gu3O8GYZfpW5N5afeZlCfcKqwf3wbqhWYCiSb2HaeXmsGEXEI+WFh+QalXu6VUG1fIskdcxzi+Hi7wqMaP3nVtSVA36RNCYr+xgGwJUzPrCzmRKenUm3jFfN72f5DAB8dj1Nl3RrhnP/USv8k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=MpsQ7nY2; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="MpsQ7nY2" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 748981A149B; Fri, 7 Aug 2026 10:14:31 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 4982D603F0; Fri, 7 Aug 2026 10:14:31 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B76E911C3751D; Fri, 7 Aug 2026 12:14:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097666; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=8H1VVwSKk3XEDr9JwDpjqSYS4Cl0vczRL6VvMtOqe9U=; b=MpsQ7nY2P2PDeIIPuPfXW+Fe2TOwXY3IpW1qF74Ou/yuzgIEJJHWnoVxKU9VWoUB7ujErt nvd9VnPabgMgX86xouODHz3wFcOdrO1mTvFqnxi+uosR+PQTZq3zTyYcQY3yT10LBKgvbW TKDtxvTWs3EIM6lakuyRcqIcdxuUKIV5VHym0Icb0uoxY04F1sHq//s3aGLiN7KA/s/gY9 6+S0OKfYR4Me2132t83dPZ2ucl4lWh6D51mztYmbD8H9sMgfch7Cge3wiF8n4xqS2W4dhS kOe6aJxcNhnaxa2PWjxQY+q/BBekM8t/p+QR3DN1pt3eRaG4U0gXSS2pfxrNdg== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:56 +0200 Subject: [PATCH v2 04/18] mtd: spi-nor: Add support for the new JESD216 rev F QER field Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-4-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Revision F of the JEDEC JESD216 standard includes yet another supported setting in the QER 3-bit bitfield: 110b. This setting implies that the QE bit is bit 1 of SR2 (which is an already supported case) but this time it makes it very clear that both reading and writing to SR2 is supported, but not with the usual opcodes. The write operation uses an alternate WRSR2 opcode: 0x31 (instead of 0x3E) and both the reads and writes manipulate a single register at a time. Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 6 ++++++ drivers/mtd/spi-nor/sfdp.h | 8 ++++++++ include/linux/mtd/spi-nor.h | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 1d799f02b8e5..285ac781fba8 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -618,6 +618,12 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, params->qe_mask[1] =3D BIT(1); break; =20 + case BFPT_DWORD15_QER_SR2_BIT1_1B: + params->qe_mask[1] =3D BIT(1); + params->opcodes.write_sr1_and_sr2 =3D 0; + params->opcodes.write_sr2 =3D SPINOR_OP_WRSR2_ALT; + break; + default: dev_dbg(nor->dev, "BFPT QER reserved value used\n"); break; diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index d976c6c9a4ad..e8ed814c6530 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -12,6 +12,7 @@ #define SFDP_JESD216_MINOR 0 #define SFDP_JESD216A_MINOR 5 #define SFDP_JESD216B_MINOR 6 +#define SFDP_JESD216F_MINOR 10 =20 /* SFDP DWORDS are indexed from 1 but C arrays are indexed from 0. */ #define SFDP_DWORD(i) ((i) - 1) @@ -81,6 +82,12 @@ struct sfdp_bfpt { * instruction 35h. QE is set via Write Status instruction 01h with * two data bytes where bit 1 of the second byte is one. * [...] + * (from JESD216 rev F) + * - 110b: QE is bit 1 of status register 2. Status register 1 is read usi= ng + * Read Status instruction 05h. Status register2 is read using + * instruction 35h, and status register 3 is read using instructio= n 15h. + * QE is set via Write Status Register instruction 31h with one da= ta + * byte. */ #define BFPT_DWORD15_QER_MASK GENMASK(22, 20) #define BFPT_DWORD15_QER_NONE (0x0UL << 20) /* Micron */ @@ -89,6 +96,7 @@ struct sfdp_bfpt { #define BFPT_DWORD15_QER_SR2_BIT7 (0x3UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20) #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */ +#define BFPT_DWORD15_QER_SR2_BIT1_1B (0x6UL << 20) /* Winbond */ =20 #define BFPT_DWORD16_EN4B_MASK GENMASK(31, 24) #define BFPT_DWORD16_EN4B_ALWAYS_4B BIT(30) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index f0b5a1989881..3a55d76ea77d 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -25,6 +25,7 @@ #define SPINOR_OP_WRSR 0x01 /* Write status register 1 */ #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */ #define SPINOR_OP_WRSR2 0x3e /* Write status register 2 */ +#define SPINOR_OP_WRSR2_ALT 0x31 /* Write status register 2 (alternative) = */ #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08B2C41F5F3 for ; Fri, 7 Aug 2026 10:14:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097685; cv=none; b=Ls/2CatHm0znOvwVD6uXsGBeICc8P+c5Bs7wPu1Ax6Y6C+xSb28rifZd4KhXFYQZhMyr8gXh6Zmp46Bxlhr1iUoLfeAav1amhWfF084m2wlGa8TC/OWjRU8GdMIDTJ2QIxskkzr+OpQXv6deg9A73X2YElwyDjXigfZfUQD2CQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097685; c=relaxed/simple; bh=e2zna0ouHbp7x8OW1gEwpRr0rY/G3BzII3QheTKjO9k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N30QB4CiZV985OhHRgJB7N40vmqXb9d31hUHINpXSQR4ei2AwTMjnISCmtjKinrsE/6+oM1k0ZPwkONuiFQl9kY5xl3A0FGhQnW0pfRWhST6Uy+yWPj2r2Oee7R9XqwnN/XAwIkVQUVCB73GId2vSuuj5MmhQjUwoSDi6s4HNKs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=G8GlrcQp; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="G8GlrcQp" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 8FBD24E41135; Fri, 7 Aug 2026 10:14:37 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 64E09603F0; Fri, 7 Aug 2026 10:14:37 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id A2BAB11C37522; Fri, 7 Aug 2026 12:14:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097672; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=FGrp6Bc185huOSMuGXBozfzRJivoLn2WUBJcDEKvaW0=; b=G8GlrcQpzuy0gDaZ5Cht8x8vwwX6DWmOJeVaViMXmAUC0uJGT6norpucVUd1q0k0EMQwa8 0uO5o8+HZGNh2u/Dc8kvV9molnxQEC8vW+uO0fTG5VLfoAu6KUKKHx0lDIxcyV74IuQoM6 9BCTVMG/l1CJ0HsRColyVcVMj+LOP+eSBxtorn8uBy5w3c8pg+6a3z0zNBGKbmysvFTZ/B SR8A72hKbVzQNDLdzGpfZR4spEc3SnHPU9TBtjKwscROt6OBkszS0PCIcrzPoVFToMjY9t cRy+AiiWEFTSYKJFRW3/55P94Os40iLy9fhkNjROkTqyZ8h3sl+4hq+uPOltLQ== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:57 +0200 Subject: [PATCH v2 05/18] mtd: spi-nor: Move the SFDP header structure to a C header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-5-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The sfdp_header structure is currently defined in sfdp.c, whereas the sfdp_parameter_header structure is defined in sfdp.h. In order to ease the reuse of this structure outside of the sfdp.c file, move this structure to the sfdp C header (.h). Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/sfdp.c | 11 ----------- drivers/mtd/spi-nor/sfdp.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c index 285ac781fba8..e18bfb7d5dc3 100644 --- a/drivers/mtd/spi-nor/sfdp.c +++ b/drivers/mtd/spi-nor/sfdp.c @@ -34,17 +34,6 @@ =20 #define SFDP_SIGNATURE 0x50444653U =20 -struct sfdp_header { - u32 signature; /* Ox50444653U <=3D> "SFDP" */ - u8 minor; - u8 major; - u8 nph; /* 0-base number of parameter headers */ - u8 unused; - - /* Basic Flash Parameter Table. */ - struct sfdp_parameter_header bfpt_header; -}; - /* Fast Read settings. */ struct sfdp_bfpt_read { /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */ diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h index e8ed814c6530..2cbe22246c5e 100644 --- a/drivers/mtd/spi-nor/sfdp.h +++ b/drivers/mtd/spi-nor/sfdp.h @@ -149,4 +149,15 @@ struct sfdp_parameter_header { u8 id_msb; }; =20 +struct sfdp_header { + u32 signature; /* Ox50444653U <=3D> "SFDP" */ + u8 minor; + u8 major; + u8 nph; /* 0-base number of parameter headers */ + u8 unused; + + /* Basic Flash Parameter Table. */ + struct sfdp_parameter_header bfpt_header; +}; + #endif /* __LINUX_MTD_SFDP_H */ --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 608E3442387; Fri, 7 Aug 2026 10:14:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097689; cv=none; b=dmL+5T9dIP/KpDLcORjii3H+xiFUDCdOoEHUzpPreA1KnNtS0i7AgqRLAf5kLJr9UfMowykkCCwuSwaUtRepUMt4kXcgXImtCIHfyhkmijN1qOjqFSqxYSmo3tGv1VhKJIxBPXZIdnVkJ6EjONOkAMlJSyZrnHgCDa3BGlVfSpU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097689; c=relaxed/simple; bh=kPttI1mJE++/YhsJPPP4ZDGoGl0H0jP8r0eo+074dMo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jBzLgyzytRbNKOjgjeWL2/PG++8cXl5mQa65XWw92WfU81NktLJ39OoTuKXlP7YKE9xIKPPTXeNGfPO+5JKXlqSBpPpGfMsv6uhx4TxNRUyzpxR7RZ3PjTMVs0Wd49n5QwS8GNzKFz6j8bmyeUVOQydVZAq26mD67MyQ/TxqjTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=lvS2hipM; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="lvS2hipM" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id E43C84E41136; Fri, 7 Aug 2026 10:14:43 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B4E39603F0; Fri, 7 Aug 2026 10:14:43 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B06C811C37523; Fri, 7 Aug 2026 12:14:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097678; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=YWnz58YfuThg2Y1pxrGRLMdb8YcgIGotzUnz6k9q4no=; b=lvS2hipMDSYWOxnkxqgr0rihSyMb51oOPYbpTZ4iqLAnGaT5lpSo5e/rLi6KJURUSZenek H3WQmnn54ru8pcpkyaswNXicHCqaveMZWCjxxYodH9WrOrS5hIYYxEQgQrRypZQ96vNYHn ZGkgeq+k4prALb7zW+IeaDrmYKOwJfeV3l0S7X3fXvPchJQVGhP3CU/Y37JvjAwXoI9Qys E/HKQZ9EFCSb0ZlDmboBz/eiPrVb6qGXCIdPhV9HwBHIVMKCB/71Dk0Sf96dpJPVBlWQTg iYlpNLYEF2N4iAud8XCLhU4rp7ZF09ON4wEaHxUSB8ikaA/Q2eetsFSm1KjxmQ== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:58 +0200 Subject: [PATCH v2 06/18] mtd: spi-nor: winbond: Drop the .name entry of JV chips Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-6-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 This is a legacy field. It is often incorrectly filled and will soon become very inconsistent due to IDs being reused. As an example, chips ending with JV-Q or JV-N and soon RV-Q and RV-N all share the same ID. There are comments above the fields which already list the correct names being supported by a single entry. The names not being part of any stable ABI (they are not displayed through sysfs, which only shows the mtd name being spi-norX.Y), they are only available through debugfs, so let's just drop that field when it becomes a problem. Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/winbond.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 01a693033448..88fdcfeb6eff 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -200,14 +200,12 @@ static const struct flash_info winbond_nor_parts[] = =3D { }, { /* W25Q32JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x16), - .name =3D "w25q32", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { /* W25Q64JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x17), - .name =3D "w25q64", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, @@ -223,7 +221,6 @@ static const struct flash_info winbond_nor_parts[] =3D { }, { /* W25Q256JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x19), - .name =3D "w25q256", .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | @@ -232,7 +229,6 @@ static const struct flash_info winbond_nor_parts[] =3D { }, { /* W25Q512JV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x20), - .name =3D "w25q512jvq", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | @@ -304,35 +300,30 @@ static const struct flash_info winbond_nor_parts[] = =3D { }, { /* W25Q16JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x15), - .name =3D "w25q16jv-im/jm", .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { /* W25Q32JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x16), - .name =3D "w25q32jv", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { /* W25Q64JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x17), - .name =3D "w25q64jvm", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { /* W25Q128JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x18), - .name =3D "w25q128jv", .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { /* W25Q256JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x19), - .name =3D "w25q256jvm", .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3982E41E6D0 for ; Fri, 7 Aug 2026 10:14:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097691; cv=none; b=OBwS/0TmwyvPOJVZ7MRhKKfbfyG20HR+XtvzoZo0cgIgocPqnJWRONORjdROyILy6WZ3G8hIpwU9aKcYTTfHP58VR9reu+ZrHqgxNx29y7VSCIAHwTsfMq25zUypTgGjCTRRLm/yFuEIQm2yMYpTTyPRkjbS/4k5UdZMBXsjn1o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097691; c=relaxed/simple; bh=eEMJtAcuMqQly/BRgYgEBzjmJGfpimlSUNTC50wBfno=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NyyCiSbQV6cBewvVkBOX5jG+ANVXBWnH4u5vQQl2d1Ut07coK+/ar3Ya/DOsOi+TgoFX9t8BkKq4mVJQMwkKr/H2z5awK0+8CB+viOBxryLoNtef9wYLheefYgk98nPx9V4ULAPfRnDwA6iqu5NF+CkvXSEqbh372Eiy51/yqZA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=JMnt4LpY; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="JMnt4LpY" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id D64BC4E41135; Fri, 7 Aug 2026 10:14:45 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id AC3EB603F0; Fri, 7 Aug 2026 10:14:45 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EA26A11C37522; Fri, 7 Aug 2026 12:14:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097684; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=CCnWmu2IaytWEMKT9b2rEoGBZ2nU4VIOP0LJLS5V8Co=; b=JMnt4LpYCmDNFDGJeeybok1Yf/rq3y4pFkoJwLUQDoYOpehCMZSZRQCksCGyDHSyaNk3N7 mClFfEztcN5YrzjfO7LRkUrGXOrNZt/Yvj4P5+NW8AMilsJtCCMbtb1ZfGfOvjAshbXDrG ASJc/LkrhpCPoSMxNozMyo1t6k9HWhC6XBpA7Ftx3vWBNZ0s1wK5p8N0z1fEeGrd/lg8mZ SGOdZnE0aQuYIXwDR6vjalZT8fNat644F9h1HeV89UHkVJgsH0y7rJI2mcczWVDOl6aGca o3P2aFnX9F82LvWwEgXcR5D7TiyJMcSCSkExp+MhanJ6QWyJwBm9DzJmpnv3Cw== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:13:59 +0200 Subject: [PATCH v2 07/18] mtd: spi-nor: winbond: Add support for W25Q32RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-7-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4016 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0144eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001432010183e314c2e96376337a757a75 f7a2d55c39f66dffe930f8800000000000002c0000000000f6f4ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 2c0c54d6e360dae30b72615eac5f0faff59463aeb2237d46d08d6cfd77d6c9f6 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/p[ 84.112272] random: crng init do= ne arams name (null) id ef 40 16 00 00 00 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-003fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 4194304 (4M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_read2 9f76d5d40e1d8fc620967a019cc0cf223a3b11cf9c5bed9a02fb8e2c06b1c805 spi_test 831e9e5cc6efa7d3afe7b0584100549d93b9953d64ad237fd1df15f790f23ae6 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D4194304 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 4063232 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | unlocked | 62 003e0000-003fffff | locked | 2 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | unlocked | 63 003f0000-003fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-003fffff | unlocked | 62 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-003fffff | unlocked | 63 + all_but_one=3D63 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-003fffff | locked | 63 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-003fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | locked | 63 003f0000-003fffff | unlocked | 1 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | locked | 62 003e0000-003fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 88fdcfeb6eff..913d1b112c9a 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -198,7 +198,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, }, { - /* W25Q32JV-Q/N */ + /* W25Q32JV-Q/N, W25Q32RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x16), .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB649469826; Fri, 7 Aug 2026 10:14:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097692; cv=none; b=cqdwRHr3FN88qCk/ZrQgfbHGXHc+E3j1oh2w7AQxmu4OeYNtpSDqiE1NKnX/aFfxbPWCqRlJSKS3v3s68IMLWMJNwCmZzYSMIXIJ6MLkQI67ywEUG4IHd6caDIqibCVfatT4AaXlQ4+fWsTwRnaOojmEw9N9h0FjEGe5Rt6CbG8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097692; c=relaxed/simple; bh=5t1cytKHjZqzh/R/GaC3QKZQESznJuteKm4qdefkgdU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JVEmKh7U17EfZwl4o1OLSrREhQ90iYIlMOU8nMLKVzhNWFS7cKW3uxpdPf5ctoa9O2ITYTKpvq8o2y8pSRBqRrIEJs0cd1VCx9o1+S/w3973A57nU3tQBiweFNrQxi91MYiFpo1Cf8VjiptIzeh8TIjXxrnAYUyt2j1VuFkU8IY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DbxccnXM; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DbxccnXM" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id E3F244E41137; Fri, 7 Aug 2026 10:14:47 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B9D35603F0; Fri, 7 Aug 2026 10:14:47 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0D53F11C3750A; Fri, 7 Aug 2026 12:14:45 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097686; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=24DTu1+YPFzXGK3rN7Hy9udZnDlRT41WNTA/xvdH1aI=; b=DbxccnXMxaM67o4WnrVOXOZ3HX1Y/BYtkb3NVA0y9R56TxT9qFPGikgHfYosCvbNWEr4Kn JAI0071Aipp09WrKTrfkto7tQNsddfWRhPZbtgyU8TTV3F3/hV8qIo/i04cJayUkz9rub4 m2sTkUUTiqqSdleuBXwLD6Qp18DNcWhqTB+Pqnd6Bz583mLXRwi2Krrp3lmYVp4qbyvKpl 9w0PsOvgPaNwAYEv7jeIvO8xrY42gFinEslqh1tM2G1MPQ1YQyByY6xlyc+L/oFSy18/4S iGH4MfZ80MNKlO2cp2w1dgkHY/XZl6Cg+rEaDkzYOWfuHS1mdq3LmtftadtWNg== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:00 +0200 Subject: [PATCH v2 08/18] mtd: spi-nor: winbond: Add support for W25Q32RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-8-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7016 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0144eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001432010183e314c2e96376337a757a75 f7a2d55c39f66dffe930f8800000000000002c0000000000f6f4ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 2c0c54d6e360dae30b72615eac5f0faff59463aeb2237d46d08d6cfd77d6c9f6 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 16 00 00 00 size 4.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (4.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-003fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.820716] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 4194304 (4M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x400000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_read2 c73e2828631d8f745c118e706e4ea7179328e6e03e49cb2d30784eb73ff6167f spi_test d26d11f7de825c1f2397e52307997c9befb07b93e6cd520d15a87d06abef2529 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D4194304 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 4063232 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | unlocked | 62 003e0000-003fffff | locked | 2 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | unlocked | 63 003f0000-003fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-003fffff | unlocked | 62 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-003fffff | unlocked | 63 + all_but_one=3D63 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-003fffff | locked | 63 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-003fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 63 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003effff | locked | 63 003f0000-003fffff | unlocked | 1 + flash_lock -u /dev/mtd0 4063232 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-003dffff | locked | 62 003e0000-003fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 913d1b112c9a..c97506625d37 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -304,7 +304,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q32JV-M */ + /* W25Q32JV-M, W25Q32RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x16), .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80E7246A5F4 for ; Fri, 7 Aug 2026 10:14:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097693; cv=none; b=rihRKF04Ekucx4uf5WcEbIEbvEBD6JAPhyP3Op/FyevRIyYSqmewAE/NU/iT9E7/1liEX5enaf+vL2t5sD+K8Qpi7gF7CtWls4QElvLxSGC7OWjKWCilEBR3O/VRBqerJznoZc20t5XJ570WOFLzx162kG43AMxUES39ZSa2Nt8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097693; c=relaxed/simple; bh=nptzCdkuN7zlEIXOKKD3pN+0T0bDoWDE96Vq8Wwu6t4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EZppSQ6hnOq7c8XgNyB8ej0SRm1xgUR+rmUxhRPJV7EvBgrEQf8dITMok+6uAfAgqmFE0Ef23drDtAOXXXFrOyzyuaRRKjkAwtOLrOHGbZCJZsaqt3P4Ppfw2fRIRMDzXWQ3a2z3kQOxIoYs8r4EQ5rUq9yaZwEtCsv3sfgSLg4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=xgdDAp8y; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="xgdDAp8y" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 0CF671A14A1; Fri, 7 Aug 2026 10:14:50 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id CE56B603F0; Fri, 7 Aug 2026 10:14:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E953311C3751E; Fri, 7 Aug 2026 12:14:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097688; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=sHXb+Jick6Yrjgho7aqAZcPHfZLf2doVcbAnR3COHfc=; b=xgdDAp8yI9GZKSZku0mbiAS0Vd169vQ/5WbcPIueHKZbhZZUU8/TEQrESIVjXQE+fUkGl3 cy3jSVPWS4YIonQKLPahQ2EUvc3Sqf7a0cKnh58SY5Q8fE4O4OMiLlnMxk7g+ZY3T+wTbt qIrCq9GoRcWowHAxTHzapLZyk34c+8Ltv0YXi6cNOSdW2jXocu/RLnOc/N9emV1kYuRR7a PnhTBxRfu616BHxrAUpnA+fxHlywQzQRP7EjyKSZKQqGlJRWyFrxH1iGWO6L+lGhvvsuAR 1W8cm8zj94JnzHqUPjfxjOEHK+lc5kf9x3I7BpfAQk7XeGo/LRZue7z5nSbh+g== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:01 +0200 Subject: [PATCH v2 09/18] mtd: spi-nor: winbond: Add support for W25Q64RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-9-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4017 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614c3e96376337a757a75 f7a4d55c39de6dffe970f9a50000000000002c000000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp c7fa99bdcdef9a930e609215704dd349dbed161487dee0ece8ea1b25d2d4dd25 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 17 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | SOFT_RESET | NO_WP |= HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 7.803395] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_read2 eca2ec05a4fbf9f14490a0147e43c8f3616298bf8f6e2b59f5c5e5076c1cfd02 spi_test 64f4a5c5a05eae4a6dffb9e76171d97328257a96110214f52222870681b7b28c spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index c97506625d37..5b65076039b6 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -204,7 +204,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q64JV-Q/N */ + /* W25Q64JV-Q/N, W25Q64RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x17), .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE02846D0BC; Fri, 7 Aug 2026 10:14:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097696; cv=none; b=H5NJJtYrW2CvQeQScaEATmBjHvp2GA92K9jHFLO2XPmij5r6nSGrV6CKLCsvAhInigOkYeGvJPMQQap1osXJrTlmoz24002ZvD6aLZWDO0sNibQHjNp/jcYG6jLLFaIA3kjeM/SLvFDnr/C7oJLgzl5p4bh6GyVC3m4Haai8kAI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097696; c=relaxed/simple; bh=hoTo9qnZx3Ti+/44cObiDFIEPdQxfyTWTGoeZpeYS5c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PWcId5/vcZyFIO0atOrMBkRr5H+B3UTSRm6ccHLrwfdgtKPxdjv4G3Y6f4ZiQIL4itR4MTte25DuekKqa/klkmTqTQJTw/hDy5Ugsy+TloWCoBaWTJssrzixDBp62ZU8OL5qRutbRCxwjfhKW2W+rMlIznk/hFkh5dNmnnFbY6U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=A6XofywO; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="A6XofywO" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id EED1B1A149D; Fri, 7 Aug 2026 10:14:51 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id C4A84603F0; Fri, 7 Aug 2026 10:14:51 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id F1F9C11C37524; Fri, 7 Aug 2026 12:14:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097690; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=AcYwYYNpILBmMCdg88x5cyRYuGpoSoUo0Ye3WyoxUXM=; b=A6XofywOml5L/kUHYyaWB0QPIe4xEzP6xarXJw2NEn286hNY7ZleX+jIIIQ2uFBMc76qXK 2sCmUKkC+XYkD1V/VIZ9cDQuDSrbw32lIdiRfrqW50Y1en5QiuKnuSIdh0XBjkNepYhkSI wG1TOP6YqSK+d5OoZcwA6W6YQ7GrJvvvyP2v24Eo835oA62g+wO3Lucz9J8sBp4yEglGlS dVVvlCZ8pLr5xFo2NxzW5RAWGW5u6zCxC90DUdtXJ+8lJsK4NftamyHBypQtbXuAl640jn t+3ApJHLg8W0v6VlHfL9bVa7e3pKfRaS8YpM9K1ZNhWVJBL65rctHaZV2I7y+g== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:02 +0200 Subject: [PATCH v2 10/18] mtd: spi-nor: winbond: Add support for W25Q64RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-10-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7017 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000d639a50081d614c3e96376337a757a75 f7a4d55c39de6dffe970f9a50000000000002c00000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp ef6c5eb61fa86c6daac85436446b97ca078a46e4cfd4c0fed4c9f9400d79fa86 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 17 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | SOFT_RESET | NO_WP |= HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.931750] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_read2 d4a37ad2760e69823409d7e9321471b7f7ed6728d40f7f15329921fbe7393db6 spi_test 154432cc7e89d18c1e4ddb1604dfd2a0038c75aa5521a74808944ce19a320a42 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 5b65076039b6..32122420b804 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -310,7 +310,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q64JV-M */ + /* W25Q64JV-M, W25Q64RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x17), .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F74C46C822 for ; Fri, 7 Aug 2026 10:14:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097698; cv=none; b=mESdg4mPhbqUbaqvF0V6twKQeAQcSVKoeCrxANjrLb5Yqb9SGPRNZs28/pVymPVFFq1tiZlkYu+hmR2sSO2vc9LrLbD0enHpe23e54mQGX+R86aMkonudwQHXljY8NHY+unOjqAzQSXUlNtHSdPG2BRibGRN1miwTKKta3OQWho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097698; c=relaxed/simple; bh=n4H7QvPZlDowzZ7lTZ4suCZzvjzjTw7C5o1/er1M6Vc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=h/4oc7dB7gdVGUHlGG3W+l4Jr5/wF6xY7c3dq852y05puMZqjPisgobsO5a9a39YL68AFmUgv9UAHNYJEbMu274NXbjmKn+4Gvtdw3sj2hLLZbUGSCud5dO8KL5FDZwIeCBL0JhtLNrpb5H10n6NqPJNzresH2J9a+quhFVr+a4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=reJVCNLl; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="reJVCNLl" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 0B1C51A14A0; Fri, 7 Aug 2026 10:14:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id D4409603F0; Fri, 7 Aug 2026 10:14:53 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2C56711C37526; Fri, 7 Aug 2026 12:14:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097692; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=CDlNZY+jaZsOMhf6RJO/UoYnRG2lLDfbfRoA0oTOHFU=; b=reJVCNLljKbxHuzywmGeJjCiHe/+5jUcx5Xp/ZP+lDagFK16B14DIdyULtdhhRCplXRUCb ehGKVpgZiJfOF0pKNG/wmZrpuPVfVss1YrpjjgJrAnL63LLUx5wjCb7L+krkBTsNqINuFO 5lBvKMjUx7ycVSCMolWKwJAGrkzbGVxQE33WhoDkdrnN5Skq/PLkbFd3L91o2RPE8REmVO NKxDvzivs0DxWJWN2i7Qs8+P1JAah/iFKSNHJrAaFzfRXTWmTYkaCJ3Fn+tsx+qr8yeqJO db2IhH5j2F+VEFVFxrT0QLrusByFBGnoc0SKynpKszp8O6Ls2j496wAAah5qHQ== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:03 +0200 Subject: [PATCH v2 11/18] mtd: spi-nor: winbond: Add support for W25Q12RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-11-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4018 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000142a010186e114c1e96376337a757a75 f7a2d55c39f66dffe930f880000000000000ac0000000000f7f5ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 94b52d6e903a2046e144eab0760384b6932c6fdbfec17eb7336f1778c3898daf /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 18 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 15.791564] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_read2 b3260b68e0373cd253fc558fa9a5c89009d3edb2393f4110702318f69a6d74c2 spi_test 884cedd0494868db17c609edc62e2471ef344025e30cd511fa28b41b9b50e50d spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 32122420b804..0ae16f5b0ec0 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -210,7 +210,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q128JV-Q/N */ + /* W25Q128JV-Q/N, W25Q12RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x18), /* Flavors w/ and w/o SFDP. */ .name =3D "w25q128", --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D33646E003; Fri, 7 Aug 2026 10:14:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097700; cv=none; b=BFfs9s2Q26JtfFhFGJNCRMc8jl8AnLtIHFLHo0ZzIW5adHtJBABtue2FzXncQdQABDzuiAe1ScMoOd13R9e6qrAdAwWf2MOyglK3MZ8SBS5sVQy6uOpTbScUXfxgaNXjaGwXx1HkHgTh/hS2iKTMkojfZCx0ceSSkQTd8crWCQo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097700; c=relaxed/simple; bh=Yoqm+oQ9EChw00qkT4Emfk5tUGpLMWBRUKvnmLm25Xs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pORwTKJmPKAOSQtNPsl9RPBWKGKxzcWqweLYou9c6MoW42gRdSd5gSGI3ARuvN5T4/4n+nbUBMs4pj85OrmaByFuPuAAH6HnxSvM3im9ZTtbJH1jYnibFjZ/Apxa3/tXvYXiT+pXsQpbsWBoPHf1rLPPHfZvbO7zehQn3WUAX5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=EXeUl/N7; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="EXeUl/N7" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id E96F44E41138; Fri, 7 Aug 2026 10:14:55 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id BEB4D603F0; Fri, 7 Aug 2026 10:14:55 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2FCBF11C37528; Fri, 7 Aug 2026 12:14:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097694; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=TwEo7pYtTlcmMY/OwQ1tl+YaMb/sOYDGRqXYr9hb8r8=; b=EXeUl/N7YmgOcsVAWoGP8lWY9kXWGJ83XMAHpXNonI0pp25peSWwT3RiXI26nkPp9iUEin pQuEcPv0jOeR3yeyOrPIYl5g6Ht4LT3Jw/z3pRIco59Pj6tCE+cOwzBiI3e9Fayydf/EKr Tcy+/pT3LFIlPvf/Mh7vRFDavTbdV3vYCJoyKSSzYPEyhqgycDzo/X7a9++T4TTT2iDGkR PHU2QFXdSbXYZloHHGkGTSZuIyKfr/D2CE6S5VxV8Y6tljORPxiAXzWRn1rkBReeKQ/UOT HwAHRhzU6QyYwctNdiIdeY0Q7x/H1n2Wu56rJ+Dima8cs7hZXKEQB44V4Iwfng== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:04 +0200 Subject: [PATCH v2 12/18] mtd: spi-nor: winbond: Add support for W25Q12RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-12-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7018 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0100ff00080117800000ffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f9ffffffff0344eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d80000142a010186e114c1e96376337a757a75 f7a2d55c39f66dffe930f880000000000000ac0000000000f7f5ffff0f00 0000060d44bd27ed080d + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 94b52d6e903a2046e144eab0760384b6932c6fdbfec17eb7336f1778c3898daf /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x03 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3b mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbb mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6b mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xeb mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x02 1S-1S-4S opcode 0x32 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 18 00 00 00 size 8.00 MiB write size 1 page size 256 address nbytes 3 flags HAS_SR_TB | HAS_LOCK | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xeb dummy cycles 6 erase 0xd8 program 0x32 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 20 (4.00 KiB) [1] 52 (32.0 KiB) [2] d8 (64.0 KiB) [3] c7 (8.00 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-007fffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 28.249430] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 8388608 (8M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | unlocked | 64 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x800000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_read2 48b1df493c0c35b1c6c8a50880c6e10adcd103c383a7324033cb760d20d9acf0 spi_test df6c52ecc59473c5ed9bd10a0479b52ee248adbf7d032aa7cde35e86acd461ca spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007fffff | locked | 64 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D8388608 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D64 + ss=3D131072 + bps=3D2 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 8126464 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | unlocked | 62 007c0000-007fffff | locked | 2 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | unlocked | 63 007e0000-007fffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | locked | 2 00040000-007fffff | unlocked | 62 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 1 00020000-007fffff | unlocked | 63 + all_but_one=3D126 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 131072 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 1 00020000-007fffff | locked | 63 + flash_lock -u /dev/mtd0 131072 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0003ffff | unlocked | 2 00040000-007fffff | locked | 62 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 126 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007dffff | locked | 63 007e0000-007fffff | unlocked | 1 + flash_lock -u /dev/mtd0 8126464 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-007bffff | locked | 62 007c0000-007fffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 0ae16f5b0ec0..0746e157713b 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -316,7 +316,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q128JV-M */ + /* W25Q128JV-M, W25Q12RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x18), .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, --=20 2.54.0 From nobody Tue Sep 29 13:21:06 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C85146E008; Fri, 7 Aug 2026 10:14:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097702; cv=none; b=o9SPvowfarmsVz0W2Pp/hekriHINaoU+KkcMpsIAIikdacovvfGclZsuwskW0+eu9gQ7IVuP2u+M9q61vbQhklIo/jcCC4lp+GNCdMY/YULVzyq0XjeopTA/V6MLWyaFAkeBQNdzkcseI58J2mh3D2D5YXsNNtOBkKVM1CpHusk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097702; c=relaxed/simple; bh=GCVpaXA4CuOBvIyLj2a57apZ4Upp/E5Ubx/GaKBcCUg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QSEX7/t/s8Q5ib79wzpLkoqlnHymoC2jI6bnTmPy3bgaC+FlZD4wMPtsgV6f9n8y1xoFKUQfCC0MfDGbSBVe4FWsc/C3xezL2tlhjmK2FaTMmHWpD3YKnNbgn9ULUwl60ywhTPYZEvL3NH5u/w2TEx895GgfXDiCWWCsuireG2w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=blgtyt2+; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="blgtyt2+" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 5B26E4E41135; Fri, 7 Aug 2026 10:14:58 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 313F4603F0; Fri, 7 Aug 2026 10:14:58 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 197F311C37527; Fri, 7 Aug 2026 12:14:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097697; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=EFf/ZBfcMUQ9E0/U5ehfk0fnwb3y2b+VtUAQgtf93GU=; b=blgtyt2+BwQvSj5MGjHBNJVw5ItheNvXXnERbkXJ0MInlo+LIrK8yU0TM5EP+A+eAldKn1 czDc9sMU/XxZ7ZKXj9UeyJpx+hyrMiirfEQLK7kRbCxmiWaBDrz2xk1eM/SMOTD4+5n77h fkqgHoyFJEfdBxeHN4uAAI3YX6paKWrpb4CUqQdep7Ofh/vc/4kQUxh17VyAN4orMj21vx Qgw0W2cg9lD7I/kXq/7ojm64XIKem/uSQsm1UIdf6hwIGoZg0LOgL4P4NLboWnySAM810J sbcuXc/0RKc0bq3OYS0/0OARaYIZZ+VR7jObcvxU/kCg19U6174tICT0HsO0HA== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:05 +0200 Subject: [PATCH v2 13/18] mtd: spi-nor: winbond: Add support for W25Q51RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-13-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4020 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff1f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c0000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 74d21fecc7faa297b3f77f1136b1dc53f78b2a432629e226675b6384153fd9f9 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 20 00 00 00 size 64.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-03ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 25.427347] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 67108864 (64M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_read2 cd699acc82353b7769b98547efed68d5300854ed0bbc84bf831b07937bf941a5 spi_test f506020804f91fb750e8250e091fb2f732319221a645ed575e1b6ed3553d584c spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | locked | 1024 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D67108864 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D1024 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 66977792 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | unlocked | 1022 03fe0000-03ffffff | locked | 2 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | unlocked | 1023 03ff0000-03ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 58720256 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-037fffff | unlocked | 896 03800000-03ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-03ffffff | unlocked | 1022 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-03ffffff | unlocked | 1023 + all_but_one=3D1023 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-03ffffff | locked | 1023 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-03ffffff | locked | 1022 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | locked | 1023 03ff0000-03ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | locked | 1022 03fe0000-03ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 0746e157713b..cc5f3fe77fd8 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -227,7 +227,7 @@ static const struct flash_info winbond_nor_parts[] =3D { SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, .fixups =3D &w25q256_fixups, }, { - /* W25Q512JV-Q/N */ + /* W25Q512JV-Q/N, W25Q51RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x20), .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, --=20 2.54.0 From nobody Tue Sep 29 13:21:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04B3946EF97 for ; Fri, 7 Aug 2026 10:15:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097705; cv=none; b=bgBCLwti3txQEZrKrF6kuLUZ3I0UAXz5BprdMpZJlkh+GkAFjhLas053jAUQfLt+3c2NYelcOvv4+vloYxwJpGuIjaTtSvWefSssK0GfnV9G6SjdusgJcnK+2oELE6ZIAMVtQnQXZ+nKMDuWla4VSJUR6Z9++f8yHkX1POgFJ/c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097705; c=relaxed/simple; bh=TtuxzIG0mhWVs3VVAm7W069JnZPxc1KQTqwurGP2f9k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EEGLpOqWOVgOeRuxGCsVGZx9C8aSzzqW4v9oHXRwr1zdf/Qj83+q6Iweq3Uev80hYzodUoNOR9DcLbVfJmKfXACyzWwJWnsvITGP/I+zaYV6zE8Q2KIfCd/gOC9qvhwWIQl+XZarvwcYhJDl+R1/5HnRMCJyYr6aeKybKNy+XqI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DAQNoqDh; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DAQNoqDh" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 8E5851A149D; Fri, 7 Aug 2026 10:15:00 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 5C1D8603F0; Fri, 7 Aug 2026 10:15:00 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 707ED11C37529; Fri, 7 Aug 2026 12:14:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097699; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=G7r12F6R2VwNLHlJZmc383uLbYGyjRKIzLyS8DX8AYs=; b=DAQNoqDhUiAtITZ91o+bYyfQO3oppgsk6cPFnvN68uvrX07y+s0/c94gszVErBnzHDq+HL 3f4jRpfMvrl8pfulS8voKvCykvdibPclW1rVD6L7P1MBoOYndiFbbe6q676UN4RjWuSFLt DMpMQ0YW9IAt3kCyrfKKZ/CtwTGS0RSSf3dqmDmLyZBdRBNYVm6RVZreL0rrMarGJ1HxGl 8CTlond6q6+GFGccacj8rarlRjtKQwMuZG8m5gt4Z1JUty8mJl/kz448LHuHkaoApV5XZf e72eyepJEf+SB3ztnQVjTiO7G3S84I3aBQwjug/DiW7UByj/xUmVgMtaS0ig7g== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:06 +0200 Subject: [PATCH v2 14/18] mtd: spi-nor: winbond: Add support for W25Q01RV-Q/N Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-14-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef4020 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520f3ffffffff1f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde96376337a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c0000000066ffffff0000 00000000000000000000ffffffffff0a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 74d21fecc7faa297b3f77f1136b1dc53f78b2a432629e226675b6384153fd9f9 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 40 20 00 00 00 size 64.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-03ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_read 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 67108864 (64M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_read 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | unlocked | 1024 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x4000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_read 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_read 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_read2 950cbc701e7f6ed69837b30bbf4145fe776e6c07a7bc5b8f346d42242bdd7a63 spi_test 643412dbe0f46c2780ec8d4f609d369923829945f4bc3d7842138b2fbbc86046 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03ffffff | locked | 1024 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D67108864 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D1024 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 66977792 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | unlocked | 1022 03fe0000-03ffffff | locked | 2 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | unlocked | 1023 03ff0000-03ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 58720256 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-037fffff | unlocked | 896 03800000-03ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-03ffffff | unlocked | 1022 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-03ffffff | unlocked | 1023 + all_but_one=3D1023 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-03ffffff | locked | 1023 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-03ffffff | locked | 1022 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 1023 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03feffff | locked | 1023 03ff0000-03ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 66977792 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-03fdffff | locked | 1022 03fe0000-03ffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 53 +++++++++++++++++++++++++++++++++++++--= ---- 1 file changed, 46 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index cc5f3fe77fd8..e8098f5e59f1 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -128,7 +128,9 @@ static int winbond_nor_multi_die_ready(struct spi_nor *= nor) } =20 static int -winbond_nor_multi_die_post_sfdp_fixups(struct spi_nor *nor) +winbond_nor_multi_die_post_sfdp_fixups(struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header, + const struct sfdp_bfpt *bfpt) { /* * SFDP supports dice numbers, but this information is only available in @@ -142,8 +144,45 @@ winbond_nor_multi_die_post_sfdp_fixups(struct spi_nor = *nor) return 0; } =20 -static const struct spi_nor_fixups winbond_nor_multi_die_fixups =3D { - .post_sfdp =3D winbond_nor_multi_die_post_sfdp_fixups, +static bool is_w25qxxrv(struct spi_nor *nor) +{ + struct sfdp_header *sfdp_h =3D (struct sfdp_header *)nor->sfdp->dwords; + + /* + * W25QxxRV chips re-use the same ID as the W25QxxJV family. + * + * Chips are very similar, W25QxxRV brings mostly performance and power + * consumption improvements. The RV family does not require the multi + * die fixup. + * + * They can be distinguished based on their SFDP minor revision: + * W25QxxJV: JESD216A, minor revision =3D=3D 05h + * W25Q512/01/02JV: JESD216B, minor revision =3D=3D 06h + * W25QxxRV: JESD216F, minor revision >=3D 0Ah + */ + return sfdp_h->minor >=3D SFDP_JESD216F_MINOR; +} + +static int w25qxxjv_rv_post_bfpt_fixups(struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header, + const struct sfdp_bfpt *bfpt) +{ + int ret; + + if (!is_w25qxxrv(nor)) { + /* Only 1Gb and 2Gb variants are affected */ + if (nor->params->size =3D=3D SZ_128M || nor->params->size =3D=3D SZ_256M= ) { + ret =3D winbond_nor_multi_die_post_sfdp_fixups(nor, bfpt_header, bfpt); + if (ret) + return ret; + } + } + + return 0; +} + +static const struct spi_nor_fixups w25qxxjv_rv_fixups =3D { + .post_bfpt =3D w25qxxjv_rv_post_bfpt_fixups, }; =20 static const struct flash_info winbond_nor_parts[] =3D { @@ -234,11 +273,11 @@ static const struct flash_info winbond_nor_parts[] = =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q01JV-Q/N */ + /* W25Q01JV-Q/N, W25Q01RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, + .fixups =3D &w25qxxjv_rv_fixups, }, { .id =3D SNOR_ID(0xef, 0x50, 0x12), .name =3D "w25q20bw", @@ -336,13 +375,13 @@ static const struct flash_info winbond_nor_parts[] = =3D { .id =3D SNOR_ID(0xef, 0x70, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, + .fixups =3D &w25qxxjv_rv_fixups, }, { /* W25Q02JV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x22), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, - .fixups =3D &winbond_nor_multi_die_fixups, + .fixups =3D &w25qxxjv_rv_fixups, }, { .id =3D SNOR_ID(0xef, 0x71, 0x19), .name =3D "w25m512jv", --=20 2.54.0 From nobody Tue Sep 29 13:21:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 575A930E82D for ; Fri, 7 Aug 2026 10:15:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097706; cv=none; b=u7vBhUH2QFrGXLGpAkOA7yodTxNLNayW70IxcDYCGbtnLDMo9m3bRTAKHcXbjDmIg4aO5AqA+B7Ec2SyEL7gWFiEXU1/9QF3NJJk6i/IHPVcwsE/N9pPSwNa4od8Z7wRt8EsdTOQtmnaJdaaQRbfNyqiZmJGwg8j3pJ3wtM11NE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097706; c=relaxed/simple; bh=TuMIGC6ffL1g1EgkPGyjcfUNnv1z3HVfm+DP9q5ZDGk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=U/Ij9XtkMJKTCPU95AuWaK1NLnRO5okBm7lrMvV/GsSStW0gkhXhuFHyEtaKsJdlZ0ExdI4Q3ALXLah/D41JbrQSszUM29msrzOscXWTA1pyZEN5m0uIIZyefQFzVkGdG7B709q5BTADhuFsjkqOaaGS0bPxxPdY6ohC6pNSYIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HZ/j7Yhc; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HZ/j7Yhc" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id D3EA51A14A0; Fri, 7 Aug 2026 10:15:02 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id A2691603F0; Fri, 7 Aug 2026 10:15:02 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9D36E11C3752A; Fri, 7 Aug 2026 12:14:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097701; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=t/w0fsvpKPXzdxD95xiTo3fFjYKeuydLmzklfgvAn18=; b=HZ/j7Yhcg5R2EboTYOcwGyTTuuhYWNMIs33T24yMQ0Qx+QgqP1BAD6F0W0nUbO/ysB9Ayt 01d8ein4kSx3ROGPnTw5XjyUeMMKsPecT6hogBAmo3MfSeNJGZz1dsIXLryYaKVrMmuVRg r5SrJgaWNpcZxr8xKLi14ymPe6wfVBsmovyuH5yjAtAccveoTcb3N/uzvleOmlqRhLMwS1 lhpX1rAELpgF/4ExMfz1sJ519m6P0o8+NUynSEWjcPY9klyoLT2otID3zjZwMDH4qexl/J uvBVEkd9/CB7fR/OHu0tKgT6DF/JaWHF36+NM7YvkMriqPstz/GGfueYsyIiGA== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:07 +0200 Subject: [PATCH v2 15/18] mtd: spi-nor: winbond: Add support for W25Q01RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-15-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7021 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff3f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp f0ba26954c84f126916616ac4311057151ea46cae2eda1752709c3a5adfe4b55 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 21 00 00 00 size 128 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (128 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-07ffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 19.799786] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 134217728 (128M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | unlocked | 2048 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x8000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_read2 89d206670689b1bdd4688313bcc0ea3ac67a9ac055e75fd76220387c9e4fde3e spi_test 792b00a5bf62350ee8f4868980820577046401c3e6f79075ea636034cff7cef2 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07ffffff | locked | 2048 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D134217728 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D2048 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 134086656 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | unlocked | 2046 07fe0000-07ffffff | locked | 2 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debbg//spi-nr/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | unlocked | 2047 07ff0000-07ffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 125829120 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-077fffff | unlocked | 1920 07800000-07ffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-07ffffff | unlocked | 2046 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-07ffffff | unlocked | 2047 + all_but_one=3D2047 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-07ffffff | locked | 2047 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-07ffffff | locked | 2046 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2047 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07feffff | locked | 2047 07ff0000-07ffffff | unlocked | 1 + flash_lock -u /dev/mtd0 134086656 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-07fdffff | locked | 2046 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index e8098f5e59f1..a6325bba96d0 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -371,7 +371,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q01JV-M */ + /* W25Q01JV-M, W25Q01RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x21), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Tue Sep 29 13:21:07 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7CA36463B75 for ; Fri, 7 Aug 2026 10:15:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097710; cv=none; b=V+iMqvtOQiHyDGNsSvhOB9N3bTH/72fJETikq/1Ug6/JbGHjxZ1Ty2TmoiYe+vhbwh5i6tAVg0vsuCswokmNP3cXGJKLTfzbSf6JbSXfEOIHOHvuU9W6mRkv/29xAQIDnLBtu/klgxIXN6A/7yF/GAHDZIe29UyPl8074Suoqh4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097710; c=relaxed/simple; bh=GDRtFUDPS3iw8fKSFIhYJDn5K/lh+lXqb8pQJV06740=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NhNPwrvicVbIL534wtiL7oAMUJKRy7KMXZFy3dRLVZVn79vPL7i4whPulKCLA3OCfhfn0So8jLx+KOsgpg9MC3tqX0///cS9iL5mh2r4+UZcQ35lZB/m49e+g6cf9FypfoK7dkrwChciiwtt7RlJLpPEVIV3EFKUX7H6KU5Sst8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=VpEuljsT; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="VpEuljsT" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 6B7D94E41138; Fri, 7 Aug 2026 10:15:05 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3FED4603F0; Fri, 7 Aug 2026 10:15:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id CE1ED11C3751E; Fri, 7 Aug 2026 12:15:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097704; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=QsZ7p7jsSqD55hC3Pukq1KMLxQkD1HibYZrH3u/Jcds=; b=VpEuljsTuBILuLWn0gKqucnHvtfKPuwNcWC8rMWCtX5oYfDfTpXIEYEvXVTnBqCtx7I36S lkzqnUKDfvrOhZfJhQtg9iTk9pvC5pJo7FbdeLUEau5biLb3BOWN4Olt6e9tbhCj3CWGSh RAqooqG9mfW8bufDmx42qjo4prN4qhFev+ZqqaSADyQ467vox1hSFHP4j3g6synA0kmCp7 n8QWqJX8q0m9C3iHcocHKX6MVpt+da477IfUMMTiWhs8ST4GZGoLhTrjxl60tssjg5a5TF XwHe08nQy5TNui/3KsxpoPUhoOzI72ZxhZKtpJwN/PC7mBnChnPkvDlyr8oN/A== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:08 +0200 Subject: [PATCH v2 16/18] mtd: spi-nor: winbond: Add support for W25Q02RV-M Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-16-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 There is an ID collision with the chip of same density from the JV family. Both chips are very similar in practice, it is mostly a matter of electrical differences (mostly power consumption being lower). As a significant difference, RV chips identify themselves as supporting the new SFDP (rev F) field which forces an alternate write SR2 opcode (0x31). Signed-off-by: Miquel Raynal --- + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id ef7022 + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer winbond + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 534644500a0101ff00080117800000ff84010102e00000ffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffe520fbffffffff7f44eb086b083b42bbfeffffffffff 0000ffff44eb0c200f5210d800001602a60081e214dde9e378477a757a75 f7a4d55c39f66dffe970f9a50000000000002c0c000000006655ffff0f00 0000060d44bd27ed080dffffffffff8a00fe21ffdcff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp fe929abb1ba38dd6a8668200051298a8140bfeb56bd6d58f56b86b074a150f12 /sys/bus/= spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 2 dummy cycles 2 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id ef 70 22 00 00 00 size 256 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_SR_TB_BIT6 | HAS= _4BIT_BP | SOFT_RESET | NO_WP | HAS_SR2_CMP_BIT6 opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 8D extension repeat protocols read 1S-4S-4S write 1S-1S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] dc (64.0 KiB) [3] c7 (256 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-0fffffff | [ 3] | no locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + dd 'if=3D/dev/urandom' 'of=3D./spi_test' 'bs=3D1M' 'count=3D2' [ 11.527038] random: crng init done 2+0 records in 2+0 records out + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + mtd_debug info /dev/mtd0 mtd.type =3D MTD_NORFLASH mtd.flags =3D MTD_CAP_NORFLASH mtd.size =3D 268435456 (256M) mtd.erasesize =3D 65536 (64K) mtd.writesize =3D 1 mtd.oobsize =3D 0 regions =3D 0 + alias 'show_sectors=3Dgrep -A4 "locked sectors" /sys/kernel/debug/spi-nor= /spi0.0/params' + flash_lock -u /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: unlocked Return code: 0 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | unlocked | 4096 + flash_lock -l /dev/mtd0 + flash_lock -i /dev/mtd0 Device: /dev/mtd0 Start: 0 Len: 0x10000000 Lock status: locked Return code: 1 + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test + dd 'if=3D/dev/urandom' 'of=3D./spi_test2' 'bs=3D1M' 'count=3D2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test2 Copied 2097152 bytes from spi_test2 to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read2 Copied 2097152 bytes from address 0x00000000 in flash to spi_read2 + sha256sum spi_read spi_read2 spi_test spi_test2 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_read2 32e1a8def4cf674413ff0b7a2738e704f03f7bddcaf7ee2d320ab83aa7bf813e spi_test 4b1329df073cd497567d8cb6878aa20af6af71df98cc7c445d31a69eaf0d69f1 spi_test2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0fffffff | locked | 4096 + flash_lock -u /dev/mtd0 + cat /sys/class/mtd/mtd0/size + size=3D268435456 + cat /sys/class/mtd/mtd0/erasesize + bs=3D65536 + grep unlocked /sys/kernel/debug/spi-nor/spi0.0/params + sed -e 's/.*unlocked | //' + nsectors=3D4096 + ss=3D65536 + bps=3D1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 268304384 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | unlocked | 4094 0ffe0000-0fffffff | locked | 2 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | unlocked | 4095 0fff0000-0fffffff | locked | 1 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 260046848 128 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0f7fffff | unlocked | 3968 0f800000-0fffffff | locked | 128 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 2 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | locked | 2 00020000-0fffffff | unlocked | 4094 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | locked | 1 00010000-0fffffff | unlocked | 4095 + all_but_one=3D4095 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 65536 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0000ffff | unlocked | 1 00010000-0fffffff | locked | 4095 + flash_lock -u /dev/mtd0 65536 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0001ffff | unlocked | 2 00020000-0fffffff | locked | 4094 + flash_lock -u /dev/mtd0 + flash_lock -l /dev/mtd0 0 4095 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffeffff | locked | 4095 0fff0000-0fffffff | unlocked | 1 + flash_lock -u /dev/mtd0 268304384 1 + grep -A4 'locked sectors' /sys/kernel/debug/spi-nor/spi0.0/params locked sectors region (in hex) | status | #sectors ------------------+----------+--------- 00000000-0ffdffff | locked | 4094 0ffe0000-0fffffff | unlocked | 2 --- drivers/mtd/spi-nor/winbond.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index a6325bba96d0..5e3924345667 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -377,7 +377,7 @@ static const struct flash_info winbond_nor_parts[] =3D { SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, .fixups =3D &w25qxxjv_rv_fixups, }, { - /* W25Q02JV-M */ + /* W25Q02JV-M, W25Q02RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x22), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Tue Sep 29 13:21:07 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70EB5470E8F; Fri, 7 Aug 2026 10:15:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097711; cv=none; b=JjbU97lt8G7vKGxoK2Rb5nNc5OQeQxJ6d9uKFtkKd9iDRwsfB0lSpcepn9q81NUpuBRTLa+NZwQzZzg5SBLpMecc+cResmhwiYQvNgnmAYdnUHDyV3IFXBukouiutlBMBgAMC8LQ33G5+5vRT4U6LsJJp0B91Ru0QSBvCaiGXoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097711; c=relaxed/simple; bh=xUFleoc4OxnWc0fMvUQ08LmYYj+lRAruZ5B841kO2UU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aIiPOKDPPSWGaua3owu6gKYAhApcM7ZNIu8TZBRPdNT+RFunFoJlmeeozkcYbO2j5JWXXmYIdD3ao1Z5YA5pHrRICJ8OIFlyk3wf6eDen0BwiPeGZ3zfQgb2n6Y44597JBQF6LIdYihO48+Xei+lHWwxrSlunNzLIAuFY+4Rjls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=tY32tZdI; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="tY32tZdI" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 9F3104E41136; Fri, 7 Aug 2026 10:15:07 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 6BDA5603F0; Fri, 7 Aug 2026 10:15:07 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 985E511C3750A; Fri, 7 Aug 2026 12:15:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097706; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=YIcQIYOb8WRakMR4QF2N+EU56xSs7c72GvKGLdWLtsA=; b=tY32tZdIvdjua0uLucyYbNN+MwaN5GEkXkFNMmCmNbpAGT8WV/deQcLmsH87AKWlk3t+E0 Rlvi6Io3aWgUJu//FfltORp/wF1WUM3tiOOJtHJy21ww0xQlGi6I5PtsV1d1Y0GC1hmfFJ NM7qPiS2nghFwIsEhFLjFQ6JYZEUS/aVJw+kFo9fmffm3Iv9ukS+4W34bibVeTTF/8y7iS bmr4iLgVJ4/bvi7mC7qxhB9DThp2kgS1nF9OkYOhFMO+pwMTdeirylrqFXO2KVdIxf3zK0 6AGGyo0ooDMhYtSOLhCLc2k2jN77ag0d46fIO/lPaF/tpB2ncf46eEPMlvpXlQ== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:09 +0200 Subject: [PATCH v2 17/18] mtd: spi-nor: winbond: W25QxxRV-Q/N/M: Add missing chips Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-17-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 I currently do not have access to the following chips: - W25Q25RV-Q/N - W25Q25RV-M - W25Q51RV-M - W25Q02RV-Q/N Yet, I successfully tested the entire JV family and all other chips from the RV family. They all behaved strictly identically, so I propose to nevertheless add the missing comments for the sake of clarity and completeness, as well as the missing 02JV/RV entry. Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/winbond.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 5e3924345667..17d889709d53 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -258,7 +258,7 @@ static const struct flash_info winbond_nor_parts[] =3D { .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, .fixups =3D &w25q128_fixups, }, { - /* W25Q256JV-Q/N */ + /* W25Q256JV-Q/N, W25Q25RV-Q/N */ .id =3D SNOR_ID(0xef, 0x40, 0x19), .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, @@ -278,6 +278,12 @@ static const struct flash_info winbond_nor_parts[] =3D= { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, .fixups =3D &w25qxxjv_rv_fixups, + }, { + /* W25Q02RV-Q/N */ + .id =3D SNOR_ID(0xef, 0x40, 0x22), + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, + .fixups =3D &w25qxxjv_rv_fixups, }, { .id =3D SNOR_ID(0xef, 0x50, 0x12), .name =3D "w25q20bw", @@ -361,12 +367,12 @@ static const struct flash_info winbond_nor_parts[] = =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR= _HAS_CMP, }, { - /* W25Q256JV-M */ + /* W25Q256JV-M, W25Q25RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x19), .flags =3D SPI_NOR_QUAD_PP | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { - /* W25Q512JV-M */ + /* W25Q512JV-M, W25Q51RV-M */ .id =3D SNOR_ID(0xef, 0x70, 0x20), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, --=20 2.54.0 From nobody Tue Sep 29 13:21:07 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62649470EAF; Fri, 7 Aug 2026 10:15:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097713; cv=none; b=mdeHzK/CV1Xv8KiiXHY6upHYS8G9bOHO26tyzf5LgaeOfmB2LRLm1nd4bNjHfM6XLGBIf0ke/mlj5tiNI++nuWk92VgbE5sxyZUXsFGMKGbxXf/70abJxtvk8BwJuN6mUyNSCd8yZvsTMzMF7LVSBJjlZrVWRFIJn03r6mkX+1E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786097713; c=relaxed/simple; bh=GdxXF6OVwNzqN9Ba2H+LmyQFreFBh0rFawBRK1ZaHMk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rnBa7uX9JibHBePzz7fEdV5L7ebr5J4Ksk9a2yifttYqj9+usJmkGpSXnat2qKwrzs7vYinohZfHymtHuc7mgRukKOyyswZ7tfdyYFsuhVTcqjyNf0+/ESrmicGFdw/hgK4iIMa2OeOKznMSd1RMGVcNhyJJ4SXULGlrL2uYRCw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ncdi+6M/; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ncdi+6M/" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id C59BB1A149B; Fri, 7 Aug 2026 10:15:09 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 93E5E603F0; Fri, 7 Aug 2026 10:15:09 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id A381511C37523; Fri, 7 Aug 2026 12:15:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1786097708; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=uE94rroX8EBiwoQlcx55oym73p6AyO336Qsn9jN228g=; b=ncdi+6M/vHl7CmAZhQitAXVwXqbFGmddhJtzKy87uaF3BjNh3A7KmHiLIQ4IwLBPOfvRRr sDY18D7tbIihlf+NYwunwIedt8XEyxn48nxNn256CCVGsaPhxB26IZUnrh7MFnzR+AxiMz pDv+IHsjLOuLoQj3Us5veRoZ3lEjZcBp8Ktk6fUU/rW4atunjHywTdW07xjE4sMM/v2DLV lPOAtzTOQI1xEu6Zp764103susIv5/BqoY73NyzmwOF3og97t5s+1tH1Zh7Qv+9Q3i7cQj q/8WexHPYqbzpxhl8DUPYUz3xhgbWK5KwWJr7iBKxqat5xrsIo5wuT1pRckLvQ== From: Miquel Raynal Date: Fri, 07 Aug 2026 12:14:10 +0200 Subject: [PATCH v2 18/18] mtd: spi-nor: debugfs: Expose SR opcodes and QE mask Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-18-7797642dfc40@bootlin.com> References: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> In-Reply-To: <20260807-winbond-v7-1-spi-nor-rv-addition-v2-0-7797642dfc40@bootlin.com> To: Pratyush Yadav , Michael Walle , Takahiro Kuwano , Richard Weinberger , Vignesh Raghavendra , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jonathan Corbet , Shuah Khan Cc: Steam Lin , Hsin-Yi Wang , Thomas Petazzoni , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Expose Status Register opcodes based on the flash capabilities discovered while parsing the SFDP QER field. Value '0' indicates an absence of opcode (non supported), we do not print anything in that case. The QE bit is also displayed. Example on a W25Q02JV-M: $ grep opcodes -A10 /sys/kernel/debug/spi-nor/spi0.0/params opcodes read 0xec dummy cycles 6 erase 0xdc program 0x34 SR1 read 0x05 SR2 read 0x35 SR1+SR2 write 0x01 QE SR2 bit 1 8D extension none Signed-off-by: Miquel Raynal --- drivers/mtd/spi-nor/debugfs.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 512825c3fc85..ec5b87861539 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -106,6 +106,21 @@ static int spi_nor_params_show(struct seq_file *s, voi= d *data) seq_printf(s, " dummy cycles\t%u\n", nor->read_dummy); seq_printf(s, " erase\t\t0x%02x\n", nor->erase_opcode); seq_printf(s, " program\t0x%02x\n", nor->program_opcode); + seq_printf(s, " SR1 read\t0x%02x\n", params->opcodes.read_sr1); + if (params->opcodes.read_sr2) + seq_printf(s, " SR2 read\t0x%02x\n", params->opcodes.read_sr2); + if (params->opcodes.write_sr1) + seq_printf(s, " SR1 write\t0x%02x\n", params->opcodes.write_sr1); + if (params->opcodes.write_sr2) + seq_printf(s, " SR2 write\t0x%02x\n", params->opcodes.write_sr2); + if (params->opcodes.write_sr1_and_sr2) + seq_printf(s, " SR1+SR2 write\t0x%02x\n", + params->opcodes.write_sr1_and_sr2); + + if (params->qe_mask[0] || params->qe_mask[1]) + seq_printf(s, " QE\t\tSR%d bit %d\n", + params->qe_mask[0] ? 1 : 2, + ffs(params->qe_mask[0] | params->qe_mask[1]) - 1); =20 switch (nor->cmd_ext_type) { case SPI_NOR_EXT_NONE: --=20 2.54.0