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Fri, 07 Aug 2026 05:34:02 -0700 (PDT) From: Erikas Bitovtas Date: Fri, 07 Aug 2026 15:33:30 +0300 Subject: [PATCH v3 1/3] dt-bindings: arm: qcom: Document Samsung Galaxy A52/A72 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-sm7125-samsung-v3-1-ac0139e5c612@gmail.com> References: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> In-Reply-To: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Hansson , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, David Heidelberg , Erikas Bitovtas , Bartosz Golaszewski , Krzysztof Kozlowski X-Mailer: b4 0.15.2 Add compatibles for Samsung Galaxy A52 and A72. Reviewed-by: Bartosz Golaszewski Acked-by: Krzysztof Kozlowski Signed-off-by: Erikas Bitovtas --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index ff8a35df7862..d3746bf6a106 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1068,6 +1068,8 @@ properties: =20 - items: - enum: + - samsung,a52q + - samsung,a72q - xiaomi,curtana - xiaomi,joyeuse - const: qcom,sm7125 --=20 2.55.0 From nobody Tue Sep 29 13:20:33 2026 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D454547605A for ; Fri, 7 Aug 2026 12:34:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; 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Fri, 07 Aug 2026 05:34:14 -0700 (PDT) Received: from [192.168.8.167] ([2a00:f502:270:d465:a26c:adcb:8da8:6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4995bdca3ddsm49530495e9.1.2026.08.07.05.34.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Aug 2026 05:34:14 -0700 (PDT) From: Erikas Bitovtas Date: Fri, 07 Aug 2026 15:33:31 +0300 Subject: [PATCH v3 2/3] firmware: qcom: tzmem: disable SHM bridge for SM7125 platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-sm7125-samsung-v3-2-ac0139e5c612@gmail.com> References: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> In-Reply-To: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Hansson , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, David Heidelberg , Erikas Bitovtas , Vitalii Skorkin , Dmitry Baryshkov , Bartosz Golaszewski X-Mailer: b4 0.15.2 From: Vitalii Skorkin Currently SHM bridge causes RCU stalls when booting. Disable it for SM7125 until a fix is available. Signed-off-by: Vitalii Skorkin Reviewed-by: Dmitry Baryshkov Acked-by: Bartosz Golaszewski Signed-off-by: Erikas Bitovtas --- drivers/firmware/qcom/qcom_tzmem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qco= m_tzmem.c index 0fd9581275f1..91d59e3e5988 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -82,6 +82,7 @@ static const char *const qcom_tzmem_blacklist[] =3D { "qcom,sc8180x", "qcom,sdm670", /* failure in GPU firmware loading */ "qcom,sdm845", /* reset in rmtfs memory assignment */ + "qcom,sm7125", /* hang in rmtfs memory assignment */ "qcom,sm7150", /* reset in rmtfs memory assignment */ "qcom,sm8150", /* reset in rmtfs memory assignment */ NULL --=20 2.55.0 From nobody Tue Sep 29 13:20:33 2026 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4632C476CF0 for ; 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Fri, 07 Aug 2026 05:34:25 -0700 (PDT) Received: from [192.168.8.167] ([2a00:f502:270:d465:a26c:adcb:8da8:6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4995bdca3ddsm49530495e9.1.2026.08.07.05.34.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Aug 2026 05:34:25 -0700 (PDT) From: Erikas Bitovtas Date: Fri, 07 Aug 2026 15:33:32 +0300 Subject: [PATCH v3 3/3] arm64: dts: qcom: sm7125-samsung: add initial device tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260807-sm7125-samsung-v3-3-ac0139e5c612@gmail.com> References: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> In-Reply-To: <20260807-sm7125-samsung-v3-0-ac0139e5c612@gmail.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Hansson , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, David Heidelberg , Erikas Bitovtas , Konrad Dybcio X-Mailer: b4 0.15.2 Samsung Galaxy A52/A72 are devices released on atoll (SM7125) platform in 2021. Add initial device tree for SM7125 Samsung platform with support for: - Framebuffer - GPIO keys - Hall sensor - Vibrator - Regulators - Reset input - Real-time clock - SD card - UFS - USB Tested-by: Stefan Hansson Reviewed-by: Konrad Dybcio Reviewed-by: David Heidelberg Signed-off-by: Erikas Bitovtas --- arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/sm7125-samsung-a52q.dts | 20 + arch/arm64/boot/dts/qcom/sm7125-samsung-a72q.dts | 20 + .../arm64/boot/dts/qcom/sm7125-samsung-common.dtsi | 536 +++++++++++++++++= ++++ 4 files changed, 578 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 1c86e7e98f55..874db77c0e25 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -349,6 +349,8 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sm6125-xiaomi-laurel-sprou= t.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6125-xiaomi-willow.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6350-sony-xperia-lena-pdx213.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm6375-sony-xperia-murray-pdx225.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sm7125-samsung-a52q.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sm7125-samsung-a72q.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm7125-xiaomi-curtana.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm7125-xiaomi-joyeuse.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm7225-fairphone-fp4.dtb diff --git a/arch/arm64/boot/dts/qcom/sm7125-samsung-a52q.dts b/arch/arm64/= boot/dts/qcom/sm7125-samsung-a52q.dts new file mode 100644 index 000000000000..ecba5be8164e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7125-samsung-a52q.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SM7125 Samsung Galaxy A52 (a52q) specific device tree source + * + * Copyright (c) 2026, Erikas Bitovtas. All rights reserved. + */ + +/dts-v1/; + +#include "sm7125-samsung-common.dtsi" + +/ { + model =3D "Samsung Galaxy A52"; + compatible =3D "samsung,a52q", "qcom,sm7125"; + qcom,board-id =3D <0x22 0x6>; +}; + +&rmtfs_mem { + reg =3D <0x0 0xf4f00000 0x0 0x202000>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm7125-samsung-a72q.dts b/arch/arm64/= boot/dts/qcom/sm7125-samsung-a72q.dts new file mode 100644 index 000000000000..f18d03de1585 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7125-samsung-a72q.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SM7125 Samsung Galaxy A72 (a72q) specific device tree source + * + * Copyright (c) 2026, Erikas Bitovtas. All rights reserved. + */ + +/dts-v1/; + +#include "sm7125-samsung-common.dtsi" + +/ { + model =3D "Samsung Galaxy A72"; + compatible =3D "samsung,a72q", "qcom,sm7125"; + qcom,board-id =3D <0x22 0x5>; +}; + +&rmtfs_mem { + reg =3D <0x0 0xf3700000 0x0 0x202000>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm7125-samsung-common.dtsi b/arch/arm= 64/boot/dts/qcom/sm7125-samsung-common.dtsi new file mode 100644 index 000000000000..b8863e111bc4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7125-samsung-common.dtsi @@ -0,0 +1,536 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SM7125 Samsung common device tree source + * + * Copyright (c) 2026, Erikas Bitovtas. All rights reserved. + */ + +#include +#include +#include +#include +#include "sm7125.dtsi" +#include "pm6150.dtsi" +#include "pm6150l.dtsi" + +/delete-node/ &rmtfs_mem; +/delete-node/ &ipa_fw_mem; +/delete-node/ &tz_mem; + +/ { + chassis-type =3D "handset"; + + qcom,msm-id =3D ; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + framebuffer@9c000000 { + compatible =3D "simple-framebuffer"; + memory-region =3D <&cont_splash_mem>; + width =3D <1080>; + height =3D <2400>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; + clocks =3D <&gcc GCC_DISP_HF_AXI_CLK>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&key_vol_up_default>, <&hall_sensor_default>; + pinctrl-names =3D "default"; + + button-vol-up { + label =3D "Volume Up"; + gpios =3D <&pm6150l_gpios 8 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + }; + + event-hall-sensor { + label =3D "Hall Effect Sensor"; + gpios =3D <&pm6150_gpios 10 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + debounce-interval =3D <15>; + }; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + tz_mem: memory@80b00000 { + reg =3D <0x0 0x80b00000 0x0 0x7100000>; + no-map; + }; + + mpss_mem: memory@8b000000 { + reg =3D <0x0 0x8b000000 0x0 0x8900000>; + no-map; + }; + + wlan_mem: memory@93900000 { + reg =3D <0x0 0x93900000 0x0 0x200000>; + no-map; + }; + + ipa_fw_mem: memory@93b00000 { + reg =3D <0x0 0x93b00000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_region: memory@93b10000 { + reg =3D <0x0 0x93b10000 0x0 0x5000>; + no-map; + }; + + gpu_mem: memory@93b15000 { + reg =3D <0x0 0x93b15000 0x0 0x2000>; + no-map; + }; + + adsp_mem: memory@93c00000 { + reg =3D <0x0 0x93c00000 0x0 0x3e00000>; + no-map; + }; + + camera_region: memory@97a00000 { + reg =3D <0x0 0x97a00000 0x0 0x500000>; + no-map; + }; + + pil_npu_region: memory@97f00000 { + reg =3D <0x0 0x97f00000 0x0 0x500000>; + no-map; + }; + + venus_mem: memory@98400000 { + reg =3D <0x0 0x98400000 0x0 0x500000>; + no-map; + }; + + cdsp_mem: memory@98900000 { + reg =3D <0x0 0x98900000 0x0 0x1e00000>; + no-map; + }; + + cont_splash_mem: memory@9c000000 { + reg =3D <0x0 0x9c000000 0x0 (1080 * 2400 * 4)>; + no-map; + }; + + qseecom_region: memory@9e000000 { + reg =3D <0x0 0x9e000000 0x0 0x2000000>; + no-map; + }; + + pstore_mem: ramoops@b4600000 { + compatible =3D "ramoops"; + reg =3D <0x0 0xb4600000 0x0 0x100000>; + record-size =3D <0x40000>; + console-size =3D <0x40000>; + ftrace-size =3D <0x40000>; + pmsg-size =3D <0x40000>; + }; + + rmtfs_mem: memory { + compatible =3D "qcom,rmtfs-mem"; + qcom,use-guard-pages; + no-map; + + qcom,client-id =3D <1>; + qcom,vmid =3D ; + }; + }; + + vibrator { + compatible =3D "gpio-vibrator"; + enable-gpios =3D <&tlmm 57 GPIO_ACTIVE_HIGH>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm6150-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vreg_s1a_1p1: smps1 { + regulator-min-microvolt =3D <1128000>; + regulator-max-microvolt =3D <1128000>; + }; + + vreg_s4a_1p0: smps4 { + regulator-min-microvolt =3D <824000>; + regulator-max-microvolt =3D <1120000>; + }; + + vreg_s5a_2p0: smps5 { + regulator-min-microvolt =3D <1744000>; + regulator-max-microvolt =3D <2040000>; + }; + + vreg_l1a_1p2: ldo1 { + regulator-min-microvolt =3D <1178000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l2a_1p0: ldo2 { + regulator-min-microvolt =3D <944000>; + regulator-max-microvolt =3D <1056000>; + regulator-initial-mode =3D ; + }; + + vreg_l3a_1p0: ldo3 { + regulator-min-microvolt =3D <968000>; + regulator-max-microvolt =3D <1064000>; + regulator-initial-mode =3D ; + }; + + vreg_l4a_0p9: ldo4 { + regulator-min-microvolt =3D <824000>; + regulator-max-microvolt =3D <928000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l5a_2p7: ldo5 { + regulator-min-microvolt =3D <3304000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l6a_0p6: ldo6 { + regulator-min-microvolt =3D <568000>; + regulator-max-microvolt =3D <648000>; + regulator-initial-mode =3D ; + }; + + vdd_cx_wlan: + vreg_l9a_0p8: ldo9 { + regulator-min-microvolt =3D <488000>; + regulator-max-microvolt =3D <800000>; + regulator-initial-mode =3D ; + }; + + vreg_l10a_1p8: ldo10 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1832000>; + regulator-initial-mode =3D ; + }; + + vreg_l11a_1p8: ldo11 { + regulator-min-microvolt =3D <1696000>; + regulator-max-microvolt =3D <1904000>; + regulator-initial-mode =3D ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt =3D <1696000>; + regulator-max-microvolt =3D <1952000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l13a_1p8: ldo13 { + regulator-min-microvolt =3D <1696000>; + regulator-max-microvolt =3D <1904000>; + regulator-initial-mode =3D ; + }; + + vreg_l14a_1p8: ldo14 { + regulator-min-microvolt =3D <1728000>; + regulator-max-microvolt =3D <1832000>; + regulator-initial-mode =3D ; + }; + + vreg_l15a_1p8: ldo15 { + regulator-min-microvolt =3D <1696000>; + regulator-max-microvolt =3D <1904000>; + regulator-initial-mode =3D ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-min-microvolt =3D <2496000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l17a_3p1: ldo17 { + regulator-min-microvolt =3D <2920000>; + regulator-max-microvolt =3D <3232000>; + regulator-initial-mode =3D ; + }; + + vreg_l18a_3p0: ldo18 { + regulator-min-microvolt =3D <2496000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l19a_2p85: ldo19 { + regulator-min-microvolt =3D <2696000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vreg_s8c_1p3: smps8 { + regulator-min-microvolt =3D <1120000>; + regulator-max-microvolt =3D <1408000>; + }; + + vreg_l1c_1p8: ldo1 { + regulator-min-microvolt =3D <1616000>; + regulator-max-microvolt =3D <1984000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_1p3: ldo2 { + regulator-min-microvolt =3D <1168000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_1p2: ldo3 { + regulator-min-microvolt =3D <1144000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + + vreg_l4c_1p8: ldo4 { + regulator-min-microvolt =3D <1648000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l5c_1p8: ldo5 { + regulator-min-microvolt =3D <1648000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l6c_3p0: ldo6 { + regulator-min-microvolt =3D <1648000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l7c_3p0: ldo7 { + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l8c_1p8: ldo8 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l9c_2p95: ldo9 { + regulator-min-microvolt =3D <2952000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3400000>; + regulator-initial-mode =3D ; + }; + + vreg_l11c_3p3: ldo11 { + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3400000>; + regulator-initial-mode =3D ; + }; + + vreg_bob: bob { + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&dispcc { + /* HACK: disable until a panel driver is ready to retain simplefb */ + status =3D "disabled"; +}; + +&pm6150l_gpios { + key_vol_up_default: key-vol-up-default-state { + pins =3D "gpio8"; + function =3D "normal"; + input-enable; + bias-pull-up; + power-source =3D <0>; + }; +}; + +&pm6150_gpios { + hall_sensor_default: hall-sensor-default-state { + pins =3D "gpio10"; + function =3D "normal"; + output-disable; + bias-disable; + power-source =3D <0>; + }; +}; + +&pm6150_pon { + /* + * LinuxLoader fastboot implementation has most of its commands removed + * by Samsung, making it useless. So reboot to Odin download mode instead. + */ + mode-bootloader =3D <0x15>; +}; + +&pm6150_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&pm6150_rtc { + status =3D "okay"; +}; + +&qfprom { + vcc-supply =3D <&vreg_l11a_1p8>; +}; + +&sdhc_2 { + vmmc-supply =3D <&vreg_l9c_2p95>; + vqmmc-supply =3D <&vreg_l6c_3p0>; + cd-gpios =3D <&tlmm 69 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&sdc2_on>; + pinctrl-1 =3D <&sdc2_off>; + pinctrl-names =3D "default", "sleep"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <59 4>; /* Fingerprint sensor SPI */ + + sdc2_on: sdc2-on-state { + clk-pins { + pins =3D "sdc2_clk"; + bias-disable; + drive-strength =3D <16>; + }; + + cmd-pins { + pins =3D "sdc2_cmd"; + bias-pull-up; + drive-strength =3D <10>; + }; + + data-pins { + pins =3D "sdc2_data"; + bias-pull-up; + drive-strength =3D <10>; + }; + + sd-cd-pins { + pins =3D "gpio69"; + function =3D "gpio"; + bias-pull-up; + drive-strength =3D <2>; + }; + }; + + sdc2_off: sdc2-off-state { + clk-pins { + pins =3D "sdc2_clk"; + bias-disable; + drive-strength =3D <2>; + }; + + cmd-pins { + pins =3D "sdc2_cmd"; + bias-pull-up; + drive-strength =3D <2>; + }; + + data-pins { + pins =3D "sdc2_data"; + bias-pull-up; + drive-strength =3D <2>; + }; + + sd-cd-pins { + pins =3D "gpio69"; + function =3D "gpio"; + bias-pull-up; + drive-strength =3D <2>; + }; + }; +}; + +&ufs_mem_hc { + vcc-supply =3D <&vreg_l19a_2p85>; + vcc-max-microamp =3D <600000>; + vccq2-supply =3D <&vreg_l12a_1p8>; + vccq2-max-microamp =3D <600000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l4a_0p9>; + vdda-pll-supply =3D <&vreg_l3c_1p2>; + + status =3D "okay"; +}; + +&usb_1 { + qcom,select-utmi-as-pipe-clk; + + status =3D "okay"; +}; + +&usb_1_dwc3 { + dr_mode =3D "peripheral"; + maximum-speed =3D "high-speed"; + + status =3D "okay"; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l4a_0p9>; + vdda-pll-supply =3D <&vreg_l11a_1p8>; + vdda-phy-dpdm-supply =3D <&vreg_l17a_3p1>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l4a_0p9>; + vdda-pll-supply =3D <&vreg_l3c_1p2>; + + status =3D "okay"; +}; --=20 2.55.0