From nobody Fri Oct 2 01:54:31 2026 Received: from out-186.mta1.migadu.com (mta1.migadu.com [37.59.57.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0416F4398EE for ; Thu, 6 Aug 2026 10:03:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=37.59.57.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010633; cv=none; b=RBiLYGI70VEwkeVrRmgz22Sc7jWIjwvhcK0aCmSuKfQxi8IZ74mN3i5dxtaxvn1rf3da6JYE3pt0ozGX6r/qWnAoO+G9FFwehE5B9Y+FTmtag4zCXgdE8LRa8+/9dOyYiklw0HkOZRM2nOO//yYk0kDTNqwqXB6aRntZT69a+UE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010633; c=relaxed/simple; bh=KYoGU+OGRT1b3u/3rPF3W7y1lsPkKfvdYF3xaIRH2LE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nbfy+i1Wa461evYDnAk8FCuhj3nCcvWcdIos0ckzNpf4aL+jQG7ZHUz2QepjjHxSr1QaAlFork6W59jTnK5+rE9aV1IjNphoCq0pG9sOCDoC8JsM0CMv59wUE6CFvUlcYBDFPRvo0eX0S8pq2mvnnNSetAbGR4xUBZ6dO8jsIpI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=Ty5O7BPe; arc=none smtp.client-ip=37.59.57.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="Ty5O7BPe" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786010627; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MWi0NI9m0cyCHv/YKcE74ooCGwGwg2XY1zvoMF0Rkgs=; b=Ty5O7BPeeLVaIMGJXZp3xJGEA2mnwh1wjVXmlLzlgjj2LEBj8CpEOEdsgWEGQA42Cgf4sj CT531aboWPk63SaGlPDGkRBcWRek2DwgQE1mx1KHu32gBQF1Ay1QCy7IQY8+IAS0jTIKPR yOGYyINxpEkeLq1fsQqSfGFc7snBLZ0= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Sascha Bischoff Subject: [PATCH v1 1/4] KVM: arm64: Validate the host-provided vgic model in pKVM Date: Thu, 6 Aug 2026 11:02:53 +0100 Message-Id: <20260806100256.371164-2-fuad.tabba@linux.dev> In-Reply-To: <20260806100256.371164-1-fuad.tabba@linux.dev> References: <20260806100256.371164-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" EL2 copies vgic_model from the host's struct kvm unchecked, and the nVHE world switch dispatches on it with no cpucap guard. A host writing KVM_DEV_TYPE_ARM_VGIC_V5 makes EL2 access GICv5 CPU interface registers, which are UNDEFINED without FEAT_GCIE and panic the hypervisor on any GICv3 machine. Accept only the models pKVM can run, forcing anything else to 0. Fixes: 9b8e3d4ca0e73 ("KVM: arm64: gic-v5: Implement GICv5 load/put and sav= e/restore") Signed-off-by: Fuad Tabba Reviewed-by: Sascha Bischoff --- arch/arm64/kvm/hyp/nvhe/pkvm.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c index 24d6f164129ac..59bb15efdca42 100644 --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c @@ -340,13 +340,25 @@ static void pkvm_init_features_from_host(struct pkvm_= hyp_vm *hyp_vm, const struc { struct kvm *kvm =3D &hyp_vm->kvm; unsigned long host_arch_flags =3D READ_ONCE(host_kvm->arch.flags); + u32 vgic_model =3D READ_ONCE(host_kvm->arch.vgic.vgic_model); DECLARE_BITMAP(allowed_features, KVM_VCPU_MAX_FEATURES); =20 /* CTR_EL0 is always under host control, even for protected VMs. */ hyp_vm->kvm.arch.ctr_el0 =3D host_kvm->arch.ctr_el0; =20 - /* Preserve the vgic model so that GICv3 emulation works */ - hyp_vm->kvm.arch.vgic.vgic_model =3D host_kvm->arch.vgic.vgic_model; + /* + * Preserve the vgic model for GICv3 emulation, but only what pKVM can + * run: the GICv5 world switch touches registers UNDEFINED at EL2 + * without FEAT_GCIE. 0 is not a valid kvm_device_type: "no vgic". + */ + switch (vgic_model) { + case KVM_DEV_TYPE_ARM_VGIC_V2: + case KVM_DEV_TYPE_ARM_VGIC_V3: + break; + default: + vgic_model =3D 0; + } + hyp_vm->kvm.arch.vgic.vgic_model =3D vgic_model; =20 /* No restrictions for non-protected VMs. */ if (!kvm_vm_is_protected(kvm)) { --=20 2.39.5 From nobody Fri Oct 2 01:54:31 2026 Received: from out-176.mta1.migadu.com (out-176.mta1.migadu.com [95.215.58.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E21B2F9D98 for ; Thu, 6 Aug 2026 10:03:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010637; cv=none; b=tqe6BfUSvPkHDZn2i7Y/zkAVXZQQqW02brXgOdcxAspzqf9sBmGqd5TyFgEDvR+JSmNXqEOoKTyZLe3dv6qftDJtjHGHd9zaYBiQYQyemU65+JCJUR42d2OMKPteVoKUgVowB/liJKWQlkTyE7OJtkue5seXnPF+STpbKb/aWBY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010637; c=relaxed/simple; bh=Q7FD6Y66ifHoTpOKvshD/UjKm4zl+Q/t9jw1vOPYCXE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fJEWRGAU0GzbJhn9u7nKQLnaEOP+/ZzesSkYO+o9NMMiBZ9gLKuLVJ55MBD/oVlrIiY7uoYWZaxp9pufXG5xAt1+UFDpB/Ih/WcOhPWUKIcYOhtiMZCvxwfisuTqZd5jqHFMo7NTZXNxnsvXUTZO+55w6Y4/EBhe6oFRWcNZP8A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=qIqVUJTI; arc=none smtp.client-ip=95.215.58.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="qIqVUJTI" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786010632; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RqHVzp5pYqarvaM7RLacv87HuepiYTxatZ5ud7gmocA=; b=qIqVUJTIWoTr8awgN3nLzRpxI3w0oTdjLrALY/hIFWhsUh8ni9EZCMy6PcS50Tt6Os+oNm CNS6/FCsoKWs5vMwAsR2SnmrK4hmhnj6toTYhjV1mjpa1slEFB+XSohBLXM+my73Qy9R4p fMlxvYQlK036C+9ZQOvD0geFg8VF2sk= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Sascha Bischoff Subject: [PATCH v1 2/4] KVM: arm64: Reject the GICv5 CPU interface hypercalls under pKVM Date: Thu, 6 Aug 2026 11:02:54 +0100 Message-Id: <20260806100256.371164-3-fuad.tabba@linux.dev> In-Reply-To: <20260806100256.371164-1-fuad.tabba@linux.dev> References: <20260806100256.371164-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" __vgic_v5_save_apr() and __vgic_v5_restore_vmcr_apr() remain callable after pKVM finalises. pKVM never registers a GICv5 vgic, so neither has a valid caller in protected mode, and on a GICv3 machine the registers they access are UNDEFINED at EL2 and panic the hypervisor. Reject both when protected mode is enabled. Fixes: af325e87af5da ("KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp int= erface") Signed-off-by: Fuad Tabba Reviewed-by: Sascha Bischoff --- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/h= yp-main.c index d3df96ed8ba42..a9afd350b1fb3 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c @@ -695,6 +695,9 @@ static void handle___vgic_v5_save_apr(struct kvm_cpu_co= ntext *host_ctxt) { DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1); =20 + if (unlikely(is_protected_kvm_enabled())) + return; + __vgic_v5_save_apr(kern_hyp_va(cpu_if)); } =20 @@ -702,6 +705,9 @@ static void handle___vgic_v5_restore_vmcr_apr(struct kv= m_cpu_context *host_ctxt) { DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1); =20 + if (unlikely(is_protected_kvm_enabled())) + return; + __vgic_v5_restore_vmcr_apr(kern_hyp_va(cpu_if)); } =20 --=20 2.39.5 From nobody Fri Oct 2 01:54:31 2026 Received: from out-182.mta1.migadu.com (mta1.migadu.com [37.59.57.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEFDD439F90 for ; Thu, 6 Aug 2026 10:03:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=37.59.57.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010640; cv=none; b=rWPj8HRZJrmakyiKxgnkJFasmpZiKrfcy485FydF2WlGzwHLila6IrVayfr1x6OhjXJcB0gRVmDcWCTxbWI3/xy2DoARF7MdGIVIFSwqKdVPp5oauSsT2OQo+du8roq5jfT7SIXOysTT8oXtsfQzbiGa+tuRC26El+xuQERhxN8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010640; c=relaxed/simple; bh=RFD5bOuln32DX5D4JT85/kl3zYtfDNNovIGxgEyER/I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pWid0fkReWrCwC/69L1XqH+VPjdpWq50/g4Vc+ZofiagkbnshZUq1INu1vRD/2OB8uVKMoGyHunbWkg8CeRKiPSY8BY1QRumVlaxZuQMU1goIxezYzi37bz1gFf/TDULbyrom1WgZ4UrBw5JQxwX4JwuZC96yab7QsYKrcasmbI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ZMt2h/+p; arc=none smtp.client-ip=37.59.57.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ZMt2h/+p" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786010634; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R+kHrAsh4mnRSRJem4byDKdYAMKiGZXK6sT/FXhxkzw=; b=ZMt2h/+pfp8Ur+idXzkBA7DuC1qVvESpBvu2ETQx/8i935rt0B1ES0lMsMOEdMSjqPmIg4 8+TVn642unYxUgWy7Orzom0bMdP9XZFf9/jLQ3rJPIlT9YoeV/SAuqvVR2HL5XrXxRpzom cCWg3woZz+t7plSts5W9g7e8snzUP7A= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Sascha Bischoff Subject: [PATCH v1 3/4] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1 Date: Thu, 6 Aug 2026 11:02:55 +0100 Message-Id: <20260806100256.371164-4-fuad.tabba@linux.dev> In-Reply-To: <20260806100256.371164-1-fuad.tabba@linux.dev> References: <20260806100256.371164-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" can_access_vgic_from_kernel() excludes only the GICv3 system register interface, so on a native GICv5 system without FEAT_GCIE_LEGACY it returns true under nVHE. The kernel then saves and restores the CPU interface from EL1, where ICH_VMCR_EL2 and the ICH_PPI_* registers are UNDEFINED, and the nVHE world switch already does that work at EL2. Require VHE for GICv5 as for GICv3. Fixes: 9b8e3d4ca0e73 ("KVM: arm64: gic-v5: Implement GICv5 load/put and sav= e/restore") Signed-off-by: Fuad Tabba Reviewed-by: Sascha Bischoff --- arch/arm64/kvm/vgic/vgic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c index 74bace10a22ed..df58c0042ed63 100644 --- a/arch/arm64/kvm/vgic/vgic.c +++ b/arch/arm64/kvm/vgic/vgic.c @@ -1042,11 +1042,15 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vc= pu) static inline bool can_access_vgic_from_kernel(void) { /* - * GICv2 can always be accessed from the kernel because it is - * memory-mapped, and VHE systems can access GICv3 EL2 system - * registers. + * GICv3 and GICv5 drive the CPU interface through EL2 system + * registers, so only VHE reaches them from the kernel. GICv2 is + * memory-mapped and always reachable. */ - return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has= _vhe(); + if (kvm_vgic_global_state.type =3D=3D VGIC_V5 || + static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) + return has_vhe(); + + return true; } =20 static inline void vgic_save_state(struct kvm_vcpu *vcpu) --=20 2.39.5 From nobody Fri Oct 2 01:54:31 2026 Received: from out-181.mta1.migadu.com (mta1.migadu.com [37.59.57.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 643E8439354 for ; Thu, 6 Aug 2026 10:03:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=37.59.57.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010641; cv=none; b=JeYiWsRA6LByNbb/qXwQ/Ojg4ptLgsqUySBwsf5IC1SDnOPgziLsFlXPmq1yDuoqbcgwn+CcgbLTXSvD56XPc0tVAXozpKLpf5g4tQkjPgh5FXUL6sKmJ2DD2ZYqKTxr3Ylry9yugycTRb6RoP7rQ6ibfYt5+DSOwvjpa+jjaSc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786010641; c=relaxed/simple; bh=AapJAWxwRl4gapA6ITvi11hbMk7dOgFHL+PEAcU0ZYg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Ds2o8EYuVhtv784m57ku15IrTcf5yueUn+SToU3nr49OwMdIDcJo9bLhCmTcZKiLjfnc0YELhcffiCk0cELTvI3Sjd+k4X8Ehejo/z1ob+aWPilOSUykzrseKUnjI9/v66NStaTxzlCawt4uW5QaMqEOGCHMvZWeq1BRAyew0M8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=T++QlOkz; arc=none smtp.client-ip=37.59.57.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="T++QlOkz" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786010636; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LfpLkO0z7XT9QDSQsybvalFkn5acGM788D+d/q1c9Ds=; b=T++QlOkzH/ZJ163nv2/cuMVhISi9opZp+Cyw+QHMDZ+LoXjRuJieqOrFU8bRfETOodbMCx eQ7gSRsS8CGdgAYgkKTsCASbsF55JhY71OjNR11vJpKzZbuUR37IYX9G9+dL5JcrgktzC2 acSMHDwTvZdEUNb9xYMwNO3g32rGoxE= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Sascha Bischoff Subject: [PATCH v1 4/4] KVM: arm64: Fix stale VGICv3 comments in the nVHE world switch Date: Thu, 6 Aug 2026 11:02:56 +0100 Message-Id: <20260806100256.371164-5-fuad.tabba@linux.dev> In-Reply-To: <20260806100256.371164-1-fuad.tabba@linux.dev> References: <20260806100256.371164-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" __hyp_vgic_save_state() and __hyp_vgic_restore_state() handle GICv5 as well as GICv3, but their comments name VGICv3 only. No functional change intended. Signed-off-by: Fuad Tabba Reviewed-by: Sascha Bischoff --- arch/arm64/kvm/hyp/nvhe/switch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/swi= tch.c index 7318e3e6a5f36..6b9e20f6b31b3 100644 --- a/arch/arm64/kvm/hyp/nvhe/switch.c +++ b/arch/arm64/kvm/hyp/nvhe/switch.c @@ -110,7 +110,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu) write_sysreg(__kvm_hyp_host_vector, vbar_el2); } =20 -/* Save VGICv3 state on non-VHE systems */ +/* Save vgic state on non-VHE systems */ static void __hyp_vgic_save_state(struct kvm_vcpu *vcpu) { if (vgic_is_v5(kern_hyp_va(vcpu->kvm))) { @@ -125,7 +125,7 @@ static void __hyp_vgic_save_state(struct kvm_vcpu *vcpu) } } =20 -/* Restore VGICv3 state on non-VHE systems */ +/* Restore vgic state on non-VHE systems */ static void __hyp_vgic_restore_state(struct kvm_vcpu *vcpu) { if (vgic_is_v5(kern_hyp_va(vcpu->kvm))) { --=20 2.39.5