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charset="utf-8" On AM64 EVM and SK boards, MMC1_SDWP is used for IO expander interrupt, remove from MMC1 pinmux node and setup as exp1 IO expander interrupt. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am642-evm.dts | 15 ++++++++++++++- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 15 ++++++++++++++- 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/= ti/k3-am642-evm.dts index bc4347cf71140..28fbaf134af4f 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "k3-am642.dtsi" =20 @@ -259,11 +260,17 @@ AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC= 1_DAT1 */ AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ - AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */ >; }; =20 + main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x029c, PIN_INPUT, 7) /* (C20) MMC1_SDWP.GPIO1_78 */ + >; + bootph-all; + }; + main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins =3D < AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ @@ -481,6 +488,12 @@ exp1: gpio@22 { bootph-all; compatible =3D "ti,tca6424"; reg =3D <0x22>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_gpio1_ioexp_intr_pins_default>; + interrupt-parent =3D <&main_gpio1>; + interrupts =3D <78 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells =3D <2>; gpio-controller; #gpio-cells =3D <2>; gpio-line-names =3D "GPIO_eMMC_RSTn", "CAN_MUX_SEL", diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/t= i/k3-am642-sk.dts index d28a38c87f32a..aa87845d77598 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -7,6 +7,7 @@ =20 #include #include +#include #include #include #include "k3-am642.dtsi" @@ -198,7 +199,6 @@ &main_pmx0 { main_mmc1_pins_default: main-mmc1-default-pins { bootph-all; pinctrl-single,pins =3D < - AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ @@ -210,6 +210,13 @@ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1= _DAT3 */ >; }; =20 + main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { + pinctrl-single,pins =3D < + AM64X_IOPAD(0x029c, PIN_INPUT, 7) /* (C20) MMC1_SDWP.GPIO1_78 */ + >; + bootph-all; + }; + main_uart0_pins_default: main-uart0-default-pins { bootph-all; pinctrl-single,pins =3D < @@ -383,6 +390,12 @@ exp1: gpio@70 { bootph-all; compatible =3D "nxp,pca9538"; reg =3D <0x70>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_gpio1_ioexp_intr_pins_default>; + interrupt-parent =3D <&main_gpio1>; + interrupts =3D <78 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells =3D <2>; gpio-controller; #gpio-cells =3D <2>; gpio-line-names =3D "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", --=20 2.54.0 From nobody Fri Oct 2 05:29:26 2026 Received: from mx0b-0002e601.pphosted.com (mx0b-0002e601.pphosted.com [148.163.154.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7418119D07A; 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charset="utf-8" MMC0_CLKLB and MMC0_CLK have incorrectly swapped register addresses as per datasheet [0]. Set the correct MMC0_CLK address and drop the unneeded MMC0_CLKLB pin configuration. [0] https://www.ti.com/lit/gpn/am62a7 Rev. E: Table 5-1. Pin Attributes Fixes: e041ec6e86e7 ("arm64: dts: ti: k3-am62a7-sk: Enable eMMC support") Cc: Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index d3b3675e7a8fc..b04636cab71c7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -328,8 +328,7 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0= _CSn3.I2C2_SDA */ main_mmc0_pins_default: main-mmc0-default-pins { pinctrl-single,pins =3D < AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ - AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ --=20 2.54.0 From nobody Fri Oct 2 05:29:26 2026 Received: from mx0a-0002e601.pphosted.com (mx0a-0002e601.pphosted.com [148.163.150.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F63B1CAA78; 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charset="utf-8" MMC clock pins must be configured as OUTPUT-only per TRM [0] with receiver disabled (RXACTIVE bit =3D 0). Change MMC CLK pins from PIN_INPUT to PIN_OUTPUT to match documentation. [0] https://www.ti.com/lit/pdf/spruj16 Rev. C: Table 12-257. MMCSDi I/O Sig= nals Signed-off-by: Judith Mendez Reviewed-by: Moteen Shah --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index b04636cab71c7..e63c5200a2370 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -328,7 +328,7 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0= _CSn3.I2C2_SDA */ main_mmc0_pins_default: main-mmc0-default-pins { pinctrl-single,pins =3D < AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62AX_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */ AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ @@ -344,7 +344,7 @@ AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_= DAT7 */ main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins =3D < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ - AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ + AM62AX_IOPAD(0x234, PIN_OUTPUT, 0) /* (B22) MMC1_CLK */ AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ --=20 2.54.0 From nobody Fri Oct 2 05:29:26 2026 Received: from mx0b-0002e601.pphosted.com (mx0b-0002e601.pphosted.com [148.163.154.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A9A21C8604; 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charset="utf-8" MMC clock pins must be configured as OUTPUT-only per TRM [0] with receiver disabled (RXACTIVE bit =3D 0). Change MMC CLK pins from PIN_INPUT to PIN_OUTPUT to match documentation. [0] https://www.ti.com/lit/pdf/spruiv7 Rev. C: Table 12-246. MMCSDi I/O Sig= nals Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 2 +- arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts | 2 +- arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 6 +++--- arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi | 2 +- arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts= /ti/k3-am62-lp-sk.dts index dfd65c00f5b95..7fd508f4eddf1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -86,7 +86,7 @@ main_mmc0_pins_default: main-mmc0-default-pins { bootph-all; pinctrl-single,pins =3D < AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */ - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */ + AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (Y1) MMC0_CLK */ AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (V2) MMC0_DAT0 */ AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (V1) MMC0_DAT1 */ AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (W2) MMC0_DAT2 */ diff --git a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts b/arch/arm64/= boot/dts/ti/k3-am62-pocketbeagle2.dts index 7a4cffc27bda3..1c691629d4ad0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-pocketbeagle2.dts @@ -235,7 +235,7 @@ AM62X_IOPAD(0x0020, PIN_OUTPUT, 3) /* (J25) OSPI0_D5.UA= RT6_TXD */ main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins =3D < AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */ - AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */ + AM62X_IOPAD(0x234, PIN_OUTPUT, 0) /* (B22/A20) MMC1_CLK */ AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */ AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */ AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */ diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/bo= ot/dts/ti/k3-am625-beagleplay.dts index c468b9c5fc09a..898e4ca3fd87e 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts @@ -323,7 +323,7 @@ emmc_pins_default: emmc-default-pins { bootph-all; pinctrl-single,pins =3D < AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62X_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */ AM62X_IOPAD(0x0214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ AM62X_IOPAD(0x0210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */ AM62X_IOPAD(0x020c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */ @@ -346,7 +346,7 @@ sd_pins_default: sd-default-pins { bootph-all; pinctrl-single,pins =3D < AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ - AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ + AM62X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (B22) MMC1_CLK */ AM62X_IOPAD(0x0230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ AM62X_IOPAD(0x022c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ AM62X_IOPAD(0x0228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ @@ -358,7 +358,7 @@ AM62X_IOPAD(0x0240, PIN_INPUT, 7) /* (D17) MMC1_SDCD.GP= IO1_48 */ wifi_pins_default: wifi-default-pins { pinctrl-single,pins =3D < AM62X_IOPAD(0x0120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ - AM62X_IOPAD(0x0118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ + AM62X_IOPAD(0x0118, PIN_OUTPUT, 0) /* (D25) MMC2_CLK */ AM62X_IOPAD(0x0114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ AM62X_IOPAD(0x0110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ AM62X_IOPAD(0x010c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */ diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am625-sk-common.dtsi index 9c83626826453..085b067d96fbb 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-common.dtsi @@ -98,7 +98,7 @@ main_mmc0_pins_default: main-mmc0-default-pins { bootph-all; pinctrl-single,pins =3D < AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62X_IOPAD(0x218, PIN_OUTPUT, 0) /* (AB1) MMC0_CLK */ AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/bo= ot/dts/ti/k3-am62x-sk-common.dtsi index ab9e58c2d225e..d2f41e2ed6239 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi @@ -194,7 +194,7 @@ main_mmc1_pins_default: main-mmc1-default-pins { bootph-all; pinctrl-single,pins =3D < AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */ - AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */ + AM62X_IOPAD(0x234, PIN_OUTPUT, 0) /* (B22/A20) MMC1_CLK */ AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */ AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */ AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */ --=20 2.54.0