From nobody Fri Oct 2 04:41:31 2026 Received: from mail-244108.protonmail.ch (mail-244108.protonmail.ch [109.224.244.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E704F3E3C4D; Wed, 5 Aug 2026 07:21:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.108 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914514; cv=none; b=UHSS5PBD9sKWYTHdcs6Sf5W7hWKHULJCpczT9hYA2dbxCNi5z2KDXQrrTr0425jYUqhioWwt96x1c+trNFiF9fhGAHfCjDhEWknJrpWnCkhLaSBWWO/FfAH3pSCBkWO5CRMdLYbgBPdTRZseDxKnBXAhrBiHA65HsLSQL9KbsWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914514; c=relaxed/simple; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qhHNhMhDOIUCN/KrPjwHyqJeWuy29op+yZ5czv5xFL0+haXQuKYQWkke0yXKzzRNKLmNPx2XQE3kbq9mjJQw3GEQFp/Fx6GQVjoRTcRUDDxI6Gr1OhZ1GWNfvcW/VzCavmOYZxUMONeqyA/Gk5zlxmtsuY+Acp/1EHov3b2z9T0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=Hfe05xOg; arc=none smtp.client-ip=109.224.244.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="Hfe05xOg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785914508; x=1786173708; bh=sNcmNScEhpmF/4cOJIi/n2ntDi0iE/3WYicZo1sq86I=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=Hfe05xOgaLxrUU4CSWee8VZ0Qco4byjmVXfTgFunwxqSGzr6Esxl8ypvFcF1SZZ2Z FFZBW/Qb/MHNi/DbAfux6r5fJg8dR5iPFHo61TFeHaM+9HYe7/igZkPhteDVcqqk8A 60630TIZeDdQiUHZ5ETKWDlOgnrON/7ODHXe9q4+Ml6p/ItIOTahUm8T21kkZoKdJe ENI2bQPtIbvuqGVumY99LE0hvJD2j+jkOZaZ67tGpm9rByxHi78XIhh0aTdZI4QN5c 5SbmL0rq6mfVMD3eSwdlsQbUlpM8h0vUjyiTWj1B0tGNm6jyVq4SH3LRTVRLIp8i8z nFPFRmBmgdsoA== X-Pm-Submission-Id: 4hFMKk3dKbz2ScQF From: Esben Haabendal Date: Wed, 05 Aug 2026 09:21:35 +0200 Subject: [PATCH v3 1/4] dt-bindings: iio: accel: mma8452: Add drive-open-drain Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260805-mma8452-open-drain-v3-1-6149f406a409@geanix.com> References: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> In-Reply-To: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785914502; l=1037; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; b=zeuEIpiflvNI5qTAsOwgR6ssTbK/cxdygHvk78HyZiDpvUtJXvDtz7IpBjsHSXdurCtM7WgjL RuAChg2Sp6nB/nrSaJEdp2IFBfj0HjOXnt34o7lX3SJf2ej0rMpDuLm X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Add new boolean to configure selected interrupt pin to open drain instead of the default push-pull mode. Acked-by: Rob Herring (Arm) Signed-off-by: Esben Haabendal --- Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml b= /Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml index b0dd2b4e116a..20701aa725d0 100644 --- a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml +++ b/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml @@ -39,6 +39,12 @@ properties: minItems: 1 maxItems: 2 =20 + drive-open-drain: + $ref: /schemas/types.yaml#/definitions/flag + description: the interrupt line will be configured as open drain, whic= h is + useful if several sensors share the same interrupt line. (This bindi= ng is + taken from pinctrl.) + vdd-supply: true vddio-supply: true =20 --=20 2.55.0 From nobody Fri Oct 2 04:41:31 2026 Received: from mail-244108.protonmail.ch (mail-244108.protonmail.ch [109.224.244.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C361E3E3DA6; Wed, 5 Aug 2026 07:21:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.108 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914520; cv=none; b=A79tfx1nzBpDxK1JUAXQ3c/AxNCLvCMhiMCbU/jZKdN+vtzq0D8VRaKEhAGPyckG/u4FFJ2LbYPyKUaZcalsAOLxDtEHnLcqU+LLgeMyjpR2oy13B+iqMuRoB/E1jBWr4/Ng7CQUVYH8H6kUZriDjuX6PKI8kmv/s8vKFQhQ+Ag= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914520; c=relaxed/simple; bh=DcA2x3+/k37BO92LD1p/ylm5SKaGYZeTNs5yevtyg+8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qCprkSSbGob0VM9/Ys521yltpYsAEy//H/Bk6w+5+YnZJMUJcjK9REPcvG2fpoyuLSsoeiC6j6POBI7JcuFHdigcCPdzG8ywi3Pime7izp8pc6hMBQAWo+EwwmdV7i01WbrhNF8aOl6YKjWibiqp3yROMwXZ+lUE9sd4ZVVimRI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=BnHwtdv9; arc=none smtp.client-ip=109.224.244.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="BnHwtdv9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785914509; x=1786173709; bh=lKyK1WFSI62qz5cEOMEaGbIYltlFjbWXiQGcFOldJuk=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=BnHwtdv9b49YtqY+y3Z7/k8Ff0dGhoxxNJGLGI2F75honkNeLXZjICmJs60F/ypAO oGo3DbfK0T3WlXynXBmbH9vUqX28eSQySfcKS9rKAnjJf5iFs5xevoWO2E8gOw6huT K0pPIvZ3eDde9NVN2d/VwKWz4dU4tOXJQXuHQ160BZL2JCuYEGwaXEBTO1ZT+6Q0G/ USh3qu7sbVRFizaeLo8Al4APBhdD1DjrapEjq17rzc1BVkkQNYIzSb2kM/KE7Rh43M SeKbLOnJ7MbM9Cg9DlVOvyBvS3shCZeQ5FYIWxrNyHXzRMpaQoIpSrzHCW/lmaL8Us DaaVzFDYK0uhQ== X-Pm-Submission-Id: 4hFMKm62b6z1DDrZ From: Esben Haabendal Date: Wed, 05 Aug 2026 09:21:36 +0200 Subject: [PATCH v3 2/4] iio: accel: mma8452: Optimize struct mm8452_data member orders Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260805-mma8452-open-drain-v3-2-6149f406a409@geanix.com> References: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> In-Reply-To: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785914502; l=922; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=DcA2x3+/k37BO92LD1p/ylm5SKaGYZeTNs5yevtyg+8=; b=NGNcO1ck2HjQVqKHWB0y654f2csFGqJDnPQogd9Q33I0p9F9NK+xJHqQfwqc6iB40btwQp9KG JQ62xQZYd6rAD6nQIy0L2tMofWnrlqpbpr+361nhtpncLF6NfS25eLp X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Reorder struct mma8452_data members to avoid holes. Reviewed-by: Joshua Crofts Signed-off-by: Esben Haabendal Reviewed-by: Andy Shevchenko --- drivers/iio/accel/mma8452.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 7d683686dd9d..f645a5c6fd1c 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -106,10 +106,7 @@ struct mma8452_data { struct i2c_client *client; struct mutex lock; struct iio_mount_matrix orientation; - u8 ctrl_reg1; - u8 data_cfg; const struct mma_chip_info *chip_info; - int sleep_val; struct regulator *vdd_reg; struct regulator *vddio_reg; =20 @@ -118,6 +115,10 @@ struct mma8452_data { __be16 channels[3]; aligned_s64 ts; } buffer; + + int sleep_val; + u8 ctrl_reg1; + u8 data_cfg; }; =20 /** --=20 2.55.0 From nobody Fri Oct 2 04:41:31 2026 Received: from mail-43170.protonmail.ch (mail-43170.protonmail.ch [185.70.43.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B9663E3DB3 for ; Wed, 5 Aug 2026 07:21:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914521; cv=none; b=eeCrumamarBFKQcPAZAXQtrOLs43KdeWgQNsKQDBJ2eiChiemkXQRv/HoT1HFV6nspfXMitktu1q6c5GOEsh/RAI+NdIJBSMpgjRFAYBVdSfZV+wMOGiL3mZjg6BrPcgszfEQqGaywTTfMhrFYP3sWgo1JBG6zKxlDtrwHlHFx0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914521; c=relaxed/simple; bh=Asys/l5kf2kl/oT8Duj+DEFHKiFbbacSeXHFVUJ7pOU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rJNrLQdBwlp0vk4OjNwPwjpbXM3e7/1WHgGuRTh+K1Rmz1W2oVMkX7ED2NNE3U+i2S61Wq0ct+REVlwy88qSNHxEsURd7VqmRc8cENZRianbwKOVXC3NXwiPQtnEExsSej9D+NVsWKG+tlkxShv7NVKndJtfbv54h3EqqbmjgpE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=uBrFROoK; arc=none smtp.client-ip=185.70.43.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="uBrFROoK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785914514; x=1786173714; bh=5Q+k7JiM1qH6orV/XcRPs5qMQAeInl+Ds1EHW53hz4w=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=uBrFROoKIh44UDftQXW/Pw1yzme1qRzvTNnWeT67aNoNv9gVJb8ieHFJOgZkBVY7k 69Sc+PLI9w5nKrpmd+xEljAD4zLaDCxH0fBzNd9i6MG0DbvfKG9VB1abSCxnhd2gUx wLNTcmUAcTxoZRc2pYxhPXwZFK1O7yHoiu7b84YVppwYZOdvb6CKcmRGCbipY57h3P gGaMAn4NaSAI+oKevwUVpkReYKyDlDIYlke0F5fc2E+abDOM6l7s8CNmSVzQmq+eIr km5y6IDaj7UlV1WwHBR+1ecRY3zZv2FzTdvUYLxhsDsmeezOfDsYOQ1mNTfFseH7El eoGOth/doCh7Q== X-Pm-Submission-Id: 4hFMKp2LsNz2ScQJ From: Esben Haabendal Date: Wed, 05 Aug 2026 09:21:37 +0200 Subject: [PATCH v3 3/4] iio: accel: mma8452: Only apply trigger type when not set by firmware Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260805-mma8452-open-drain-v3-3-6149f406a409@geanix.com> References: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> In-Reply-To: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785914502; l=1248; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=Asys/l5kf2kl/oT8Duj+DEFHKiFbbacSeXHFVUJ7pOU=; b=GbB5Yg4/bZpQt+FVA4wu9FPpLFXk4pq5Uwpa33GJ0jro5+2T63obCOfkMA0pARP8a2ufAAcpx ZNqCo9VFXotBcAcsZqascIPFHv0YZPdqOS96ZfMDbDdaAwsQZ3mOPQV X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Instead of unconditionally overriding the trigger type, it is better to only apply a default when no trigger type is set by firmware. This should be reasonably backward compatible, and should only potentially cause problems if systems exist where firmware specifies an incorrect trigger type. With a bit of luck, there are no such systems. Signed-off-by: Esben Haabendal Reviewed-by: Andy Shevchenko --- drivers/iio/accel/mma8452.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index f645a5c6fd1c..723ca3d9cb96 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1683,9 +1683,14 @@ static int mma8452_probe(struct i2c_client *client) goto trigger_cleanup; =20 if (client->irq) { + unsigned long irq_flags; + + irq_flags =3D irq_get_trigger_type(client->irq); + if (irq_flags =3D=3D IRQ_TYPE_NONE) + irq_flags =3D IRQF_TRIGGER_LOW; + irq_flags |=3D IRQF_ONESHOT; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, - IRQF_TRIGGER_LOW | IRQF_ONESHOT, - client->name, indio_dev); + irq_flags, client->name, indio_dev); if (ret) goto buffer_cleanup; } --=20 2.55.0 From nobody Fri Oct 2 04:41:31 2026 Received: from mail-106113.protonmail.ch (mail-106113.protonmail.ch [79.135.106.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 786393E44E4; Wed, 5 Aug 2026 07:21:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914528; cv=none; b=USkLhLKf+oo6yDX5fQXS59rLNchQIdyalHJzLuJbOlUDc4zb1loYeI1satJ6xLlySYsrF/kqjZUAwbAz6uz4Fq2TnfzacvbsBcGqXnnHnzqQIDaV46tP8hbCtpapkV+G/v/IsUc70fQDP52xUXQ1oR+rZbcREAB7Ldxx0xCRfzU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785914528; c=relaxed/simple; bh=jUwFaC+0P2yB94Vdg7SyUxp9h/AQ9CKGW28W1R05GZo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hjJMVRfGhpAqTfCPP6oVIh7unMBhsbnm5EOfoNJrwnbT6dzMycxCRH3YefidHju2uFx7NdbIY5ntWIbPuf81mXYnxN+hQ8UHOSn4mfh8WFzmtbeMhyOU2b53EC8B3Zu0yvJ9+nKBOsYeFS3vEDsZgg6b619jvJKCA5TbPp/myks= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=Wnnepv6b; arc=none smtp.client-ip=79.135.106.113 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="Wnnepv6b" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785914516; x=1786173716; bh=KjP9SL4ym3Rv1Klf7P/5VjrGwTQDu+KtLGfPry0z3EU=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=Wnnepv6bS9A6q624Vx2d2LqjE5vILNcX6BQ9SvzmMAgfYaWwrvBLjyNUBwhr0rso5 lTeuPqiG1zPeelXOGMZ5hnk0mTd1cMQUecZ7JT1jrlysBwNhfNZhpu28pPTHFdtwGj sKnXKrJ5A+cnJSMtPsX+mpm3JS82e8A8E+JP4IiE5LYi+ux9Bx2h5Ur3xVVyvhWEFy 8e5nYS9+XkmDTAjxbdqEmIjd8u9ypuZBryAWeHd9/xW+v00pt84Nz1Lqpr7PgrD3BI OT+EFmfc5F9v2bvpSuVBJdVWxl5YX9uRv+VXe4Q+xVOtKVcH+6OXHrhQ5YSGS7pO4c nqMFNpq3hAy8A== X-Pm-Submission-Id: 4hFMKv4Crvz2Sccj From: Esben Haabendal Date: Wed, 05 Aug 2026 09:21:38 +0200 Subject: [PATCH v3 4/4] iio: accel: mma8452: Allow open drain interrupt pin configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260805-mma8452-open-drain-v3-4-6149f406a409@geanix.com> References: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> In-Reply-To: <20260805-mma8452-open-drain-v3-0-6149f406a409@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785914502; l=3033; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=jUwFaC+0P2yB94Vdg7SyUxp9h/AQ9CKGW28W1R05GZo=; b=4avtW0JoCpFdvBheNNutwqprLktQ6LO6TOdE481O/0ljrBzNzH/8KRNs6BlGsc4Blp/wp/5Om hHG/mdBdwGKAS9opmliAD+F+duTbJTn5OgXIjWXx1f5xTcWyGktxDFA X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When sharing interrupt line with other chips, the interrupt pin most likely needs to be configured in open-drain mode instead of push-pull. The PP_OD bit in CTRL_REG3 is set when open-drain mode is configured, allowing sharing the interrupt line with other devices (with same interrupt polarity). The IRQF_SHARED flag is added to request_threaded_irq() flags, indicating that the interrupt line can be shared with other devices. Signed-off-by: Esben Haabendal Reviewed-by: Andy Shevchenko --- drivers/iio/accel/mma8452.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 723ca3d9cb96..fa0915530f95 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -81,6 +81,8 @@ #define MMA8452_CTRL_REG2_RST BIT(6) #define MMA8452_CTRL_REG2_MODS_SHIFT 3 #define MMA8452_CTRL_REG2_MODS_MASK 0x1b +#define MMA8452_CTRL_REG3 0x2c +#define MMA8452_CTRL_REG3_PP_OD BIT(0) #define MMA8452_CTRL_REG4 0x2d #define MMA8452_CTRL_REG5 0x2e #define MMA8452_OFF_X 0x2f @@ -119,6 +121,7 @@ struct mma8452_data { int sleep_val; u8 ctrl_reg1; u8 data_cfg; + bool open_drain; }; =20 /** @@ -647,6 +650,22 @@ static int mma8452_set_power_mode(struct mma8452_data = *data, u8 mode) return mma8452_change_config(data, MMA8452_CTRL_REG2, reg); } =20 +static int mma8452_set_interrupt_pin_mode(struct mma8452_data *data) +{ + int reg; + + reg =3D i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG3); + if (reg < 0) + return reg; + + if (data->open_drain) + reg |=3D MMA8452_CTRL_REG3_PP_OD; + else + reg &=3D ~MMA8452_CTRL_REG3_PP_OD; + + return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG3, reg); +} + /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */ static int mma8452_freefall_mode_enabled(struct mma8452_data *data) { @@ -1667,6 +1686,11 @@ static int mma8452_probe(struct i2c_client *client) goto disable_regulators; } =20 + data->open_drain =3D device_property_read_bool(&client->dev, "drive-open-= drain"); + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto trigger_cleanup; + data->ctrl_reg1 =3D MMA8452_CTRL_ACTIVE | (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT); =20 @@ -1688,7 +1712,7 @@ static int mma8452_probe(struct i2c_client *client) irq_flags =3D irq_get_trigger_type(client->irq); if (irq_flags =3D=3D IRQ_TYPE_NONE) irq_flags =3D IRQF_TRIGGER_LOW; - irq_flags |=3D IRQF_ONESHOT; + irq_flags |=3D IRQF_ONESHOT | IRQF_SHARED; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, irq_flags, client->name, indio_dev); if (ret) @@ -1806,6 +1830,10 @@ static int mma8452_runtime_resume(struct device *dev) return ret; } =20 + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto runtime_resume_failed; + ret =3D mma8452_active(data); if (ret < 0) goto runtime_resume_failed; --=20 2.55.0