From nobody Fri Oct 2 06:16:32 2026 Received: from out-164.mta1.migadu.com (out-164.mta1.migadu.com [95.215.58.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39710368D5A for ; Tue, 4 Aug 2026 15:46:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.164 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785858416; cv=none; b=YQ6QkKsqQxAGn4E8ZTz8N+BDGhQjKSaiVDMDXvCDUzLImmETjQcsqgrvcHh2CA6UC5J8AJcO/+Di2sLCWbaE6MhYMgKxFKych86bCylzdMNr62ZzvvlACUWhzvuvZfUmxL0zRhk3hTlsa7BS7a3eI2mUsYf+WUZEf1MexbO0AC8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785858416; c=relaxed/simple; bh=IqS6oyBgIDjHtaQHvzSbG4MM9UaB29p+F+ApFnitYfQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VvZazIuYT1uXQAFFGjtNrPGco/mJ0nN7jC/2SWkWC+WBQrU0zcdV6j3ycmWO5hYxh2loBzxbCD8PLafwSWhuX0ShoPOoNEwGCN+P/+pXtAVRpmi1wMnTE8O19jr8/Lvy8nPnWg4Y4ihM1OU1f0Fuzm1/3R5HOamXpfF0BTgrtnQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=i+Ap7AAb; arc=none smtp.client-ip=95.215.58.164 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="i+Ap7AAb" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1785858402; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MZajl5Xdn8pCbprwTdxblPIPdG7FZfeAhKaqi9LI+wg=; b=i+Ap7AAb+2UL+WGGv3vKg5oW4oFGgvO/ojWdNxgpOnwkcMV6S0FdYpUjkKDVHpwcxGsRAR 4qN9P8PkcKjYkShHhEAEuAIXVlTDMzXmeyTBY3GA+fytqo1KmAYvwIZEqPj4ybZsVY+Njc 1AsKMlEBwuvomFbGJGrrP8QWpIU9EAI= From: George Guo To: chenhuacai@kernel.org, yangtiezhu@loongson.cn, hengqi.chen@gmail.com, ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org Cc: kernel@xen0n.name, martin.lau@linux.dev, eddyz87@gmail.com, memxor@gmail.com, song@kernel.org, yonghong.song@linux.dev, jolsa@kernel.org, guodongtai@kylinos.cn, bpf@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] LoongArch: BPF: Support internal-only MOV to resolve per-CPU addrs Date: Tue, 4 Aug 2026 23:39:37 +0800 Message-ID: <20260804153938.16129-2-dongtai.guo@linux.dev> In-Reply-To: <20260804153938.16129-1-dongtai.guo@linux.dev> References: <20260804153938.16129-1-dongtai.guo@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: George Guo Support the internal-only BPF_MOV instruction that resolves the absolute address of per-CPU data from its per-CPU offset. This instruction is used only for internal inlining optimizations between the BPF verifier and the JITs (e.g. inlining bpf_get_smp_processor_id() and per-CPU map lookups). LoongArch keeps the per-CPU offset of the current CPU in $r21 (__my_cpu_offset), so resolving a per-CPU address only requires adding $r21 to the source register holding the per-CPU offset. Advertise the capability via bpf_jit_supports_percpu_insn(). Signed-off-by: George Guo Acked-by: Tiezhu Yang Tested-by: Tiezhu Yang --- arch/loongarch/include/asm/inst.h | 1 + arch/loongarch/net/bpf_jit.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm= /inst.h index 54f35bcd0f66..585667e361c2 100644 --- a/arch/loongarch/include/asm/inst.h +++ b/arch/loongarch/include/asm/inst.h @@ -411,6 +411,7 @@ enum loongarch_gpr { LOONGARCH_GPR_T6, LOONGARCH_GPR_T7, LOONGARCH_GPR_T8, + LOONGARCH_GPR_U0 =3D 21, /* Kernel per-CPU base register ($r21) */ LOONGARCH_GPR_FP =3D 22, LOONGARCH_GPR_S0 =3D 23, LOONGARCH_GPR_S1, diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c index aa88f904a5ca..b8dd956d46bd 100644 --- a/arch/loongarch/net/bpf_jit.c +++ b/arch/loongarch/net/bpf_jit.c @@ -722,6 +722,15 @@ static int build_insn(const struct bpf_insn *insn, str= uct jit_ctx *ctx, bool ext move_reg(ctx, dst, t1); break; } + if (insn_is_mov_percpu_addr(insn)) { + if (dst !=3D src) + move_reg(ctx, dst, src); +#ifdef CONFIG_SMP + /* dst +=3D __my_cpu_offset, held in $r21 */ + emit_insn(ctx, addd, dst, dst, LOONGARCH_GPR_U0); +#endif + break; + } switch (off) { case 0: move_reg(ctx, dst, src); @@ -2376,6 +2385,11 @@ bool bpf_jit_supports_ptr_xchg(void) return true; } =20 +bool bpf_jit_supports_percpu_insn(void) +{ + return true; +} + /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */ bool bpf_jit_supports_subprog_tailcalls(void) { --=20 2.53.0 From nobody Fri Oct 2 06:16:32 2026 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 528BC306756 for ; Tue, 4 Aug 2026 15:46:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785858416; cv=none; b=qUapGS2u8gJbpEJMcs7M+h+rFtMYwDRUC1UQa4alO6V6uwedwfZH2tiJ3NdFEPDVB2+I1hDiULd0wmjV74uUzorpKlsuZgBbYNn+wC8U40BbquBUBN98bl/OIcmM4PEJmlZTcxNucliqUi18FZ8w6NHWK4cKXqGuMcQanz4rVRA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785858416; c=relaxed/simple; bh=UkvTxU0c2KcE5jFeR4XX4JR57uXmgvH73AtGAwrlKzk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QSXD8T6gThdbN8D5ykLADvkrRCdJHjijp3RiRKYrLFITbnmd0/ZLTq3lqUMZpCZ1O8G7RlHXSWeurX7ED4Nq24tgO8Wg1eBFli5hS/y+UZOzc5cd5kFO83wjfNXDcinqegMZNQnt/NWro/aYSneg00n9ZTJN7/hPKc2azjOmWeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=LNUCVGYZ; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="LNUCVGYZ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1785858411; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oSVnprZ4KaeR41KPt5lEBSjzlm/HBklaQ8jOsYV0o8o=; b=LNUCVGYZQoKtwmckWUWCwzkQLC4YE4zGBIc+sDZXx9efG8Y+xVIKWJjX/dyltbrzSnGT96 5og8lI3TFw6JTfzEjGuxfT+cObKohK0AuTu02VVcMRIp8DWNKVkYYkkra8fmMHY3V0B8ie RWZs5cV1shBDakXFQzWNqQArlOP5iZs= From: George Guo To: chenhuacai@kernel.org, yangtiezhu@loongson.cn, hengqi.chen@gmail.com, ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org Cc: kernel@xen0n.name, martin.lau@linux.dev, eddyz87@gmail.com, memxor@gmail.com, song@kernel.org, yonghong.song@linux.dev, jolsa@kernel.org, guodongtai@kylinos.cn, bpf@vger.kernel.org, loongarch@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] LoongArch: BPF: Add timed may_goto support Date: Tue, 4 Aug 2026 23:39:38 +0800 Message-ID: <20260804153938.16129-3-dongtai.guo@linux.dev> In-Reply-To: <20260804153938.16129-1-dongtai.guo@linux.dev> References: <20260804153938.16129-1-dongtai.guo@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: George Guo Implement arch_bpf_timed_may_goto() and advertise it through bpf_jit_supports_timed_may_goto() so the verifier lowers may_goto into the timed variant: instead of a fixed iteration counter, the loop is bounded by a wall-clock timeout maintained in a per-loop stack slot. arch_bpf_timed_may_goto() uses a custom calling convention: the verifier passes the count/timestamp stack offset in BPF_REG_AX and expects the updated count back in the same register. The JIT call path therefore skips the usual 'BPF_REG_0 =3D C return value' move for this helper. Signed-off-by: George Guo Acked-by: Tiezhu Yang Tested-by: Tiezhu Yang --- arch/loongarch/net/Makefile | 2 +- arch/loongarch/net/bpf_jit.c | 13 ++++++- arch/loongarch/net/bpf_timed_may_goto.S | 47 +++++++++++++++++++++++++ 3 files changed, 60 insertions(+), 2 deletions(-) create mode 100644 arch/loongarch/net/bpf_timed_may_goto.S diff --git a/arch/loongarch/net/Makefile b/arch/loongarch/net/Makefile index 1ec12a0c324a..8d9ddb48f9ea 100644 --- a/arch/loongarch/net/Makefile +++ b/arch/loongarch/net/Makefile @@ -4,4 +4,4 @@ # # Copyright (C) 2022 Loongson Technology Corporation Limited # -obj-$(CONFIG_BPF_JIT) +=3D bpf_jit.o +obj-$(CONFIG_BPF_JIT) +=3D bpf_jit.o bpf_timed_may_goto.o diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c index b8dd956d46bd..004a139e0f49 100644 --- a/arch/loongarch/net/bpf_jit.c +++ b/arch/loongarch/net/bpf_jit.c @@ -1192,7 +1192,13 @@ static int build_insn(const struct bpf_insn *insn, s= truct jit_ctx *ctx, bool ext move_addr(ctx, t1, func_addr); emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0); =20 - if (insn->src_reg !=3D BPF_PSEUDO_CALL) + /* + * Call to arch_bpf_timed_may_goto() uses a custom calling + * convention with the argument and return value in BPF_REG_AX, + * so skip moving the C return value into BPF_REG_0. + */ + if (insn->src_reg !=3D BPF_PSEUDO_CALL && + func_addr !=3D (u64)arch_bpf_timed_may_goto) move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0); =20 break; @@ -2390,6 +2396,11 @@ bool bpf_jit_supports_percpu_insn(void) return true; } =20 +bool bpf_jit_supports_timed_may_goto(void) +{ + return true; +} + /* Indicate the JIT backend supports mixing bpf2bpf and tailcalls. */ bool bpf_jit_supports_subprog_tailcalls(void) { diff --git a/arch/loongarch/net/bpf_timed_may_goto.S b/arch/loongarch/net/b= pf_timed_may_goto.S new file mode 100644 index 000000000000..8a4c15418998 --- /dev/null +++ b/arch/loongarch/net/bpf_timed_may_goto.S @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Author: George Guo + * Copyright (C) 2026 KylinSoft Corporation. + */ + +#include +#include +#include +#include + +SYM_FUNC_START(arch_bpf_timed_may_goto) + addi.d sp, sp, -64 + st.d ra, sp, 56 + + /* Save BPF registers R0 - R5 (a5, a0 - a4) */ + st.d a5, sp, 8 + st.d a0, sp, 16 + st.d a1, sp, 24 + st.d a2, sp, 32 + st.d a3, sp, 40 + st.d a4, sp, 48 + + /* + * BPF_REG_AX (t0) holds the offset passed in by the verifier; add it + * to BPF_REG_FP (s4) to get the pointer to the count and timestamp, + * then pass it as the first argument in a0. + * + * The verifier emits a load using FP right before this call, so + * BPF_REG_FP (s4) is always set up by the JIT in this case. + */ + add.d a0, t0, s4 + bl bpf_check_timed_may_goto + /* BPF_REG_AX (t0) will be stored into count, so move the return value to= it. */ + move t0, a0 + + ld.d ra, sp, 56 + ld.d a5, sp, 8 + ld.d a0, sp, 16 + ld.d a1, sp, 24 + ld.d a2, sp, 32 + ld.d a3, sp, 40 + ld.d a4, sp, 48 + addi.d sp, sp, 64 + + jr ra +SYM_FUNC_END(arch_bpf_timed_may_goto) --=20 2.53.0