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Mon, 03 Aug 2026 15:56:00 -0700 (PDT) Received: from potato ([31.176.181.48]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49949f68f95sm35691695e9.0.2026.08.03.15.55.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 15:55:59 -0700 (PDT) From: Omer El Idrissi To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Omer El Idrissi Subject: [PATCH] riscv: add ntl_hints.h for non-temporal locality hints Date: Tue, 4 Aug 2026 00:55:47 +0200 Message-ID: <20260803225551.142098-1-omer.e.idrissi@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Provides asm volatile wrappers for all NTL hint variants (P1, PALL, S1, ALL) defined by the Zihintntl extension. These hints request non-temporal caching behaviour for subsequent loads and stores. The new header falls under the existing riscv arch maintainers in MAINTAINERS, so no separate entry needed. Signed-off-by: Omer El Idrissi --- arch/riscv/include/asm/ntl_hints.h | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 arch/riscv/include/asm/ntl_hints.h diff --git a/arch/riscv/include/asm/ntl_hints.h b/arch/riscv/include/asm/nt= l_hints.h new file mode 100644 index 000000000000..0c51cb8b49c2 --- /dev/null +++ b/arch/riscv/include/asm/ntl_hints.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_NTL_HINTS_H +#define _ASM_RISCV_NTL_HINTS_H + +#define ntl_all() ({ __asm__ __volatile__("add x0, x0, x5" ::: ); }) +#define ntl_p1() ({ __asm__ __volatile__("add x0, x0, x2" ::: ); }) +#define ntl_pall() ({ __asm__ __volatile__("add x0, x0, x3" ::: ); }) +#define ntl_s1() ({ __asm__ __volatile__("add x0, x0, x4" ::: ); }) + +#endif /* _ASM_RISCV_NTL_HINTS_H */ --=20 2.53.0