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charset="utf-8" A PCI function has only a few BARs, but an NTB device may need more logical MWs, for example to give queues separate windows. Splitting a large or resizable BAR avoids spending one BAR per MW. BAR subrange mappings for that would consume one inbound mapping region per logical MW. Those regions can be scarce on some PCIe controller integrations, limiting the number of MWs. Introduce translation groups whose members use contiguous local backing, so one inbound mapping can cover the whole group. Add a group query and atomic group set/clear operations. Singleton groups keep using the existing per-MW callbacks. Signed-off-by: Koichiro Den --- include/linux/ntb.h | 133 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 128 insertions(+), 5 deletions(-) diff --git a/include/linux/ntb.h b/include/linux/ntb.h index ae72caa03859..c21c6495d18f 100644 --- a/include/linux/ntb.h +++ b/include/linux/ntb.h @@ -217,6 +217,9 @@ static inline int ntb_ctx_ops_is_valid(const struct ntb= _ctx_ops *ops) * @link_disable: See ntb_link_disable(). * @mw_count: See ntb_mw_count(). * @mw_get_align: See ntb_mw_get_align(). + * @mw_get_trans_group: See ntb_mw_get_trans_group(). + * @mw_set_trans_group: See ntb_mw_set_trans_group(). + * @mw_clear_trans_group: See ntb_mw_clear_trans_group(). * @mw_set_trans: See ntb_mw_set_trans(). * @mw_clear_trans: See ntb_mw_clear_trans(). * @peer_mw_count: See ntb_peer_mw_count(). @@ -275,6 +278,11 @@ struct ntb_dev_ops { resource_size_t *addr_align, resource_size_t *size_align, resource_size_t *size_max); + int (*mw_get_trans_group)(struct ntb_dev *ntb, int pidx, int widx, + int *gidx, int *gcount); + int (*mw_set_trans_group)(struct ntb_dev *ntb, int pidx, int widx, + dma_addr_t addr, resource_size_t size); + int (*mw_clear_trans_group)(struct ntb_dev *ntb, int pidx, int widx); int (*mw_set_trans)(struct ntb_dev *ntb, int pidx, int widx, dma_addr_t addr, resource_size_t size); int (*mw_clear_trans)(struct ntb_dev *ntb, int pidx, int widx); @@ -352,6 +360,11 @@ static inline int ntb_dev_ops_is_valid(const struct nt= b_dev_ops *ops) ops->mw_get_align && (ops->mw_set_trans || ops->peer_mw_set_trans) && + (!ops->mw_set_trans_group || + ops->mw_get_trans_group) && + /* Group set and clear operations must be provided together */ + !ops->mw_set_trans_group =3D=3D + !ops->mw_clear_trans_group && /* ops->mw_clear_trans && */ ops->peer_mw_count && ops->peer_mw_get_addr && @@ -836,6 +849,102 @@ static inline int ntb_mw_get_align(struct ntb_dev *nt= b, int pidx, int widx, size_max); } =20 +/** + * ntb_mw_get_trans_group() - get the translation group for an inbound MW + * @ntb: NTB device context. + * @pidx: Port index of peer device. + * @widx: Memory window index. + * @gidx: OUT - first memory window index in the group. + * @gcount: OUT - number of memory windows in the group. + * + * Return the first window index and number of consecutive windows in the + * group containing @widx. All translations in a group must be set and cle= ared + * together. If the device operation is not implemented, each window forms= a + * singleton group. + * + * Group definitions for @pidx must not change while @ntb is registered. T= his + * function may be called regardless of the link state. + * + * NULL may be given for either output parameter. + * + * Return: Zero on success, otherwise a negative error number. + */ +static inline int ntb_mw_get_trans_group(struct ntb_dev *ntb, int pidx, + int widx, int *gidx, int *gcount) +{ + if (!ntb->ops->mw_get_trans_group) { + if (gidx) + *gidx =3D widx; + if (gcount) + *gcount =3D 1; + + return 0; + } + + return ntb->ops->mw_get_trans_group(ntb, pidx, widx, gidx, gcount); +} + +static inline int ntb_mw_check_singleton(struct ntb_dev *ntb, int pidx, + int widx) +{ + int first, group_count; + int ret; + + ret =3D ntb_mw_get_trans_group(ntb, pidx, widx, &first, &group_count); + if (ret) + return ret; + + if (first < 0 || group_count <=3D 0 || + widx < first || widx - first >=3D group_count) + return -EINVAL; + + return group_count =3D=3D 1 ? 0 : -EOPNOTSUPP; +} + +/** + * ntb_mw_set_trans_group() - set all translations in an inbound MW group + * @ntb: NTB device context. + * @pidx: Port index of peer device. + * @widx: First memory window index in the group. + * @addr: DMA address of the local memory exposed to the peer. + * @size: Size of the local memory exposed to the peer. + * + * Set the translation for a multi-member group. @widx must be the first M= W in + * the group. @addr and @size describe one contiguous backing range coveri= ng + * the complete group. Singleton groups use ntb_mw_set_trans(). + * + * Return: Zero on success, otherwise a negative error number. + */ +static inline int +ntb_mw_set_trans_group(struct ntb_dev *ntb, int pidx, int widx, + dma_addr_t addr, resource_size_t size) +{ + if (!ntb->ops->mw_set_trans_group) + return -EOPNOTSUPP; + + return ntb->ops->mw_set_trans_group(ntb, pidx, widx, addr, size); +} + +/** + * ntb_mw_clear_trans_group() - clear all translations in an inbound MW gr= oup + * @ntb: NTB device context. + * @pidx: Port index of peer device. + * @widx: First memory window index in the group. + * + * Clear the translation for a multi-member group. @widx must be the first= MW + * in the group. Singleton groups use ntb_mw_clear_trans(). + * + * Return: Zero on success, otherwise a negative error number. + */ +static inline int ntb_mw_clear_trans_group(struct ntb_dev *ntb, int pidx, + int widx) +{ + if (!ntb->ops->mw_clear_trans_group) + return -EOPNOTSUPP; + + return ntb->ops->mw_clear_trans_group(ntb, pidx, widx); +} + /** * ntb_mw_set_trans() - set the translation of an inbound memory window * @ntb: NTB device context. @@ -851,13 +960,20 @@ static inline int ntb_mw_get_align(struct ntb_dev *nt= b, int pidx, int widx, * of that method. * * This method may not be implemented due to the hardware specific memory - * windows interface. + * windows interface. A per-member request for a translation group with + * multiple members returns -EOPNOTSUPP. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx, dma_addr_t addr, resource_size_t size) { + int ret; + + ret =3D ntb_mw_check_singleton(ntb, pidx, widx); + if (ret) + return ret; + if (!ntb->ops->mw_set_trans) return 0; =20 @@ -872,16 +988,23 @@ static inline int ntb_mw_set_trans(struct ntb_dev *nt= b, int pidx, int widx, * @widx: Memory window index. * * Clear the translation of an inbound memory window. The peer may no lon= ger - * access local memory through the window. + * access local memory through the window. A per-member request for a + * translation group with multiple members returns -EOPNOTSUPP. * * Return: Zero on success, otherwise an error number. */ static inline int ntb_mw_clear_trans(struct ntb_dev *ntb, int pidx, int wi= dx) { - if (!ntb->ops->mw_clear_trans) - return ntb_mw_set_trans(ntb, pidx, widx, 0, 0); + int ret; + + ret =3D ntb_mw_check_singleton(ntb, pidx, widx); + if (ret) + return ret; + + if (ntb->ops->mw_clear_trans) + return ntb->ops->mw_clear_trans(ntb, pidx, widx); =20 - return ntb->ops->mw_clear_trans(ntb, pidx, widx); + return ntb_mw_set_trans(ntb, pidx, widx, 0, 0); } =20 /** --=20 2.51.0 From nobody Fri Oct 2 07:47:19 2026 Received: from TY3P286CU002.outbound.protection.outlook.com (mail-japaneastazon11020085.outbound.protection.outlook.com [52.101.229.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2EB842C4FE; Mon, 3 Aug 2026 18:04:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" The legacy control layout cannot describe multiple logical MWs sharing one BAR. Treat a zero version as legacy; version 1 describes all MWs as one packed group using a BAR number and aggregate size. Derive the equal-sized logical MWs from the existing MW count. Signed-off-by: Koichiro Den --- drivers/ntb/hw/epf/ntb_hw_epf.c | 102 ++++++++++++++++++++++++++++---- 1 file changed, 90 insertions(+), 12 deletions(-) diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_ep= f.c index c47607d4f8a7..46f37c2dea7b 100644 --- a/drivers/ntb/hw/epf/ntb_hw_epf.c +++ b/drivers/ntb/hw/epf/ntb_hw_epf.c @@ -31,18 +31,22 @@ #define NTB_EPF_LINK_STATUS 0x0A #define LINK_STATUS_UP BIT(0) =20 -#define NTB_EPF_TOPOLOGY 0x0C +#define NTB_EPF_CTRL_VERSION 0x0C +#define NTB_EPF_CTRL_V1 1 #define NTB_EPF_LOWER_ADDR 0x10 #define NTB_EPF_UPPER_ADDR 0x14 #define NTB_EPF_LOWER_SIZE 0x18 #define NTB_EPF_UPPER_SIZE 0x1C #define NTB_EPF_MW_COUNT 0x20 -#define NTB_EPF_MW1_OFFSET 0x24 +#define NTB_EPF_MW1_OFFSET 0x24 /* v0 only */ #define NTB_EPF_SPAD_OFFSET 0x28 #define NTB_EPF_SPAD_COUNT 0x2C #define NTB_EPF_DB_ENTRY_SIZE 0x30 #define NTB_EPF_DB_DATA(n) (0x34 + (n) * 4) #define NTB_EPF_DB_OFFSET(n) (0xB4 + (n) * 4) +/* v1 only */ +#define NTB_EPF_MW_BAR 0x134 +#define NTB_EPF_MW_GROUP_SIZE 0x138 =20 /* * Legacy doorbell slot layout when paired with pci-epf-*ntb: @@ -88,7 +92,8 @@ enum epf_irq_slot { EPF_IRQ_DB_START, }; =20 -#define NTB_EPF_MAX_MW_COUNT (NTB_BAR_NUM - BAR_MW1) +#define NTB_EPF_LEGACY_MAX_MW_COUNT (NTB_BAR_NUM - BAR_MW1) +#define NTB_EPF_MAX_MW_COUNT 16 =20 struct ntb_epf_dev; =20 @@ -105,9 +110,12 @@ struct ntb_epf_dev { =20 const enum pci_barno *barno_map; =20 + u32 ctrl_version; unsigned int mw_count; unsigned int spad_count; unsigned int db_count; + u32 mw_bar; + u32 mw_size; =20 void __iomem *ctrl_reg; void __iomem *db_reg; @@ -171,6 +179,9 @@ static int ntb_epf_mw_to_bar(struct ntb_epf_dev *ndev, = int idx) return -EINVAL; } =20 + if (ndev->ctrl_version >=3D NTB_EPF_CTRL_V1) + return ndev->mw_bar; + return ndev->barno_map[BAR_MW1 + idx]; } =20 @@ -211,8 +222,37 @@ static int ntb_epf_mw_get_align(struct ntb_dev *ntb, i= nt pidx, int idx, if (size_align) *size_align =3D 1; =20 - if (size_max) - *size_max =3D pci_resource_len(ndev->ntb.pdev, bar); + if (size_max) { + if (ndev->ctrl_version >=3D NTB_EPF_CTRL_V1) + *size_max =3D ndev->mw_size; + else + *size_max =3D pci_resource_len(ndev->ntb.pdev, bar); + } + + return 0; +} + +static int ntb_epf_mw_get_trans_group(struct ntb_dev *ntb, int pidx, int i= dx, + int *gidx, int *gcount) +{ + struct ntb_epf_dev *ndev =3D ntb_ndev(ntb); + struct device *dev =3D ndev->dev; + + if (pidx !=3D NTB_DEF_PEER_IDX) { + dev_err(dev, "Unsupported Peer ID %d\n", pidx); + return -EINVAL; + } + + if (idx < 0 || idx >=3D ndev->mw_count) { + dev_err(dev, "Unsupported Memory Window index %d\n", idx); + return -EINVAL; + } + + if (gidx) + *gidx =3D ndev->ctrl_version >=3D NTB_EPF_CTRL_V1 ? 0 : idx; + if (gcount) + *gcount =3D ndev->ctrl_version >=3D NTB_EPF_CTRL_V1 ? + ndev->mw_count : 1; =20 return 0; } @@ -520,21 +560,27 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *n= tb, int idx, phys_addr_t *base, resource_size_t *size) { struct ntb_epf_dev *ndev =3D ntb_ndev(ntb); - u32 offset =3D 0; + resource_size_t offset =3D 0; int bar; =20 - if (idx =3D=3D 0) - offset =3D readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET); - bar =3D ntb_epf_mw_to_bar(ndev, idx); if (bar < 0) return bar; =20 + if (ndev->ctrl_version >=3D NTB_EPF_CTRL_V1) + offset =3D (resource_size_t)idx * ndev->mw_size; + else if (idx =3D=3D 0) + offset =3D readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET); + if (base) *base =3D pci_resource_start(ndev->ntb.pdev, bar) + offset; =20 - if (size) - *size =3D pci_resource_len(ndev->ntb.pdev, bar) - offset; + if (size) { + if (ndev->ctrl_version >=3D NTB_EPF_CTRL_V1) + *size =3D ndev->mw_size; + else + *size =3D pci_resource_len(ndev->ntb.pdev, bar) - offset; + } =20 return 0; } @@ -601,6 +647,7 @@ static const struct ntb_dev_ops ntb_epf_ops =3D { .db_vector_count =3D ntb_epf_db_vector_count, .db_vector_mask =3D ntb_epf_db_vector_mask, .db_set_mask =3D ntb_epf_db_set_mask, + .mw_get_trans_group =3D ntb_epf_mw_get_trans_group, .mw_set_trans =3D ntb_epf_mw_set_trans, .mw_clear_trans =3D ntb_epf_mw_clear_trans, .peer_mw_get_addr =3D ntb_epf_peer_mw_get_addr, @@ -629,14 +676,45 @@ static inline void ntb_epf_init_struct(struct ntb_epf= _dev *ndev, static int ntb_epf_init_dev(struct ntb_epf_dev *ndev) { struct device *dev =3D ndev->dev; + resource_size_t bar_len; + u32 group_size; int ret; =20 + ndev->ctrl_version =3D readl(ndev->ctrl_reg + NTB_EPF_CTRL_VERSION); ndev->mw_count =3D readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT); - if (ndev->mw_count > NTB_EPF_MAX_MW_COUNT) { + + if (ndev->ctrl_version && ndev->ctrl_version !=3D NTB_EPF_CTRL_V1) { + dev_err(dev, "Unsupported control region version: %u\n", + ndev->ctrl_version); + return -EINVAL; + } + + if ((!ndev->ctrl_version && + ndev->mw_count > NTB_EPF_LEGACY_MAX_MW_COUNT) || + ndev->mw_count > NTB_EPF_MAX_MW_COUNT) { dev_err(dev, "Unsupported MW count: %u\n", ndev->mw_count); return -EINVAL; } =20 + if (ndev->ctrl_version >=3D NTB_EPF_CTRL_V1) { + ndev->mw_bar =3D readl(ndev->ctrl_reg + NTB_EPF_MW_BAR); + group_size =3D readl(ndev->ctrl_reg + NTB_EPF_MW_GROUP_SIZE); + + if (ndev->mw_count < 2 || ndev->mw_bar > BAR_5 || + !group_size || group_size % ndev->mw_count) { + dev_err(dev, "Invalid packed MW layout\n"); + return -EINVAL; + } + + ndev->mw_size =3D group_size / ndev->mw_count; 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charset="utf-8" Teach pci-epf-vntb to build a packed layout and advertise its logical MWs as one version 1 translation group. Non-packed configurations keep the version 0 layout and one MW per BAR. Signed-off-by: Koichiro Den --- drivers/pci/endpoint/functions/pci-epf-vntb.c | 255 +++++++++++++++--- 1 file changed, 219 insertions(+), 36 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index c3caec927d74..f22459e5a8c6 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -68,6 +68,9 @@ static struct workqueue_struct *kpcintb_workqueue; #define DB_COUNT_MASK GENMASK(15, 0) #define MSIX_ENABLE BIT(16) #define MAX_MW 4 +#define EPF_NTB_MAX_MW 16 +#define EPF_NTB_CTRL_V0 0 +#define EPF_NTB_CTRL_V1 1 =20 /* Limit per-work execution to avoid monopolizing kworker on doorbell stor= ms. */ #define VNTB_PEER_DB_WORK_BUDGET 5 @@ -119,7 +122,7 @@ struct epf_ntb_ctrl { u32 argument; u16 command_status; u16 link_status; - u32 topology; + u32 version; u64 addr; u64 size; u32 num_mws; @@ -129,17 +132,27 @@ struct epf_ntb_ctrl { u32 db_entry_size; u32 db_data[MAX_DB_COUNT]; u32 db_offset[MAX_DB_COUNT]; + u32 mw_bar; + u32 mw_group_size; } __packed; =20 +struct epf_ntb_mw_layout { + enum pci_barno barno; + u64 offset; + u64 size; +}; + struct epf_ntb { struct ntb_dev ntb; struct pci_epf *epf; struct config_group group; =20 u32 num_mws; + u32 packed_mws; u32 db_count; u32 spad_count; u64 mws_size[MAX_MW]; + struct epf_ntb_mw_layout mw_layout[EPF_NTB_MAX_MW]; atomic64_t db; atomic64_t peer_db_pending; struct work_struct peer_db_work; @@ -162,8 +175,8 @@ struct epf_ntb { =20 u32 *epf_db; =20 - phys_addr_t vpci_mw_phy[MAX_MW]; - void __iomem *vpci_mw_addr[MAX_MW]; + phys_addr_t vpci_mw_phy[EPF_NTB_MAX_MW]; + void __iomem *vpci_mw_addr[EPF_NTB_MAX_MW]; =20 struct delayed_work cmd_handler; }; @@ -199,11 +212,25 @@ static int epf_ntb_link_up(struct epf_ntb *ntb, bool = link_up) return 0; } =20 +static int epf_ntb_get_mw_group(struct epf_ntb *ntb, unsigned int mw, + unsigned int *first, unsigned int *count) +{ + if (mw >=3D ntb->num_mws) + return -EINVAL; + + if (first) + *first =3D ntb->packed_mws ? 0 : mw; + if (count) + *count =3D ntb->packed_mws ? ntb->num_mws : 1; + + return 0; +} + /** * epf_ntb_configure_mw() - Configure the Outbound Address Space for VHOST * to access the memory window of HOST * @ntb: NTB device that facilitates communication between HOST and VHOST - * @mw: Index of the memory window (either 0, 1, 2 or 3) + * @mw: Index of the memory window * * EP Outbound Window * +--------+ +-----------+ @@ -227,13 +254,23 @@ static int epf_ntb_configure_mw(struct epf_ntb *ntb, = u32 mw) { phys_addr_t phys_addr; u8 func_no, vfunc_no; + unsigned int count; u64 addr, size; - int ret =3D 0; + int ret; + + ret =3D epf_ntb_get_mw_group(ntb, mw, NULL, &count); + if (ret) + return ret; + if (count > 1) + return -EOPNOTSUPP; =20 phys_addr =3D ntb->vpci_mw_phy[mw]; addr =3D ntb->reg->addr; size =3D ntb->reg->size; =20 + if (!size || size > ntb->mw_layout[mw].size) + return -EINVAL; + func_no =3D ntb->epf->func_no; vfunc_no =3D ntb->epf->vfunc_no; =20 @@ -247,17 +284,30 @@ static int epf_ntb_configure_mw(struct epf_ntb *ntb, = u32 mw) /** * epf_ntb_teardown_mw() - Teardown the configured OB ATU * @ntb: NTB device that facilitates communication between HOST and VHOST - * @mw: Index of the memory window (either 0, 1, 2 or 3) + * @mw: Index of the memory window * * Teardown the configured OB ATU configured in epf_ntb_configure_mw() usi= ng * pci_epc_unmap_addr() + * + * Returns: Zero for success, or an error code in case of failure */ -static void epf_ntb_teardown_mw(struct epf_ntb *ntb, u32 mw) +static int epf_ntb_teardown_mw(struct epf_ntb *ntb, u32 mw) { + unsigned int count; + int ret; + + ret =3D epf_ntb_get_mw_group(ntb, mw, NULL, &count); + if (ret) + return ret; + if (count > 1) + return -EOPNOTSUPP; + pci_epc_unmap_addr(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no, ntb->vpci_mw_phy[mw]); + + return 0; } =20 /** @@ -316,8 +366,8 @@ static void epf_ntb_cmd_handler(struct work_struct *wor= k) ctrl->command_status =3D COMMAND_STATUS_OK; break; case COMMAND_TEARDOWN_MW: - epf_ntb_teardown_mw(ntb, argument); - ctrl->command_status =3D COMMAND_STATUS_OK; + ret =3D epf_ntb_teardown_mw(ntb, argument); + ctrl->command_status =3D ret ? COMMAND_STATUS_ERROR : COMMAND_STATUS_OK; break; case COMMAND_LINK_UP: ntb->linkup =3D true; @@ -434,6 +484,78 @@ static void epf_ntb_config_spad_bar_free(struct epf_nt= b *ntb) pci_epf_free_space(ntb->epf, ntb->reg, barno, 0); } =20 +static int epf_ntb_build_mw_layout(struct epf_ntb *ntb) +{ + struct device *dev =3D &ntb->epf->dev; + u64 size; + int i; + + if (ntb->packed_mws) { + enum pci_barno barno =3D ntb->epf_ntb_bar[BAR_MW1]; + + /* + * A packed group requires contiguous backing for the entire BAR. + * Per-MW size limits such as max_mw_size are not supported. + */ + if (ntb->packed_mws !=3D ntb->num_mws) { + dev_err(dev, "packed_mws must match num_mws\n"); + return -EINVAL; + } + + if (barno < 0) { + dev_err(dev, "packed MW has no BAR\n"); + return -EINVAL; + } + + if (!ntb->mws_size[0] || + ntb->mws_size[0] > U32_MAX || + !is_power_of_2(ntb->mws_size[0]) || + ntb->mws_size[0] % ntb->packed_mws) { + dev_err(dev, "invalid packed MW size\n"); + return -EINVAL; + } + + size =3D ntb->mws_size[0] / ntb->packed_mws; + if (!IS_ALIGNED(size, SZ_4K)) { + dev_err(dev, "invalid packed MW member size\n"); + return -EINVAL; + } + + for (i =3D 0; i < ntb->num_mws; i++) { + ntb->mw_layout[i].barno =3D barno; + ntb->mw_layout[i].offset =3D i * size; + ntb->mw_layout[i].size =3D size; + } + + return 0; + } + + if (ntb->num_mws > MAX_MW) { + dev_err(dev, "num_mws=3D%u requires packed_mws\n", ntb->num_mws); + return -EINVAL; + } + + for (i =3D 0; i < ntb->num_mws; i++) { + enum pci_barno barno =3D ntb->epf_ntb_bar[BAR_MW1 + i]; + + if (barno < 0) { + dev_err(dev, "MW%d has no BAR\n", i + 1); + return -EINVAL; + } + + if (!ntb->mws_size[i]) { + dev_err(dev, "MW%d has no size\n", i + 1); + return -EINVAL; + } + + ntb->mw_layout[i].barno =3D barno; + ntb->mw_layout[i].offset =3D 0; + ntb->mw_layout[i].size =3D ntb->mws_size[i]; + } + + return 0; +} + /** * epf_ntb_config_spad_bar_alloc() - Allocate memory for config + scratchp= ad * region @@ -474,6 +596,7 @@ static int epf_ntb_config_spad_bar_alloc(struct epf_ntb= *ntb) ntb->reg =3D base; =20 ctrl =3D ntb->reg; + ctrl->version =3D ntb->packed_mws ? EPF_NTB_CTRL_V1 : EPF_NTB_CTRL_V0; ctrl->spad_offset =3D ctrl_size; =20 ctrl->spad_count =3D spad_count; @@ -487,6 +610,11 @@ static int epf_ntb_config_spad_bar_alloc(struct epf_nt= b *ntb) ntb->reg->db_offset[i] =3D 0; } =20 + if (ntb->packed_mws) { + ctrl->mw_bar =3D ntb->mw_layout[0].barno; + ctrl->mw_group_size =3D ntb->mws_size[0]; + } + return 0; } =20 @@ -761,16 +889,28 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) u64 size; enum pci_barno barno; struct device *dev =3D &ntb->epf->dev; + u64 bar_size[BAR_5 + 1] =3D {}; + bool bar_set[BAR_5 + 1] =3D {}; =20 for (i =3D 0; i < ntb->num_mws; i++) { - size =3D ntb->mws_size[i]; - barno =3D ntb->epf_ntb_bar[BAR_MW1 + i]; + size =3D ntb->mw_layout[i].size; + barno =3D ntb->mw_layout[i].barno; + bar_size[barno] =3D max(bar_size[barno], + ntb->mw_layout[i].offset + size); + } + + for (i =3D 0; i < ntb->num_mws; i++) { + size =3D ntb->mw_layout[i].size; + barno =3D ntb->mw_layout[i].barno; + + if (bar_set[barno]) + goto alloc_vpci_mw; =20 ntb->epf->bar[barno].barno =3D barno; - ntb->epf->bar[barno].size =3D size; + ntb->epf->bar[barno].size =3D bar_size[barno]; ntb->epf->bar[barno].addr =3D NULL; ntb->epf->bar[barno].phys_addr =3D 0; - ntb->epf->bar[barno].flags |=3D upper_32_bits(size) ? + ntb->epf->bar[barno].flags |=3D upper_32_bits(bar_size[barno]) ? PCI_BASE_ADDRESS_MEM_TYPE_64 : PCI_BASE_ADDRESS_MEM_TYPE_32; =20 @@ -782,7 +922,9 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) dev_err(dev, "MW set failed\n"); goto err_alloc_mem; } + bar_set[barno] =3D true; =20 +alloc_vpci_mw: /* Allocate EPC outbound memory windows to vpci vntb device */ ntb->vpci_mw_addr[i] =3D pci_epc_mem_alloc_addr(ntb->epf->epc, &ntb->vpci_mw_phy[i], @@ -790,17 +932,13 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) if (!ntb->vpci_mw_addr[i]) { ret =3D -ENOMEM; dev_err(dev, "Failed to allocate source address\n"); - goto err_set_bar; + i++; + goto err_alloc_mem; } } =20 return ret; =20 -err_set_bar: - pci_epc_clear_bar(ntb->epf->epc, - ntb->epf->func_no, - ntb->epf->vfunc_no, - &ntb->epf->bar[barno]); err_alloc_mem: epf_ntb_mw_bar_clear(ntb, i); return ret; @@ -809,24 +947,32 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) /** * epf_ntb_mw_bar_clear() - Clear Memory window BARs * @ntb: NTB device that facilitates communication between HOST and VHOST - * @num_mws: the number of Memory window BARs that to be cleared + * @num_mws: Number of logical memory windows to clean up */ static void epf_ntb_mw_bar_clear(struct epf_ntb *ntb, int num_mws) { + bool bar_cleared[BAR_5 + 1] =3D {}; enum pci_barno barno; int i; =20 for (i =3D 0; i < num_mws; i++) { - barno =3D ntb->epf_ntb_bar[BAR_MW1 + i]; - pci_epc_clear_bar(ntb->epf->epc, - ntb->epf->func_no, - ntb->epf->vfunc_no, - &ntb->epf->bar[barno]); + barno =3D ntb->mw_layout[i].barno; + if (!bar_cleared[barno]) { + pci_epc_clear_bar(ntb->epf->epc, + ntb->epf->func_no, + ntb->epf->vfunc_no, + &ntb->epf->bar[barno]); + bar_cleared[barno] =3D true; + } + + if (!ntb->vpci_mw_addr[i]) + continue; =20 pci_epc_mem_free_addr(ntb->epf->epc, ntb->vpci_mw_phy[i], ntb->vpci_mw_addr[i], - ntb->mws_size[i]); + ntb->mw_layout[i].size); + ntb->vpci_mw_addr[i] =3D NULL; } } =20 @@ -916,16 +1062,21 @@ static int epf_ntb_init_epc_bar(struct epf_ntb *ntb) } } =20 - /* These are optional BARs which don't impact NTB functionality */ - for (bar =3D BAR_MW1, i =3D 1; i < num_mws; bar++, i++) { - barno =3D epf_ntb_find_bar(ntb, epc_features, bar, barno); - if (barno < 0) { - ntb->num_mws =3D i; - dev_dbg(dev, "BAR not available for > MW%d\n", i + 1); + if (!ntb->packed_mws) { + /* These are optional BARs which don't impact NTB functionality */ + for (bar =3D BAR_MW1, i =3D 1; + i < num_mws && bar <=3D BAR_MW4; bar++, i++) { + barno =3D epf_ntb_find_bar(ntb, epc_features, bar, barno); + if (barno < 0) { + ntb->num_mws =3D i; + dev_dbg(dev, "BAR not available for > MW%d\n", + i + 1); + break; + } } } =20 - return 0; + return epf_ntb_build_mw_layout(ntb); } =20 /** @@ -1352,6 +1503,28 @@ static int vntb_epf_mw_count(struct ntb_dev *ntb, in= t pidx) return ndev->num_mws; } =20 +static int vntb_epf_mw_get_trans_group(struct ntb_dev *ndev, int pidx, + int idx, int *gidx, int *gcount) +{ + struct epf_ntb *ntb =3D ntb_ndev(ndev); + unsigned int first, count; + int ret; + + if (pidx !=3D NTB_DEF_PEER_IDX || idx < 0 || idx >=3D ntb->num_mws) + return -EINVAL; + + ret =3D epf_ntb_get_mw_group(ntb, idx, &first, &count); + if (ret) + return ret; + + if (gidx) + *gidx =3D first; + if (gcount) + *gcount =3D count; + + return 0; +} + static int vntb_epf_spad_count(struct ntb_dev *ntb) { return ntb_ndev(ntb)->spad_count; @@ -1415,13 +1588,22 @@ static int vntb_epf_mw_set_trans(struct ntb_dev *nd= ev, int pidx, int idx, dma_addr_t addr, resource_size_t size) { struct epf_ntb *ntb =3D ntb_ndev(ndev); + struct epf_ntb_mw_layout *mw; struct pci_epf_bar *epf_bar; enum pci_barno barno; int ret; struct device *dev; =20 dev =3D &ntb->ntb.dev; - barno =3D ntb->epf_ntb_bar[BAR_MW1 + idx]; + if (pidx !=3D NTB_DEF_PEER_IDX || + idx < 0 || idx >=3D ntb->num_mws) + return -EINVAL; + + mw =3D &ntb->mw_layout[idx]; + if (size > mw->size) + return -EINVAL; + + barno =3D mw->barno; epf_bar =3D &ntb->epf->bar[barno]; epf_bar->phys_addr =3D addr; epf_bar->barno =3D barno; @@ -1450,7 +1632,7 @@ static int vntb_epf_peer_mw_get_addr(struct ntb_dev *= ndev, int idx, *base =3D ntb->vpci_mw_phy[idx]; =20 if (size) - *size =3D ntb->mws_size[idx]; + *size =3D ntb->mw_layout[idx].size; =20 return 0; } @@ -1608,7 +1790,7 @@ static int vntb_epf_mw_get_align(struct ntb_dev *ndev= , int pidx, int idx, *size_align =3D 1; =20 if (size_max) - *size_max =3D ntb->mws_size[idx]; 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Mon, 3 Aug 2026 18:04:44 +0000 From: Koichiro Den To: Manivannan Sadhasivam , Frank Li , Niklas Cassel , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Shuah Khan , Jon Mason , Dave Jiang , Allen Hubbe , Jerome Brunet Cc: linux-pci@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, ntb@lists.linux.dev Subject: [PATCH 04/11] PCI: endpoint: pci-epf-vntb: Implement MW group translation callbacks Date: Tue, 4 Aug 2026 03:04:31 +0900 Message-ID: <20260803180439.1963864-5-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260803180439.1963864-1-den@valinux.co.jp> References: <20260803180439.1963864-1-den@valinux.co.jp> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: TYWP286CA0006.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:178::16) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYRP286MB5249:EE_ X-MS-Office365-Filtering-Correlation-Id: 67ea268b-923f-4198-648d-08def189b2f0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|23010399003|7416014|366016|1800799024|10070799003|921020|6133799003|10067099003|56012099006|5023799004|22082099003|18002099003; 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charset="utf-8" All RC-to-EP MWs in a packed group share one inbound BAR. Setting each MW separately would keep replacing that BAR and could expose a partial group. Add group callbacks that program the shared BAR once for the complete backing range. The EPC API has no operation to disable only the inbound translation without also clearing the host-assigned BAR address. Keep clear as a no-op, matching the existing per-MW behavior. Signed-off-by: Koichiro Den --- drivers/pci/endpoint/functions/pci-epf-vntb.c | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index f22459e5a8c6..0c72b907c289 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -1622,6 +1622,31 @@ static int vntb_epf_mw_clear_trans(struct ntb_dev *n= tb, int pidx, int idx) return 0; } =20 +static int +vntb_epf_mw_set_trans_group(struct ntb_dev *ndev, int pidx, int widx, + dma_addr_t addr, resource_size_t size) +{ + struct epf_ntb *ntb =3D ntb_ndev(ndev); + struct pci_epf_bar *epf_bar; + + if (pidx !=3D NTB_DEF_PEER_IDX || !ntb->packed_mws || widx) + return -EINVAL; + if (!IS_ALIGNED(addr, SZ_4K) || size !=3D ntb->mws_size[0]) + return -EINVAL; + + epf_bar =3D &ntb->epf->bar[ntb->mw_layout[0].barno]; + epf_bar->phys_addr =3D addr; + + return pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no, + ntb->epf->vfunc_no, epf_bar); +} + +static int vntb_epf_mw_clear_trans_group(struct ntb_dev *ndev, int pidx, + int widx) +{ + return 0; +} + static int vntb_epf_peer_mw_get_addr(struct ntb_dev *ndev, int idx, phys_addr_t *base, resource_size_t *size) { @@ -1839,6 +1864,8 @@ static const struct ntb_dev_ops vntb_epf_ops =3D { .db_vector_mask =3D vntb_epf_db_vector_mask, .db_set_mask =3D vntb_epf_db_set_mask, .mw_get_trans_group =3D vntb_epf_mw_get_trans_group, + .mw_set_trans_group =3D vntb_epf_mw_set_trans_group, + .mw_clear_trans_group =3D vntb_epf_mw_clear_trans_group, .mw_set_trans =3D vntb_epf_mw_set_trans, .mw_clear_trans =3D vntb_epf_mw_clear_trans, .peer_mw_get_addr =3D vntb_epf_peer_mw_get_addr, --=20 2.51.0 From nobody Fri Oct 2 07:47:19 2026 Received: from TY3P286CU002.outbound.protection.outlook.com (mail-japaneastazon11020085.outbound.protection.outlook.com [52.101.229.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E8F242C516; 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charset="utf-8" A packed MW group can use one outbound iATU region only when its EPC address range is contiguous. Allocate one EPC address range for the group and expose each logical MW as a subrange. Singleton MWs keep separate allocations. Signed-off-by: Koichiro Den --- drivers/pci/endpoint/functions/pci-epf-vntb.c | 26 +++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index 0c72b907c289..aa8d304fe861 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -226,6 +226,15 @@ static int epf_ntb_get_mw_group(struct epf_ntb *ntb, u= nsigned int mw, return 0; } =20 +static u64 epf_ntb_mw_group_size(struct epf_ntb *ntb, unsigned int first, + unsigned int count) +{ + unsigned int last =3D first + count - 1; + + return ntb->mw_layout[last].offset - ntb->mw_layout[first].offset + + ntb->mw_layout[last].size; +} + /** * epf_ntb_configure_mw() - Configure the Outbound Address Space for VHOST * to access the memory window of HOST @@ -891,6 +900,8 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) struct device *dev =3D &ntb->epf->dev; u64 bar_size[BAR_5 + 1] =3D {}; bool bar_set[BAR_5 + 1] =3D {}; + unsigned int count; + unsigned int j; =20 for (i =3D 0; i < ntb->num_mws; i++) { size =3D ntb->mw_layout[i].size; @@ -900,7 +911,6 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) } =20 for (i =3D 0; i < ntb->num_mws; i++) { - size =3D ntb->mw_layout[i].size; barno =3D ntb->mw_layout[i].barno; =20 if (bar_set[barno]) @@ -926,6 +936,9 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) =20 alloc_vpci_mw: /* Allocate EPC outbound memory windows to vpci vntb device */ + count =3D ntb->packed_mws ? ntb->packed_mws : 1; + size =3D epf_ntb_mw_group_size(ntb, i, count); + /* Only the group head owns the allocation handle. */ ntb->vpci_mw_addr[i] =3D pci_epc_mem_alloc_addr(ntb->epf->epc, &ntb->vpci_mw_phy[i], size); @@ -935,6 +948,13 @@ static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) i++; goto err_alloc_mem; } + + for (j =3D 1; j < count; j++) + ntb->vpci_mw_phy[i + j] =3D ntb->vpci_mw_phy[i] + + ntb->mw_layout[i + j].offset - + ntb->mw_layout[i].offset; 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charset="utf-8" Packed logical MWs share one contiguous EPC address range. Their outbound translations can therefore use one mapping as well. Add commands to map or unmap a complete group in one operation. Keep the existing commands for singleton MWs. Signed-off-by: Koichiro Den --- drivers/pci/endpoint/functions/pci-epf-vntb.c | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index aa8d304fe861..526cc31d9435 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -56,6 +56,8 @@ static struct workqueue_struct *kpcintb_workqueue; #define COMMAND_TEARDOWN_MW 4 #define COMMAND_LINK_UP 5 #define COMMAND_LINK_DOWN 6 +#define COMMAND_CONFIGURE_MW_GROUP 7 +#define COMMAND_TEARDOWN_MW_GROUP 8 =20 #define COMMAND_STATUS_OK 1 #define COMMAND_STATUS_ERROR 2 @@ -319,6 +321,50 @@ static int epf_ntb_teardown_mw(struct epf_ntb *ntb, u3= 2 mw) return 0; } =20 +static int epf_ntb_configure_mw_group(struct epf_ntb *ntb, u32 mw) +{ + unsigned int first, count; + u64 addr, size; + int ret; + + ret =3D epf_ntb_get_mw_group(ntb, mw, &first, &count); + if (ret) + return ret; + if (count <=3D 1) + return -EOPNOTSUPP; + if (mw !=3D first) + return -EINVAL; + + addr =3D ntb->reg->addr; + size =3D ntb->reg->size; + if (!IS_ALIGNED(addr, SZ_4K) || + size !=3D epf_ntb_mw_group_size(ntb, first, count)) + return -EINVAL; + + return pci_epc_map_addr(ntb->epf->epc, ntb->epf->func_no, + ntb->epf->vfunc_no, ntb->vpci_mw_phy[first], + addr, size); +} + +static int epf_ntb_teardown_mw_group(struct epf_ntb *ntb, u32 mw) +{ + unsigned int first, count; + int ret; + + ret =3D epf_ntb_get_mw_group(ntb, mw, &first, &count); + if (ret) + return ret; + if (count <=3D 1) + return -EOPNOTSUPP; + if (mw !=3D first) + return -EINVAL; + + pci_epc_unmap_addr(ntb->epf->epc, ntb->epf->func_no, + ntb->epf->vfunc_no, ntb->vpci_mw_phy[first]); + + return 0; +} + /** * epf_ntb_cmd_handler() - Handle commands provided by the NTB HOST * @work: work_struct for the epf_ntb_epc @@ -378,6 +424,14 @@ static void epf_ntb_cmd_handler(struct work_struct *wo= rk) ret =3D epf_ntb_teardown_mw(ntb, argument); ctrl->command_status =3D ret ? COMMAND_STATUS_ERROR : COMMAND_STATUS_OK; break; + case COMMAND_CONFIGURE_MW_GROUP: + ret =3D epf_ntb_configure_mw_group(ntb, argument); + ctrl->command_status =3D ret ? COMMAND_STATUS_ERROR : COMMAND_STATUS_OK; + break; + case COMMAND_TEARDOWN_MW_GROUP: + ret =3D epf_ntb_teardown_mw_group(ntb, argument); + ctrl->command_status =3D ret ? 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charset="utf-8" Connect the NTB group callbacks to the version 1 group commands so ntb_hw_epf can program packed MWs. Singleton MWs keep using the legacy commands. Signed-off-by: Koichiro Den --- drivers/ntb/hw/epf/ntb_hw_epf.c | 41 +++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_ep= f.c index 46f37c2dea7b..8b00550eea04 100644 --- a/drivers/ntb/hw/epf/ntb_hw_epf.c +++ b/drivers/ntb/hw/epf/ntb_hw_epf.c @@ -20,6 +20,8 @@ #define CMD_TEARDOWN_MW 4 #define CMD_LINK_UP 5 #define CMD_LINK_DOWN 6 +#define CMD_CONFIGURE_MW_GROUP 7 +#define CMD_TEARDOWN_MW_GROUP 8 =20 #define NTB_EPF_ARGUMENT 0x4 #define MSIX_ENABLE BIT(16) @@ -509,6 +511,43 @@ static int ntb_epf_db_set_mask(struct ntb_dev *ntb, u6= 4 db_bits) return 0; } =20 +static int +ntb_epf_mw_set_trans_group(struct ntb_dev *ntb, int pidx, int widx, + dma_addr_t addr, resource_size_t size) +{ + struct ntb_epf_dev *ndev =3D ntb_ndev(ntb); + resource_size_t group_size; + + if (ndev->ctrl_version < NTB_EPF_CTRL_V1) + return -EOPNOTSUPP; + if (pidx !=3D NTB_DEF_PEER_IDX || widx) + return -EINVAL; + + group_size =3D (resource_size_t)ndev->mw_size * ndev->mw_count; + if (!IS_ALIGNED(addr, SZ_4K) || size !=3D group_size) + return -EINVAL; + + writel(lower_32_bits(addr), ndev->ctrl_reg + NTB_EPF_LOWER_ADDR); + writel(upper_32_bits(addr), ndev->ctrl_reg + NTB_EPF_UPPER_ADDR); + writel(lower_32_bits(size), ndev->ctrl_reg + NTB_EPF_LOWER_SIZE); + writel(upper_32_bits(size), ndev->ctrl_reg + NTB_EPF_UPPER_SIZE); + + return ntb_epf_send_command(ndev, CMD_CONFIGURE_MW_GROUP, widx); +} + +static int ntb_epf_mw_clear_trans_group(struct ntb_dev *ntb, int pidx, + int widx) +{ + struct ntb_epf_dev *ndev =3D ntb_ndev(ntb); + + if (ndev->ctrl_version < NTB_EPF_CTRL_V1) + return -EOPNOTSUPP; + if (pidx !=3D NTB_DEF_PEER_IDX || widx) + return -EINVAL; + + return ntb_epf_send_command(ndev, CMD_TEARDOWN_MW_GROUP, widx); +} + static int ntb_epf_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx, dma_addr_t addr, resource_size_t size) { @@ -648,6 +687,8 @@ static const struct ntb_dev_ops ntb_epf_ops =3D { .db_vector_mask =3D ntb_epf_db_vector_mask, .db_set_mask =3D ntb_epf_db_set_mask, .mw_get_trans_group =3D ntb_epf_mw_get_trans_group, + .mw_set_trans_group =3D ntb_epf_mw_set_trans_group, + .mw_clear_trans_group =3D ntb_epf_mw_clear_trans_group, .mw_set_trans =3D ntb_epf_mw_set_trans, .mw_clear_trans =3D ntb_epf_mw_clear_trans, .peer_mw_get_addr =3D ntb_epf_peer_mw_get_addr, --=20 2.51.0 From nobody Fri Oct 2 07:47:19 2026 Received: from OS0P286CU011.outbound.protection.outlook.com (mail-japanwestazon11020095.outbound.protection.outlook.com [52.101.228.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03086431E6B; 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charset="utf-8" NTB perf configures one MW per peer through the per-MW translation API. It cannot configure one member of a larger translation group. Reject such layouts at probe. Otherwise, link setup cannot complete and a performance test waits indefinitely. Signed-off-by: Koichiro Den --- drivers/ntb/test/ntb_perf.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/ntb/test/ntb_perf.c b/drivers/ntb/test/ntb_perf.c index dfd175f79e8f..50bfbec1e251 100644 --- a/drivers/ntb/test/ntb_perf.c +++ b/drivers/ntb/test/ntb_perf.c @@ -1436,7 +1436,7 @@ static int perf_setup_peer_mw(struct perf_peer *peer) static int perf_init_peers(struct perf_ctx *perf) { struct perf_peer *peer; - int pidx, lport, ret; + int first, count, pidx, lport, ret; =20 lport =3D ntb_port_number(perf->ntb); perf->gidx =3D -1; @@ -1469,7 +1469,19 @@ static int perf_init_peers(struct perf_ctx *perf) } =20 for (pidx =3D 0; pidx < perf->pcnt; pidx++) { - ret =3D perf_setup_peer_mw(&perf->peers[pidx]); + peer =3D &perf->peers[pidx]; + ret =3D ntb_mw_get_trans_group(perf->ntb, peer->pidx, + peer->gidx, &first, &count); + if (ret) + return ret; + if (first !=3D peer->gidx || count !=3D 1) { + dev_err(&perf->ntb->dev, + "Peer %d MW %d is not a standalone window\n", + peer->pidx, peer->gidx); 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charset="utf-8" NTB MSI reserves the last MW for each peer and programs it independently. A member of a larger translation group cannot be reserved on its own. Reject such layouts during initialization. This lets ntb_transport keep the whole group for data and fall back to doorbells. Signed-off-by: Koichiro Den --- drivers/ntb/msi.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/ntb/msi.c b/drivers/ntb/msi.c index 6817d504c12a..029edcf40078 100644 --- a/drivers/ntb/msi.c +++ b/drivers/ntb/msi.c @@ -24,7 +24,8 @@ struct ntb_msi { * the peer memory windows. * * This function reserves the last N outbound memory windows (where N - * is the number of peers). + * is the number of peers). The corresponding inbound memory windows must + * each form a singleton translation group. * * Return: Zero on success, otherwise a negative error number. */ @@ -33,6 +34,7 @@ int ntb_msi_init(struct ntb_dev *ntb, { phys_addr_t mw_phys_addr; resource_size_t mw_size; + int first, count; int peer_widx; int peers; int ret; @@ -42,6 +44,21 @@ int ntb_msi_init(struct ntb_dev *ntb, if (peers <=3D 0) return -EINVAL; =20 + if (ntb->ops->mw_get_trans_group) { + for (i =3D 0; i < peers; i++) { + peer_widx =3D ntb_peer_highest_mw_idx(ntb, i); + if (peer_widx < 0) + return peer_widx; + + ret =3D ntb_mw_get_trans_group(ntb, i, peer_widx, &first, + &count); + if (ret) + return ret; + if (first !=3D peer_widx || count !=3D 1) + return -EOPNOTSUPP; + } + } + ntb->msi =3D devm_kzalloc(&ntb->dev, struct_size(ntb->msi, peer_mws, peer= s), GFP_KERNEL); if (!ntb->msi) --=20 2.51.0 From nobody Fri Oct 2 07:47:19 2026 Received: from OS0P286CU011.outbound.protection.outlook.com (mail-japanwestazon11020095.outbound.protection.outlook.com [52.101.228.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24FDC432BD9; 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charset="utf-8" ntb_transport currently allocates and programs each MW on its own. MWs in a translation group instead need one contiguous allocation and must be set or cleared as one unit. Query each group, allocate its backing once, and use the group set and clear operations. Reject a scratchpad limit that would split a group. Singleton MWs keep the existing path. Signed-off-by: Koichiro Den --- drivers/ntb/ntb_transport.c | 127 +++++++++++++++++++++++++++++++----- 1 file changed, 109 insertions(+), 18 deletions(-) diff --git a/drivers/ntb/ntb_transport.c b/drivers/ntb/ntb_transport.c index f59f926d4bfa..2c7728898890 100644 --- a/drivers/ntb/ntb_transport.c +++ b/drivers/ntb/ntb_transport.c @@ -56,6 +56,7 @@ #include #include #include +#include #include #include #include @@ -757,22 +758,65 @@ static void ntb_transport_msi_desc_changed(void *data) ntb_peer_db_set(nt->ndev, nt->msi_db_mask); } =20 +static int ntb_mw_get_group(struct ntb_transport_ctx *nt, unsigned int wid= x, + unsigned int *first, unsigned int *count) +{ + int gidx, gcount; + int rc; + + rc =3D ntb_mw_get_trans_group(nt->ndev, PIDX, widx, &gidx, &gcount); + if (rc) + return rc; + if (gidx < 0 || gcount <=3D 0) + return -EINVAL; + + *first =3D gidx; + *count =3D gcount; + if (*first >=3D nt->mw_count || *count > nt->mw_count - *first || + widx < *first || widx >=3D *first + *count) + return -EINVAL; + + return 0; +} + static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw) { struct ntb_transport_mw *mw =3D &nt->mw_vec[num_mw]; struct device *dma_dev =3D ntb_get_dma_dev(nt->ndev); + dma_addr_t original_dma_addr; + void *alloc_addr; + size_t alloc_size; + unsigned int first, count; + unsigned int i; + int rc; =20 if (!mw->virt_addr) return; =20 - ntb_mw_clear_trans(nt->ndev, PIDX, num_mw); - dma_free_attrs(dma_dev, mw->alloc_size, mw->alloc_addr, - mw->original_dma_addr, DMA_ATTR_FORCE_CONTIGUOUS); - mw->xlat_size =3D 0; - mw->buff_size =3D 0; - mw->alloc_size =3D 0; - mw->alloc_addr =3D NULL; - mw->virt_addr =3D NULL; + rc =3D ntb_mw_get_group(nt, num_mw, &first, &count); + if (rc || num_mw !=3D first) + return; + + if (count > 1) + ntb_mw_clear_trans_group(nt->ndev, PIDX, first); + else + ntb_mw_clear_trans(nt->ndev, PIDX, first); + + alloc_addr =3D mw->alloc_addr; + alloc_size =3D mw->alloc_size; + original_dma_addr =3D mw->original_dma_addr; + for (i =3D first; i < first + count; i++) { + mw =3D &nt->mw_vec[i]; + mw->xlat_size =3D 0; + mw->buff_size =3D 0; + mw->alloc_size =3D 0; + mw->alloc_addr =3D NULL; + mw->virt_addr =3D NULL; + mw->dma_addr =3D 0; + } + + dma_free_attrs(dma_dev, alloc_size, alloc_addr, original_dma_addr, + DMA_ATTR_FORCE_CONTIGUOUS); } =20 static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw, @@ -838,9 +882,11 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, in= t num_mw, { struct ntb_transport_mw *mw =3D &nt->mw_vec[num_mw]; struct device *dma_dev =3D ntb_get_dma_dev(nt->ndev); - size_t xlat_size, buff_size; + size_t xlat_size, buff_size, group_size; resource_size_t xlat_align; resource_size_t xlat_align_size; + unsigned int first, count; + unsigned int i; int rc; =20 if (!size) @@ -861,15 +907,30 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, i= nt num_mw, if (mw->buff_size) ntb_free_mw(nt, num_mw); =20 + rc =3D ntb_mw_get_group(nt, num_mw, &first, &count); + if (rc) + return rc; + if (count > 1) { + if (first !=3D num_mw) + return -EINVAL; + if (xlat_size !=3D buff_size) + return -EINVAL; + if (check_mul_overflow(xlat_size, count, &group_size)) + return -EOVERFLOW; + } else { + group_size =3D buff_size; + } + /* Alloc memory for receiving data. Must be aligned */ - mw->xlat_size =3D xlat_size; - mw->buff_size =3D buff_size; - mw->alloc_size =3D buff_size; + mw->buff_size =3D group_size; + mw->alloc_size =3D group_size; =20 rc =3D ntb_alloc_mw_buffer(mw, dma_dev, xlat_align); if (rc) { - mw->alloc_size *=3D 2; - rc =3D ntb_alloc_mw_buffer(mw, dma_dev, xlat_align); + if (check_mul_overflow(mw->alloc_size, 2, &mw->alloc_size)) + rc =3D -EOVERFLOW; + else + rc =3D ntb_alloc_mw_buffer(mw, dma_dev, xlat_align); if (rc) { dev_err(dma_dev, "Unable to alloc aligned MW buff\n"); @@ -880,15 +941,28 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, i= nt num_mw, } } =20 + for (i =3D 0; i < count; i++) { + mw =3D &nt->mw_vec[first + i]; + mw->xlat_size =3D xlat_size; + mw->buff_size =3D buff_size; + mw->virt_addr =3D (u8 *)nt->mw_vec[first].virt_addr + + i * xlat_size; + mw->dma_addr =3D nt->mw_vec[first].dma_addr + i * xlat_size; + } + /* Notify HW the memory location of the receive buffer */ - rc =3D ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr, - mw->xlat_size); + if (count > 1) + rc =3D ntb_mw_set_trans_group(nt->ndev, PIDX, first, + nt->mw_vec[first].dma_addr, + group_size); + else + rc =3D ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr, + mw->xlat_size); if (rc) { dev_err(dma_dev, "Unable to set mw%d translation", num_mw); - ntb_free_mw(nt, num_mw); + ntb_free_mw(nt, first); return -EIO; } - return 0; } =20 @@ -1238,6 +1312,7 @@ static int ntb_transport_probe(struct ntb_client *sel= f, struct ntb_dev *ndev) struct ntb_transport_ctx *nt; struct ntb_transport_mw *mw; unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads; + int group_first, group_count; u64 qp_bitmap; int node; int rc, i; @@ -1291,6 +1366,22 @@ static int ntb_transport_probe(struct ntb_client *se= lf, struct ntb_dev *ndev) =20 max_mw_count_for_spads =3D (spad_count - MW0_SZ_HIGH) / 2; nt->mw_count =3D min(mw_count, max_mw_count_for_spads); + if (nt->mw_count) { + rc =3D ntb_mw_get_trans_group(ndev, PIDX, nt->mw_count - 1, + &group_first, &group_count); + if (rc) + goto err; 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charset="utf-8" The packed MW data path is now complete. Add packed_mws to enable it and allow up to 16 logical MWs when packing is selected. Use mw1 as the aggregate BAR size and restrict the other MW size and BAR attributes while packing is enabled. Signed-off-by: Koichiro Den --- Documentation/PCI/endpoint/pci-vntb-howto.rst | 16 ++++- drivers/pci/endpoint/functions/pci-epf-vntb.c | 60 ++++++++++++++++++- 2 files changed, 74 insertions(+), 2 deletions(-) diff --git a/Documentation/PCI/endpoint/pci-vntb-howto.rst b/Documentation/= PCI/endpoint/pci-vntb-howto.rst index 3679f5c30254..8c74a39f1aee 100644 --- a/Documentation/PCI/endpoint/pci-vntb-howto.rst +++ b/Documentation/PCI/endpoint/pci-vntb-howto.rst @@ -92,7 +92,7 @@ attributes that can be configured by the user:: # ls functions/pci_epf_vntb/func1/pci_epf_vntb.0/ ctrl_bar db_count mw1_bar mw2_bar mw3_bar mw4_bar spad_count db_bar mw1 mw2 mw3 mw4 num_mws vbus_number - vntb_vid vntb_pid + vntb_vid vntb_pid packed_mws =20 A sample configuration for NTB function is given below:: =20 @@ -105,6 +105,20 @@ By default, each construct is assigned a BAR, as neede= d and in order. Should a specific BAR setup be required by the platform, BAR may be assign= ed to each construct using the related ``XYZ_bar`` entry. =20 +Without packing, ``num_mws`` is limited to four and each memory window uses +its corresponding ``mwN`` size and ``mwN_bar``. To expose 2, 4, 8, or 16 +logical memory windows in one BAR, set ``packed_mws`` to the same value as +``num_mws``. In that mode, ``mw1`` is the aggregate BAR size and must be a +power of two no larger than 2 GiB. It is divided equally +into 4 KiB-aligned logical windows, and ``mw1_bar`` is their shared BAR. T= he +``mw2`` through ``mw4`` entries report the logical window size when in ran= ge +and reject writes. + +Packed MWs require an NTB client that uses MW translation group operations; +``ntb_transport`` supports them. Per-MW size limiting through its +``max_mw_size`` parameter is not supported. ``ntb_transport`` also needs f= our +control scratchpads plus two scratchpads per logical MW. + A sample configuration for virtual NTB driver for virtual PCI bus:: =20 # echo 0x1957 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_vid diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/en= dpoint/functions/pci-epf-vntb.c index 526cc31d9435..2f6af0306563 100644 --- a/drivers/pci/endpoint/functions/pci-epf-vntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c @@ -1295,6 +1295,7 @@ static ssize_t epf_ntb_##_name##_show(struct config_i= tem *item, \ struct config_group *group =3D to_config_group(item); \ struct epf_ntb *ntb =3D to_epf_ntb(group); \ struct device *dev =3D &ntb->epf->dev; \ + u32 packed_mws; \ int win_no, idx; \ \ if (sscanf(#_name, "mw%d", &win_no) !=3D 1) \ @@ -1306,6 +1307,14 @@ static ssize_t epf_ntb_##_name##_show(struct config_= item *item, \ win_no, ntb->num_mws); \ return -ERANGE; \ } \ + packed_mws =3D ntb->packed_mws; \ + if (packed_mws && idx > 0) { \ + u64 size =3D ntb->mws_size[0]; \ + \ + if (size % packed_mws) \ + return -EINVAL; \ + return sprintf(page, "%llu\n", size / packed_mws); \ + } \ idx =3D array_index_nospec(idx, ntb->num_mws); \ return sprintf(page, "%llu\n", ntb->mws_size[idx]); \ } @@ -1337,6 +1346,8 @@ static ssize_t epf_ntb_##_name##_store(struct config_= item *item, \ win_no, ntb->num_mws); \ return -ERANGE; \ } \ + if (ntb->packed_mws && idx > 0) \ + return -EINVAL; \ idx =3D array_index_nospec(idx, ntb->num_mws); \ ntb->mws_size[idx] =3D val; \ \ @@ -1372,6 +1383,9 @@ static ssize_t epf_ntb_##_name##_store(struct config_= item *item, \ if (val < NO_BAR || val > BAR_5) \ return -EINVAL; \ \ + if (ntb->packed_mws && _id >=3D BAR_MW2) \ + return -EINVAL; \ + \ ntb->epf_ntb_bar[_id] =3D val; \ \ return len; \ @@ -1392,7 +1406,10 @@ static ssize_t epf_ntb_num_mws_store(struct config_i= tem *item, if (ret) return ret; =20 - if (val > MAX_MW) + if (val > EPF_NTB_MAX_MW) + return -EINVAL; + + if (ntb->packed_mws && val !=3D ntb->packed_mws) return -EINVAL; =20 ntb->num_mws =3D val; @@ -1400,6 +1417,44 @@ static ssize_t epf_ntb_num_mws_store(struct config_i= tem *item, return len; } =20 +static ssize_t epf_ntb_packed_mws_store(struct config_item *item, + const char *page, size_t len) +{ + struct config_group *group =3D to_config_group(item); + struct epf_ntb *ntb =3D to_epf_ntb(group); + u32 val; + int ret; + int i; + + if (epf_ntb_epc_attached(ntb)) + return -EOPNOTSUPP; + + ret =3D kstrtou32(page, 0, &val); + if (ret) + return ret; + + if (val > EPF_NTB_MAX_MW || + (val && (val < 2 || !is_power_of_2(val)))) + return -EINVAL; + + if (val && ntb->num_mws && val !=3D ntb->num_mws) + return -EINVAL; + + if (val) { + for (i =3D 1; i < MAX_MW; i++) + if (ntb->mws_size[i]) + return -EINVAL; + + for (i =3D BAR_MW2; i <=3D BAR_MW4; i++) + if (ntb->epf_ntb_bar[i] !=3D NO_BAR) + return -EINVAL; + } + + ntb->packed_mws =3D val; + + return len; +} + static ssize_t epf_ntb_db_count_store(struct config_item *item, const char *page, size_t len) { @@ -1427,6 +1482,7 @@ EPF_NTB_R(spad_count) EPF_NTB_W(spad_count) EPF_NTB_R(db_count) EPF_NTB_R(num_mws) +EPF_NTB_R(packed_mws) EPF_NTB_R(vbus_number) EPF_NTB_W(vbus_number) EPF_NTB_R(vntb_pid) @@ -1457,6 +1513,7 @@ EPF_NTB_BAR_W(mw4_bar, BAR_MW4) CONFIGFS_ATTR(epf_ntb_, spad_count); CONFIGFS_ATTR(epf_ntb_, db_count); CONFIGFS_ATTR(epf_ntb_, num_mws); +CONFIGFS_ATTR(epf_ntb_, packed_mws); CONFIGFS_ATTR(epf_ntb_, mw1); CONFIGFS_ATTR(epf_ntb_, mw2); CONFIGFS_ATTR(epf_ntb_, mw3); @@ -1475,6 +1532,7 @@ static struct configfs_attribute *epf_ntb_attrs[] =3D= { &epf_ntb_attr_spad_count, &epf_ntb_attr_db_count, &epf_ntb_attr_num_mws, + &epf_ntb_attr_packed_mws, &epf_ntb_attr_mw1, &epf_ntb_attr_mw2, &epf_ntb_attr_mw3, --=20 2.51.0