From nobody Fri Oct 2 09:19:34 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F258126C17; Mon, 3 Aug 2026 07:18:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785741521; cv=none; b=QUym9JbUOJkAkg6DGtKyk01jB35WCieNrvpxMT0w2H6SC0SpirXpsMcy07IjUj//O2s7lg3ozwMiS5itpV8ejRkaxZBJ5oNaaRyeEvOcU2+lnVl6NN33FbvOKWnNEzvzlpdXEXCa8NiK+98jy2vOq3VNomS9o4GxlphSu/Ov3kc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785741521; c=relaxed/simple; bh=6ErTE3Ph2CM7wMYFjlWdwrrzDYYuPGlm0fXL3jVEfZQ=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=P4US9/Zu6ec4ujl0/ah9DFFkXqWXhpu81rKD7XFDAVzejXwmykgP9O5fJje+Yzg0ijt4jUKalmi/IDg5ZvBoPpzaMrvoaMIfYwq+2Tsz0cV74yb4DyoX0LDxoAjNaNy2LX+pupkPBOB3DmUiHYB63MHkkafVm63NX9gArvXywrU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=mR9iyQ8a; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="mR9iyQ8a" X-UUID: 85dd0d208f0b11f18dc8c9802ae25ab1-20260803 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=rnPJ65E1Y9yzwUYd8xbFQASARnIMv8dFxPXCgrTihiM=; b=mR9iyQ8aKeM3JFbOdCnDc5SrV+eenLI8BnQhujrB7jW1js+NzZyYUN+OrLuvDYTKKbgKLTT+ZK0D85V6oRThuBjPIknqw+LJWxCEXdZ6OM1dZ+lCZIrKmHIX9Ejoise4REN0PvHr2EjSuEwvD2QZ9lI7EKYIzv4BzM1f2AfN4S0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.19,REQID:e819192a-a6bf-4af5-a8db-9a0a9f78504d,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:7db8b62,CLOUDID:431912e2-71f1-405e-92eb-6802d6af74fd,B ulkID:nil,BulkQuantity:0,SF:102|836|865|888|898,TC:-5,Content:0|15|50|99,E DM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0,OSA:0, AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: 85dd0d208f0b11f18dc8c9802ae25ab1-20260803 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1507500850; Mon, 03 Aug 2026 15:18:27 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 3 Aug 2026 15:18:26 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 3 Aug 2026 15:18:25 +0800 From: Zexin Wang To: Wim Van Sebroeck , Guenter Roeck , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , Zexin Wang , , , , Subject: [RESEND PATCH] watchdog: sbsa_gwdt: add force_enable module parameter Date: Mon, 3 Aug 2026 15:18:18 +0800 Message-ID: <20260803071823.27759-1-ot_zexin.wang@mediatek.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The sbsa_gwdt driver only manages and registers the watchdog timer if it was already enabled by a previous boot stage (such as firmware). If the watchdog was left disabled prior to entering the kernel, the driver will not actively enable it during the probe phase. Introduce a new module parameter 'force_enable' to allow overriding this behavior. When 'force_enable' is set, the driver will forcibly start the watchdog and register it as running during the probe phase, even if it was disabled in the previous boot stage. Signed-off-by: Zexin Wang --- drivers/watchdog/sbsa_gwdt.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c index e04d42cc7774..4b49e1aeef84 100644 --- a/drivers/watchdog/sbsa_gwdt.c +++ b/drivers/watchdog/sbsa_gwdt.c @@ -122,6 +122,11 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=3D" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); =20 +static bool force_enable; +module_param(force_enable, bool, 0); +MODULE_PARM_DESC(force_enable, + "Force enable watchdog on probe (default=3D0)"); + /* * Arm Base System Architecture 1.0 introduces watchdog v1 which * increases the length watchdog offset register to 48 bits. @@ -296,6 +301,7 @@ static int sbsa_gwdt_probe(struct platform_device *pdev) struct sbsa_gwdt *gwdt; int ret, irq; u32 status; + bool force_action; =20 gwdt =3D devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL); if (!gwdt) @@ -386,14 +392,27 @@ static int sbsa_gwdt_probe(struct platform_device *pd= ev) */ sbsa_gwdt_set_timeout(wdd, wdd->timeout); =20 + force_action =3D force_enable && !(status & SBSA_GWDT_WCS_EN); + if (force_action) { + sbsa_gwdt_start(wdd); + set_bit(WDOG_HW_RUNNING, &wdd->status); + dev_info(dev, "Watchdog force enabled.\n"); + } + watchdog_stop_on_reboot(wdd); ret =3D devm_watchdog_register_device(dev, wdd); - if (ret) + if (ret) { + dev_err(dev, "Failed to register watchdog: %d\n", ret); + if (force_action) { + clear_bit(WDOG_HW_RUNNING, &wdd->status); + sbsa_gwdt_stop(wdd); + } return ret; + } =20 dev_info(dev, "Initialized with %ds timeout @ %u Hz, action=3D%d.%s\n", wdd->timeout, gwdt->clk, action, - status & SBSA_GWDT_WCS_EN ? " [enabled]" : ""); + watchdog_hw_running(wdd) ? " [enabled]" : ""); =20 return 0; } --=20 2.45.2