From nobody Fri Oct 2 08:30:50 2026 Received: from mail-244108.protonmail.ch (mail-244108.protonmail.ch [109.224.244.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 692E12931FA for ; Mon, 3 Aug 2026 14:56:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.108 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769005; cv=none; b=fGSw3nQy/eNZxjst7l2ToOcH186N3gb9SBY46qogCW3llehItYbagA1GhttYhFs3JjqwTaCDV8Pcz0uxj3mB4YZA3UlG/G02WUIm9KsQQkYspQYwcg9PZ0JBiolo1ACjFLWD/2LHulnW3Y0MzaOVd6ULSTXhgUjkei3BPaVqT0o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769005; c=relaxed/simple; bh=bElw+EC3BtkVujNhRAmFC3bBhwHEY6yVLOiO9cFKvzY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g2Mwr1C56bMA+aB9LdHscEhLYgFZ7RXUKWZmzZF/fRkTQSM3SEiEtjFD76GkjHHU4GnJrGbD7txZAnNF8UDQ5sNz6/4zjukFOMqzERYMJxNuLATAftLf9hZrTcY6DS7k5PF6D3F/OF+yNZnXp24LRhBYxgDY+wJyNeASlzZP+Yk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=SHb9iWuq; arc=none smtp.client-ip=109.224.244.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="SHb9iWuq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785768997; x=1786028197; bh=8q2edUY/F+R6eEwokl1w5l9rk95zvIg7QcBwF/3Dezw=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=SHb9iWuqU2MjmhvgQFxqubhoTBWeaBW73Bzm5hLzedq7fzNuAXrMGmXFOK7UE2bqi iAfJ8yZGPu1lZ9PwFd+fsR5BR+oQiPcRqFmPlZK2w+7NJfxQOpWw6xmT0ewBkVi9uH K2ZpN+0EQmcZ2ifp/PT1wLH1RVdizGdYfnc+XPHCqyVLp/O2+dB9gNdw9ZTKYG4Srj b7rK4CZnOUJhK5BodmawnPYZErJFu9L+Gk1AAS39LyP47/C7oBQ9londfZ74s3iZAG MKkPTwedXg4cGzVKgoUbjIibfswaNvfn55IYHrwC1YmkFoWe2Md0w/AUogvAyBXCYI wc8B0/5CE9A5Q== X-Pm-Submission-Id: 4hDKWR29Bfz2Sd3H From: Esben Haabendal Date: Mon, 03 Aug 2026 16:56:19 +0200 Subject: [PATCH v2 1/4] drm/bridge: nwl-dsi: Limit LCDIF specific sync override Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260803-nwl-dsi-fixes-v2-1-1809a0ac453f@geanix.com> References: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> In-Reply-To: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785768991; l=2620; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=bElw+EC3BtkVujNhRAmFC3bBhwHEY6yVLOiO9cFKvzY=; b=tf10PB+CdHMCQittUe4/dypD0qXYyGWbETuSqWW3UIIV6Pf93oVO00lajlamdE7fC06Jmp/Bs p6IhUBmJ3ujAarryS04mLHPzJfs1fDz0Q2rugS5ImS74JU/a5LokM/7 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When using DCSS with NWL, overriding the mode flags to enforce active high sync is preventing the use of active low with downstream bridges, such as ti-sn65dsi83, which will not see such mode flags set by the panel. Signed-off-by: Esben Haabendal --- drivers/gpu/drm/bridge/nwl-dsi.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 3c9ae93c4f67..915e1bdc73c8 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -110,6 +110,8 @@ struct nwl_dsi { int error; =20 struct nwl_dsi_transfer *xfer; + + unsigned int endpoint; }; =20 static const struct regmap_config nwl_dsi_regmap_config =3D { @@ -821,10 +823,13 @@ static int nwl_dsi_bridge_atomic_check(struct drm_bri= dge *bridge, struct drm_connector_state *conn_state) { struct drm_display_mode *adjusted_mode =3D &crtc_state->adjusted_mode; + struct nwl_dsi *dsi =3D bridge_to_dsi(bridge); =20 /* At least LCDIF + NWL needs active high sync */ - adjusted_mode->flags |=3D (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); - adjusted_mode->flags &=3D ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + if (dsi->endpoint =3D=3D NWL_DSI_ENDPOINT_LCDIF) { + adjusted_mode->flags |=3D (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + adjusted_mode->flags &=3D ~(DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + } =20 /* * Do a full modeset if crtc_state->active is changed to be true. @@ -1088,13 +1093,12 @@ static int nwl_dsi_parse_dt(struct nwl_dsi *dsi) static int nwl_dsi_select_input(struct nwl_dsi *dsi) { struct device_node *remote; - u32 use_dcss =3D 1; int ret; =20 remote =3D of_graph_get_remote_node(dsi->dev->of_node, 0, NWL_DSI_ENDPOINT_LCDIF); if (remote) { - use_dcss =3D 0; + dsi->endpoint =3D NWL_DSI_ENDPOINT_LCDIF; } else { remote =3D of_graph_get_remote_node(dsi->dev->of_node, 0, NWL_DSI_ENDPOINT_DCSS); @@ -1103,11 +1107,12 @@ static int nwl_dsi_select_input(struct nwl_dsi *dsi) "No valid input endpoint found\n"); return -EINVAL; } + dsi->endpoint =3D NWL_DSI_ENDPOINT_DCSS; } =20 DRM_DEV_INFO(dsi->dev, "Using %s as input source\n", - (use_dcss) ? "DCSS" : "LCDIF"); - ret =3D mux_control_try_select(dsi->mux, use_dcss); + (dsi->endpoint =3D=3D NWL_DSI_ENDPOINT_DCSS) ? "DCSS" : "LCDIF"); + ret =3D mux_control_try_select(dsi->mux, dsi->endpoint =3D=3D NWL_DSI_END= POINT_DCSS); if (ret < 0) DRM_DEV_ERROR(dsi->dev, "Failed to select input: %d\n", ret); =20 --=20 2.55.0 From nobody Fri Oct 2 08:30:50 2026 Received: from mail-106112.protonmail.ch (mail-106112.protonmail.ch [79.135.106.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA00D267B07 for ; Mon, 3 Aug 2026 14:56:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.112 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769004; cv=none; b=i9BSnFr8pYY4EhuY2FSdnevQ0fHHl7YBRYWNGI1XeZrafhW6Q02nYGmaWW2P4ogjz6+U/OMTzmIS9u4739GVLw0tNlO8xzc8nsKJw+U+bNGAjG+mUrU275cIJNcU64bB2CENeYOq8+VypUTLfBgW4OCRPCsMFFOdrB9cGWR+duQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769004; c=relaxed/simple; bh=5wDfu643ig6P6KNyte70uWWyvXUGy79Xs21wkKKdxtQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PsD3EnoH1gwduI+ad4BcA03Nu8xmqXIPGlDMTN58Z9xDFcSeBlGZGbEC4UNLpQ8CwRpsGJ0X5FlzQ13qOghiIBeShqj5bkAJ5u7FgTZLCbz9irJfkekuWvZihVJgvFrlleTDnQsfl15bgOgNBcsYnS2MPwGdQMOwIjhjZH/Wu9w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=Q3oykL5o; arc=none smtp.client-ip=79.135.106.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="Q3oykL5o" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785768997; x=1786028197; bh=QPBm4NG7A+HSGHSOUZg6VDUd6exXx8y8wk5CPF99Uq0=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=Q3oykL5o6e9h7yAA9/PJO+Cl6fCRwfCcAuyd/wE540gLfafKXRdhl10Oh4Tf9i5Bz DOnxbM1IupdevPznUTfiFEKmf2/7ViXSa1iWyKeJ2ZH36Bj5PAg2De56oVD5a2ZyGU yJP/C2jdOPhIo0tIy+yENL/HLbJpbeledx/Zgxfw1CpXKEayW1i4VC1+Zq0urXIMw4 2+c9qGIrBAgVHqhJFCc38HtXXjftzkirXo+ivay4qYNRDFwH5zotoYggdWnz/V+rmm fxiFEldgxhPUf71xJp4P3VcHhP1NZHHHNNU0NKYmf9YffGG9m6lJ27Fsp/Bxj6+FsA ZAm2lnQtcBmLw== X-Pm-Submission-Id: 4hDKWS61vGz2Sd49 From: Esben Haabendal Date: Mon, 03 Aug 2026 16:56:20 +0200 Subject: [PATCH v2 2/4] drm/bridge: nwl-dsi: Correct auto-insert EOTP behavior Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260803-nwl-dsi-fixes-v2-2-1809a0ac453f@geanix.com> References: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> In-Reply-To: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Robert Chiras , Laurentiu Palcu X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785768991; l=1428; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=MlnAnk3D6X3Xr53pwTpcKxu0eo4On3ljZI9uhBncg4s=; b=z3Jf9W6nXyVo8zGhXIdad7r6BjnrXxZBxPVxtH64DgqHWCLyfKHg8GIvHFABmn0o443//Porl X7oJvA/lNBpCvWeGuGJ4pZIKpQFr42Mz/523QQiiPNf6ZRwBwSdItHk X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= From: Robert Chiras In order to respect the DSI protocol, make sure that auto-insert EOTP is enabled according to the NO_EOT_PACKET flag instead of the CLOCK_NON_CONTINUOUS flag. Signed-off-by: Esben Haabendal Cc: Robert Chiras Cc: Laurentiu Palcu --- drivers/gpu/drm/bridge/nwl-dsi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 915e1bdc73c8..c9af6a3d47e1 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -222,13 +222,15 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi) DRM_DEV_DEBUG_DRIVER(dsi->dev, "DSI Lanes %d\n", dsi->lanes); nwl_dsi_write(dsi, NWL_DSI_CFG_NUM_LANES, dsi->lanes - 1); =20 - if (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + if (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x01); - nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x01); - } else { + else nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x00); + + if (dsi->dsi_mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x00); - } + else + nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x01); =20 /* values in byte clock cycles */ cycles =3D ui2bc(cfg->clk_pre); --=20 2.55.0 From nobody Fri Oct 2 08:30:50 2026 Received: from mail-43171.protonmail.ch (mail-43171.protonmail.ch [185.70.43.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99C04324B33 for ; Mon, 3 Aug 2026 14:56:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769013; cv=none; b=QCnGq0niJOKV6b6ILNROi1/+5fHmpnbg1A3ycOxaXCmzMCSnJuak8a3mzPkgTX239m7I4Rxj4Ozx64dUQPO/LLez2K8BJqGa4ooQWts+wFR6WdGGV6JqnypEv9Flqg4/+1pVic43D3o9D1PLiriby90XE+8DFFRK7wvO0Ld5+ts= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769013; c=relaxed/simple; bh=c1kX1dfMDFg4kDtGfgS4d85tuPa7hOFuvxJkCOTaRYY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YFZscOfJrFZ8/cRSFgvnBY778wVlZ6B296hrFON6WI5zrSLbkpe5oTxuB+IyvSoMmx8hRVw/7tvlI8PvU6BLnTa/9epnUAJx9TX9rKezyg3jqc52vT0c6OJ9eldLJ3vnMNcgTz8LGGZmecgsgDCYx8Un2Z7TIHqajoiDjx2omTE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=WOEKamgX; arc=none smtp.client-ip=185.70.43.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="WOEKamgX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail3; t=1785769000; x=1786028200; bh=EkLJwBgehNDhkCGjgum7H72p5O6GL/Lzfa0aVrti90E=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=WOEKamgXL2UJiDfISz7GqUszB8qg+U7KXjCh5LX8BN639khiiTYe32BMTW0WkeHG+ tG3RAVs3fytrvBLeelHNa+oDG1flMQLHOIWYtJT77YgKQdcn0vutBcdTPMNqnxbYNc vjAQFh8BbZF20zaA9VzHsHDhSYjCrbXLp3WcQIovGTF+nTpprgtbUUetnunXtbyUqR kJ6UzeDNg7bECmnTmp3OdF1Awa8y3oC324dnRptpUDvZ/m6SuRIQlkPWlAcPFfPgMW 6Je3n7bY1QUnfP1KBtQ/qIo0WFV3bqKdHispngfPlzDeGSixxd4h77+HeVxancGgv6 G8Tg04VNCMxFA== X-Pm-Submission-Id: 4hDKWV1JTwz1DDLP From: Esben Haabendal Date: Mon, 03 Aug 2026 16:56:21 +0200 Subject: [PATCH v2 3/4] drm/bridge: nwl-dsi: Correct MIPI DSI horizontal sync timing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260803-nwl-dsi-fixes-v2-3-1809a0ac453f@geanix.com> References: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> In-Reply-To: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Robert Chiras , "Oliver F. Brown" X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785768991; l=4286; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=c1kX1dfMDFg4kDtGfgS4d85tuPa7hOFuvxJkCOTaRYY=; b=NvaBSYIWVi1vmXV2UaOnDbyTTFw5xlOkvW46RWNkDwZrEiDtOQEnAX24e+VV0hW63fJDTEbBM SCgit2c4yG1AesTevJH9hH7w3ROOMokbMhHUDqNZiYuyx7Y/iHPDjHI X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The NWL MIPI Host controller registers specifies the horizontal front porch, sync pulse, and back porch in DSI packet payload size in bytes (ie. not in pixel clocks). The calculation for this is (mostly) described in section 13.6.3.5.1.2 of the i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual (rev. 3.1). The formula shown there does not take packet header size into account though. The formula implemented here converts the hfp, hsa, and hbp to DSI packet bytes and then subtracts the number of packet header bytes. It is worth noting that these values only needs to match approximately, according to the reference manual. Based on commit in NXP vendor tree commit f2a61699749d ("LF-7981-4: drm/bridge: nwl-dsi: Correct MIPI DSI hori= zontal sync timing") Signed-off-by: Esben Haabendal Cc: Robert Chiras Cc: Oliver F. Brown --- drivers/gpu/drm/bridge/nwl-dsi.c | 64 ++++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 61 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index c9af6a3d47e1..226036d22e3f 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -22,6 +22,7 @@ #include #include #include +#include =20 #include #include @@ -264,6 +265,10 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) bool burst_mode; int hfront_porch, hback_porch, vfront_porch, vback_porch; int hsync_len, vsync_len; + int hfp, hbp, hsa; + unsigned long long pclk_period; + unsigned long long hs_period; + int h_blank, pkt_hdr_len, pkt_len; =20 hfront_porch =3D dsi->mode.hsync_start - dsi->mode.hdisplay; hsync_len =3D dsi->mode.hsync_end - dsi->mode.hsync_start; @@ -317,9 +322,62 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) dsi->mode.hdisplay); } =20 - nwl_dsi_write(dsi, NWL_DSI_HFP, hfront_porch); - nwl_dsi_write(dsi, NWL_DSI_HBP, hback_porch); - nwl_dsi_write(dsi, NWL_DSI_HSA, hsync_len); + pclk_period =3D DIV_ROUND_UP_ULL(PSEC_PER_SEC, dsi->mode.clock * 1000); + DRM_DEV_DEBUG_DRIVER(dsi->dev, "pclk_period: %llu\n", pclk_period); + + hs_period =3D DIV_ROUND_UP_ULL(PSEC_PER_SEC, dsi->phy_cfg.mipi_dphy.hs_cl= k_rate); + DRM_DEV_DEBUG_DRIVER(dsi->dev, "hs_period: %llu\n", hs_period); + + /* + * Calculate the bytes needed, according to the RM formula: + * Time of DPI event =3D time to transmit x number of bytes on the DSI + * interface + * dpi_event_size * dpi_pclk_period =3D dsi_bytes * 8 * hs_bit_period / + * num_lanes + * =3D=3D=3D> + * dsi_bytes =3D dpi_event_size * dpi_pclk_period * num_lanes / + * (8 * hs_bit_period) + */ + hfp =3D hfront_porch * pclk_period * dsi->lanes / (8 * hs_period); + hbp =3D hback_porch * pclk_period * dsi->lanes / (8 * hs_period); + hsa =3D hsync_len * pclk_period * dsi->lanes / (8 * hs_period); + + /* Make sure horizontal blankins are even numbers */ + hfp =3D roundup(hfp, 2); + hbp =3D roundup(hbp, 2); + hsa =3D roundup(hsa, 2); + + /* + * We need to subtract the packet header length: 32 + * In order to make sure we don't get negative values, + * subtract a proportional value to the total length of the + * horizontal blanking duration. + */ + h_blank =3D hfp + hbp + hsa; + + if (h_blank) { + pkt_len =3D min(hfp, roundup(((hfp * 100 / h_blank) * 32) / 100, 2)); + pkt_hdr_len =3D pkt_len; + hfp -=3D pkt_len; + + pkt_len =3D min(hbp, roundup(((hbp * 100 / h_blank) * 32) / 100, 2)); + pkt_hdr_len +=3D pkt_len; + hbp -=3D pkt_len; + + pkt_len =3D min(hsa, 32 - pkt_hdr_len); + pkt_hdr_len +=3D pkt_len; + hsa -=3D pkt_len; + if (pkt_hdr_len !=3D 32) + dev_warn(dsi->dev, + "Unable to subtract packet header length fully: %d left\n", + 32 - pkt_hdr_len); + } + + DRM_DEV_DEBUG_DRIVER(dsi->dev, "Register values: hfp=3D%d hbp=3D%d hsa=3D= %d\n", hfp, hbp, hsa); + + nwl_dsi_write(dsi, NWL_DSI_HFP, hfp); + nwl_dsi_write(dsi, NWL_DSI_HBP, hbp); + nwl_dsi_write(dsi, NWL_DSI_HSA, hsa); =20 nwl_dsi_write(dsi, NWL_DSI_ENABLE_MULT_PKTS, 0x0); nwl_dsi_write(dsi, NWL_DSI_BLLP_MODE, 0x1); --=20 2.55.0 From nobody Fri Oct 2 08:30:50 2026 Received: from mail-244106.protonmail.ch (mail-244106.protonmail.ch [109.224.244.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08205313550 for ; Mon, 3 Aug 2026 14:56:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769008; cv=none; b=lmkp2aY23BVRPKukuITnO/yWa01yVm4bJC4TGftiQVYkQZ7keJD9Ct7QuDqZnTG6wE5WsaBZU+2stV8cbMNViUa38f4+EWV2zmkLh5rjW9qpLwq8bh0E0lOY5a/HXYRUXDpORI3hKWQ6vFCV9+ml5l3Iady60uMSKid/K1w92Qg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785769008; c=relaxed/simple; bh=On7LASVbhL6jAPGUOgbfKiflmxrZf2uOOjxZiGuazcg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IxELVFRYDqRl13D2qmHfgIwJShCdk+K340J0zN5g9giwgs+AWq+PPHFuVasYlhZLXGdW69mvn17SlP2gz54+9fKfWe/DHsXDBXqCEkW6Zo1mrb4fPAEceH3v9Kg2Jk/ZQ0COKfgbgew8k0dAo4AM06ko1cEnpNq+zQ+n1otZtQs= ARC-Authentication-Results: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260803-nwl-dsi-fixes-v2-4-1809a0ac453f@geanix.com> References: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> In-Reply-To: <20260803-nwl-dsi-fixes-v2-0-1809a0ac453f@geanix.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Esben Haabendal , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785768991; l=804; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=On7LASVbhL6jAPGUOgbfKiflmxrZf2uOOjxZiGuazcg=; b=bBSFj2fIUxpX/hUBTlFhuTuzRP8ObVz6qasMPI7UNewX2FWMzYF1tOeEclgNiLPGY1JNgb5tY hSw0QXMeWG3CQo8JE3QZpJKYJnRP6IvoUCU07p0Hr7emeToOoC//Kb6 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= There does not seem to be any good reasons for ignoring the return value of the nwl_dsi_mode_set() function. Signed-off-by: Esben Haabendal --- drivers/gpu/drm/bridge/nwl-dsi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-= dsi.c index 226036d22e3f..08e87d166b17 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -942,7 +942,9 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge, } =20 /* Step 2 from DSI reset-out instructions */ - nwl_dsi_mode_set(dsi); + ret =3D nwl_dsi_mode_set(dsi); + if (ret < 0) + goto runtime_put; =20 /* Step 3 from DSI reset-out instructions */ ret =3D reset_control_deassert(dsi->rst_esc); --=20 2.55.0