From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CCBE37E5F1; Mon, 3 Aug 2026 10:20:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752453; cv=none; b=Xj40dsuNbOmWnVCz27luWRadULBr+8LQQTVNiHogXoSV+7yVXmSbhrIWJYLD26T5+ftBbAO9ZpWI4PJqJTUFurW5sb21sZKkLhjL/m/nxchnKfO8GBOOqOQn7QCyzc6M78NJOTWtj85wVp8Y44Zpcv8RjSV0nWYrD0azXnRmb6g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752453; c=relaxed/simple; bh=rLFaZzOdy5Q7XGVfrJwcKUOhX/FBTKgun5xpKYuP2Vs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=tT2P14bEXrkoXaqvB6RZf9t94zingoIZpZzMt5dh6yBVCCxg+7ZVjgvaB20+sjE0DlMz58tXGX23AaEDWl1bEoUpPZZquximVyolt0TxLKX883OtabNQx6piYX6IpU3Yhb4B0Ovy7agbBbg0iP962+wXqQBW6GNG1a4QaRFjk/M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=TlJzOn5s; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="TlJzOn5s" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1785752452; x=1817288452; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=rLFaZzOdy5Q7XGVfrJwcKUOhX/FBTKgun5xpKYuP2Vs=; b=TlJzOn5s2F4/VDkE+gO1ucaYW2/GEVlq6By+cToOfA8WREHo7DqKSnhW ixkLbAvhlDArm8rGIH33o944hMzUWOXnVISrdc/7yg43x57NlTbBQHDQi c5Gy8Xg/5uEtsBGYJtFYZMCrguj2vtImRYjcP/ib7lKubethYRyKA7/Gj r1Xja2Pv7onjwjsLdS1qGqx16pZN44EWU7HvavHtKsNtKLIAdb+G9m7UX 9VtmFpR/wcK2yPP93CoI3iRlatHILpYjwj60KRbXY7bHhdNIosMAbv2cg Y4W9SMMUPEx8Bluypc74FMn7Qz4OOAv6qP30Wlt++e0l0NIXA7epInWTm A==; X-CSE-ConnectionGUID: z8HjUvSkS2G/wpG+j+qlUw== X-CSE-MsgGUID: ISBinxXWSbCWsExXD21ccw== X-IronPort-AV: E=Sophos;i="6.25,202,1779174000"; d="scan'208";a="292929003" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Aug 2026 03:20:46 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 3 Aug 2026 03:20:45 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:20:41 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:36 +0530 Subject: [PATCH v4 01/10] media: microchip-isc: fix awb_mutex and lock lifecycle Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-1-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 isc->lock and awb_mutex were initialised in isc_async_complete() and destroyed in isc_async_unbind(), tying their lifetime to the subdev bind/unbind cycle instead of the device: - isc_async_unbind() destroyed awb_mutex before cancel_work_sync(), which takes it; - a failed .complete() left them initialised, and isc->lock was destroyed only on the .complete() error path, so the normal unbind path leaked it; - a rebind runs .complete() again and reinitialises a live mutex. Initialise both with devm_mutex_init() at probe so they live for the whole device lifetime and are freed at remove, and drop the init and destroy from the .complete()/.unbind() callbacks. isc_async_complete_err then only returned ret, so drop the label and return directly at each error site. Fixes: 314c96e5203d ("media: atmel: atmel-isc-base: use mutex to lock awb w= orkq from streaming") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-base.c | 15 ++++--------= --- drivers/media/platform/microchip/microchip-sama5d2-isc.c | 9 +++++++++ drivers/media/platform/microchip/microchip-sama7g5-isc.c | 9 +++++++++ 3 files changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index a7cdc743fda7..eebbcb28a7ee 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -1703,7 +1703,6 @@ static void isc_async_unbind(struct v4l2_async_notifi= er *notifier, { struct isc_device *isc =3D container_of(notifier->v4l2_dev, struct isc_device, v4l2_dev); - mutex_destroy(&isc->awb_mutex); cancel_work_sync(&isc->awb_work); video_unregister_device(&isc->video_dev); v4l2_ctrl_handler_free(&isc->ctrls.handler); @@ -1767,8 +1766,6 @@ static int isc_async_complete(struct v4l2_async_notif= ier *notifier) =20 isc->current_subdev =3D container_of(notifier, struct isc_subdev_entity, notifier); - mutex_init(&isc->lock); - mutex_init(&isc->awb_mutex); =20 init_completion(&isc->comp); =20 @@ -1787,7 +1784,7 @@ static int isc_async_complete(struct v4l2_async_notif= ier *notifier) ret =3D vb2_queue_init(q); if (ret < 0) { dev_err(isc->dev, "vb2_queue_init() failed: %d\n", ret); - goto isc_async_complete_err; + return ret; } =20 /* Init video dma queues */ @@ -1798,13 +1795,13 @@ static int isc_async_complete(struct v4l2_async_not= ifier *notifier) ret =3D isc_set_default_fmt(isc); if (ret) { dev_err(isc->dev, "Could not set default format\n"); - goto isc_async_complete_err; + return ret; } =20 ret =3D isc_ctrl_init(isc); if (ret) { dev_err(isc->dev, "Init isc ctrols failed: %d\n", ret); - goto isc_async_complete_err; + return ret; } =20 /* Register video device */ @@ -1824,7 +1821,7 @@ static int isc_async_complete(struct v4l2_async_notif= ier *notifier) ret =3D video_register_device(vdev, VFL_TYPE_VIDEO, -1); if (ret < 0) { dev_err(isc->dev, "video_register_device failed: %d\n", ret); - goto isc_async_complete_err; + return ret; } =20 ret =3D isc_scaler_link(isc); @@ -1839,10 +1836,6 @@ static int isc_async_complete(struct v4l2_async_noti= fier *notifier) =20 isc_async_complete_unregister_device: video_unregister_device(vdev); - -isc_async_complete_err: - mutex_destroy(&isc->awb_mutex); - mutex_destroy(&isc->lock); return ret; } =20 diff --git a/drivers/media/platform/microchip/microchip-sama5d2-isc.c b/dri= vers/media/platform/microchip/microchip-sama5d2-isc.c index 66d3d7891991..25d241b4c66a 100644 --- a/drivers/media/platform/microchip/microchip-sama5d2-isc.c +++ b/drivers/media/platform/microchip/microchip-sama5d2-isc.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -417,6 +418,14 @@ static int microchip_isc_probe(struct platform_device = *pdev) platform_set_drvdata(pdev, isc); isc->dev =3D dev; =20 + ret =3D devm_mutex_init(dev, &isc->lock); + if (ret) + return ret; + + ret =3D devm_mutex_init(dev, &isc->awb_mutex); + if (ret) + return ret; + io_base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(io_base)) return PTR_ERR(io_base); diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index b0302dfc3278..998146adabd8 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -406,6 +407,14 @@ static int microchip_xisc_probe(struct platform_device= *pdev) platform_set_drvdata(pdev, isc); isc->dev =3D dev; =20 + ret =3D devm_mutex_init(dev, &isc->lock); + if (ret) + return ret; + + ret =3D devm_mutex_init(dev, &isc->awb_mutex); + if (ret) + return ret; + io_base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(io_base)) return PTR_ERR(io_base); --=20 2.34.1 From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9CAF37DEB5; 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X-CSE-ConnectionGUID: Exfq55hkT+y8E8Hxvt+nNA== X-CSE-MsgGUID: HaOTyP2hSKW+LcJpnKQkKQ== X-IronPort-AV: E=Sophos;i="6.25,202,1779174000"; d="scan'208";a="60678501" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2026 03:20:49 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Mon, 3 Aug 2026 03:20:49 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:20:45 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:37 +0530 Subject: [PATCH v4 02/10] media: microchip-isc: take a reference on the parsed endpoints Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-2-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 for_each_endpoint_of_node() drops the reference on the current node as it advances. xisc_parse_dt() and isc_parse_dt() store the node in subdev_entity->epn and release it later with of_node_put(), but never took their own reference, so the stored pointer refers to an already-released node. This underflows the refcount and can use-after-free, reachable through the camera device tree overlay. Take a reference with of_node_get() when storing the node, and drop it in microchip_isc_subdev_cleanup() so the entities the bind loop never reaches on an early exit do not leak it. Fixes: c9aa973884a1 ("media: atmel: atmel-isc: add microchip-xisc driver") Fixes: d6701f13bd07 ("media: atmel: Use v4l2_async_notifier_add_fwnode_remo= te_subdev") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath --- drivers/media/platform/microchip/microchip-isc-base.c | 6 ++++++ .../media/platform/microchip/microchip-sama5d2-isc.c | 18 ++++++++++++--= ---- .../media/platform/microchip/microchip-sama7g5-isc.c | 18 ++++++++++++--= ---- 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index eebbcb28a7ee..ca4f3b5f58aa 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -1853,6 +1853,12 @@ void microchip_isc_subdev_cleanup(struct isc_device = *isc) list_for_each_entry(subdev_entity, &isc->subdev_entities, list) { v4l2_async_nf_unregister(&subdev_entity->notifier); v4l2_async_nf_cleanup(&subdev_entity->notifier); + /* + * Release the endpoint reference taken while parsing. It is + * NULL for entities the bind loop already consumed, so this + * only drops the ones left over on an early exit. + */ + of_node_put(subdev_entity->epn); } =20 INIT_LIST_HEAD(&isc->subdev_entities); diff --git a/drivers/media/platform/microchip/microchip-sama5d2-isc.c b/dri= vers/media/platform/microchip/microchip-sama5d2-isc.c index 25d241b4c66a..532f2b50e2ea 100644 --- a/drivers/media/platform/microchip/microchip-sama5d2-isc.c +++ b/drivers/media/platform/microchip/microchip-sama5d2-isc.c @@ -357,28 +357,28 @@ static int isc_parse_dt(struct device *dev, struct is= c_device *isc) struct device_node *epn; struct isc_subdev_entity *subdev_entity; unsigned int flags; + int ret; =20 INIT_LIST_HEAD(&isc->subdev_entities); =20 for_each_endpoint_of_node(np, epn) { struct v4l2_fwnode_endpoint v4l2_epn =3D { .bus_type =3D 0 }; - int ret; =20 ret =3D v4l2_fwnode_endpoint_parse(of_fwnode_handle(epn), &v4l2_epn); if (ret) { - of_node_put(epn); dev_err(dev, "Could not parse the endpoint\n"); - return -EINVAL; + ret =3D -EINVAL; + goto err_put; } =20 subdev_entity =3D devm_kzalloc(dev, sizeof(*subdev_entity), GFP_KERNEL); if (!subdev_entity) { - of_node_put(epn); - return -ENOMEM; + ret =3D -ENOMEM; + goto err_put; } - subdev_entity->epn =3D epn; + subdev_entity->epn =3D of_node_get(epn); =20 flags =3D v4l2_epn.bus.parallel.flags; =20 @@ -399,6 +399,12 @@ static int isc_parse_dt(struct device *dev, struct isc= _device *isc) } =20 return 0; + +err_put: + of_node_put(epn); + list_for_each_entry(subdev_entity, &isc->subdev_entities, list) + of_node_put(subdev_entity->epn); + return ret; } =20 static int microchip_isc_probe(struct platform_device *pdev) diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index 998146adabd8..0b72a61b51ee 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -341,6 +341,7 @@ static int xisc_parse_dt(struct device *dev, struct isc= _device *isc) struct isc_subdev_entity *subdev_entity; unsigned int flags; bool mipi_mode; + int ret; =20 INIT_LIST_HEAD(&isc->subdev_entities); =20 @@ -348,23 +349,22 @@ static int xisc_parse_dt(struct device *dev, struct i= sc_device *isc) =20 for_each_endpoint_of_node(np, epn) { struct v4l2_fwnode_endpoint v4l2_epn =3D { .bus_type =3D 0 }; - int ret; =20 ret =3D v4l2_fwnode_endpoint_parse(of_fwnode_handle(epn), &v4l2_epn); if (ret) { - of_node_put(epn); dev_err(dev, "Could not parse the endpoint\n"); - return -EINVAL; + ret =3D -EINVAL; + goto err_put; } =20 subdev_entity =3D devm_kzalloc(dev, sizeof(*subdev_entity), GFP_KERNEL); if (!subdev_entity) { - of_node_put(epn); - return -ENOMEM; + ret =3D -ENOMEM; + goto err_put; } - subdev_entity->epn =3D epn; + subdev_entity->epn =3D of_node_get(epn); =20 flags =3D v4l2_epn.bus.parallel.flags; =20 @@ -388,6 +388,12 @@ static int xisc_parse_dt(struct device *dev, struct is= c_device *isc) } =20 return 0; + +err_put: + of_node_put(epn); + list_for_each_entry(subdev_entity, &isc->subdev_entities, list) + of_node_put(subdev_entity->epn); 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Mon, 3 Aug 2026 03:20:49 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:38 +0530 Subject: [PATCH v4 03/10] media: microchip-isc: synchronize the IRQ before disabling clocks on stop Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-3-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 isc_stop_streaming() masks the DMA interrupt and then drops the runtime PM reference, which disables the ISC clocks. microchip_isc_interrupt() may still be executing on another CPU at that point; it reads ISC_INTSR over regmap, and touching the unclocked registers triggers an external abort. Store the IRQ number at probe and call synchronize_irq() after masking the interrupt, before dropping the PM reference. Fixes: 106267444f12 ("[media] atmel-isc: add the Image Sensor Controller co= de") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-base.c | 3 +++ drivers/media/platform/microchip/microchip-isc.h | 1 + drivers/media/platform/microchip/microchip-sama5d2-isc.c | 2 ++ drivers/media/platform/microchip/microchip-sama7g5-isc.c | 2 ++ 4 files changed, 8 insertions(+) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index ca4f3b5f58aa..debbc38717de 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -425,6 +425,9 @@ static void isc_stop_streaming(struct vb2_queue *vq) /* Disable DMA interrupt */ regmap_write(isc->regmap, ISC_INTDIS, ISC_INT_DDONE); =20 + /* let a running IRQ handler finish before the clock is disabled */ + synchronize_irq(isc->irq); + pm_runtime_put_sync(isc->dev); =20 /* Disable stream on the sub device */ diff --git a/drivers/media/platform/microchip/microchip-isc.h b/drivers/med= ia/platform/microchip/microchip-isc.h index ad4e98a1dd8f..f5e322c2e36b 100644 --- a/drivers/media/platform/microchip/microchip-isc.h +++ b/drivers/media/platform/microchip/microchip-isc.h @@ -287,6 +287,7 @@ struct isc_device { u32 dcfg; =20 struct device *dev; + int irq; struct v4l2_device v4l2_dev; struct video_device video_dev; =20 diff --git a/drivers/media/platform/microchip/microchip-sama5d2-isc.c b/dri= vers/media/platform/microchip/microchip-sama5d2-isc.c index 532f2b50e2ea..fa06b272b25d 100644 --- a/drivers/media/platform/microchip/microchip-sama5d2-isc.c +++ b/drivers/media/platform/microchip/microchip-sama5d2-isc.c @@ -447,6 +447,8 @@ static int microchip_isc_probe(struct platform_device *= pdev) if (irq < 0) return irq; =20 + isc->irq =3D irq; + ret =3D devm_request_irq(dev, irq, microchip_isc_interrupt, 0, "microchip-sama5d2-isc", isc); if (ret < 0) { diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index 0b72a61b51ee..eef4d0f4c520 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -436,6 +436,8 @@ static int microchip_xisc_probe(struct platform_device = *pdev) if (irq < 0) return irq; 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Mon, 3 Aug 2026 03:20:55 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:39 +0530 Subject: [PATCH v4 04/10] media: microchip-isc: disable histogram and flush AWB work on teardown Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-4-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 isc_stop_streaming() and the isc_start_streaming() error path dropped the runtime PM reference with the histogram still enabled. A HISDONE firing just before the stop, or a failed isc_update_profile() on the start path, can queue isc_awb_work(), which reads the histogram registers before taking its own PM reference and faults on the unclocked device. Disable the histogram, synchronize the IRQ and flush the work before dropping the PM reference on both paths. synchronize_irq() must come before cancel_work_sync(), so an in-flight handler cannot re-queue awb_work after it is cancelled. Fixes: 93d4a26c3dab ("[media] atmel-isc: add the isc pipeline function") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath --- drivers/media/platform/microchip/microchip-isc-base.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index debbc38717de..54f3093e14fc 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -382,6 +382,13 @@ static int isc_start_streaming(struct vb2_queue *vq, u= nsigned int count) return 0; =20 err_configure: + isc_set_histogram(isc, false); + + /* let a running IRQ handler finish before the clock is disabled */ + synchronize_irq(isc->irq); + + cancel_work_sync(&isc->awb_work); + pm_runtime_put_sync(isc->dev); err_pm_get: v4l2_subdev_call(isc->current_subdev->sd, video, s_stream, 0); @@ -425,9 +432,13 @@ static void isc_stop_streaming(struct vb2_queue *vq) /* Disable DMA interrupt */ regmap_write(isc->regmap, ISC_INTDIS, ISC_INT_DDONE); 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Mon, 3 Aug 2026 03:21:02 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:20:59 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:40 +0530 Subject: [PATCH v4 05/10] media: microchip-isc: do not touch WB registers when not streaming Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-5-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 isc_s_awb_ctrl() called isc_update_awb_ctrls() unconditionally, writing the white balance registers even when the device is runtime suspended; on many ARM platforms accessing the unclocked registers is an external abort. The write was also done without awb_lock, racing isc_awb_work(), which holds it so the DMA done IRQ cannot latch a half-updated pipeline. Write the registers only while streaming and not stopping, under awb_lock, and update the profile there. The isc->stop check covers the window where isc_stop_streaming() has gated the clocks but vb2 still reports streaming. Otherwise the new values stay cached and isc_configure() programs them at the next stream start. Fixes: 4e52889f48fe ("media: atmel: atmel-isc-base: expose white balance as= v4l2 controls") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- .../media/platform/microchip/microchip-isc-base.c | 20 ++++++++++++----= ---- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index 54f3093e14fc..3ea38da0e2aa 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -1509,20 +1509,24 @@ static int isc_s_awb_ctrl(struct v4l2_ctrl *ctrl) if (ctrl->cluster[ISC_CTRL_GB_OFF]->is_new) ctrls->offset[ISC_HIS_CFG_MODE_GB] =3D isc->gb_off_ctrl->val; =20 - isc_update_awb_ctrls(isc); - mutex_lock(&isc->awb_mutex); - if (vb2_is_streaming(&isc->vb2_vidq)) { + if (vb2_is_streaming(&isc->vb2_vidq) && !isc->stop) { + unsigned long flags; + /* - * If we are streaming, we can update profile to - * have the new settings in place. + * awb_lock keeps the DMA done IRQ from latching a + * partially written WB pipeline. */ + spin_lock_irqsave(&isc->awb_lock, flags); + isc_update_awb_ctrls(isc); + spin_unlock_irqrestore(&isc->awb_lock, flags); + isc_update_profile(isc); } else { /* - * The auto cluster will activate automatically this - * control. This has to be deactivated when not - * streaming. + * Not streaming: keep the cached values for the next + * stream start and deactivate the cluster-activated + * do_white_balance button. */ v4l2_ctrl_activate(isc->do_wb_ctrl, false); } --=20 2.34.1 From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C33137F8B1; Mon, 3 Aug 2026 10:21:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752468; cv=none; b=cRuXPZGk9VuI5TGCfz/pW1tOOaHQRdhQgCrU/qA/VSYEZCpSNwBTG02o/tPrwbmvs3i5mVppqS2GcTj90EQgoE1xRjJVD2BrDOJfmvRBH6TpAeBFHfirTwTmTIaVei/HAWjkdF3RsgADoiGuMmEk1kow+S/ikfQFW+bDy64cig8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752468; c=relaxed/simple; bh=V7HFy0DGHkU5Mzgbh7WmrxPJ3UABDK75WI5+QjzATsI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=Xx94Mgr6s0C4MZCmxtljX6zSV5t6WglUBtju1daRRfC36M4SBabJ9c3tu+PVpO5p+qwCCDXYcxOavlHLO6/LeO6PtyLhyPLDyn90SllE+grlUBq6Gc/tjy5Y6I2Jh3PkyoG/KM8MKbqwGk7uKvpT84sMDEKTX9fv67MzyyGzqms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=C5NJe7RE; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="C5NJe7RE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1785752467; x=1817288467; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=V7HFy0DGHkU5Mzgbh7WmrxPJ3UABDK75WI5+QjzATsI=; b=C5NJe7RE2CAoQff7/iPoFmS4+LgaO9bwF5opPCfT0H191NOU7XU+QWhV rgukuNI1v8t1HsgDvjBmk4KLcPspsZdYBJMNcXrP7Hoe3EYLjrWfJhYKm XKbeDC00tPbMO0cmd7E7gX6ZIrcjNqRD6JAsJb1wg2LUI3Dy1RegykYS0 NXIvsmNbRmFl/2XTO5IEdtNHEi5HTOt2gyIrSk2SxSM6yrNZ76Wd9kNh0 uMozI32GEjt7rHEiXFcmCRGly6HTl0sxn33OlRWGBVprN7ne8d2uGBl/O QP0ZMMoCnvoickMPcfhBN1pd4Hg/xuS+J0mLxIjybJNGiSxgMjGArFxbE Q==; X-CSE-ConnectionGUID: CdjOMjPxTUu+jHE9UyXl1Q== X-CSE-MsgGUID: kg+o9qRgRw2gWn0Qh8HESQ== X-IronPort-AV: E=Sophos;i="6.25,202,1779174000"; d="scan'208";a="292929015" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2026 03:21:07 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Mon, 3 Aug 2026 03:21:06 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:21:03 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:41 +0530 Subject: [PATCH v4 06/10] media: microchip-isc: store the unshifted PFE_CFG0 BPS value Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-6-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath X-Mailer: b4 0.14.3 pfe_cfg0_bps held a pre-shifted BPS value (ISC_PFE_CFG0_BPS_EIGHT was 0x4 << 28) ORed straight into the register. The other format selectors like cfa_baycfg store the bare field value and position it at the write, so this one was inconsistent. Store the bare BPS value and apply it with FIELD_PREP() at the PFE_CFG0 write, and fix the pfe_cfg0_bps comment to match. No functional change. Suggested-by: Eugen Hristev Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-base.c | 4 +++- drivers/media/platform/microchip/microchip-isc-regs.h | 10 +++++----- drivers/media/platform/microchip/microchip-isc.h | 4 +++- 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index 3ea38da0e2aa..466f15922c43 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -8,6 +8,7 @@ * Author: Eugen Hristev * */ +#include #include #include #include @@ -290,7 +291,8 @@ static int isc_configure(struct isc_device *isc) u32 pfe_cfg0, dcfg, mask, pipeline; struct isc_subdev_entity *subdev =3D isc->current_subdev; =20 - pfe_cfg0 =3D isc->config.sd_format->pfe_cfg0_bps; + pfe_cfg0 =3D FIELD_PREP(ISC_PFE_CFG0_BPS_MASK, + isc->config.sd_format->pfe_cfg0_bps); pipeline =3D isc->config.bits_pipeline; =20 dcfg =3D isc->config.dcfg_imode | isc->dcfg; diff --git a/drivers/media/platform/microchip/microchip-isc-regs.h b/driver= s/media/platform/microchip/microchip-isc-regs.h index e77e1d9a1db8..185ef0eab7ad 100644 --- a/drivers/media/platform/microchip/microchip-isc-regs.h +++ b/drivers/media/platform/microchip/microchip-isc-regs.h @@ -31,11 +31,11 @@ #define ISC_PFE_CFG0_MODE_PROGRESSIVE (0x0 << 4) #define ISC_PFE_CFG0_MODE_MASK GENMASK(6, 4) =20 -#define ISC_PFE_CFG0_BPS_EIGHT (0x4 << 28) -#define ISC_PFG_CFG0_BPS_NINE (0x3 << 28) -#define ISC_PFG_CFG0_BPS_TEN (0x2 << 28) -#define ISC_PFG_CFG0_BPS_ELEVEN (0x1 << 28) -#define ISC_PFG_CFG0_BPS_TWELVE (0x0 << 28) +#define ISC_PFE_CFG0_BPS_EIGHT 0x4 +#define ISC_PFG_CFG0_BPS_NINE 0x3 +#define ISC_PFG_CFG0_BPS_TEN 0x2 +#define ISC_PFG_CFG0_BPS_ELEVEN 0x1 +#define ISC_PFG_CFG0_BPS_TWELVE 0x0 #define ISC_PFE_CFG0_BPS_MASK GENMASK(30, 28) =20 #define ISC_PFE_CFG0_COLEN BIT(12) diff --git a/drivers/media/platform/microchip/microchip-isc.h b/drivers/med= ia/platform/microchip/microchip-isc.h index f5e322c2e36b..d7bcd74efff9 100644 --- a/drivers/media/platform/microchip/microchip-isc.h +++ b/drivers/media/platform/microchip/microchip-isc.h @@ -62,7 +62,9 @@ struct isc_subdev_entity { * @mbus_code: V4L2 media bus format code. * @cfa_baycfg: If this format is RAW BAYER, indicate the type of bayer. this is either BGBG, RGRG, etc. - * @pfe_cfg0_bps: Number of hardware data lines connected to the ISC + * @pfe_cfg0_bps: ISC_PFE_CFG0 BPS field value (e.g. ISC_PFE_CFG0_BPS_EIGH= T), + written into PFE_CFG0 with FIELD_PREP(ISC_PFE_CFG0_BPS_MASK) + at configure time. * @raw: If the format is raw bayer. */ =20 --=20 2.34.1 From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1FC137F8B1; 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X-CSE-ConnectionGUID: pgdL8lMKRRyHXpdS+nHKIw== X-CSE-MsgGUID: w/bzWcSgTVye6Ay1qlRpOw== X-IronPort-AV: E=Sophos;i="6.25,202,1779174000"; d="scan'208";a="60678508" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Aug 2026 03:21:11 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 3 Aug 2026 03:21:10 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:21:07 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:42 +0530 Subject: [PATCH v4 07/10] media: microchip-isc: fix ISC_PFG_CFG0_BPS macro name typo Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-7-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath X-Mailer: b4 0.14.3 The BPS field macros for ISC_PFE_CFG0 were spelled ISC_PFG_CFG0_BPS_* (NINE, TEN, ELEVEN, TWELVE). The register is PFE, not PFG. Rename them to ISC_PFE_CFG0_BPS_* to match the register and the EIGHT and MASK macros. No functional change. Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-regs.h | 8 ++++---- .../media/platform/microchip/microchip-sama5d2-isc.c | 18 +++++++++-----= ---- .../media/platform/microchip/microchip-sama7g5-isc.c | 18 +++++++++-----= ---- 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-regs.h b/driver= s/media/platform/microchip/microchip-isc-regs.h index 185ef0eab7ad..9ddbbb6dd68b 100644 --- a/drivers/media/platform/microchip/microchip-isc-regs.h +++ b/drivers/media/platform/microchip/microchip-isc-regs.h @@ -32,10 +32,10 @@ #define ISC_PFE_CFG0_MODE_MASK GENMASK(6, 4) =20 #define ISC_PFE_CFG0_BPS_EIGHT 0x4 -#define ISC_PFG_CFG0_BPS_NINE 0x3 -#define ISC_PFG_CFG0_BPS_TEN 0x2 -#define ISC_PFG_CFG0_BPS_ELEVEN 0x1 -#define ISC_PFG_CFG0_BPS_TWELVE 0x0 +#define ISC_PFE_CFG0_BPS_NINE 0x3 +#define ISC_PFE_CFG0_BPS_TEN 0x2 +#define ISC_PFE_CFG0_BPS_ELEVEN 0x1 +#define ISC_PFE_CFG0_BPS_TWELVE 0x0 #define ISC_PFE_CFG0_BPS_MASK GENMASK(30, 28) =20 #define ISC_PFE_CFG0_COLEN BIT(12) diff --git a/drivers/media/platform/microchip/microchip-sama5d2-isc.c b/dri= vers/media/platform/microchip/microchip-sama5d2-isc.c index fa06b272b25d..da0d06a78f70 100644 --- a/drivers/media/platform/microchip/microchip-sama5d2-isc.c +++ b/drivers/media/platform/microchip/microchip-sama5d2-isc.c @@ -147,49 +147,49 @@ static struct isc_format sama5d2_formats_list[] =3D { { .fourcc =3D V4L2_PIX_FMT_SBGGR10, .mbus_code =3D MEDIA_BUS_FMT_SBGGR10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG10, .mbus_code =3D MEDIA_BUS_FMT_SGBRG10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_GBGB, }, { .fourcc =3D V4L2_PIX_FMT_SGRBG10, .mbus_code =3D MEDIA_BUS_FMT_SGRBG10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_GRGR, }, { .fourcc =3D V4L2_PIX_FMT_SRGGB10, .mbus_code =3D MEDIA_BUS_FMT_SRGGB10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { .fourcc =3D V4L2_PIX_FMT_SBGGR12, .mbus_code =3D MEDIA_BUS_FMT_SBGGR12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_BGBG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG12, .mbus_code =3D MEDIA_BUS_FMT_SGBRG12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_GBGB, }, { .fourcc =3D V4L2_PIX_FMT_SGRBG12, .mbus_code =3D MEDIA_BUS_FMT_SGRBG12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_GRGR, }, { .fourcc =3D V4L2_PIX_FMT_SRGGB12, .mbus_code =3D MEDIA_BUS_FMT_SRGGB12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { @@ -210,7 +210,7 @@ static struct isc_format sama5d2_formats_list[] =3D { { .fourcc =3D V4L2_PIX_FMT_Y10, .mbus_code =3D MEDIA_BUS_FMT_Y10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, }, =20 }; diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index eef4d0f4c520..d3bdd3aa6770 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -156,49 +156,49 @@ static struct isc_format sama7g5_formats_list[] =3D { { .fourcc =3D V4L2_PIX_FMT_SBGGR10, .mbus_code =3D MEDIA_BUS_FMT_SBGGR10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG10, .mbus_code =3D MEDIA_BUS_FMT_SGBRG10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_GBGB, }, { .fourcc =3D V4L2_PIX_FMT_SGRBG10, .mbus_code =3D MEDIA_BUS_FMT_SGRBG10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_GRGR, }, { .fourcc =3D V4L2_PIX_FMT_SRGGB10, .mbus_code =3D MEDIA_BUS_FMT_SRGGB10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { .fourcc =3D V4L2_PIX_FMT_SBGGR12, .mbus_code =3D MEDIA_BUS_FMT_SBGGR12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_BGBG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG12, .mbus_code =3D MEDIA_BUS_FMT_SGBRG12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_GBGB, }, { .fourcc =3D V4L2_PIX_FMT_SGRBG12, .mbus_code =3D MEDIA_BUS_FMT_SGRBG12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_GRGR, }, { .fourcc =3D V4L2_PIX_FMT_SRGGB12, .mbus_code =3D MEDIA_BUS_FMT_SRGGB12_1X12, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TWELVE, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TWELVE, .cfa_baycfg =3D ISC_BAY_CFG_RGRG, }, { @@ -224,7 +224,7 @@ static struct isc_format sama7g5_formats_list[] =3D { { .fourcc =3D V4L2_PIX_FMT_Y10, .mbus_code =3D MEDIA_BUS_FMT_Y10_1X10, - .pfe_cfg0_bps =3D ISC_PFG_CFG0_BPS_TEN, + .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, }, }; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-8-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 Early return when streaming stops skips pm_runtime_put_sync(), leaking the reference and preventing runtime suspend. Fixes: 314c96e5203d ("media: atmel: atmel-isc-base: use mutex to lock awb w= orkq from streaming") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-base.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index 466f15922c43..9e06b1e0d9d2 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -1432,7 +1432,7 @@ static void isc_awb_work(struct work_struct *w) /* streaming is not active anymore */ if (isc->stop) { mutex_unlock(&isc->awb_mutex); - return; + goto out_pm_put; } =20 isc_update_profile(isc); @@ -1443,6 +1443,7 @@ static void isc_awb_work(struct work_struct *w) if (ctrls->awb) regmap_write(regmap, ISC_CTRLEN, ISC_CTRL_HISREQ); =20 +out_pm_put: pm_runtime_put_sync(isc->dev); } =20 --=20 2.34.1 From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16B4538B14D; Mon, 3 Aug 2026 10:21:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752482; cv=none; b=E3lskZx7gVaioBOMl/bumlIxPkqfrfAX0enKScm9vFbameA3+txYdxChxYWrZimTcaOwM8WcjdCFzbCAa9Vp5uJ5x9r6nCKxaJF1NQD06b3dqPelOf3t8659htw1DN39V3UvQeur4PyiqaKgoFyvYpN3vtJSTo4y0CKaA5dCbHQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785752482; c=relaxed/simple; bh=yM6J3G3UIz1VHlvQqWEv3s3g933skbO+5o3936n5sxY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=cWV7ZzrRPYoQfNwqQFcbMWJoa//bqRvabhnryUWc365yp2cpHq/HRLAJPSbrgeWm8E3tccSZy7sAsTDpPinXAzQm2Swg5O7MPQz7uevs2JTQ4LeoLRN84DJ2C/me1I2AIxMnAHOJXjHXLGd1bOcUgh/hhH/BRaaM0uQ5yeY0MaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=q5s3RUvS; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="q5s3RUvS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1785752481; x=1817288481; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=yM6J3G3UIz1VHlvQqWEv3s3g933skbO+5o3936n5sxY=; b=q5s3RUvSoYJp4Mmwz+TeF3+VBfEvHkwvmWV8BCC1zsVg4GDSAbb79ZtW 1sscZqX9xQQ43QtzZnQrIHEFYZCtRlwiU6CUbDLQ5CZDDiQ9TL9CtR/sq Rymo9j0SyI+9LsFzah4PRXFbdE27OVViA5a32Pnr9CuYRVzFt4SZDHZJF zYLT/N0XcDdlZ4zQawQLuxLwgCrhAeWTSLVo14W4xePw50IgoQELta1+q /wdBEOQYtHxwxn1riGQU2H5rrwgYm6DNI4N35qJI36IywP5GysjIswO79 UE0ZYWiAlWGLr8z20DNWHfEO9e8Pl/ltR1nDG681yfNN4ipvuScgDt8o9 g==; X-CSE-ConnectionGUID: DMybaRy+R12m6VNR7CzOYw== X-CSE-MsgGUID: W646aEvQT2GseV3ZXU0srg== X-IronPort-AV: E=Sophos;i="6.25,202,1779174000"; d="scan'208";a="228697341" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2026 03:21:20 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Mon, 3 Aug 2026 03:21:19 -0700 Received: from [127.0.0.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 3 Aug 2026 03:21:16 -0700 From: Balakrishnan Sambath Date: Mon, 3 Aug 2026 15:50:44 +0530 Subject: [PATCH v4 09/10] media: microchip-isc: fix SBGGR10 Bayer pattern Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-9-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 SBGGR10 was mapped to ISC_BAY_CFG_RGRG instead of ISC_BAY_CFG_BGBG, causing red/blue channel swap. Fixes: 1e8f401474d6 ("media: atmel: atmel-isc: reworked driver and formats") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-sama5d2-isc.c | 2 +- drivers/media/platform/microchip/microchip-sama7g5-isc.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-sama5d2-isc.c b/dri= vers/media/platform/microchip/microchip-sama5d2-isc.c index da0d06a78f70..e2e10cf48886 100644 --- a/drivers/media/platform/microchip/microchip-sama5d2-isc.c +++ b/drivers/media/platform/microchip/microchip-sama5d2-isc.c @@ -148,7 +148,7 @@ static struct isc_format sama5d2_formats_list[] =3D { .fourcc =3D V4L2_PIX_FMT_SBGGR10, .mbus_code =3D MEDIA_BUS_FMT_SBGGR10_1X10, .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, - .cfa_baycfg =3D ISC_BAY_CFG_RGRG, + .cfa_baycfg =3D ISC_BAY_CFG_BGBG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG10, diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/dri= vers/media/platform/microchip/microchip-sama7g5-isc.c index d3bdd3aa6770..f655f05003fb 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -157,7 +157,7 @@ static struct isc_format sama7g5_formats_list[] =3D { .fourcc =3D V4L2_PIX_FMT_SBGGR10, .mbus_code =3D MEDIA_BUS_FMT_SBGGR10_1X10, .pfe_cfg0_bps =3D ISC_PFE_CFG0_BPS_TEN, - .cfa_baycfg =3D ISC_BAY_CFG_RGRG, + .cfa_baycfg =3D ISC_BAY_CFG_BGBG, }, { .fourcc =3D V4L2_PIX_FMT_SGBRG10, --=20 2.34.1 From nobody Fri Oct 2 09:21:59 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3FB4238B14D; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260803-balki-isc-prefix-fixes-v1-v4-10-f625d6aa0ae1@microchip.com> References: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> In-Reply-To: <20260803-balki-isc-prefix-fixes-v1-v4-0-f625d6aa0ae1@microchip.com> To: Eugen Hristev , Mauro Carvalho Chehab CC: Hans Verkuil , Sakari Ailus , , , Balakrishnan Sambath , X-Mailer: b4 0.14.3 ISC_WB_O_* and ISC_WB_G_* each pack two 13-bit fields. A negative offset sign-extends and corrupts the adjacent field. Add masks for the two fields and write them with FIELD_PREP(), which masks each value into its field, so sign extension can no longer bleed across. Fixes: 73c1a577b839 ("media: atmel: atmel-isc: reworked white balance featu= re") Cc: stable@vger.kernel.org Signed-off-by: Balakrishnan Sambath Reviewed-by: Eugen Hristev --- drivers/media/platform/microchip/microchip-isc-base.c | 16 ++++++++-------- drivers/media/platform/microchip/microchip-isc-regs.h | 6 ++++++ 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/driver= s/media/platform/microchip/microchip-isc-base.c index 9e06b1e0d9d2..5d0363e0c64c 100644 --- a/drivers/media/platform/microchip/microchip-isc-base.c +++ b/drivers/media/platform/microchip/microchip-isc-base.c @@ -63,17 +63,17 @@ static inline void isc_update_awb_ctrls(struct isc_devi= ce *isc) /* In here we set our actual hw pipeline config */ =20 regmap_write(isc->regmap, ISC_WB_O_RGR, - ((ctrls->offset[ISC_HIS_CFG_MODE_R])) | - ((ctrls->offset[ISC_HIS_CFG_MODE_GR]) << 16)); + FIELD_PREP(ISC_WB_O_LO, ctrls->offset[ISC_HIS_CFG_MODE_R]) | + FIELD_PREP(ISC_WB_O_HI, ctrls->offset[ISC_HIS_CFG_MODE_GR])); regmap_write(isc->regmap, ISC_WB_O_BGB, - ((ctrls->offset[ISC_HIS_CFG_MODE_B])) | - ((ctrls->offset[ISC_HIS_CFG_MODE_GB]) << 16)); + FIELD_PREP(ISC_WB_O_LO, ctrls->offset[ISC_HIS_CFG_MODE_B]) | + FIELD_PREP(ISC_WB_O_HI, ctrls->offset[ISC_HIS_CFG_MODE_GB])); regmap_write(isc->regmap, ISC_WB_G_RGR, - ctrls->gain[ISC_HIS_CFG_MODE_R] | - (ctrls->gain[ISC_HIS_CFG_MODE_GR] << 16)); + FIELD_PREP(ISC_WB_G_LO, ctrls->gain[ISC_HIS_CFG_MODE_R]) | + FIELD_PREP(ISC_WB_G_HI, ctrls->gain[ISC_HIS_CFG_MODE_GR])); regmap_write(isc->regmap, ISC_WB_G_BGB, - ctrls->gain[ISC_HIS_CFG_MODE_B] | - (ctrls->gain[ISC_HIS_CFG_MODE_GB] << 16)); + FIELD_PREP(ISC_WB_G_LO, ctrls->gain[ISC_HIS_CFG_MODE_B]) | + FIELD_PREP(ISC_WB_G_HI, ctrls->gain[ISC_HIS_CFG_MODE_GB])); } =20 static inline void isc_reset_awb_ctrls(struct isc_device *isc) diff --git a/drivers/media/platform/microchip/microchip-isc-regs.h b/driver= s/media/platform/microchip/microchip-isc-regs.h index 9ddbbb6dd68b..fe145b142b82 100644 --- a/drivers/media/platform/microchip/microchip-isc-regs.h +++ b/drivers/media/platform/microchip/microchip-isc-regs.h @@ -149,6 +149,12 @@ /* ISC White Balance Gain for B, GB Register */ #define ISC_WB_G_BGB 0x0000006c =20 +/* Each WB offset/gain register packs two 13-bit fields, low and high */ +#define ISC_WB_O_LO GENMASK(12, 0) /* R or B offset [12:0] */ +#define ISC_WB_O_HI GENMASK(28, 16) /* GR or GB offset [28:16] */ +#define ISC_WB_G_LO GENMASK(12, 0) /* R or B gain [12:0] */ +#define ISC_WB_G_HI GENMASK(28, 16) /* GR or GB gain [28:16] */ + /* ISC Color Filter Array Control Register */ #define ISC_CFA_CTRL 0x00000070 =20 --=20 2.34.1