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charset="utf-8" From: Rahul T R The mhdp bridge can work without its HPD pin hooked up to the connector, but the current bridge driver throws an error when hpd line is not connected to the connector. For such cases, we need an indication for no-hpd, using which we can bypass the hpd detection and instead use the auxiliary channels connected to the DP connector to confirm the connection. So add no-hpd property to the bindings, to disable hpd when not connected or cannot be used for hotplug detection. Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary Signed-off-by: Yashas D Acked-by: Krzysztof Kozlowski --- .../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546= .yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml index c2b369456e4e..56ce3f65ff49 100644 --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -57,6 +57,17 @@ properties: interrupts: maxItems: 1 =20 + no-hpd: + type: boolean + description: + Set if the HPD line on the bridge isn't physically connected to the + DisplayPort connector or cannot be used for hotplug detection. + + Valid use cases include HPD pin not routed to the connector on the P= CB, + HPD signal muxed with another function on the SoC making it unavaila= ble + for hotplug detection, or hardware design where HPD cannot reliably + detect monitor presence. + ports: $ref: /schemas/graph.yaml#/properties/ports =20 --=20 2.34.1 From nobody Fri Oct 2 10:08:01 2026 Received: from mx0b-0002e601.pphosted.com (mx0b-0002e601.pphosted.com [148.163.154.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE7403B8BC4; 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charset="utf-8" From: Rahul T R Add a 'no-hpd' boolean property to support boards where the HPD line cannot be used for hotplug detection due to hardware limitations. On TI J721S2 EVMs, the DP0 HPD resistor is not populated from factory (DNI), so the HPD signal is not physically connected to SoC pin AA24 by default which makes HPD unavailable but AA24 must be in DP0_HPD mux mode for the MHDP firmware to operate. When this property is set, the driver uses auxiliary channel (AUX) DPCD reads to detect monitor presence instead of hardware HPD signals. The DRM framework polls the connection status via the .detect() callback, providing hotplug detection without requiring the HPD pin. Valid use cases: - HPD pin not routed to connector on PCB - HPD signal muxed with another function on SoC - Hardware designs where HPD cannot reliably detect monitor presence Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary Signed-off-by: Harikrishna Shenoy Signed-off-by: Yashas D --- .../drm/bridge/cadence/cdns-mhdp8546-core.c | 79 +++++++++++++++++-- .../drm/bridge/cadence/cdns-mhdp8546-core.h | 1 + 2 files changed, 72 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/= gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 504a3186ebb3..ae9bbec855f3 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -53,6 +53,8 @@ #include "cdns-mhdp8546-hdcp.h" #include "cdns-mhdp8546-j721e.h" =20 +static int cdns_mhdp_update_link_status(struct cdns_mhdp_device *mhdp); + static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge) { struct cdns_mhdp_device *mhdp =3D bridge_to_mhdp(bridge); @@ -698,7 +700,9 @@ static int cdns_mhdp_fw_activate(const struct firmware = *fw, * MHDP_HW_STOPPED happens only due to driver removal when * bridge should already be detached. */ - cdns_mhdp_bridge_hpd_enable(&mhdp->bridge); + + if (!mhdp->no_hpd) + cdns_mhdp_bridge_hpd_enable(&mhdp->bridge); =20 spin_unlock(&mhdp->start_lock); =20 @@ -739,7 +743,13 @@ static void cdns_mhdp_fw_cb(const struct firmware *fw,= void *context) spin_lock(&mhdp->start_lock); bridge_attached =3D mhdp->bridge_attached; spin_unlock(&mhdp->start_lock); - if (bridge_attached) + + if (!bridge_attached) + return; + + if (mhdp->no_hpd) + cdns_mhdp_update_link_status(mhdp); + else drm_bridge_hpd_notify(&mhdp->bridge, cdns_mhdp_detect(mhdp)); } =20 @@ -788,9 +798,14 @@ static ssize_t cdns_mhdp_transfer(struct drm_dp_aux *a= ux, ret =3D cdns_mhdp_dpcd_read(mhdp, msg->address, msg->buffer, msg->size); if (ret) { - dev_dbg(mhdp->dev, - "Failed to read DPCD addr %u\n", - msg->address); + if (mhdp->no_hpd) + dev_dbg(mhdp->dev, + "Failed to read DPCD addr %u\n", + msg->address); + else + dev_err(mhdp->dev, + "Failed to read DPCD addr %u\n", + msg->address); =20 return ret; } @@ -1523,6 +1538,19 @@ static int cdns_mhdp_attach(struct drm_bridge *bridg= e, =20 spin_unlock(&mhdp->start_lock); =20 + if (mhdp->no_hpd) { + /* + * In no-hpd mode there are no HPD interrupts to trigger + * detection. If firmware is already ready, do the initial + * AUX poll immediately. Otherwise fw_cb() will call + * cdns_mhdp_update_link_status() once firmware finishes + * loading and sees bridge_attached is true. + */ + if (hw_ready) + cdns_mhdp_update_link_status(mhdp); + return 0; + } + /* Enable SW event interrupts */ if (hw_ready) cdns_mhdp_bridge_hpd_enable(bridge); @@ -2012,6 +2040,16 @@ static enum drm_connector_status cdns_mhdp_bridge_detect(struct drm_bridge *bridge, struct drm_connector *c= onnector) { struct cdns_mhdp_device *mhdp =3D bridge_to_mhdp(bridge); + bool hw_ready; + + if (mhdp->no_hpd) { + spin_lock(&mhdp->start_lock); + hw_ready =3D mhdp->hw_state =3D=3D MHDP_HW_READY; + spin_unlock(&mhdp->start_lock); + + if (hw_ready) + cdns_mhdp_update_link_status(mhdp); + } =20 return cdns_mhdp_detect(mhdp); } @@ -2100,7 +2138,29 @@ static int cdns_mhdp_update_link_status(struct cdns_= mhdp_device *mhdp) =20 mutex_lock(&mhdp->link_mutex); =20 - mhdp->plugged =3D cdns_mhdp_detect_hpd(mhdp, &hpd_pulse); + if (mhdp->no_hpd) { + u8 rev; + + /* + * Use a side-effect-free capability register for presence + * detection. A successful AUX read means a sink is present; + * we do not need link training status registers here. + */ + ret =3D drm_dp_dpcd_read(&mhdp->aux, DP_DPCD_REV, &rev, 1); + mhdp->plugged =3D (ret =3D=3D 1); + ret =3D mhdp->plugged ? 0 : -EIO; + hpd_pulse =3D false; + + /* + * If the monitor is still connected and the link is already + * up, there is nothing to do. Avoid falling through to + * cdns_mhdp_sst_enable() on every poll cycle. + */ + if (mhdp->plugged && old_plugged && mhdp->link_up) + goto out; + } else { + mhdp->plugged =3D cdns_mhdp_detect_hpd(mhdp, &hpd_pulse); + } =20 if (!mhdp->plugged) { cdns_mhdp_link_down(mhdp); @@ -2288,6 +2348,8 @@ static int cdns_mhdp_probe(struct platform_device *pd= ev) mhdp->aux.dev =3D dev; mhdp->aux.transfer =3D cdns_mhdp_transfer; =20 + mhdp->no_hpd =3D of_property_read_bool(dev->of_node, "no-hpd"); + mhdp->regs =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(mhdp->regs)) { dev_err(dev, "Failed to get memory resource\n"); @@ -2360,8 +2422,9 @@ static int cdns_mhdp_probe(struct platform_device *pd= ev) mhdp->display_fmt.bpc =3D 8; =20 mhdp->bridge.of_node =3D pdev->dev.of_node; - mhdp->bridge.ops =3D DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | - DRM_BRIDGE_OP_HPD; + mhdp->bridge.ops =3D DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; + if (!mhdp->no_hpd) + mhdp->bridge.ops |=3D DRM_BRIDGE_OP_HPD; mhdp->bridge.type =3D DRM_MODE_CONNECTOR_DisplayPort; =20 ret =3D phy_init(mhdp->phy); diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h b/drivers/= gpu/drm/bridge/cadence/cdns-mhdp8546-core.h index b53335b0d22c..24ffb732a207 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h @@ -388,6 +388,7 @@ struct cdns_mhdp_device { =20 bool link_up; bool plugged; + bool no_hpd; =20 /* * "start_lock" protects the access to bridge_attached and --=20 2.34.1