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No functional change intended. Assisted-by: Claude:claude-sonnet-5 Signed-off-by: Maulik Shah Acked-by: Viresh Kumar --- drivers/pinctrl/actions/pinctrl-owl.c | 2 +- drivers/pinctrl/airoha/pinctrl-airoha.c | 2 +- drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | 4 ++-- drivers/pinctrl/mediatek/mtk-eint.c | 2 +- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 5 ++--- drivers/pinctrl/pinctrl-ocelot.c | 2 +- drivers/pinctrl/pinctrl-sx150x.c | 2 +- drivers/pinctrl/qcom/pinctrl-msm.c | 4 ++-- drivers/pinctrl/spear/pinctrl-plgpio.c | 2 +- 9 files changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/actions/pinctrl-owl.c b/drivers/pinctrl/action= s/pinctrl-owl.c index 1f0ef4727ba7..9f5637756bd3 100644 --- a/drivers/pinctrl/actions/pinctrl-owl.c +++ b/drivers/pinctrl/actions/pinctrl-owl.c @@ -824,7 +824,7 @@ static int owl_gpio_irq_set_type(struct irq_data *data,= unsigned int type) struct gpio_chip *gc =3D irq_data_get_irq_chip_data(data); struct owl_pinctrl *pctrl =3D gpiochip_get_data(gc); =20 - if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(data, handle_level_irq); else irq_set_handler_locked(data, handle_edge_irq); diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airo= ha/pinctrl-airoha.c index abfb018f207e..90372827639d 100644 --- a/drivers/pinctrl/airoha/pinctrl-airoha.c +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c @@ -2435,7 +2435,7 @@ static int airoha_irq_type(struct irq_data *data, uns= igned int type) if (gpiochip->irq_type[data->hwirq]) return 0; =20 - type =3D IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; + type =3D IRQ_TYPE_EDGE_BOTH; } gpiochip->irq_type[data->hwirq] =3D type & IRQ_TYPE_SENSE_MASK; =20 diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm/p= inctrl-nsp-gpio.c index 1fbb101386a3..83fcc80d5967 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c @@ -159,7 +159,7 @@ static void nsp_gpio_irq_ack(struct irq_data *d) u32 trigger_type; =20 trigger_type =3D irq_get_trigger_type(d->irq); - if (trigger_type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + if (trigger_type & IRQ_TYPE_EDGE_BOTH) writel(val, chip->base + NSP_GPIO_EVENT); } =20 @@ -177,7 +177,7 @@ static void nsp_gpio_irq_set_mask(struct irq_data *d, b= ool unmask) u32 trigger_type; =20 trigger_type =3D irq_get_trigger_type(d->irq); - if (trigger_type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + if (trigger_type & IRQ_TYPE_EDGE_BOTH) nsp_set_bit(chip, REG, NSP_GPIO_EVENT_INT_MASK, gpio, unmask); else nsp_set_bit(chip, REG, NSP_GPIO_INT_MASK, gpio, unmask); diff --git a/drivers/pinctrl/mediatek/mtk-eint.c b/drivers/pinctrl/mediatek= /mtk-eint.c index 8b022545a3e9..827231dc0d24 100644 --- a/drivers/pinctrl/mediatek/mtk-eint.c +++ b/drivers/pinctrl/mediatek/mtk-eint.c @@ -216,7 +216,7 @@ static int mtk_eint_set_type(struct irq_data *d, unsign= ed int type) writel(mask, reg); } =20 - if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { + if (type & IRQ_TYPE_EDGE_BOTH) { reg =3D mtk_eint_get_offset(eint, d->hwirq, eint->regs->sens_clr); writel(mask, reg); } else { diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nu= voton/pinctrl-npcm7xx.c index 0df749cbcba8..e051ff141d6c 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -259,11 +259,10 @@ static int npcmgpio_set_irq_type(struct irq_data *d, = unsigned int type) return -EINVAL; } =20 - if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { + if (type & IRQ_TYPE_LEVEL_MASK) { npcm_gpio_clr(&bank->chip, bank->base + NPCM7XX_GP_N_EVTYP, gpio); irq_set_handler_locked(d, handle_level_irq); - } else if (type & (IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_EDGE_RISING - | IRQ_TYPE_EDGE_FALLING)) { + } else if (type & IRQ_TYPE_EDGE_BOTH) { npcm_gpio_set(&bank->chip, bank->base + NPCM7XX_GP_N_EVTYP, gpio); irq_set_handler_locked(d, handle_edge_irq); } diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-oce= lot.c index 0fe0527863b8..58d3cde9f964 100644 --- a/drivers/pinctrl/pinctrl-ocelot.c +++ b/drivers/pinctrl/pinctrl-ocelot.c @@ -2317,7 +2317,7 @@ static const struct irq_chip ocelot_irqchip =3D { =20 static int ocelot_irq_set_type(struct irq_data *data, unsigned int type) { - if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) + if (type & IRQ_TYPE_LEVEL_MASK) irq_set_chip_handler_name_locked(data, &ocelot_level_irqchip, handle_level_irq, NULL); if (type & IRQ_TYPE_EDGE_BOTH) diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx1= 50x.c index 89fdfa96843f..2dd1f220bff1 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c @@ -525,7 +525,7 @@ static int sx150x_irq_set_type(struct irq_data *d, unsi= gned int flow_type) struct sx150x_pinctrl *pctl =3D gpiochip_get_data(gc); unsigned int n, val =3D 0; =20 - if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) + if (flow_type & IRQ_TYPE_LEVEL_MASK) return -EINVAL; =20 n =3D irqd_to_hwirq(d); diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinc= trl-msm.c index 641113831a7b..27f06bbc113c 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1191,9 +1191,9 @@ static int msm_gpio_irq_set_type(struct irq_data *d, = unsigned int type) =20 raw_spin_unlock_irqrestore(&pctrl->lock, flags); =20 - if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + if (type & IRQ_TYPE_LEVEL_MASK) irq_set_handler_locked(d, handle_level_irq); - else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + else if (type & IRQ_TYPE_EDGE_BOTH) irq_set_handler_locked(d, handle_edge_irq); =20 return 0; diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear= /pinctrl-plgpio.c index 1ec22010a3f9..5fcbea32089d 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c @@ -339,7 +339,7 @@ static int plgpio_irq_set_type(struct irq_data *d, unsi= gned trigger) if (plgpio->regs.eit =3D=3D -1) supported_type =3D IRQ_TYPE_LEVEL_HIGH; else - supported_type =3D IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; + supported_type =3D IRQ_TYPE_EDGE_BOTH; =20 if (!(trigger & supported_type)) return -EINVAL; --- base-commit: 415606a7be939835db9b0d6b711887586646346d change-id: 20260802-b4b4-irq-trigger-mask-pinctrl-359c48cb413b Best regards, -- =20 Maulik Shah