From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 243413CF1E0; Sat, 1 Aug 2026 21:41:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620465; cv=none; b=jMByldXUugSPghalb0njQT1EMzt0rQZcEtN3cmoscgKLDyXlEKqH8nQk1HOuMTnR8NM78f9kh+ttQf0z2i2fZEeJ4Mr2rBUYiIqpg/v4I0H+8zf4m6BKju8tee+7T6vLy1TVabfAZC3JjALP+MKethv/fc+bDZpF3sDQzoLItKo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620465; c=relaxed/simple; bh=5EBBa6OVSvOCiSiPRkep3jiYn5mqqxftWQ7tp2CWrdE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ys0W+EAxZ8LJ6ndp9cRABxDl0gm9TuLBxO8OIZ1oKTIi/mtEjqovc5RHG46rL5MfT2APHfFm1yezq3yYNGSDzhu71o3vrumOSu9BmWfXMrTJ/4rSA116dfI1R7KZfEPde1uuD3CZ9K+RzbDJikuSTuKtGh9PeKfewdx28D6s3lw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=yCEcH+lN; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="yCEcH+lN" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620461; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3qOaSj38gbQXIBnLLo6XU1JtH18hHfOPNkOOi36DWfE=; b=yCEcH+lNPtyZgCU+MmDMr3nDcfRlZTG1g+R3sHYWcJeVVj2sae4YbZXW2CEPTU6Qp+TkRL 7II6UTWvXxsASEFFEqUn/HnDFbq/+naporHJ6ox2sZe2zSN0lEpm1oKSxFibrXgeSuMPsI v3uOgIDtTV83/VLzDNgDn7X7x5OPXSc= Date: Sat, 01 Aug 2026 23:40:31 +0200 Subject: [PATCH v2 1/9] dt-bindings: arm: cpus: Add Apple M4 CPU core compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-1-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The core types of the M4 SoC no longer carry individual codenames. Apple's device trees re-use the 'everest' and 'sawtooth' codenames from the M3 generation for all later cores. Instead, we use a combination of the SoC's codename ('Donan') and the type of core ('e' and 'p' for the efficiency and performance cores respectively) as compatible for these cores. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index 5be89c584026..c328e9fb9843 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -86,6 +86,8 @@ properties: - apple,avalanche - apple,blizzard - apple,cyclone + - apple,donan-e + - apple,donan-p - apple,everest - apple,firestorm - apple,hurricane-zephyr --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABCF83CE0A4; Sat, 1 Aug 2026 21:41:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620473; cv=none; b=KwbObmS2rjPGd2N2FOSc+mmRyAjYH+7tTsW9m/eU4ZSr1J1KDJfFr+mJIQrycffQjxl/0uv1kYxRXTcMiqXuX1LJ/wJWDJs56Q/0I3ljn0TEvGDrgc2rFwSwcZpfHR0Pnv422sRf/M6adwtCNbke8LvhVmx1y4EnGW/jDPISmQs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620473; c=relaxed/simple; bh=b1+ox9bvvZi6esBCO4i+A29vpkObZzsDgandkj048qY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WRm4XqyOzL1I7pYhqw9RJC9zRlSMlK6KHFkAtwzXS1VXj2L3DkxE9muQ7uNBj7B/aUdlkh3v9uSB8bXxGghp6VRmVRcGCAt8QXoI5+oKowb43Uiy9tw8O/Ye5WzOW9BkQwU3Bg8+I9JpIUK68ui6KdUfgb5lyZlzz12+rUzAFzI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=h8NSCCQp; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="h8NSCCQp" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620469; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bGqkzE9J7l8eega5eRBiLNQWdpKKNJCn7O+8KgX4WaU=; b=h8NSCCQpwf+Pbc76gFxHGnC/2zorClI9nK1z8yeciR9o7ian3ecQi9KVZKyJ3gNr0PbQvj djQ2wTE+ycBi7Z1DIBlGHrSxd5NSknbXqUWkTyDnW0jRzphKPI8Z9VDYblaDakkR9rrLsH 0g74k9eEKRx1qc9w3XzqmXwppCyQh+U= Date: Sat, 01 Aug 2026 23:40:32 +0200 Subject: [PATCH v2 2/9] dt-bindings: interrupt-controller: apple,aic2: Add apple,t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-2-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The Apple t8132 (M4) SoC uses an AIC3 as interrupt controller, same as the M3 predecessor. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 726a6720e05f..1cb886785173 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -45,6 +45,7 @@ properties: - enum: - apple,t6030-aic3 - apple,t6031-aic3 + - apple,t8132-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F3D03CD8D4; Sat, 1 Aug 2026 21:41:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620481; cv=none; b=UKQNMSdDYU1zFeBDHVWaXpO3m9EWe3G/Qo0/aijiur668b2asB8jLMQOjGhfhpY5HtoZ6DRBi+iC6XpVsRZNoA1OZVV0ps0HLNmAuDp9eGZHQlVM0jM/UlfTofX7XNW7Oa/pFJtdUcAx+RVx1Lf41QcOr8EUl4JYcsZ3ciarn+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620481; c=relaxed/simple; bh=4Ll6UalzXq5TeKpxwb4XG2sshOdGsYwoQRY2dbFg3Mw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KHGLevBcbG9HaJjelXMSR/aas0mL1Jr40gUS65ryAYd5yCPyoTTqoG7KaHsLkRCugzK8J7qm3HVXRHy7MZUj2zDb91osmYVcGnsyyKvMMo7mKDaC8xzGVJXQdN1ikfWNfiorcxE3mLUzR1S33Z9qZxIc74AeOkVKDIcQ2lOZ2X8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=FHakikYK; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="FHakikYK" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620477; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5wvhJvl8V/UCRIKi03HOG9kNnF6pjoj6mjPMcmy9q1U=; b=FHakikYKl24BnaBBY8qcOVzpkpbt/Se1jvWiLZHD8o5/s9jZXKuFei1BRvs16Kr31tRJwv xVwvJaNe4v2S9cnyLFoCZcQAC1CwHGGY51vd6l4JMVrsJf+dN/SPk2zdSc8OW2Rzvu95mT hVcd3pDuZibLrl9sAqTnS0vBlg8wEhs= Date: Sat, 01 Aug 2026 23:40:33 +0200 Subject: [PATCH v2 3/9] dt-bindings: arm: apple: apple,pmgr: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-3-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The PMGR blocks on Apple silicon M4 SoCs (t8132) are compatible with the M1/M2/M3 predecessors. Add "apple,t8132-pmgr" as M4 specific compatible. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index 1d2001836eb4..da660fa13f77 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -41,6 +41,7 @@ properties: - apple,t6030-pmgr - apple,t6031-pmgr - apple,t8122-pmgr + - apple,t8132-pmgr - const: apple,t8103-pmgr - const: syscon - const: simple-mfd --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65E613CFF65; Sat, 1 Aug 2026 21:41:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620486; cv=none; b=jl6e3e/9r4JxlcJk03Re/T97fmBY9CgvqYBL2QjDalj5JEuj6+3rcOQ6vcGf+O1T644NmUmi34CkSXv/074xhbjCpqt5A28pRrxmO1ZK/N0o8lhrwbKZdbPihTNOl4kyB82L1Tn3WaJGbXQ3eDU+RR2zJJsUQmRFBflIK5P8BAU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620486; c=relaxed/simple; bh=YmFHeIB0o/O6fzGl/vGOKFOVcLF7QUtGIMGp+1SuiKE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gm35NzQ9HelEpebZC11miTUgeKWTjusZqYDNLppIzhO2F49fcgKPvbX8QMkL0tJH6thfFxvwNwKAtrlS7jJP7Q/DkQ/Kepc9wjmZSyKa6tAO/n7FT/C0ViK0sefzqqpW1D+5kS49AL5UrdByQqzkvlxOSylGGksfPr8pk5GKztw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=WIXEE4Co; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="WIXEE4Co" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620482; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FVJSRmVkxCrG8V5mDry6u5L6zCqB/MC8kvPzNOG+CjU=; b=WIXEE4CoOIUAm+gzrjPBXCo5c2BzPW2wY2eaBUdzR6v6pkJNjj6l/uehlHasfdBGgpsQd5 ycfYUxKsNTRMu3JoP+GF8sDn/dmyIV+FQkIbNjjGViC1Cg+JZ4j4VRSxv9eik9Yg0X97qN tAV1G73kx1tLAsva16vDd1jRTFKJxqo= Date: Sat, 01 Aug 2026 23:40:34 +0200 Subject: [PATCH v2 4/9] dt-bindings: power: apple,pmgr-pwrstate: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-4-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski The device power state management of the PMGR blocks on Apple's t8132 SoC (M4) is compatible with t8103. Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index e269f433524e..b24ea8e54e11 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -48,6 +48,7 @@ properties: - apple,t6030-pmgr-pwrstate - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate + - apple,t8132-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B08D03D0BEC; Sat, 1 Aug 2026 21:41:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620489; cv=none; b=aCQWBeEMP4wWZZkbiD/HBGOi2Ge2cfEgPnQHmS+B9MJ+bxtvXyBn/Yy4jWUDtqwJapHCpZZz1D+3916/F/+S6PPXa7P+sCGW2UnxYlWtBgKcKTo8Vq5KiJdB08bzlLNFohdGW7uDClBDXCl/FQxf/MKy6zZkFNiGDh8CTxffmu4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620489; c=relaxed/simple; bh=pFLYQi5N0grlRyhBVTWl/ONAbg8Yhqx+NF8t6AOTI0s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mgNehBgjl9qvnd012teInGXUefruSJ8ZSUUOrQWFssfUycoMHovi4wbgRi6gwWSdYIoZX+jIJ1mumX7OX6123c4Brd3eOy1z+Jjm2nPYlUilDlaAoq0x4DI/Zl2DEJdBPyeYQdzDPdydoau62AaXuN01vIutGFbH4xjwVG142R4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=fLnD8MAG; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="fLnD8MAG" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620485; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Mq/C7RB1k+jJBxtWuGdu+hRvxYIcrl2ZqGrbd1/PVa4=; b=fLnD8MAGbJyCcSBEzaey+h7VBLnveTeK+V1x454NZmiFik5coTCsyLRo3FLKieM9EZQw3k LnrEpoF6NLc9EKWCN0MuQ0UTyxvTBKc+pOu1Y0yvH4C5VMzrJUu5K19afe20XXgpDZ+Ifm JexVP6++MUi/lqSYhXCyz+zqfMZTLcs= Date: Sat, 01 Aug 2026 23:40:35 +0200 Subject: [PATCH v2 5/9] dt-bindings: pinctrl: apple,pinctrl: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-5-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The pin controller on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-pinctrl" as SoC specific compatible under "apple,t8103-pinctrl". Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) Reviewed-by: Linus Walleij --- This should be pulled via the pinctrl subtree, since it depends on "dt-bindings: pinctrl: apple,pinctrl: Add t6030 and t6031 compatibles"[1] which has been applied in the pinctrl tree. Thanks! Link: https://lore.kernel.org/all/20260709-apple-t603x-initial-devices-v1-7= -55b305833123@jannau.net/ [1] --- Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b= /Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml index f08d2c4f5784..bc6d41b63b5d 100644 --- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml @@ -23,6 +23,7 @@ properties: - apple,t6030-pinctrl - apple,t6031-pinctrl - apple,t8122-pinctrl + - apple,t8132-pinctrl - const: apple,t8103-pinctrl - items: # Do not add additional SoC to this list. --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 916653D1CAA; Sat, 1 Aug 2026 21:41:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620491; cv=none; b=jxfFtp176LS0Uk+V102UEaVxNkmQ6vHnDeDSAP8UhXaMGLnC9oiav9DCPYJ2URzBsOqexg7YIbSqGXISuVFSmrJ7iv8i7i2DCcEz88/JZzVtNfAkWfV1Zz9naC9QkVR+XTLITKsuQioDW9JTG4HSzzpcEMqtvIRUsLx26CCIu4A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620491; c=relaxed/simple; bh=dP3ZduCMWYgP/bwVMFxsI2J8qyA6oS0rXd1WFEbON0A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q0h1InrnmoiEvxppAjp+8KLAV55nXtLgsi/OJenyIkTEjTd8lOCNJYrkUUa1lj6FMRLV5c/67Uwkvf9K5zuLSuZ31UOT4VMCozjsXjiNwZrNuISDpM+qzSEzLpcvvvYP6rymSI0byc8sF0YrxrCzwUnwMGAdaqJafJdqr20qcQM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=mPJBCV9B; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="mPJBCV9B" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620488; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rgeVZmWljHnvNrY9ON+31e506GvxYaKm1tdjs4LqrMk=; b=mPJBCV9B7Mwb+09dfaEDcMCXZIxc00VrOnUC5rQpR1E6jIluk8xdwnZfT9zPHnGmSy3Nwk nt3CXUd8ndc9ROU/iTeHVrJYLO47WmHSo5vS8QaKeULb32XPet67e5Ba8ZWqEbBAYrqc3V g0Z/uz+N5X9Cd9Cc6PDDpdwkJ/qxCGc= Date: Sat, 01 Aug 2026 23:40:36 +0200 Subject: [PATCH v2 6/9] dt-bindings: i2c: apple,i2c: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-6-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The i2c block on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-i2c" as SoC specific compatible under "apple,t8103-i2c". Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documen= tation/devicetree/bindings/i2c/apple,i2c.yaml index d39f5e3f1df4..641f24b0ef4b 100644 --- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml @@ -27,6 +27,7 @@ properties: - apple,t6030-i2c - apple,t6031-i2c - apple,t8122-i2c + - apple,t8132-i2c - const: apple,t8103-i2c - items: - enum: --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E538C3CF678; Sat, 1 Aug 2026 21:41:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620496; cv=none; b=oboJ5MZ3fUhP/TRjlPDYQzJr9eQ6hVgbKnZUWTTsw/06xqdYEZyFFEfUAKs4TBW35YixsuleifiNwTe/i10xXy7y3ZNvUAb4ESPLMYvHzwT5oQI6NukEUdzJ7+CNs35RCPxhgXni2zp7pkAlaFsjUsv1pNZ6nTzfvZJrXuX7A50= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620496; c=relaxed/simple; bh=0dUO9cRWqmqZYdG/6Vj65qv6cUae0UbLXhnULaVb/oc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ecch3cs2aXRQ+D6wfclxpQZO+vFbVjUzUz9ZNMz9dpXFEmrBggGSpeEvceT/SdZtPYsmGaOl7YWgHEuV2YAIfl9kJYvP/qDKCLcTX4qmq4X3GpimJrky0mR2U3u5Y16L7mznM9XEsq+H5k9YACPOtY5kePTZPiohHbmfn8eMXA4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=DgKZMBJW; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="DgKZMBJW" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620492; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+tOmBwltvbaApS+3tNMuJI15d9yWVj352U6mU7Zkwaw=; b=DgKZMBJWCkMGV1PdjXqMLYQl6z11iJgZOihjCqksc+UMRx3fdRgxXSF2WiUwsuW9ZCxXEO 8wh01hfNuuU4PRNr0v23c/A7565jl4kPjshtaviQso74c33Nz8z1UEaoonGvSyjH0BWTFN HBjls6d9xLDiHjnLYIkTM88Ks/BSvqs= Date: Sat, 01 Aug 2026 23:40:37 +0200 Subject: [PATCH v2 7/9] dt-bindings: pwm: apple,s5l-fpwm: Add t8132 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-7-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The PWM controller on the Apple silicon t8132 (M4) SoC is compatible with t8103. Add "apple,t8132-fpwm" as SoC specific compatible under "apple,s5l-fpwm". Acked-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Yureka Lilian Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Do= cumentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml index dd95037ea5ee..ae8baa5f7bcd 100644 --- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml @@ -19,6 +19,7 @@ properties: - apple,t8103-fpwm - apple,t8112-fpwm - apple,t8122-fpwm + - apple,t8132-fpwm - apple,t6000-fpwm - apple,t6020-fpwm - apple,t6030-fpwm --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C6A43D3327; Sat, 1 Aug 2026 21:41:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620499; cv=none; b=ifzj/Uq/ICxN2NtBliAJpXc2ivscw7ldBvIJAkKPBDfJXi3zGdbDNl+UD3t+QHWIIwEGt3cxPmt1E+DNgaBUGT/JP5mSH4KJnP97MrqKvnj6I1BmHLOztd/iYdXGOm41t6z72m8qjwcfaDjhAHaV/BH4UIsuJ9ywKZOZI+lyfDY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785620499; c=relaxed/simple; bh=16/IQBiW659eKUP3JuGp4+b6DM+b9yBzYf8WnTo78IU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UyX0cB1Fcgc4dUjjQxaovRzlE1Y+6IPloiEMlteshEFb98yG539lpeFX9B/Y+ko8+lSUc0qP91Ygd+5rV2FLISuB07AKM5d+cDNFGVt30NTmDH03CPYv0LBUpWJ6j8gFCO5cj7c7QrTgbmnZIpA9bfUk/I+NtSk6VeSBG3qfEKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=OYgp6U1I; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="OYgp6U1I" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620496; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CGRI0yKrp5VIRC7CP/TE5VvduSX3IVkuXzRMbTq63wE=; b=OYgp6U1IZAHoSbhr0ESmdU+YzF9VK1XiM4+0hmvqKtUTClSeeagpPgTbjl3MZwLNUsIMWs PHLHTXQlFp9K2jm+bh5e2OlTmjBzAZf4Mo2m6Jb9yUjWcvNLlki5m28P7IMhHZEVShU1Uz lFKiv8n0LkY20clrSKpBC/hla8HM2Hk= Date: Sat, 01 Aug 2026 23:40:38 +0200 Subject: [PATCH v2 8/9] dt-bindings: arm: apple: Add M4 based devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-8-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian The Apple devices with the t8132 SoC (M4) are very similar to their M3 predecessors. In addition to the MacBook Pro and the various MacBook Air and iMac variants, a Mac mini is offered again with the M4. Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple.yaml | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index fb277c96f341..5d87a4fef193 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -103,6 +103,15 @@ description: | - MacBook Pro (14-inch, M3, 2023) - iMac (24-inch, M3, 2023) =20 + Devices based on the "M4" SoC: + + - MacBook Pro (14-inch, M4, 2024) + - iMac (24-inch, 2x USB-C, M4, 2024) + - iMac (24-inch, 4x USB-C, M4, 2024) + - MacBook Air (13-inch, M4, 2025) + - MacBook Air (15-inch, M4, 2025) + - Mac mini (M4, 2024) + Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: =20 - MacBook Pro (14-inch, M1 Pro, 2021) @@ -323,6 +332,18 @@ properties: - const: apple,t8122 - const: apple,arm-platform =20 + - description: Apple M4 SoC based platforms + items: + - enum: + - apple,j604 # MacBook Pro (14-inch, M4, 2024) + - apple,j623 # iMac (24-inch, 2x USB-C, M4, 2024) + - apple,j624 # iMac (24-inch, 4x USB-C, M4, 2024) + - apple,j713 # MacBook Air (13-inch, M4, 2025) + - apple,j715 # MacBook Air (15-inch, M4, 2025) + - apple,j773g # Mac mini (M4, 2024) + - const: apple,t8132 + - const: apple,arm-platform + - description: Apple M1 Pro SoC based platforms items: - enum: --=20 2.55.0 From nobody Fri Oct 2 11:42:02 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF5F73D4101; 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arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="wxFCOGM9" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1785620500; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+JIVoAd8TlvethFbGvJeW2G5mLUk/pg/eF8uH0D/qhk=; b=wxFCOGM9zr/8s5U+eGTBk7t6OGyUT/ETnxmcEGwzpmLp2zRErTe8CluaI/EftUcZ377gUU jDl+I7JEBbXodRFFypGHnA8FMmAeh50dPlLtDhm9Qb79D2LijKwUk+NYU83pqA/RcR/0/E iDMBuydMsVRu95oU3zNRe6NCsttQn3w= Date: Sat, 01 Aug 2026 23:40:39 +0200 Subject: [PATCH v2 9/9] arm64: dts: apple: Add minimal t8132 (M4) device trees Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260801-apple-m4-initial-devicetrees-v2-9-5cb07cc275da@cyberchaos.dev> References: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> In-Reply-To: <20260801-apple-m4-initial-devicetrees-v2-0-5cb07cc275da@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Thomas Gleixner , Radu Rendec , Hector Martin , Linus Walleij , Mark Kettenis , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Yureka Lilian Added device trees for the following devices: - apple,j604 - MacBook Pro (14-inch, M4, 2024) - apple,j623 - iMac (24-inch, 2x USB-C, M4, 2024) - apple,j624 - iMac (24-inch, 4x USB-C, M4, 2024) - apple,j713 - MacBook Air (13-inch, M4, 2025) - apple,j715 - MacBook Air (15-inch, M4, 2025) - apple,j773g - Mac mini (M4, 2024) The device trees have a minimal set of devices limited to CPU cores, interrupt controller, power states, watchdog, serial, pin controller, i2c and framebuffer. The device trees for the notebooks add a PWM controller for the keyboard LED illumination. Using the macOS 26.6 iBoot/firmware, the Mac mini reliably boots on a single core using the stock kernel. Booting with smp requires avoiding the wfi and wfit instructions in the idle loop and `delay()` respectively, since those instructions cause a loss of architectural state on the secondary cores, and even then boot is unreliable. Signed-off-by: Yureka Lilian --- arch/arm64/boot/dts/apple/Makefile | 6 + arch/arm64/boot/dts/apple/t8132-j604.dts | 35 + arch/arm64/boot/dts/apple/t8132-j623.dts | 18 + arch/arm64/boot/dts/apple/t8132-j624.dts | 18 + arch/arm64/boot/dts/apple/t8132-j713.dts | 35 + arch/arm64/boot/dts/apple/t8132-j715.dts | 35 + arch/arm64/boot/dts/apple/t8132-j773g.dts | 25 + arch/arm64/boot/dts/apple/t8132-jxxx.dtsi | 48 ++ arch/arm64/boot/dts/apple/t8132-pmgr.dtsi | 1130 +++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8132.dtsi | 447 ++++++++++++ 10 files changed, 1797 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 9fea43f760ec..62999574a36b 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -103,3 +103,9 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j434.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j504.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j613.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j615.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j604.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j623.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j624.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j713.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j715.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j773g.dtb diff --git a/arch/arm64/boot/dts/apple/t8132-j604.dts b/arch/arm64/boot/dts= /apple/t8132-j604.dts new file mode 100644 index 000000000000..c4be915cb33a --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j604.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Pro (14-inch, M4, 2024) + * + * target-type: J604 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j604", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M4, 2024)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j623.dts b/arch/arm64/boot/dts= /apple/t8132-j623.dts new file mode 100644 index 000000000000..508e26056022 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j623.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 2x USB-C, M4, 2024) + * + * target-type: J623 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j623", "apple,t8132", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 2x USB-C, M4, 2024)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j624.dts b/arch/arm64/boot/dts= /apple/t8132-j624.dts new file mode 100644 index 000000000000..84bdd8e343eb --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j624.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 4x USB-C, M4, 2024) + * + * target-type: J624 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j624", "apple,t8132", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 4x USB-C, M4, 2024)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j713.dts b/arch/arm64/boot/dts= /apple/t8132-j713.dts new file mode 100644 index 000000000000..e1fc5d47f487 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j713.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (13-inch, M4, 2025) + * + * target-type: J713 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j713", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Air (13-inch, M4, 2025)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j715.dts b/arch/arm64/boot/dts= /apple/t8132-j715.dts new file mode 100644 index 000000000000..2672914ea76c --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j715.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (15-inch, M4, 2025) + * + * target-type: J715 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j715", "apple,t8132", "apple,arm-platform"; + model =3D "Apple MacBook Air (15-inch, M4, 2025)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-j773g.dts b/arch/arm64/boot/dt= s/apple/t8132-j773g.dts new file mode 100644 index 000000000000..0583cb9d19f6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-j773g.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple Mac mini (M4, 2024) + * + * target-type: J773g + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8132.dtsi" +#include "t8132-jxxx.dtsi" + +/ { + compatible =3D "apple,j773g", "apple,t8132", "apple,arm-platform"; + model =3D "Apple Mac mini (M4, 2024)"; +}; + +/* + * Keep the power-domains used for the HDMI port on. + */ +&framebuffer0 { + power-domains =3D <&ps_dispext0_fe>, <&ps_dptx_phy>; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8132-jxxx.dtsi new file mode 100644 index 000000000000..9882ea3f85e6 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-jxxx.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple M4 Mac mini, MacBook Air/Pro, iMac 24" (M4, 2024/2025) + * + * This file contains parts common to all Apple M4 devices using the t8132. + * + * target-type: J604, J623, J624, J713, J715, J773g + * + * Copyright The Asahi Linux Contributors + */ + +/ { + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + power-domains =3D <&ps_disp_fe>, <&ps_dptx_phy>; + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + /* To be filled by loader */ + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8132-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8132-pmgr.dtsi new file mode 100644 index 000000000000..6fbf09e8f981 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132-pmgr.dtsi @@ -0,0 +1,1130 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8132 "M4" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_msg: power-controller@108 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msg"; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + apple,always-on; /* Core device */ + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_pmc: power-controller@138 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmc"; + }; + + ps_pms_fpwm0: power-controller@140 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm0"; + }; + + ps_pms_fpwm1: power-controller@148 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm1"; + }; + + ps_pms_fpwm2: power-controller@150 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm2"; + }; + + ps_pms_fpwm3: power-controller@158 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm3"; + }; + + ps_pms_fpwm4: power-controller@160 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm4"; + }; + + ps_pms_c1ppt: power-controller@168 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_c1ppt"; + }; + + ps_soc_rc: power-controller@170 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_rc"; + }; + + ps_soc_dpe: power-controller@178 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_dpe"; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@180 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmgr_soc_ocla"; + }; + + ps_ap_tmm: power-controller@1b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ap_tmm"; + }; + + ps_dispext0_sys: power-controller@1d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_sys"; + }; + + ps_dispext0_fe: power-controller@1e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_fe"; + power-domains =3D <&ps_dispext0_sys>; + }; + + ps_dispext0_cpu: power-controller@1e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_cpu"; + power-domains =3D <&ps_dispext0_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_scodec: power-controller@228 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec"; + }; + + ps_scodec_streaming: power-controller@230 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec_streaming"; + power-domains =3D <&ps_scodec>; + }; + + ps_disp_sys: power-controller@240 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_sys"; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_disp_fe: power-controller@248 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_fe"; + power-domains =3D <&ps_disp_sys>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_gfx: power-controller@250 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + }; + + ps_sio_cpu: power-controller@268 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_cpu"; + }; + + ps_fpwm0: power-controller@270 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm0"; + }; + + ps_fpwm1: power-controller@278 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm1"; + }; + + ps_fpwm2: power-controller@280 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm2"; + }; + + ps_i2c0: power-controller@288 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + }; + + ps_i2c1: power-controller@290 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + }; + + ps_i2c2: power-controller@298 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + }; + + ps_i2c3: power-controller@2a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + }; + + ps_i2c4: power-controller@2a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c4"; + }; + + ps_i2c5: power-controller@2b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c5"; + }; + + ps_i2c6: power-controller@2b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c6"; + }; + + ps_i2c7: power-controller@2c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c7"; + }; + + ps_i2c8: power-controller@2c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c8"; + }; + + ps_spi_p: power-controller@2d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi_p"; + apple,always-on; + }; + + ps_uart_p: power-controller@2d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_p"; + apple,always-on; + }; + + ps_dpa_p: power-controller@2e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa_p"; + apple,always-on; + }; + + ps_aes: power-controller@2e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes"; + }; + + ps_spi0: power-controller@2f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_spi_p>; + }; + + ps_afiaft: power-controller@300 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "afiaft"; + }; + + ps_venc_sys: power-controller@308 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_sys"; + }; + + ps_spi1: power-controller@370 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_spi_p>; + }; + + ps_atc0_common: power-controller@378 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_common"; + }; + + ps_spi2: power-controller@380 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi3: power-controller@388 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi4: power-controller@390 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi4"; + power-domains =3D <&ps_spi_p>; + }; + + ps_trace_fab: power-controller@398 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "trace_fab"; + }; + + ps_atc0_pcie: power-controller@3a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_pcie"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio: power-controller@3a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio_pcie: power-controller@3b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_pcie"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_spi5: power-controller@3b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi5"; + power-domains =3D <&ps_spi_p>; + }; + + ps_qspi: power-controller@3c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "qspi"; + power-domains =3D <&ps_spi_p>; + }; + + ps_dptx_phy: power-controller@3c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dptx_phy"; + }; + + ps_uart_n: power-controller@3d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_n"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart0: power-controller@3d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart1: power-controller@3e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart2: power-controller@3e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart3: power-controller@3f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart4: power-controller@3f8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart5: power-controller@400 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart6: power-controller@408 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x408 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart6"; + power-domains =3D <&ps_uart_p>; + }; + + ps_dpa0: power-controller@410 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x410 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa0"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_dpa1: power-controller@418 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x418 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa1"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc0_cio_usb: power-controller@420 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x420 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_usb"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc1_common: power-controller@428 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x428 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_common"; + }; + + ps_atc1_pcie: power-controller@430 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x430 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_pcie"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio: power-controller@438 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x438 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio_pcie: power-controller@440 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x440 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_pcie"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc1_cio_usb: power-controller@448 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x448 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_usb"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc2_common: power-controller@450 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x450 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_common"; + }; + + ps_atc2_pcie: power-controller@458 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x458 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_pcie"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc2_cio: power-controller@460 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x460 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc2_cio_pcie: power-controller@468 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x468 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_pcie"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_dpa2: power-controller@470 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x470 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa2"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc2_cio_usb: power-controller@478 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x478 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_usb"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_atc3_common: power-controller@480 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x480 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_common"; + }; + + ps_pmp: power-controller@488 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x488 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@490 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x490 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_sram"; + apple,always-on; + }; + + ps_atc3_pcie: power-controller@498 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x498 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_pcie"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_atc3_cio: power-controller@4a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_dpa3: power-controller@4a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa3"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_atc3_cio_pcie: power-controller@4b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_pcie"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_atc3_cio_usb: power-controller@4b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_usb"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_dpa4: power-controller@4c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa4"; + power-domains =3D <&ps_dpa_p>; + }; + + ps_apcie_gp: power-controller@4d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_gp"; + }; + + ps_apcie_sys_gp: power-controller@4d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_gp"; + power-domains =3D <&ps_apcie_gp>; + }; + + ps_dispext1_sys: power-controller@4e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_sys"; + }; + + ps_dispext1_fe: power-controller@4e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_fe"; + power-domains =3D <&ps_dispext1_sys>; + }; + + ps_dispext1_cpu: power-controller@4f0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_cpu"; + power-domains =3D <&ps_dispext1_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_ans: power-controller@538 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x538 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + apple,always-on; /* Device reboots after 3-5 mintues if disabled */ + }; + + ps_apcie_st: power-controller@540 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x540 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_st"; + power-domains =3D <&ps_ans>; + }; + + ps_apcie_sys_st: power-controller@548 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x548 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_st"; + power-domains =3D <&ps_ans>, <&ps_apcie_st>; + }; + + ps_apcie_phy_sw: power-controller@550 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x550 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_phy_sw"; + power-domains =3D <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>; + }; + + ps_msr: power-controller@560 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x560 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + }; + + ps_msr_ase_core: power-controller@568 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x568 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr_ase_core"; + power-domains =3D <&ps_msr>; + }; + + ps_ane_sys: power-controller@570 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x570 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_sys"; + }; + + ps_jpg: power-controller@578 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x578 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + }; + + ps_avd_sys: power-controller@580 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x580 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "avd_sys"; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; + }; + + ps_venc_dma: power-controller@8000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_dma"; + power-domains =3D <&ps_venc_sys>; + }; + + ps_venc_pipe4: power-controller@8008 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe4"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_pipe5: power-controller@8010 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe5"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me0: power-controller@8018 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me0"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me1: power-controller@8020 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me1"; + power-domains =3D <&ps_venc_me0>; + }; + + ps_ane_mpm: power-controller@c000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_mpm"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_cpu: power-controller@c008 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_cpu"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_td: power-controller@c010 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_td"; + power-domains =3D <&ps_ane_sys>; + }; + + ps_ane_base: power-controller@c018 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_base"; + power-domains =3D <&ps_ane_td>; + }; + + ps_disp_cpu: power-controller@10000 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x10000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_cpu"; + power-domains =3D <&ps_disp_fe>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_gated"; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi0"; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi1"; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@68 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a0"; + apple,always-on; + }; + + ps_nub_spmi_a1: power-controller@70 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a1"; + apple,always-on; + }; + + ps_nub_spi0: power-controller@80 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spi0"; + apple,always-on; + }; + + ps_nub_ocla: power-controller@88 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_ocla"; + apple,always-on; + }; + + ps_nub_gpio: power-controller@90 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_gpio"; + apple,always-on; + }; + + ps_nub_sram: power-controller@a0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_sram"; + apple,always-on; + }; + + ps_debug_switch: power-controller@a8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_switch"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@b0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb_aon"; + }; + + ps_atc1_usb_aon: power-controller@b8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb_aon"; + }; + + ps_atc0_usb: power-controller@c0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb"; + power-domains =3D <&ps_atc0_common>, <&ps_atc0_usb_aon>; + }; + + ps_atc1_usb: power-controller@c8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb"; + power-domains =3D <&ps_atc1_common>, <&ps_atc1_usb_aon>; + }; + + ps_atc2_usb_aon: power-controller@d0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb_aon"; + }; + + ps_atc3_usb_aon: power-controller@d8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb_aon"; + }; + + ps_atc2_usb: power-controller@e0 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb"; + power-domains =3D <&ps_atc2_common>, <&ps_atc2_usb_aon>; + }; + + ps_atc3_usb: power-controller@e8 { + compatible =3D "apple,t8132-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb"; + power-domains =3D <&ps_atc3_common>, <&ps_atc3_usb_aon>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8132.dtsi b/arch/arm64/boot/dts/app= le/t8132.dtsi new file mode 100644 index 000000000000..6df6ccdda90e --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8132.dtsi @@ -0,0 +1,447 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8132 "M4" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include + +/ { + compatible =3D "apple,t8132", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + core1 { + cpu =3D <&cpu_e1>; + }; + core2 { + cpu =3D <&cpu_e2>; + }; + core3 { + cpu =3D <&cpu_e3>; + }; + core4 { + cpu =3D <&cpu_e4>; + }; + core5 { + cpu =3D <&cpu_e5>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + core1 { + cpu =3D <&cpu_p1>; + }; + core2 { + cpu =3D <&cpu_p2>; + }; + core3 { + cpu =3D <&cpu_p3>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e1: cpu@1 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e2: cpu@2 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e3: cpu@3 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e4: cpu@4 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x4>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e5: cpu@5 { + compatible =3D "apple,donan-e"; + device_type =3D "cpu"; + reg =3D <0x0 0x5>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_p0: cpu@10100 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + }; + + cpu_p1: cpu@10101 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + }; + + cpu_p2: cpu@10102 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + }; + + cpu_p3: cpu@10103 { + compatible =3D "apple,donan-p"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; + next-level-cache =3D <&l2_cache_1>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + + pmgr: power-management@380700000 { + compatible =3D "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x80700000 0 0x14000>; + /* child nodes are added in t8132-pmgr.dtsi */ + }; + + aic: interrupt-controller@381000000 { + compatible =3D "apple,t8132-aic3", "apple,t8122-aic3"; + #interrupt-cells =3D <3>; + interrupt-controller; + reg =3D <0x3 0x81000000 0x0 0x1cc000>, + <0x3 0x81040000 0x0 0x4000>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + + affinities { + e-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3 &cpu_e4 &cpu_e5>; + }; + + p-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>; + }; + }; + }; + + pmgr_mini: power-management@388280000 { + compatible =3D "apple,t8132-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x3 0x88280000 0 0x4000>; + /* child nodes are added in t8132-pmgr.dtsi */ + }; + + wdt: watchdog@3882b0000 { + compatible =3D "apple,t8132-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x882b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_nub: pinctrl@3881f0000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x881f0000 0x0 0x4000>; + power-domains =3D <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_nub 0 0 32>; + apple,npins =3D <32>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_smc: pinctrl@38c820000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x8c820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 18>; + apple,npins =3D <18>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@390824000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x90824000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 57>; + apple,npins =3D <57>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_ap: pinctrl@39a000000 { + compatible =3D "apple,t8132-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x9a000000 0x0 0x100000>; + power-domains =3D <&ps_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 224>; + apple,npins =3D <224>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + i2c0_pins: i2c0-pins { + pinmux =3D , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + }; + + i2c0: i2c@3ad010000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad010000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c0>; + + status =3D "disabled"; + }; + + i2c1: i2c@3ad014000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad014000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c1>; + + status =3D "disabled"; + }; + + i2c2: i2c@3ad018000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad018000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c2>; + + status =3D "disabled"; + }; + + i2c3: i2c@3ad01c000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad01c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c3>; + + status =3D "disabled"; + }; + + i2c4: i2c@3ad020000 { + compatible =3D "apple,t8132-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0xad020000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c4>; + + status =3D "disabled"; + }; + + fpwm1: pwm@3ad044000 { + compatible =3D "apple,t8132-fpwm", "apple,s5l-fpwm"; + reg =3D <0x3 0xad044000 0x0 0x4000>; + power-domains =3D <&ps_fpwm1>; + clocks =3D <&clkref>; + #pwm-cells =3D <2>; + + status =3D "disabled"; + }; + + serial0: serial@3ad200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0xad200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + + status =3D "disabled"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; +}; + +#include "t8132-pmgr.dtsi" --=20 2.55.0