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charset="utf-8" Add SoC-level LPASS WSA macro, VA macro, SoundWire controller and LPASS LPI pin controller nodes. DMIC and WSA SoundWire pinctrl states are defined inside the LPASS LPI pin controller node. The hardware is similar to the SM8750 platform. The SoundWire controller is kept disabled so board DTS files can selectively enable and configure it. Signed-off-by: Ravi Hothi Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/eliza.dtsi | 189 ++++++++++++++++++++++++++++ 1 file changed, 189 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom= /eliza.dtsi index 1830020f23b1..3957dae4524e 100644 --- a/arch/arm64/boot/dts/qcom/eliza.dtsi +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi @@ -19,6 +19,7 @@ #include #include #include +#include =20 / { interrupt-parent =3D <&intc>; @@ -2064,6 +2065,77 @@ q6prmcc: clock-controller { }; }; =20 + lpass_wsamacro: codec@6b00000 { + compatible =3D "qcom,eliza-lpass-wsa-macro", + "qcom,sm8550-lpass-wsa-macro"; + reg =3D <0x0 0x06b00000 0x0 0x1000>; + + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + }; + + swr0: soundwire@6b10000 { + compatible =3D "qcom,soundwire-v2.1.0", + "qcom,soundwire-v2.0.0"; + reg =3D <0x0 0x06b10000 0x0 0x10000>; + interrupts =3D ; + + clocks =3D <&lpass_wsamacro>; + clock-names =3D "iface"; + + label =3D "WSA"; + + qcom,din-ports =3D <4>; + qcom,dout-ports =3D <9>; + + qcom,ports-sinterval =3D + /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f + 0x18f 0x18f 0x18f 0x0f 0x0f 0xff 0x31f>; + qcom,ports-offset1 =3D + /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 + 0x00 0x00 0x00 0x06 0x0d 0xff 0x00>; + qcom,ports-offset2 =3D + /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f + 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstart =3D + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f>; + qcom,ports-hstop =3D + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0e 0x0e 0xff 0xff 0xff 0x0f>; + qcom,ports-word-length =3D + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0x08 0x0f 0x0f 0x00 0xff 0xff 0x18>; + qcom,ports-block-pack-mode =3D + /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 + 0x00 0x01 0x01 0x01 0x01 0x00 0x00>; + qcom,ports-block-group-count =3D + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0x00 0x00 0xff 0xff 0xff 0xff>; + qcom,ports-lane-control =3D + /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0x00 0x00 0xff 0xff 0xff 0xff>; + + #address-cells =3D <2>; + #size-cells =3D <0>; + #sound-dai-cells =3D <1>; + + status =3D "disabled"; + }; + lpass_lpiaon_noc: interconnect@7400000 { compatible =3D "qcom,eliza-lpass-lpiaon-noc"; reg =3D <0x0 0x07400000 0x0 0x19080>; @@ -2078,6 +2150,123 @@ lpass_lpicx_noc: interconnect@7420000 { #interconnect-cells =3D <2>; }; =20 + lpass_vamacro: codec@7660000 { + compatible =3D "qcom,eliza-lpass-va-macro", + "qcom,sm8550-lpass-va-macro"; + reg =3D <0x0 0x07660000 0x0 0x2000>; + + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "mclk", + "macro", + "dcodec"; + + #clock-cells =3D <0>; + clock-output-names =3D "fsgen"; + #sound-dai-cells =3D <1>; + }; + + lpass_tlmm: pinctrl@7760000 { + compatible =3D "qcom,eliza-lpass-lpi-pinctrl"; + reg =3D <0x0 0x07760000 0x0 0x20000>; + + clocks =3D <&q6prmcc LPASS_HW_MACRO_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE + LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "core", "audio"; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 23>; + + dmic01_default: dmic01-default-state { + clk-pins { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio7"; + function =3D "dmic1_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic23_default: dmic23-default-state { + clk-pins { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio9"; + function =3D "dmic2_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic45_default: dmic45-default-state { + clk-pins { + pins =3D "gpio12"; + function =3D "dmic3_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio13"; + function =3D "dmic3_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic67_default: dmic67-default-state { + clk-pins { + pins =3D "gpio21"; + function =3D "dmic4_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio22"; + function =3D "dmic4_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + wsa_swr_active: wsa-swr-active-state { + clk-pins { + pins =3D "gpio10"; + function =3D "wsa_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio11"; + function =3D "wsa_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + }; + sdhc_2: mmc@8804000 { compatible =3D "qcom,eliza-sdhci", "qcom,sdhci-msm-v5"; reg =3D <0x0 0x08804000 0x0 0x1000>; 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Fri, 31 Jul 2026 01:40:53 -0700 (PDT) Received: from hu-raviravi-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84edc2d4473sm147552b3a.40.2026.07.31.01.40.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 01:40:53 -0700 (PDT) From: Ravi Hothi To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mohammad.rafi.shaik@oss.qualcomm.com, ajay.nandam@oss.qualcomm.com, Konrad Dybcio Subject: [PATCH v4 2/2] arm64: dts: qcom: eliza-cqs-evk: Enable sound card support with WSA8845 and DMIC Date: Fri, 31 Jul 2026 14:10:32 +0530 Message-Id: <20260731084032.3106477-3-ravi.hothi@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260731084032.3106477-1-ravi.hothi@oss.qualcomm.com> References: <20260731084032.3106477-1-ravi.hothi@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: GeVnyvUFUpHYb5q3VJ6iVgOodTnXxmvz X-Authority-Analysis: v=2.4 cv=Y9fIdBeN c=1 sm=1 tr=0 ts=6a6c60db cx=c_pps a=4ztaESFFfuz8Af0l9swBwA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=RpnahtGIwcQnnQdoyywA:9 a=TPnrazJqx2CeVZ-ItzZ-:22 X-Proofpoint-GUID: GeVnyvUFUpHYb5q3VJ6iVgOodTnXxmvz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX03SYHMHHICim lMRgHknVTr4sSXYk2828YlfMjhGi+tIOunSfbJpODskRBg4/RmN3Yyo6rOYwR2qDkSVsyPOITF/ TIbtqryBR9bNAF3O0QFAJa8H2Yl3IkHr1gMQHYqJApC9Bw1VQe9ektHjHI3VPlWHZTuBx5Xh99d 4aLwFhr2Rzw4io4FtcbORQpie0Lvex4gN7HEu3HxpeaiEKPP1OkLruvZrpd8lEzMtzJXz1xNVBe X6dgg7JImZ2gVgKWv1U3KbDkhsqBLnneZbOgw+0e4nrMkj7CD1vrKoslkObu696BaKzdI/BCYTn p1fjTYgAC6XQIfuUEdKi1HuJWcADPMDtMCU9KAM0uhTebuIps3cE+M0hC3Mp3xXUsv2TxsmieBo gxxT3zDmekKfxlbsS7afMFb79jS+7HMRFlA+WzAYl31PzUDzpQ5XXXq4RoKK0ea2qfecTecPAHM AiBD6fZKlAzoJQHVT3g== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX5FO+zmGJA7qT 36n0YCptWBfEhhndp5DIhbLOnFJGnl0h3X1nABuyCg6f4nHBtodEDDimoWS1fYKm/SdiJXq7C8a 8y0UjyRKe6kZSppigyVt48qnyp/znNU= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_03,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 spamscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310063 Content-Type: text/plain; charset="utf-8" Enable the sound card on the Eliza CQS EVK platform, including the WSA8845 external speaker path and DMIC microphone capture via VA macro. Enable the required LPASS WSA macro, VA macro and SoundWire controller along with the necessary pinctrl configurations for DMIC and WSA SoundWire interfaces. Signed-off-by: Ravi Hothi Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/eliza-cqs-evk.dts | 141 +++++++++++++++++++++ 1 file changed, 141 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/eliza-cqs-evk.dts b/arch/arm64/boot/d= ts/qcom/eliza-cqs-evk.dts index 43d428a4ed2d..5e4175291f05 100644 --- a/arch/arm64/boot/dts/qcom/eliza-cqs-evk.dts +++ b/arch/arm64/boot/dts/qcom/eliza-cqs-evk.dts @@ -5,10 +5,151 @@ =20 /dts-v1/; =20 +#include + #include "eliza-cqs-som.dtsi" #include "eliza-evk.dtsi" =20 / { model =3D "Qualcomm Technologies, Inc. Eliza CQS EVK"; compatible =3D "qcom,eliza-cqs-evk", "qcom,eliza-cqs-som", "qcom,eliza"; + + sound { + compatible =3D "qcom,eliza-sndcard", "qcom,sm8450-sndcard"; + model =3D "eliza-cqs-evk"; + + audio-routing =3D "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb", + "VA DMIC2", "vdd-micb", + "VA DMIC3", "vdd-micb", + "VA DMIC4", "vdd-micb", + "VA DMIC5", "vdd-micb", + "VA DMIC6", "vdd-micb", + "VA DMIC7", "vdd-micb"; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_spkr>, <&right_spkr>, + <&swr0 0>, <&lpass_wsamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + dmic_eldo: regulator-dmic-eldo { + compatible =3D "regulator-fixed"; + regulator-name =3D "dmic-eldo"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + gpio =3D <&pm7550_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&vreg_bob>; + }; +}; + +&lpass_vamacro { + pinctrl-0 =3D <&dmic01_default>, <&dmic23_default>, + <&dmic45_default>, <&dmic67_default>; + pinctrl-names =3D "default"; + + vdd-micb-supply =3D <&dmic_eldo>; + qcom,dmic-sample-rate =3D <4800000>; +}; + +&swr0 { + pinctrl-0 =3D <&wsa_swr_active>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + /* WSA8845, Speaker Left */ + left_spkr: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + pinctrl-0 =3D <&spkr_1_sd_n_active>; + pinctrl-names =3D "default"; + powerdown-gpios =3D <&tlmm 59 GPIO_ACTIVE_LOW>; + vdd-1p8-supply =3D <&vreg_l7b>; + vdd-io-supply =3D <&vreg_l7b>; + + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + + /* + * WSA8845 Port 1 (DAC) <=3D> SWR0 Port 1 (SPKR_L) + * WSA8845 Port 2 (COMP) <=3D> SWR0 Port 2 (SPKR_L_COMP) + * WSA8845 Port 3 (BOOST) <=3D> SWR0 Port 3 (SPKR_L_BOOST) + * WSA8845 Port 4 (PBR) <=3D> SWR0 Port 7 (PBR) + * WSA8845 Port 5 (VISENSE) <=3D> SWR0 Port 10 (SPKR_L_VI) + * WSA8845 Port 6 (CPS) <=3D> SWR0 Port 13 (CPS) + */ + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Speaker Right */ + right_spkr: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + pinctrl-0 =3D <&spkr_2_sd_n_active>; + pinctrl-names =3D "default"; + powerdown-gpios =3D <&tlmm 79 GPIO_ACTIVE_LOW>; + vdd-1p8-supply =3D <&vreg_l7b>; + vdd-io-supply =3D <&vreg_l7b>; + + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + + /* + * WSA8845 Port 1 (DAC) <=3D> SWR0 Port 4 (SPKR_R) + * WSA8845 Port 2 (COMP) <=3D> SWR0 Port 5 (SPKR_R_COMP) + * WSA8845 Port 3 (BOOST) <=3D> SWR0 Port 6 (SPKR_R_BOOST) + * WSA8845 Port 4 (PBR) <=3D> SWR0 Port 7 (PBR) + * WSA8845 Port 5 (VISENSE) <=3D> SWR0 Port 11 (SPKR_R_VI) + * WSA8845 Port 6 (CPS) <=3D> SWR0 Port 13 (CPS) + */ + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + spkr_1_sd_n_active: spkr-1-sd-n-active-state { + pins =3D "gpio59"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + spkr_2_sd_n_active: spkr-2-sd-n-active-state { + pins =3D "gpio79"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; }; --=20 2.34.1