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Fri, 31 Jul 2026 11:22:32 -0700 (PDT) X-Received: by 2002:a17:90b:50c4:b0:381:bc4c:da74 with SMTP id 98e67ed59e1d1-38fbc5131a7mr787835a91.32.1785522152201; Fri, 31 Jul 2026 11:22:32 -0700 (PDT) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3153e04456dsm7203089eec.14.2026.07.31.11.22.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 11:22:31 -0700 (PDT) From: Vikash Garodia Date: Fri, 31 Jul 2026 23:52:16 +0530 Subject: [PATCH v2 01/12] dt-bindings: media: qcom,venus: Add context bank subnodes to common schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-vpu_iommu_iova_handling-v2-1-da52b5228dbd@oss.qualcomm.com> References: <20260731-vpu_iommu_iova_handling-v2-0-da52b5228dbd@oss.qualcomm.com> In-Reply-To: <20260731-vpu_iommu_iova_handling-v2-0-da52b5228dbd@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Stanimir Varbanov , Neil Armstrong , Dmitry Baryshkov , Bryan O'Donoghue , Stephan Gerhold Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Vikash Garodia , stable@vger.kernel.org, Daniel J Blueman X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer inside the low 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe each stream as its own context bank subnode instead, so that each can be associated with the IOVA range its stream can actually reach. This limitation applies to every VPU generation, so add the subnodes to the common schema rather than to each SoC schema individually. "video-firmware" moves here from qcom,sc7180-venus.yaml for the same reason; it is the same kind of node and was already duplicated per-SoC. Adding the subnodes requires two supporting properties on the parent video-codec node: - '#address-cells' and '#size-cells', both fixed at 2. These do not describe registers on the codec node. They set the cell widths used when a reserved-memory node names one of these subnodes in an "iommu-addresses" entry: of_translate_dma_region() reads the address/size cell counts from the parent of the phandle target, not from the reserved-memory node. Pinning both to 2 lets a subnode be referenced with a full 64-bit IOVA base and length, and keeps the encoding identical across SoCs, whose buses vary between 1 and 2 cells. - "dma-ranges", empty "dma-ranges" states the intended translation: the subnode DMA address space maps 1:1 into the parent's, so an IOVA reservation written against a subnode needs no offset applied. of_translate_one() treats an empty "dma-ranges" as exactly that identity mapping. The parent's "iommus" is kept as an alternative via "oneOf", so platforms that have not been converted to subnodes still validate. New platforms should use the subnode form. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- .../bindings/media/qcom,sc7180-venus.yaml | 15 ------- .../bindings/media/qcom,venus-common.yaml | 51 ++++++++++++++++++= ++++ 2 files changed, 51 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml= b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml index b21bed314848480b82153e49602f0b19e08e7335..bfd8b1ad473128c974bce84639c= b0aff59d8c2cc 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -91,21 +91,6 @@ properties: deprecated: true additionalProperties: false =20 - video-firmware: - type: object - additionalProperties: false - - description: | - Firmware subnode is needed when the platform does not - have TrustZone. - - properties: - iommus: - maxItems: 1 - - required: - - iommus - required: - compatible - power-domain-names diff --git a/Documentation/devicetree/bindings/media/qcom,venus-common.yaml= b/Documentation/devicetree/bindings/media/qcom,venus-common.yaml index 59a3fde846d2196ab1e4588eb396012ba6860712..ccae41bed757bf3d9518cd4afe4= 565f043b45166 100644 --- a/Documentation/devicetree/bindings/media/qcom,venus-common.yaml +++ b/Documentation/devicetree/bindings/media/qcom,venus-common.yaml @@ -47,6 +47,50 @@ properties: minItems: 1 maxItems: 4 =20 + dma-ranges: true + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + non-pixel: + type: object + description: + Context bank for VPU non-pixel buffers, including compressed and int= ernal buffers. + properties: + iommus: + maxItems: 1 + memory-region: + maxItems: 1 + required: + - iommus + - memory-region + additionalProperties: false + + pixel: + type: object + description: + Context bank for VPU pixel buffers containing uncompressed video dat= a. + properties: + iommus: + maxItems: 1 + required: + - iommus + additionalProperties: false + + video-firmware: + type: object + description: + Context bank for the VPU firmware processing domain. + properties: + iommus: + maxItems: 1 + required: + - iommus + additionalProperties: false + required: - reg - clocks @@ -55,4 +99,11 @@ required: - memory-region - power-domains =20 +oneOf: + - required: + - iommus + - required: + - non-pixel + - pixel + additionalProperties: true --=20 2.34.1 From nobody Fri Oct 2 11:44:01 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49D3542640C for ; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Reference qcom,venus-common.yaml, which describes the per-stream context bank subnodes, and drop "iommus" from the required list. The common schema accepts either the flat "iommus" or the "non-pixel" and "pixel" subnode pair, so device trees that have not been converted still validate. Update the example to the subnode form, which also picks up the two supporting properties the subnodes need on the parent video-codec node, '#address-cells' and '#size-cells' of 2 and an empty "dma-ranges". Both are described in the common schema change. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- .../devicetree/bindings/media/qcom,sm8550-iris.yaml | 18 ++++++++++++++= +--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml = b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml index 0400ca1bff05dcef6b742c3fbf77e38adca9f280..3d8ff5677bd4fb7f3619a95b1c5= f6f9eaf39b32c 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml @@ -98,10 +98,10 @@ required: - interconnect-names - resets - reset-names - - iommus - dma-coherent =20 allOf: + - $ref: qcom,venus-common.yaml# - if: properties: compatible: @@ -177,12 +177,24 @@ examples: resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x1940 0x0000>, - <&apps_smmu 0x1947 0x0000>; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range. Keeping each stream inside its own range needs a separate IOMMU domain per stream, which in turn needs a separate struct device per stream, since the IOMMU core attaches a domain per device. Which streams exist, and therefore which context bank devices have to be created, differs between VPU generations. Add init_cb_devs() and deinit_cb_devs() to struct vpu_ops so platform data can supply the right setup, and call them from probe and remove. Both hooks are optional, so platforms that do not implement them keep the existing behaviour of performing DMA through the parent device. Set the context banks up before v4l2_device_register() so the DMA plumbing is in place before any video device is visible to userspace, and tear them down on the probe error path and in iris_remove(). No functional change yet, as no platform implements the hooks. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia Reviewed-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_probe.c | 25 ++++++++++++++++++= +++- drivers/media/platform/qcom/iris/iris_vpu_common.h | 2 ++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index c2dcb50a27824d45d5fbc8b9e22591decbe2a23b..2594f5a67378af9a547f23dec2d= 2c057506dda65 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -15,6 +15,7 @@ #include "iris_core.h" #include "iris_ctrls.h" #include "iris_vidc.h" +#include "iris_vpu_common.h" =20 static int iris_init_icc(struct iris_core *core) { @@ -150,6 +151,20 @@ static int iris_init_resources(struct iris_core *core) return iris_init_resets(core); } =20 +static int iris_init_cb_devs(struct iris_core *core) +{ + if (core->iris_platform_data->vpu_ops->init_cb_devs) + return core->iris_platform_data->vpu_ops->init_cb_devs(core); + + return 0; +} + +static void iris_deinit_cb_devs(struct iris_core *core) +{ + if (core->iris_platform_data->vpu_ops->deinit_cb_devs) + core->iris_platform_data->vpu_ops->deinit_cb_devs(core); +} + static int iris_register_video_device(struct iris_core *core, enum domain_= type type) { struct video_device *vdev; @@ -207,6 +222,8 @@ static void iris_remove(struct platform_device *pdev) =20 v4l2_device_unregister(&core->v4l2_dev); =20 + iris_deinit_cb_devs(core); + mutex_destroy(&core->lock); } =20 @@ -273,10 +290,14 @@ static int iris_probe(struct platform_device *pdev) =20 iris_session_init_caps(core); =20 - ret =3D v4l2_device_register(dev, &core->v4l2_dev); + ret =3D iris_init_cb_devs(core); if (ret) return ret; =20 + ret =3D v4l2_device_register(dev, &core->v4l2_dev); + if (ret) + goto err_cb_deinit; + ret =3D iris_register_video_device(core, DECODER); if (ret) goto err_v4l2_unreg; @@ -310,6 +331,8 @@ static int iris_probe(struct platform_device *pdev) video_unregister_device(core->vdev_dec); err_v4l2_unreg: v4l2_device_unregister(&core->v4l2_dev); +err_cb_deinit: + iris_deinit_cb_devs(core); =20 return ret; } diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index 09799a375c1426d808ab5ea4fdfcac3a203e15b3..a8df9af0d3da407b59d2d2c5f2b= 8a08c75e93192 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -22,6 +22,8 @@ struct vpu_ops { void (*program_bootup_registers)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); int (*set_hwmode)(struct iris_core *core); + int (*init_cb_devs)(struct iris_core *core); + void (*deinit_cb_devs)(struct iris_core *core); }; =20 int iris_vpu_boot_firmware(struct iris_core *core); --=20 2.34.1 From nobody Fri Oct 2 11:44:01 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BC1F43D4EC for ; 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a=ed25519-sha256; t=1785522138; l=3855; i=vikash.garodia@oss.qualcomm.com; s=20241104; h=from:subject:message-id; bh=bpZUDSDe1YBY8ECN8OTOUWJTi/KZ4B5ccQkOA6CUnRA=; b=I5Lfpjtuqvt9qfOSlAXNtjo2zhc4Rg7VJ8/SxcaEkF8e1vS1pz/2idzbikFx+IyD7KXD2f3vs j0YmAO/1z5eCAxn402aAwwLkvKPrssanD1bahkLPn/PuVcuIbGpNL8d X-Developer-Key: i=vikash.garodia@oss.qualcomm.com; a=ed25519; pk=LY9Eqp4KiHWxzGNKGHbwRFEJOfRCSzG/rxQNmvZvaKE= X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDE0MSBTYWx0ZWRfX80Wac66tu9Rv MkLsnybHZgfBFF5DBYVRrgHwr1c/VLhHfjUqUhpViXL9UMbRRMAouD+GQ8vm/Ie8cQ9nctngKTZ X9ffT99rTXvlPV37wduyFZuRNAmfaWk= X-Authority-Analysis: v=2.4 cv=GpByPE1C c=1 sm=1 tr=0 ts=6a6ce7fe cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=t9ty7G3lAAAA:8 a=vkKLUbRMwET9CpguikUA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 a=CsAS6f0m0zARWR-uHzm3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDE0MSBTYWx0ZWRfXzE+XnuckAapf 36FHwvz2I5PIQpCC05p3AQqoEWB288xqP4g9OpY9WhcjU8PeuKgY6UUt0DK6gii013bcq1wJCDq k+/bTzru+NB2l0kRUpjYxqMPXZjkNlLBB/S9DnC8OYolX3LAU2MnYw6i1//o3g3jWv95h7iuefV D3y1suDpIlXLNG9l+VljAeoYDDOeUHgJbrFCBwlGWXEk2pkZUYFo3Z+SjOindQaC5sW8wdjL1OG jI6QUDj1jZrxG/qSnM1aQDv0N7BID0HtdPKHmm7wtO6IFkX9UkhN2fUzpLL/jJ1YEoMKQVpPmjj jt/K1OeAAXSmEKynNIa34uLYXbrbvOTMBApFmh5j3WFirAc4NY4UHHLA7Wz4EzyB7G+UVvnJ2D1 22SD27K16SW4Ftgked+dPdNTSVH3BxltzMLpMoO9ap3kSUKZYe8GVNZHGjFAi3hWJLUrkjbLY+y cGY/Z3U/aT0SL6eNT1g== X-Proofpoint-ORIG-GUID: wufeFluLBX2cJxtRRPN30t1HYniffa2x X-Proofpoint-GUID: wufeFluLBX2cJxtRRPN30t1HYniffa2x X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_05,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 adultscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310141 The VPU issues DMA through several SMMU streams, and the hardware does not give every stream the same addressable range. The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range. A stream can only be confined to its range if it has an IOMMU domain of its own, and the IOMMU core attaches a domain per struct device, so each stream needs its own device. Add iris_create_cb_dev(), which looks up a named child of the iris node and registers it as a platform device parented to the iris core. The child's fwnode is handed to platform_device_register_full() so the OF core applies that subnode's "iommus" property and the new device gets its own IOMMU domain. The DMA mask comes from platform data, and the segment size and boundary are capped at 32 bits to match the addressing the VPU performs. Return NULL when the named child is absent, so callers can treat a device tree without context bank subnodes as a supported configuration rather than an error. Backports are intended since the first DTS of 8550 binding schema. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_resources.c | 28 +++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_resources.h | 1 + 2 files changed, 29 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 872bd09656b151eb9ed5eda2f9774d3095d3aeeb..9e02a92baae75803c2c12a2ca99= 4006987c69596 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include #include #include @@ -137,3 +138,30 @@ int iris_disable_unprepare_clock(struct iris_core *cor= e, enum platform_clk_type =20 return 0; } + +struct device *iris_create_cb_dev(struct iris_core *core, const char *name) +{ + struct platform_device_info plat_dev_info =3D {}; + struct device_node *child_of_node; + struct platform_device *pdev; + + child_of_node =3D of_get_child_by_name(core->dev->of_node, name); + if (!child_of_node) + return NULL; + + plat_dev_info.dma_mask =3D core->iris_platform_data->dma_mask; + plat_dev_info.fwnode =3D &child_of_node->fwnode; + plat_dev_info.name =3D child_of_node->name; + plat_dev_info.id =3D PLATFORM_DEVID_AUTO; + plat_dev_info.parent =3D core->dev; + + pdev =3D platform_device_register_full(&plat_dev_info); + of_node_put(child_of_node); + if (IS_ERR(pdev)) + return ERR_CAST(pdev); + + dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); + dma_set_seg_boundary(&pdev->dev, DMA_BIT_MASK(32)); + + return &pdev->dev; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index 6bfbd2dc6db095ec05e53c894e048285f82446c6..ca53c01f60aef2040002f526b8f= 1b6a9094d1518 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -15,5 +15,6 @@ int iris_unset_icc_bw(struct iris_core *core); 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range. With a context bank device per stream, every allocation has to be made against the device whose IOMMU domain can address it: allocating a non-pixel buffer against the pixel device, or against the parent, places it in a domain that carries no restriction and the VPU faults when it later accesses that address. Add iris_get_cb_dev(), which maps a buffer type to the owning context bank device. Bitstream and internal buffers (BIN, ARP, COMV, LINE, NON_COMV, PERSIST) belong to the non-pixel device, and uncompressed buffers (DPB, PARTIAL, SCRATCH_1, SCRATCH_2, VPSS) to the pixel device. BUF_INPUT and BUF_OUTPUT depend on direction and are resolved from inst->domain: for a decoder the input is non-pixel and the output pixel, and the other way round for an encoder. Use it for internal buffer alloc and free, for the vb2 queue devices, and for the HFI queue and SFR allocations, which are non-pixel. Fall back to core->dev whenever the relevant context bank device is absent, so platforms still describing "iommus" on the parent iris node behave exactly as before and can be converted one at a time. Backports are intended since the first DTS of 8550 binding schema. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia Reviewed-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_buffer.c | 8 ++--- drivers/media/platform/qcom/iris/iris_core.h | 4 +++ drivers/media/platform/qcom/iris/iris_hfi_queue.c | 16 +++++---- drivers/media/platform/qcom/iris/iris_resources.c | 41 +++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_resources.h | 1 + drivers/media/platform/qcom/iris/iris_vidc.c | 4 +-- 6 files changed, 61 insertions(+), 13 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media= /platform/qcom/iris/iris_buffer.c index 246ad0abbac3510113e1f760406c81b1461377a3..249c9f1d0d5dadb391f269e9aee= 5181fe408cd3b 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -529,7 +529,7 @@ static int iris_create_internal_buffer(struct iris_inst= *inst, enum iris_buffer_type buffer_type, u32 index) { struct iris_buffers *buffers =3D &inst->buffers[buffer_type]; - struct iris_core *core =3D inst->core; + struct device *dev =3D iris_get_cb_dev(inst, buffer_type); struct iris_buffer *buffer; =20 if (!buffers->size) @@ -545,7 +545,7 @@ static int iris_create_internal_buffer(struct iris_inst= *inst, buffer->buffer_size =3D buffers->size; buffer->dma_attrs =3D DMA_ATTR_WRITE_COMBINE | DMA_ATTR_NO_KERNEL_MAPPING; =20 - buffer->kvaddr =3D dma_alloc_attrs(core->dev, buffer->buffer_size, + buffer->kvaddr =3D dma_alloc_attrs(dev, buffer->buffer_size, &buffer->device_addr, GFP_KERNEL, buffer->dma_attrs); if (!buffer->kvaddr) { kfree(buffer); @@ -682,10 +682,10 @@ int iris_queue_internal_buffers(struct iris_inst *ins= t, u32 plane) =20 int iris_destroy_internal_buffer(struct iris_inst *inst, struct iris_buffe= r *buffer) { - struct iris_core *core =3D inst->core; + struct device *dev =3D iris_get_cb_dev(inst, buffer->type); =20 list_del(&buffer->list); - dma_free_attrs(core->dev, buffer->buffer_size, buffer->kvaddr, + dma_free_attrs(dev, buffer->buffer_size, buffer->kvaddr, buffer->device_addr, buffer->dma_attrs); kfree(buffer); =20 diff --git a/drivers/media/platform/qcom/iris/iris_core.h b/drivers/media/p= latform/qcom/iris/iris_core.h index 24da60448cf24820af7947b85eb7208555ab7786..3c96f46cf567b2802148b2a7ced= b8488b6b9468b 100644 --- a/drivers/media/platform/qcom/iris/iris_core.h +++ b/drivers/media/platform/qcom/iris/iris_core.h @@ -36,6 +36,8 @@ struct qcom_ubwc_cfg_data; * struct iris_core - holds core parameters valid for all instances * * @dev: reference to device structure + * @np_dev: reference to non-pixel device structure + * @p_dev: reference to pixel device structure * @reg_base: IO memory base address * @irq: iris irq * @v4l2_dev: a holder for v4l2 device structure @@ -81,6 +83,8 @@ struct qcom_ubwc_cfg_data; =20 struct iris_core { struct device *dev; + struct device *np_dev; + struct device *p_dev; void __iomem *reg_base; int irq; struct v4l2_device v4l2_dev; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_queue.c b/drivers/me= dia/platform/qcom/iris/iris_hfi_queue.c index bf6db23b53e2106c08f2139b643f8626af8bc40a..ce6a682b0f9ada79f9fae26289d= b298855d777c2 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_queue.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_queue.c @@ -245,25 +245,26 @@ static void iris_hfi_queue_deinit(struct iris_iface_q= _info *iface_q) =20 int iris_hfi_queues_init(struct iris_core *core) { + struct device *dev =3D core->np_dev ? core->np_dev : core->dev; struct iris_hfi_queue_table_header *q_tbl_hdr; u32 queue_size; =20 /* Iris hardware requires 4K queue alignment */ queue_size =3D ALIGN((sizeof(*q_tbl_hdr) + (IFACEQ_QUEUE_SIZE * IFACEQ_NU= MQ)), SZ_4K); - core->iface_q_table_vaddr =3D dma_alloc_attrs(core->dev, queue_size, + core->iface_q_table_vaddr =3D dma_alloc_attrs(dev, queue_size, &core->iface_q_table_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->iface_q_table_vaddr) { - dev_err(core->dev, "queues alloc and map failed\n"); + dev_err(dev, "queues alloc and map failed\n"); return -ENOMEM; } =20 - core->sfr_vaddr =3D dma_alloc_attrs(core->dev, SFR_SIZE, + core->sfr_vaddr =3D dma_alloc_attrs(dev, SFR_SIZE, &core->sfr_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->sfr_vaddr) { - dev_err(core->dev, "sfr alloc and map failed\n"); - dma_free_attrs(core->dev, queue_size, core->iface_q_table_vaddr, + dev_err(dev, "sfr alloc and map failed\n"); + dma_free_attrs(dev, queue_size, core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); return -ENOMEM; } @@ -291,6 +292,7 @@ int iris_hfi_queues_init(struct iris_core *core) =20 void iris_hfi_queues_deinit(struct iris_core *core) { + struct device *dev =3D core->np_dev ? core->np_dev : core->dev; u32 queue_size; =20 if (!core->iface_q_table_vaddr) @@ -300,7 +302,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) iris_hfi_queue_deinit(&core->message_queue); iris_hfi_queue_deinit(&core->command_queue); =20 - dma_free_attrs(core->dev, SFR_SIZE, core->sfr_vaddr, + dma_free_attrs(dev, SFR_SIZE, core->sfr_vaddr, core->sfr_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->sfr_vaddr =3D NULL; @@ -309,7 +311,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) queue_size =3D ALIGN(sizeof(struct iris_hfi_queue_table_header) + (IFACEQ_QUEUE_SIZE * IFACEQ_NUMQ), SZ_4K); =20 - dma_free_attrs(core->dev, queue_size, core->iface_q_table_vaddr, + dma_free_attrs(dev, queue_size, core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->iface_q_table_vaddr =3D NULL; diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 9e02a92baae75803c2c12a2ca994006987c69596..fbbe529c74216cd476f06c6d0a5= dd6f72b98d3e6 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -13,6 +13,7 @@ #include =20 #include "iris_core.h" +#include "iris_instance.h" #include "iris_resources.h" =20 #define BW_THRESHOLD 50000 @@ -165,3 +166,43 @@ struct device *iris_create_cb_dev(struct iris_core *co= re, const char *name) =20 return &pdev->dev; } + +struct device *iris_get_cb_dev(struct iris_inst *inst, enum iris_buffer_ty= pe buffer_type) +{ + struct iris_core *core =3D inst->core; + struct device *dev =3D NULL; + + switch (buffer_type) { + case BUF_INPUT: + if (inst->domain =3D=3D DECODER) + dev =3D core->np_dev; + else + dev =3D core->p_dev; + break; + case BUF_OUTPUT: + if (inst->domain =3D=3D DECODER) + dev =3D core->p_dev; + else + dev =3D core->np_dev; + break; + case BUF_DPB: + case BUF_PARTIAL: + case BUF_SCRATCH_1: + case BUF_SCRATCH_2: + case BUF_VPSS: + dev =3D core->p_dev; + break; + case BUF_BIN: + case BUF_ARP: + case BUF_COMV: + case BUF_LINE: + case BUF_NON_COMV: + case BUF_PERSIST: + dev =3D core->np_dev; + break; + default: + dev_err(core->dev, "invalid buffer type: %d\n", buffer_type); + } + + return dev ? dev : core->dev; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index ca53c01f60aef2040002f526b8f1b6a9094d1518..2eef0676a146f1836fc7445a715= e43185c645099 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -16,5 +16,6 @@ int iris_set_icc_bw(struct iris_core *core, unsigned long= icc_bw); int iris_disable_unprepare_clock(struct iris_core *core, enum platform_clk= _type clk_type); int iris_prepare_enable_clock(struct iris_core *core, enum platform_clk_ty= pe clk_type); struct device *iris_create_cb_dev(struct iris_core *core, const char *name= ); +struct device *iris_get_cb_dev(struct iris_inst *inst, enum iris_buffer_ty= pe buffer_type); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/p= latform/qcom/iris/iris_vidc.c index 14d63dc76c9bacbed3533147cd5325410f9c94bd..26df872fb4fa1cc6b2aacebb745= 3256864b1462a 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -107,7 +107,7 @@ iris_m2m_queue_init(void *priv, struct vb2_queue *src_v= q, struct vb2_queue *dst_ src_vq->drv_priv =3D inst; src_vq->buf_struct_size =3D sizeof(struct iris_buffer); src_vq->min_reqbufs_allocation =3D MIN_BUFFERS; - src_vq->dev =3D inst->core->dev; + src_vq->dev =3D iris_get_cb_dev(inst, BUF_INPUT); src_vq->lock =3D &inst->ctx_q_lock; ret =3D vb2_queue_init(src_vq); if (ret) @@ -121,7 +121,7 @@ iris_m2m_queue_init(void *priv, struct vb2_queue *src_v= q, struct vb2_queue *dst_ dst_vq->drv_priv =3D inst; dst_vq->buf_struct_size =3D sizeof(struct iris_buffer); dst_vq->min_reqbufs_allocation =3D MIN_BUFFERS; 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That device then has no IOMMU domain of its own and never performs DMA directly, so calling dma_set_mask_and_coherent() on it is meaningless, and on a device with no IOMMU it can fail and abort probe. Set the DMA mask only when device_iommu_mapped() reports an IOMMU on the core device. Platforms that have not been converted still carry "iommus" on the parent node and keep the existing setup. For converted platforms the mask is applied to each context bank device instead, in iris_create_cb_dev(). Backports are intended since the first DTS of 8550 binding schema. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Reviewed-by: Dmitry Baryshkov Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_probe.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index 2594f5a67378af9a547f23dec2d2c057506dda65..c40c4ec44e83e4aa212b58a19b6= 4d46a3d9f16ce 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -310,9 +310,11 @@ static int iris_probe(struct platform_device *pdev) =20 dma_mask =3D core->iris_platform_data->dma_mask; =20 - ret =3D dma_set_mask_and_coherent(dev, dma_mask); - if (ret) - goto err_vdev_unreg_enc; + if (device_iommu_mapped(dev)) { + ret =3D dma_set_mask_and_coherent(dev, dma_mask); + if (ret) + goto err_vdev_unreg_enc; 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a=ed25519-sha256; t=1785522138; l=3503; i=vikash.garodia@oss.qualcomm.com; s=20241104; h=from:subject:message-id; bh=RGTIQ+EkKAwvbuWT1JSlLR0/n48W+JBU7qKtrCaPp1k=; b=4D+inkuCsQ4brG1HvaWIVgq2VQcr8M7tu6Cw6rAFjqj3Bu1oOO9t+552xWUItuEtz5TI2C6fi KD7FEZaRHNJBsKCrE2JgUV7tVrr3HCOyIkHbRMBVjXYd5A+FRGUs8vP X-Developer-Key: i=vikash.garodia@oss.qualcomm.com; a=ed25519; pk=LY9Eqp4KiHWxzGNKGHbwRFEJOfRCSzG/rxQNmvZvaKE= X-Proofpoint-ORIG-GUID: Vp9PrBYdHCJjEYPiavbGkL6hRyxIep1z X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDE0MSBTYWx0ZWRfX0mU8zmme+gev jCWN9WBRK/eNyATFfvuHTWQkXTdBZREBp3sHuOJikoOwjsGSgrXWGVb4oX2tA50twZtoStStDm1 5+Puz161iFLfNHk8caWXwuFXDjvJotru8YPvhPEz5X9XMjzkJRlDpXIHYDapeC2NyV4GAwTGp4I 7mQ3W5wgEQBy+m7krKMnBBoPXOtBBZzYQcNDWsgoFiyMdtNFyJ3RYK60pjiJ+S198zEd6aL8dLI 1wLFw7zxmLybfoy8JB8bI8jXVRR1qxc/MQiX5rBj2XSbIblZ+oSSxwNr+ShPqktne3SyLYoQS13 BtzXf3fVlMkkINR4NDqIBIym2L6KtbrzG6uRLKv2XJ0CS01aJysbS3KfBLuDqYj32LRkZwokQ3J JpI6iOTN7HWklPfJoyTuAtTGeB8ACYNW/TlDTQ2GeLC89ckZPjamKAlJR1VVqIUgIDplM0nr25h vnUmCjriA9LAuQVTUlA== X-Proofpoint-GUID: Vp9PrBYdHCJjEYPiavbGkL6hRyxIep1z X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDE0MSBTYWx0ZWRfX3J5tOUx+8tJC KJmd+GcAk9fZ8cSOy8jGOFFaiLQDaBfPIxLjKQVwNPSj+ee/wNP95iIEQr/PIhxN2XJujKy7X2P nNoekNGnxS62CuPXMB7xxPkFcyW/318= X-Authority-Analysis: v=2.4 cv=b+uCJNGx c=1 sm=1 tr=0 ts=6a6ce813 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=t9ty7G3lAAAA:8 a=v0Z7u7uCyoCEKL_A5NIA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=CsAS6f0m0zARWR-uHzm3:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_05,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310141 The VPU issues DMA through several SMMU streams, and the hardware does not give every stream the same addressable range. The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range. Implement the context bank hooks for VPU3x. iris_vpu3x_init_cb_devs() creates the "non-pixel" and "pixel" devices from the matching device tree subnodes, and iris_vpu3x_deinit_cb_devs() unregisters them. If creating the pixel device fails, the non-pixel device is unregistered and its pointer cleared before the error is returned. Wire the hooks into iris_vpu3_ops and iris_vpu33_ops, which cover the platforms whose device trees are converted to context bank subnodes. iris_vpu35_ops is left unchanged, as sm8750 still describes its streams with "iommus" on the parent node, and the fallback in iris_get_cb_dev() keeps it working until its device tree is converted. Backports are intended since the first DTS of 8550 binding schema. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_vpu3x.c | 38 +++++++++++++++++++++++= ++++ 1 file changed, 38 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/= platform/qcom/iris/iris_vpu3x.c index 3dad47be78b58f6cd5ed6f333b3376571a04dbf0..623a0f8a7982c0b5c2e3741a34c= 1367e9aaf4e27 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c @@ -254,6 +254,40 @@ static void iris_vpu35_power_off_hw(struct iris_core *= core) iris_disable_unprepare_clock(core, IRIS_AXI_CLK); } =20 +static int iris_vpu3x_init_cb_devs(struct iris_core *core) +{ + struct device *dev; + + dev =3D iris_create_cb_dev(core, "non-pixel"); + if (IS_ERR(dev)) + return PTR_ERR(dev); + + core->np_dev =3D dev; + + dev =3D iris_create_cb_dev(core, "pixel"); + if (IS_ERR(dev)) + goto unreg_np_dev; + + core->p_dev =3D dev; + + return 0; + +unreg_np_dev: + if (core->np_dev) + platform_device_unregister(to_platform_device(core->np_dev)); + core->np_dev =3D NULL; + + return PTR_ERR(dev); +} + +static void iris_vpu3x_deinit_cb_devs(struct iris_core *core) +{ + if (core->p_dev) + platform_device_unregister(to_platform_device(core->p_dev)); + if (core->np_dev) + platform_device_unregister(to_platform_device(core->np_dev)); +} + const struct vpu_ops iris_vpu3_ops =3D { .power_off_hw =3D iris_vpu3_power_off_hardware, .power_on_hw =3D iris_vpu_power_on_hw, @@ -261,6 +295,8 @@ const struct vpu_ops iris_vpu3_ops =3D { .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode =3D iris_vpu_set_hwmode, + .init_cb_devs =3D iris_vpu3x_init_cb_devs, + .deinit_cb_devs =3D iris_vpu3x_deinit_cb_devs, }; =20 const struct vpu_ops iris_vpu33_ops =3D { @@ -270,6 +306,8 @@ const struct vpu_ops iris_vpu33_ops =3D { .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, .set_hwmode =3D iris_vpu_set_hwmode, + .init_cb_devs =3D iris_vpu3x_init_cb_devs, + .deinit_cb_devs =3D iris_vpu3x_deinit_cb_devs, }; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe the two streams as "non-pixel" and "pixel" subnodes so each gets its own IOMMU domain, with stream 0x1940 becoming non-pixel and 0x1947 becoming pixel. Point the non-pixel subnode at a reserved-memory node whose "iommu-addresses" covers [0, 0x25800000), which excludes the low 600 MB from that domain's IOVA allocator and keeps its allocations above the boundary the stream can address. The reservation node carries no "reg", so it is a pure IOVA carve-out rather than a memory mapping. The pixel stream is left free to use the whole range. The video-codec node also gains '#address-cells' and '#size-cells' of 2, which set the cell widths used to parse the "iommu-addresses" entry that refers to the non-pixel subnode, and an empty "dma-ranges" declaring the 1:1 DMA translation into the parent. Both are described in the common schema change. Fixes: 9065340ac04d ("arm64: dts: qcom: x1e80100: Add IRIS video codec") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 09527dcf957672b4b9658988359e79d8a432fd93..37f4449aa91e605a2112f399604= df0cc6c64162b 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -658,6 +658,10 @@ smem_mem: smem@ffe00000 { hwlocks =3D <&tcsr_mutex 3>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; =20 qup_opp_table_100mhz: opp-table-qup100mhz { @@ -5436,10 +5440,12 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONL= Y>, resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x1940 0>, - <&apps_smmu 0x1947 0>; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe the two streams as "non-pixel" and "pixel" subnodes so each gets its own IOMMU domain, with stream 0x1940 becoming non-pixel and 0x1947 becoming pixel. Point the non-pixel subnode at a reserved-memory node whose "iommu-addresses" covers [0, 0x25800000), which excludes the low 600 MB from that domain's IOVA allocator and keeps its allocations above the boundary the stream can address. The reservation node carries no "reg", so it is a pure IOVA carve-out rather than a memory mapping. The pixel stream is left free to use the whole range. qcs8550 discards the inherited reserved-memory node with /delete-node/, so it needs its own copy of the reservation for the non-pixel subnode phandle to resolve. The video-codec node also gains '#address-cells' and '#size-cells' of 2, which set the cell widths used to parse the "iommu-addresses" entry that refers to the non-pixel subnode, and an empty "dma-ranges" declaring the 1:1 DMA translation into the parent. Both are described in the common schema change. Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- arch/arm64/boot/dts/qcom/qcs8550.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 19 +++++++++++++++++-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs8550.dtsi b/arch/arm64/boot/dts/qc= om/qcs8550.dtsi index f0acdd0b1e9384e684a90f7f49cf63633cd70d53..db0f539bc3d0a2e83b58b3929a0= 5f0e44d9d513f 100644 --- a/arch/arm64/boot/dts/qcom/qcs8550.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8550.dtsi @@ -158,5 +158,9 @@ mpss_dsm_mem: mpss-dsm-region@d4d00000 { reg =3D <0x0 0xd4d00000 0x0 0x3300000>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 7599b7b7e645f389f817c2694317ba12998992a5..4c8ad7f026fe536fe6dd69b015f= 1e79edcbb60f6 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1087,6 +1087,10 @@ hyp_ext_reserved_mem: hyp-ext-reserved-region@ff7000= 00 { reg =3D <0 0xff700000 0 0x100000>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; =20 smp2p-adsp { @@ -3690,10 +3694,12 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONL= Y>, resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x1940 0>, - <&apps_smmu 0x1947 0>; dma-coherent; =20 + #address-cells =3D <2>; + #size-cells =3D <2>; + dma-ranges; + /* * IRIS firmware is signed by vendors, only * enable on boards where the proper signed firmware @@ -3701,6 +3707,15 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY= >, */ status =3D "disabled"; =20 + iris_non_pixel: non-pixel { + iommus =3D <&apps_smmu 0x1940 0x0>; + memory-region =3D <&iris_resv>; + }; + + iris_pixel: pixel { + iommus =3D <&apps_smmu 0x1947 0x0>; + }; + iris_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 --=20 2.34.1 From nobody Fri Oct 2 11:44:01 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7886046F4A7 for ; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe the two streams as "non-pixel" and "pixel" subnodes so each gets its own IOMMU domain, with stream 0x0880 becoming non-pixel and 0x0887 becoming pixel. Point the non-pixel subnode at a reserved-memory node whose "iommu-addresses" covers [0, 0x25800000), which excludes the low 600 MB from that domain's IOVA allocator and keeps its allocations above the boundary the stream can address. The reservation node carries no "reg", so it is a pure IOVA carve-out rather than a memory mapping. The pixel stream is left free to use the whole range. The video-codec node also gains '#address-cells' and '#size-cells' of 2, which set the cell widths used to parse the "iommu-addresses" entry that refers to the non-pixel subnode, and an empty "dma-ranges" declaring the 1:1 DMA translation into the parent. Both are described in the common schema change. Fixes: 7bc95052c64f ("arm64: dts: qcom: sa8775p: add support for video node= ") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- arch/arm64/boot/dts/qcom/lemans.dtsi | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 3b0539e27b5192582e0bc9ea248f1c0382e05030..04cdaabc14881ac28edc11f7f87= 2b3cc49f1efbd 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -861,6 +861,10 @@ cpucp_fw_mem: cpucp-fw@db200000 { reg =3D <0x0 0xdb200000 0x0 0x100000>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; =20 smp2p-adsp { @@ -4961,12 +4965,23 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONL= Y>, resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x0880 0x0400>, - <&apps_smmu 0x0887 0x0400>; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe the two streams as "non-pixel" and "pixel" subnodes so each gets its own IOMMU domain, with stream 0x0880 becoming non-pixel and 0x0887 becoming pixel. Point the non-pixel subnode at a reserved-memory node whose "iommu-addresses" covers [0, 0x25800000), which excludes the low 600 MB from that domain's IOVA allocator and keeps its allocations above the boundary the stream can address. The reservation node carries no "reg", so it is a pure IOVA carve-out rather than a memory mapping. The pixel stream is left free to use the whole range. The video-codec node also gains '#address-cells' and '#size-cells' of 2, which set the cell widths used to parse the "iommu-addresses" entry that refers to the non-pixel subnode, and an empty "dma-ranges" declaring the 1:1 DMA translation into the parent. Both are described in the common schema change. Fixes: bf6ec39c3f36 ("arm64: dts: qcom: qcs8300: add video node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- arch/arm64/boot/dts/qcom/monaco.dtsi | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 64fc0d592282cbe303efd81491cf93708cfb75e8..ec482258d03a3b2ecc1124a3b09= 71f16404f6096 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -811,6 +811,10 @@ video_mem: video-region@9be82000 { reg =3D <0x0 0x9be82000 0x0 0x700000>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; =20 smp2p-adsp { @@ -5403,12 +5407,23 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONL= Y>, resets =3D <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names =3D "bus"; =20 - iommus =3D <&apps_smmu 0x0880 0x0400>, - <&apps_smmu 0x0887 0x0400>; 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The non-pixel stream is restricted to use 0-600MB of IOVA space, while the pixel stream can address the full range: +-----------------------------------------------------------+ | non-pixel stream addressable range (600 MB - 3.5 GB) | | 0x25800000 - 0xe0000000 | +-----------------------------------------------------------+ | pixel stream addressable range (0 - 3.5 GB) | | 0x00000000 - 0xe0000000 | +-----------------------------------------------------------+ A single "iommus" property on the video-codec node puts every stream in one IOMMU domain sharing one IOVA allocator, so nothing keeps a non-pixel buffer above 600 MB. Once an allocation lands below that boundary the hardware faults, which shows up as unhandled SMMU page faults and spontaneous reboots: https://gitlab.freedesktop.org/drm/msm/-/work_items/100 Describe the two streams as "non-pixel" and "pixel" subnodes so each gets its own IOMMU domain, with stream 0x1940 becoming non-pixel and 0x1947 becoming pixel. Point the non-pixel subnode at a reserved-memory node whose "iommu-addresses" covers [0, 0x25800000), which excludes the low 600 MB from that domain's IOVA allocator and keeps its allocations above the boundary the stream can address. The reservation node carries no "reg", so it is a pure IOVA carve-out rather than a memory mapping. The pixel stream is left free to use the whole range. The video-codec node also gains '#address-cells' and '#size-cells' of 2, which set the cell widths used to parse the "iommu-addresses" entry that refers to the non-pixel subnode, and an empty "dma-ranges" declaring the 1:1 DMA translation into the parent. Both are described in the common schema change. Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node") Cc: stable@vger.kernel.org Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Tested-by: Daniel J Blueman Signed-off-by: Vikash Garodia --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 9ecbc0010694faf8005eabdeb033efe630f95037..6fccd8a886ec0aaa42e20b7a203= 33a7b77c31b48 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -1905,6 +1905,10 @@ llcc_lpi_mem: llcc-lpi@ff800000 { reg =3D <0 0xff800000 0 0x600000>; no-map; }; + + iris_resv: reservation-iris { + iommu-addresses =3D <&iris_non_pixel 0x0 0x0 0x0 0x25800000>; + }; }; =20 smp2p-adsp { @@ -5275,11 +5279,12 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONL= Y>, "xo", "core"; =20 - iommus =3D <&apps_smmu 0x1940 0>, - <&apps_smmu 0x1947 0>; - dma-coherent; =20 + #address-cells =3D <2>; + #size-cells =3D <2>; + dma-ranges; + /* * IRIS firmware is signed by vendors, only * enable on boards where the proper signed firmware @@ -5287,6 +5292,15 @@ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY= >, */ status =3D "disabled"; =20 + iris_non_pixel: non-pixel { + iommus =3D <&apps_smmu 0x1940 0x0>; + memory-region =3D <&iris_resv>; + }; + + iris_pixel: pixel { + iommus =3D <&apps_smmu 0x1947 0x0>; + }; + iris_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 --=20 2.34.1