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Fri, 31 Jul 2026 16:48:44 -0700 (PDT) From: "David Lechner (TI)" Date: Fri, 31 Jul 2026 18:48:10 -0500 Subject: [PATCH v2 1/3] iio: adc: ti-ads112c14: add DRDY interrupt support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-1-eb13da38e8fc@baylibre.com> References: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> In-Reply-To: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: Chris Hall , Patrick Edwards , Kurt Borja , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, "David Lechner (TI)" X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=6140; i=dlechner@baylibre.com; h=from:subject:message-id; bh=k736qChxNvgkAm2LBCV31cD00UlFtg6ggFAPO2QDIo0=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBqbTRFkP9M5eM7+bxEg1M0Z0/ml+5cLyf9/YaLJ GWzdekD7GKJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCam00RQAKCRDCzCAB/wGP wPtlB/9YxOK9ZusClAm+2DHPMDl+9KACXQZcz+18LLka/2vZH3/EEt9YzCnziN18f1aecxLf1g6 DMnGB471/ed+WurzbRSe7ypsFZUYa0bfpUndclhZ8l5HsIhgywQMvWvGmz7pLouh4H7VLWZ30uk mFzXHBow/YWa6b8yiwn4PRJzJEjevA962j9So7nR2JSzNA2LXbwAnLntU4rAEJF28ea5qZ+IpMP 6wl1bcd21EE2yxZwwDESIPHFOzAG2Zwt9qKe6xjlssnkTtj4IkQbCKmnYYJ7pIhHvyrpk0JZmSE ZjmV0dCxKRG2C/QYl8dc1ttGtcqFyknT9Tg1jwpsVTibgxch X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Add handling for the DRDY interrupt to wait for data ready events rather than polling (only when it is wired up). Signed-off-by: David Lechner (TI) --- Small note: the hard-coded 100 ms timeout will be replaced in a future series with a dynamic value, so I didn't bother with a macro or comments to explain why the value was chosen. And passing indio_dev instead of data to irq is intentional as it will be used in the next patch. --- drivers/iio/adc/ti-ads112c14.c | 105 +++++++++++++++++++++++++++++++++++++= ---- 1 file changed, 95 insertions(+), 10 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index 8ad8caee0ff7..177f7064092e 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -19,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -117,9 +119,15 @@ #define ADS112C14_GPIO_CFG_GPIO2_CFG GENMASK(5, 4) #define ADS112C14_GPIO_CFG_GPIO1_CFG GENMASK(3, 2) #define ADS112C14_GPIO_CFG_GPIO0_CFG GENMASK(1, 0) +#define ADS112C14_GPIO_CFG_GPIO_CFG_DISABLED 0 +#define ADS112C14_GPIO_CFG_GPIO_CFG_INPUT 1 +#define ADS112C14_GPIO_CFG_GPIO_CFG_OUTPUT_PUSH_PULL 2 +#define ADS112C14_GPIO_CFG_GPIO_CFG_OUTPUT_OPEN_DRAIN 3 =20 #define ADS112C14_REG_GPIO_DATA_OUTPUT 0x0C #define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_SRC BIT(7) +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_SRC_DAT_OUT 0 +#define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_SRC_DRDY 1 #define ADS112C14_GPIO_DATA_OUTPUT_GPIO2_SRC BIT(6) #define ADS112C14_GPIO_DATA_OUTPUT_GPIO3_DAT_OUT BIT(3) #define ADS112C14_GPIO_DATA_OUTPUT_GPIO2_DAT_OUT BIT(2) @@ -251,6 +259,8 @@ struct ads112c14_data { struct regmap *regmap; /* Synchronizes access to register value fields. */ struct mutex lock; + int drdy_irq; + struct completion drdy_completion; bool i2c_crc_enabled; u32 avdd_uV; u32 ext_ref_uV; @@ -265,6 +275,16 @@ struct ads112c14_data { ARRAY_SIZE(ads112c14_sys_mon_channels)); }; =20 +static irqreturn_t ads112c14_drdy_irq_handler(int irq, void *private) +{ + struct iio_dev *indio_dev =3D private; + struct ads112c14_data *data =3D iio_priv(indio_dev); + + complete(&data->drdy_completion); + + return IRQ_HANDLED; +} + static bool ads112c14_writeable_reg(struct device *dev, unsigned int reg) { switch (reg) { @@ -581,12 +601,50 @@ static int ads112c14_prepare_sys_mon_channel(struct a= ds112c14_data *data, return 0; } =20 +static int ads112c14_wait_for_conversion_irq(struct ads112c14_data *data) +{ + unsigned long remaining; + int ret; + + reinit_completion(&data->drdy_completion); + enable_irq(data->drdy_irq); + + ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + ADS112C14_CONVERSION_CTRL_START); + if (ret) + goto out; + + remaining =3D wait_for_completion_timeout(&data->drdy_completion, + msecs_to_jiffies(100)); + ret =3D remaining ? 0 : -ETIMEDOUT; + +out: + disable_irq(data->drdy_irq); + + return ret; +} + +static int ads112c14_wait_for_conversion_poll(struct ads112c14_data *data) +{ + u32 reg_val; + int ret; + + ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + ADS112C14_CONVERSION_CTRL_START); + if (ret) + return ret; + + return regmap_read_poll_timeout(data->regmap, + ADS112C14_REG_STATUS_MSB, reg_val, + FIELD_GET(ADS112C14_STATUS_MSB_DRDY, reg_val), + 1 * USEC_PER_MSEC, 100 * USEC_PER_MSEC); +} + static int ads112c14_single_conversion(struct ads112c14_data *data, const struct iio_chan_spec *chan, u8 *buf, bool for_scan) { struct i2c_client *client =3D to_i2c_client(regmap_get_device(data->regma= p)); - u32 reg_val; int ret; =20 guard(mutex)(&data->lock); @@ -601,15 +659,10 @@ static int ads112c14_single_conversion(struct ads112c= 14_data *data, return ret; } =20 - ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, - ADS112C14_CONVERSION_CTRL_START); - if (ret) - return ret; - - ret =3D regmap_read_poll_timeout(data->regmap, - ADS112C14_REG_STATUS_MSB, reg_val, - FIELD_GET(ADS112C14_STATUS_MSB_DRDY, reg_val), - 1 * USEC_PER_MSEC, 100 * USEC_PER_MSEC); + if (data->drdy_irq) + ret =3D ads112c14_wait_for_conversion_irq(data); + else + ret =3D ads112c14_wait_for_conversion_poll(data); if (ret) return ret; =20 @@ -1392,6 +1445,38 @@ static int ads112c14_probe(struct i2c_client *client) if (ret) return ret; =20 + if (device_property_present(dev, "interrupts")) { + data->drdy_irq =3D fwnode_irq_get_byname(dev_fwnode(dev), "drdy"); + if (data->drdy_irq < 0) + return dev_err_probe(dev, data->drdy_irq, + "failed to get drdy interrupt\n"); + + /* + * REVISIT: would probably need to implement a pin controller in + * order to support open drain option here. + */ + ret =3D regmap_update_bits(data->regmap, ADS112C14_REG_GPIO_CFG, + ADS112C14_GPIO_CFG_GPIO3_CFG, + FIELD_PREP(ADS112C14_GPIO_CFG_GPIO3_CFG, + ADS112C14_GPIO_CFG_GPIO_CFG_OUTPUT_PUSH_PULL)); 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Fri, 31 Jul 2026 16:48:46 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:fa40:746f:401a:3b75]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7f18ed3c814sm1736940a34.6.2026.07.31.16.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 16:48:45 -0700 (PDT) From: "David Lechner (TI)" Date: Fri, 31 Jul 2026 18:48:11 -0500 Subject: [PATCH v2 2/3] iio: adc: ti-ads112c14: create data read helper functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-2-eb13da38e8fc@baylibre.com> References: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> In-Reply-To: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: Chris Hall , Patrick Edwards , Kurt Borja , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, "David Lechner (TI)" X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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These will be reused when continuous mode support is added in a later patch. Signed-off-by: David Lechner (TI) --- drivers/iio/adc/ti-ads112c14.c | 51 +++++++++++++++++++++++++-------------= ---- 1 file changed, 31 insertions(+), 20 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index 177f7064092e..c6d83298c312 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -601,6 +601,32 @@ static int ads112c14_prepare_sys_mon_channel(struct ad= s112c14_data *data, return 0; } =20 +static int ads112c14_prepare_channel(struct ads112c14_data *data, + const struct iio_chan_spec *chan) +{ + if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) + return ads112c14_prepare_measurement_channel(data, chan); + + return ads112c14_prepare_sys_mon_channel(data, chan); +} + +static int ads112c14_scan_read(struct ads112c14_data *data, u8 *buf) +{ + struct i2c_client *client =3D to_i2c_client(regmap_get_device(data->regma= p)); + int ret; + u8 len; + + len =3D BITS_TO_BYTES(data->chip_info->resolution_bits); + if (data->i2c_crc_enabled) + len +=3D 1; + + ret =3D i2c_smbus_read_i2c_block_data(client, ADS112C14_CMD_RDATA, len, b= uf); + if (ret < 0) + return ret; + + return 0; +} + static int ads112c14_wait_for_conversion_irq(struct ads112c14_data *data) { unsigned long remaining; @@ -649,15 +675,9 @@ static int ads112c14_single_conversion(struct ads112c1= 4_data *data, =20 guard(mutex)(&data->lock); =20 - if (chan->channel < ADS112C14_SYS_MON_CHANNEL_BASE) { - ret =3D ads112c14_prepare_measurement_channel(data, chan); - if (ret) - return ret; - } else { - ret =3D ads112c14_prepare_sys_mon_channel(data, chan); - if (ret) - return ret; - } + ret =3D ads112c14_prepare_channel(data, chan); + if (ret) + return ret; =20 if (data->drdy_irq) ret =3D ads112c14_wait_for_conversion_irq(data); @@ -672,17 +692,8 @@ static int ads112c14_single_conversion(struct ads112c1= 4_data *data, * with CRC errors, but rather leave it to userspace to decide what to * do. */ - if (for_scan) { - u8 len =3D BITS_TO_BYTES(data->chip_info->resolution_bits) + - (data->i2c_crc_enabled ? 1 : 0); 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Fri, 31 Jul 2026 16:48:47 -0700 (PDT) Received: from [127.0.1.1] ([2600:8803:e7e4:500:fa40:746f:401a:3b75]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7f18ed3c814sm1736940a34.6.2026.07.31.16.48.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 16:48:47 -0700 (PDT) From: "David Lechner (TI)" Date: Fri, 31 Jul 2026 18:48:12 -0500 Subject: [PATCH v2 3/3] iio: adc: ti-ads112c14: add continuous mode support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-3-eb13da38e8fc@baylibre.com> References: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> In-Reply-To: <20260731-iio-adc-ti-ads112c14-continuous-mode-v2-0-eb13da38e8fc@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko Cc: Chris Hall , Patrick Edwards , Kurt Borja , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, "David Lechner (TI)" X-Mailer: b4 0.16-dev X-Developer-Signature: v=1; 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In this mode the ADC itself is starting each conversion, so we add a trigger based on the DRDY interrupt to read each sample. This mode is also limited in that only one channel can be enabled at a time since the chip does not have a sequencer or simultaneous sampling capability. Continuous mode will only be used when this new trigger is the current trigger. Signed-off-by: David Lechner (TI) --- drivers/iio/adc/ti-ads112c14.c | 146 +++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 144 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ti-ads112c14.c b/drivers/iio/adc/ti-ads112c14.c index c6d83298c312..5147d10785fb 100644 --- a/drivers/iio/adc/ti-ads112c14.c +++ b/drivers/iio/adc/ti-ads112c14.c @@ -9,6 +9,7 @@ */ =20 #include +#include #include #include #include @@ -18,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -257,6 +259,7 @@ struct ads112c14_measurement { struct ads112c14_data { const struct ads112c14_chip_info *chip_info; struct regmap *regmap; + struct iio_trigger *drdy_trig; /* Synchronizes access to register value fields. */ struct mutex lock; int drdy_irq; @@ -280,11 +283,32 @@ static irqreturn_t ads112c14_drdy_irq_handler(int irq= , void *private) struct iio_dev *indio_dev =3D private; struct ads112c14_data *data =3D iio_priv(indio_dev); =20 - complete(&data->drdy_completion); + if (indio_dev->trig && iio_trigger_using_own(indio_dev)) + iio_trigger_poll(data->drdy_trig); + else + complete(&data->drdy_completion); =20 return IRQ_HANDLED; } =20 +static int ads112c14_trigger_set_state(struct iio_trigger *trig, bool stat= e) +{ + struct iio_dev *indio_dev =3D iio_trigger_get_drvdata(trig); + struct ads112c14_data *data =3D iio_priv(indio_dev); + + if (state) + enable_irq(data->drdy_irq); + else + disable_irq(data->drdy_irq); + + return 0; +} + +static const struct iio_trigger_ops ads112c14_trigger_ops =3D { + .set_trigger_state =3D ads112c14_trigger_set_state, + .validate_device =3D iio_trigger_validate_own_device, +}; + static bool ads112c14_writeable_reg(struct device *dev, unsigned int reg) { switch (reg) { @@ -962,10 +986,31 @@ static irqreturn_t ads112c14_trigger_handler(int irq,= void *private) struct iio_poll_func *pf =3D private; struct iio_dev *indio_dev =3D pf->indio_dev; struct ads112c14_data *data =3D iio_priv(indio_dev); + unsigned int scan_mask_len =3D iio_get_masklength(indio_dev); u32 offset =3D 0; u32 i; int ret; =20 + if (iio_trigger_using_own(indio_dev)) { + i =3D find_first_bit(indio_dev->active_scan_mask, scan_mask_len); + if (i >=3D scan_mask_len) + goto out; + + ret =3D ads112c14_scan_read(data, (u8 *)&data->scan[0]); + if (ret) { + const struct iio_chan_spec *chan =3D &indio_dev->channels[i]; + + dev_err_once(indio_dev->dev.parent, + "failed to read channel %d: %pe; additional errors will be suppre= ssed\n", + chan->channel, ERR_PTR(ret)); + goto out; + } + + iio_push_to_buffers_with_ts(indio_dev, data->scan, + sizeof(data->scan), pf->timestamp); + goto out; + } + iio_for_each_active_channel(indio_dev, i) { const struct iio_chan_spec *chan =3D &indio_dev->channels[i]; =20 @@ -997,6 +1042,89 @@ static const struct iio_info ads112c14_info =3D { .read_label =3D ads112c14_read_label, }; =20 +static bool ads112c14_using_drdy_trigger(struct iio_dev *indio_dev) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + + return data->drdy_trig && indio_dev->trig =3D=3D data->drdy_trig; +} + +static bool ads112c14_validate_scan_mask(struct iio_dev *indio_dev, + const unsigned long *mask) +{ + if (!ads112c14_using_drdy_trigger(indio_dev)) + return true; + + return iio_validate_scan_mask_onehot(indio_dev, mask); +} + +static int ads112c14_buffer_postenable(struct iio_dev *indio_dev) +{ + unsigned int scan_mask_len =3D iio_get_masklength(indio_dev); + struct ads112c14_data *data =3D iio_priv(indio_dev); + const struct iio_chan_spec *chan; + unsigned int i; + int ret; + + if (!ads112c14_using_drdy_trigger(indio_dev)) + return 0; + + i =3D find_first_bit(indio_dev->active_scan_mask, scan_mask_len); + if (i >=3D scan_mask_len) + return -EINVAL; + + chan =3D &indio_dev->channels[i]; + + guard(mutex)(&data->lock); + + ret =3D ads112c14_prepare_channel(data, chan); + if (ret) + return ret; + + ret =3D regmap_assign_bits(data->regmap, ADS112C14_REG_DEVICE_CFG, + ADS112C14_DEVICE_CFG_CONV_MODE, + ADS112C14_DEVICE_CFG_CONV_MODE_CONTINUOUS); + if (ret) + return ret; + + ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + ADS112C14_CONVERSION_CTRL_START); + if (ret) { + regmap_assign_bits(data->regmap, ADS112C14_REG_DEVICE_CFG, + ADS112C14_DEVICE_CFG_CONV_MODE, + ADS112C14_DEVICE_CFG_CONV_MODE_SINGLE_SHOT); + return ret; + } + + return 0; +} + +static int ads112c14_buffer_predisable(struct iio_dev *indio_dev) +{ + struct ads112c14_data *data =3D iio_priv(indio_dev); + int ret; + + if (!ads112c14_using_drdy_trigger(indio_dev)) + return 0; + + guard(mutex)(&data->lock); + + ret =3D regmap_write(data->regmap, ADS112C14_REG_CONVERSION_CTRL, + ADS112C14_CONVERSION_CTRL_STOP); + if (ret) + return ret; + + return regmap_assign_bits(data->regmap, ADS112C14_REG_DEVICE_CFG, + ADS112C14_DEVICE_CFG_CONV_MODE, + ADS112C14_DEVICE_CFG_CONV_MODE_SINGLE_SHOT); +} + +static const struct iio_buffer_setup_ops ads112c14_buffer_setup_ops =3D { + .postenable =3D ads112c14_buffer_postenable, + .predisable =3D ads112c14_buffer_predisable, + .validate_scan_mask =3D ads112c14_validate_scan_mask, +}; + static int ads112c14_populate_idac_mag(u32 current_nA, u8 *idac_mag) { u32 current_uA =3D current_nA / (NANO / MICRO); @@ -1486,6 +1614,19 @@ static int ads112c14_probe(struct i2c_client *client) IRQF_NO_AUTOEN, dev_name(dev), indio_dev); if (ret) return ret; + + data->drdy_trig =3D devm_iio_trigger_alloc(dev, "%s-dev%d-drdy", + info->name, + iio_device_id(indio_dev)); + if (!data->drdy_trig) + return -ENOMEM; + + data->drdy_trig->ops =3D &ads112c14_trigger_ops; + iio_trigger_set_drvdata(data->drdy_trig, indio_dev); + + ret =3D devm_iio_trigger_register(dev, data->drdy_trig); + if (ret) + return ret; } =20 ads112c14_populate_tables(data); @@ -1496,7 +1637,8 @@ static int ads112c14_probe(struct i2c_client *client) =20 ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, iio_pollfunc_store_time, - ads112c14_trigger_handler, NULL); + ads112c14_trigger_handler, + &ads112c14_buffer_setup_ops); if (ret) return ret; =20 --=20 2.43.0