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Fri, 31 Jul 2026 01:54:38 -0700 (PDT) X-Received: by 2002:a05:622a:1a90:b0:517:8470:2d2d with SMTP id d75a77b69052e-52b4b053a9amr13980711cf.29.1785488078125; Fri, 31 Jul 2026 01:54:38 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:61cd:dcd3:c61a:ac3c]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1fd44e9f0bsm61899366b.43.2026.07.31.01.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 01:54:37 -0700 (PDT) From: Loic Poulain Date: Fri, 31 Jul 2026 10:54:34 +0200 Subject: [PATCH v4 1/4] media: qcom: camss: Add PM clock support and integrate with runtime PM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-camss-version-v4-1-be8b716a8c4d@oss.qualcomm.com> References: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> In-Reply-To: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> To: Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain , Frank Li X-Mailer: b4 0.14.2 X-Proofpoint-GUID: YmTYBXkRVk7pNo36LrigJ6Z5pjrIObIV X-Authority-Analysis: v=2.4 cv=SK5ykuvH c=1 sm=1 tr=0 ts=6a6c62cf cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=KKAkSRfTAAAA:8 a=8AirrxEcAAAA:8 a=EUspDBNiAAAA:8 a=KmNvnciZBadtvzOit0AA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 a=ST-jHhOKWsTCqRlWije3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX76piLIk+M2uR mZzZehWNxU84qXlL6XEWA8/np8k1VmNgdJpJbgD1U3jc723Nn83LRfK5YtRAaI2QfOE16ruEL/x qu/feJGTLYP0iN2mEtlltzHUDeBOrOG5GG5xblQMloCGht3Lwfzon95T256R7E4sWhEFKwYeFE1 +slvgK/5lfVUNFOp5h/tOBJELssOt3U8gctCKSpKJbq4TvYnyhQrkmJweJT441yAQbMB7FAvv9p TlJ64m7SNeDN1nEOTo1vd9IG4f6tLoVbPMztOmst+ck/atN+GWttDLtc+NXC2eYuyRBjvTSSUnm vVPaVuKmxb6+OiDZk2y9tlJmDdZSCo4c1e+zbTKAdZ88xQGb38dhrHFP4Cc9NhBQF0kz+5p838m mmlcJcz0gn6TKYghbYuqt/JjUUgSEjOtxI1jFw/0BJQj3OR8EuER6VS2MTK9FaDlL3FXu254yG7 m6cap5E1TJW67Q0cf/g== X-Proofpoint-ORIG-GUID: YmTYBXkRVk7pNo36LrigJ6Z5pjrIObIV X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfX8Uq2ckIWJlqT uvOkjmxO+rqgG2lUfhuaoS/aGwoplpuvb2t6c5ibogtC6HsfjS2NqsqWxTbv+fDJt4CggWnxx4R 0dLOWj5IT4fbdBPZYWV9hYr+josk8Ck= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_03,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310063 Add optional PM clock support to the CAMSS driver using the PM clock framework. This allows CAMSS clocks to be registered once and automatically managed during runtime suspend and resume. This is especially useful for global CAMSS clocks that are shared across multiple CAMSS subblocks. This avoids the need for each subblock to reference and manage the shared clocks individually. A typical example is the set of clocks in the top_group, which may be used by CSID, PHY, CCI, and other CAMSS blocks. Introduce a small PM clock descriptor table in the CAMSS resources structure to describe clocks and their optional rates. Initialize these clocks at probe time and delegate clock ownership to the PM core. Hook PM clock handling into the runtime PM callbacks to ensure clocks are properly suspended and resumed alongside power domains and ICC paths. Reviewed-by: Bryan O'Donoghue Reviewed-by: Frank Li Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 49 +++++++++++++++++++++++++++= ++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 50 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 2123f6388e3d7eafe669efd6b033e22d8eb5cf79..b541071e97fe02f38aebda1d9b0= 96b930d1cfde5 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include =20 @@ -5346,6 +5347,40 @@ static void camss_genpd_cleanup(struct camss *camss) dev_pm_domain_detach(camss->genpd, true); } =20 +/* + * camss_init_pm_clks - set up shared CAMSS clocks + * + * Clocks listed in res->pm_clks are shared across all CAMSS sub-devices + * (e.g. top_ahb, axi). + */ +static int camss_init_pm_clks(struct camss *camss) +{ + struct device *dev =3D camss->dev; + unsigned int i; + int ret; + + if (!camss->res->pm_clks[0]) + return 0; + + if (IS_ENABLED(CONFIG_PM_CLK)) { + ret =3D devm_pm_clk_create(dev); + if (ret) + return ret; + } + + for (i =3D 0; i < CAMSS_RES_MAX && camss->res->pm_clks[i]; i++) { + if (IS_ENABLED(CONFIG_PM_CLK)) + ret =3D pm_clk_add(dev, camss->res->pm_clks[i]); + else + ret =3D PTR_ERR_OR_ZERO(devm_clk_get_enabled(dev, camss->res->pm_clks[i= ])); + if (ret) + return dev_err_probe(dev, ret, "failed to set up pm clock %s\n", + camss->res->pm_clks[i]); + } + + return 0; +} + /* * camss_probe - Probe CAMSS platform device * @pdev: Pointer to CAMSS platform device @@ -5434,6 +5469,10 @@ static int camss_probe(struct platform_device *pdev) =20 pm_runtime_enable(dev); =20 + ret =3D camss_init_pm_clks(camss); + if (ret) + goto err_v4l2_device_unregister; + ret =3D camss_parse_ports(camss); if (ret < 0) goto err_v4l2_device_unregister; @@ -5775,7 +5814,11 @@ static int __maybe_unused camss_runtime_suspend(stru= ct device *dev) return ret; } =20 +#if IS_ENABLED(CONFIG_PM_CLK) + return pm_clk_suspend(dev); +#else return 0; +#endif } =20 static int __maybe_unused camss_runtime_resume(struct device *dev) @@ -5785,6 +5828,12 @@ static int __maybe_unused camss_runtime_resume(struc= t device *dev) int i; int ret; =20 +#if IS_ENABLED(CONFIG_PM_CLK) + ret =3D pm_clk_resume(dev); + if (ret) + return ret; +#endif + for (i =3D 0; i < camss->res->icc_path_num; i++) { ret =3D icc_set_bw(camss->icc_path[i], icc_res[i].icc_bw_tbl.avg, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/plat= form/qcom/camss/camss.h index 93d691c8ac63b2a47dbb234856b627d8911a1851..fe5fe25d5f18d8a3ce35b48077a= 975f1453c341f 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -107,6 +107,7 @@ enum icc_count { struct camss_resources { enum camss_version version; const char *pd_name; + const char *pm_clks[CAMSS_RES_MAX]; const struct camss_subdev_resources *csiphy_res; const struct camss_subdev_resources *tpg_res; const struct camss_subdev_resources *csid_res; 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Register the top_ahb, ahb and axi clocks so they can be managed automatically through the PM clock framework (they are part of the camss-top group). Reviewed-by: Bryan O'Donoghue Reviewed-by: Frank Li Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index b541071e97fe02f38aebda1d9b096b930d1cfde5..8827613d34fc77d43d865e1bd05= aa0cc14a4cfca 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -5594,6 +5594,7 @@ static const struct camss_resources msm8996_resources= =3D { =20 static const struct camss_resources qcm2290_resources =3D { .version =3D CAMSS_2290, + .pm_clks =3D { "top_ahb", "ahb", "axi" }, .csiphy_res =3D csiphy_res_2290, .csid_res =3D csid_res_2290, .vfe_res =3D vfe_res_2290, --=20 2.34.1 From nobody Fri Oct 2 13:04:16 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EFAC390C85 for ; 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These clocks are now handled centrally as global CAMSS PM clocks and are automatically enabled when CAMSS is runtime resumed. This avoids redundant clock references in individual subdevices and ensures consistent clock management across the CAMSS pipeline. Reviewed-by: Bryan O'Donoghue Reviewed-by: Frank Li Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 38 ++++++++++-----------------= ---- 1 file changed, 12 insertions(+), 26 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index 8827613d34fc77d43d865e1bd05aa0cc14a4cfca..f688d11990a71aa6d745db1fdce= befe5a5119ca3 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -688,10 +688,8 @@ static const struct camss_subdev_resources csiphy_res_= 2290[] =3D { { .supply =3D "vdd-csiphy-1p2", .init_load_uA =3D 26700 }, { .supply =3D "vdd-csiphy-1p8", .init_load_uA =3D 2600 } }, - .clock =3D { "top_ahb", "ahb", "csiphy0", "csiphy0_timer" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 240000000, 341330000, 384000000 }, + .clock =3D { "csiphy0", "csiphy0_timer" }, + .clock_rate =3D { { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg =3D { "csiphy0" }, .interrupt =3D { "csiphy0" }, @@ -708,10 +706,8 @@ static const struct camss_subdev_resources csiphy_res_= 2290[] =3D { { .supply =3D "vdd-csiphy-1p2", .init_load_uA =3D 26700 }, { .supply =3D "vdd-csiphy-1p8", .init_load_uA =3D 2600 } }, - .clock =3D { "top_ahb", "ahb", "csiphy1", "csiphy1_timer" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 240000000, 341330000, 384000000 }, + .clock =3D { "csiphy1", "csiphy1_timer" }, + .clock_rate =3D { { 240000000, 341330000, 384000000 }, { 100000000, 200000000, 268800000 } }, .reg =3D { "csiphy1" }, .interrupt =3D { "csiphy1" }, @@ -727,10 +723,8 @@ static const struct camss_subdev_resources csid_res_22= 90[] =3D { /* CSID0 */ { .regulators =3D {}, - .clock =3D { "top_ahb", "ahb", "csi0", "vfe0_cphy_rx", "vfe0" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 192000000, 240000000, 384000000, 426400000 }, + .clock =3D { "csi0", "vfe0_cphy_rx", "vfe0" }, + .clock_rate =3D { { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, .reg =3D { "csid0" }, @@ -745,10 +739,8 @@ static const struct camss_subdev_resources csid_res_22= 90[] =3D { /* CSID1 */ { .regulators =3D {}, - .clock =3D { "top_ahb", "ahb", "csi1", "vfe1_cphy_rx", "vfe1" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 192000000, 240000000, 384000000, 426400000 }, + .clock =3D { "csi1", "vfe1_cphy_rx", "vfe1" }, + .clock_rate =3D { { 192000000, 240000000, 384000000, 426400000 }, { 0 }, { 0 } }, .reg =3D { "csid1" }, @@ -765,11 +757,8 @@ static const struct camss_subdev_resources vfe_res_229= 0[] =3D { /* VFE0 */ { .regulators =3D {}, - .clock =3D { "top_ahb", "ahb", "axi", "vfe0", "camnoc_rt_axi", "camnoc_n= rt_axi" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 0 }, - { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, + .clock =3D { "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock_rate =3D { { 19200000, 153600000, 192000000, 256000000, 384000000= , 460800000 }, { 0 }, { 0 }, }, .reg =3D { "vfe0" }, @@ -785,11 +774,8 @@ static const struct camss_subdev_resources vfe_res_229= 0[] =3D { /* VFE1 */ { .regulators =3D {}, - .clock =3D { "top_ahb", "ahb", "axi", "vfe1", "camnoc_rt_axi", "camnoc_n= rt_axi" }, - .clock_rate =3D { { 0 }, - { 0 }, - { 0 }, - { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 }, + .clock =3D { "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" }, + .clock_rate =3D { { 19200000, 153600000, 192000000, 256000000, 384000000= , 460800000 }, { 0 }, { 0 }, }, .reg =3D { "vfe1" }, --=20 2.34.1 From nobody Fri Oct 2 13:04:16 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A07093DF002 for ; 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Fri, 31 Jul 2026 01:54:42 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:61cd:dcd3:c61a:ac3c]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c1fd44e9f0bsm61899366b.43.2026.07.31.01.54.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2026 01:54:41 -0700 (PDT) From: Loic Poulain Date: Fri, 31 Jul 2026 10:54:37 +0200 Subject: [PATCH v4 4/4] media: qcom: camss: Report hardware version via media controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260731-camss-version-v4-4-be8b716a8c4d@oss.qualcomm.com> References: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> In-Reply-To: <20260731-camss-version-v4-0-be8b716a8c4d@oss.qualcomm.com> To: Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain , Konrad Dybcio X-Mailer: b4 0.14.2 X-Proofpoint-GUID: uNlpCU_47GXMALB2egJFr0AFLuCvT8lQ X-Authority-Analysis: v=2.4 cv=SK5ykuvH c=1 sm=1 tr=0 ts=6a6c62d4 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=_VBxEyf9HguAcaXgWQEA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfXxJXCGx7mwIYR GOHRXmfcU4EdpCBrdqxbjMbgYQHS0awovC+G6GK+PKPoaockOPIVumFUBU3CUnoOo2Q3YECcxuv H1oIBFN5n35dzc1NzZCiZRgo+CjJKIPSNh0+H9pAQ98DAqJ2DYBoGgcgZB69MaD+cPCfhCdcjCx PFFcw8soW2UHlMSJYFxH7r4K+lLVKmL43V/t8aErInl1uABaVyYFVNKGjzxq9hZZclqVCUqahbp JSq5SSDKgwX5OcofY2BTEE4F7aR7hyWpuSaUiAAyxbEslFt5SOUS/G5MWVv9y7dKCIvNTkKtS5/ hSDdXaS+AlxcVqJacRJdcTpEM430Y2JFQ0bgTPwcFxqRbK2R7uuhB4slkJBY2uT2Ow8ehNKnQoy o5nGzwPezQaSidSyEkBTorNYIzOzPoVDJXGmenIWld3jyrSJRFwx1wZq4gQKbevf1ta6Y5I7aJK AfsthuZ4d/eRkOrrg3w== X-Proofpoint-ORIG-GUID: uNlpCU_47GXMALB2egJFr0AFLuCvT8lQ X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA2MyBTYWx0ZWRfXzZNblf125jV6 IQ4w9dGP6brJk8ObBEA4cxo6HWIXN7/ReLbieqho3ZgTc4afQrgDKXNeRh77G2A+BNeFO7R1wp3 Vvk+g6ACc9qVL2F2cN+ts3wbfcJQtps= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_03,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 impostorscore=0 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310063 Populate media_dev.hw_revision with the top-level CAMSS hardware version so that user space can query the exact hardware variant through the media controller (e.g. via media-ctl or MEDIA_IOC_DEVICE_INFO). This can help identify the platform variant and adapt behaviour accordingly, for example allowing libcamera to apply quirks or enable features that cannot be discovered through standard V4L2 or media-controller APIs. The version register is exposed by some platforms through the top-level "top" reg region (offset 0). When present, map it and read the version once at probe. This is a no-op on platforms not mapping the region (yet). Reported media info on Agatti/CM2290 (Spectra 520): Media Driver Info: Driver name : qcom-camss Model : Qualcomm Camera Subsystem Bus info : platform:5c11000.camss Hardware revision: 0x00050200 (328192) Reviewed-by: Konrad Dybcio Reviewed-by: Bryan O'Donoghue Signed-off-by: Loic Poulain --- drivers/media/platform/qcom/camss/camss.c | 40 +++++++++++++++++++++++++++= ++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 41 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index f688d11990a71aa6d745db1fdcebefe5a5119ca3..6807239a19677709481bcba0246= e66ea5ebc4a83 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -33,6 +33,9 @@ #define CAMSS_CLOCK_MARGIN_NUMERATOR 105 #define CAMSS_CLOCK_MARGIN_DENOMINATOR 100 =20 +/* Top-level CAMSS version register */ +#define CAMSS_HW_VERSION 0x0 + static const struct parent_dev_ops vfe_parent_dev_ops; =20 static const struct camss_subdev_resources csiphy_res_8x16[] =3D { @@ -4677,6 +4680,29 @@ void camss_pm_domain_off(struct camss *camss, int id) } } =20 +static int camss_read_version(struct camss *camss) +{ + u32 hw_version; + int ret; + + if (!camss->top_base) + return 0; + + ret =3D pm_runtime_resume_and_get(camss->dev); + if (ret < 0) + return ret; + + hw_version =3D readl_relaxed(camss->top_base + CAMSS_HW_VERSION); + + pm_runtime_put_sync(camss->dev); + + dev_dbg(camss->dev, "CAMSS HW Version =3D 0x%08x\n", hw_version); + + camss->media_dev.hw_revision =3D hw_version; + + return 0; +} + static int vfe_parent_dev_ops_get(struct camss *camss, int id) { int ret =3D -EINVAL; @@ -4866,6 +4892,16 @@ static int camss_init_subdevices(struct camss *camss) camss->csid_wrapper_base =3D base; } =20 + /* Optional top register for hardware version info */ + if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "top")) { + void __iomem *base; + + base =3D devm_platform_ioremap_resource_byname(pdev, "top"); + if (IS_ERR(base)) + return PTR_ERR(base); + camss->top_base =3D base; + } + for (i =3D 0; i < camss->res->csid_num; i++) { ret =3D msm_csid_subdev_init(camss, &camss->csid[i], &res->csid_res[i], i); @@ -5459,6 +5495,10 @@ static int camss_probe(struct platform_device *pdev) if (ret) goto err_v4l2_device_unregister; =20 + ret =3D camss_read_version(camss); + if (ret) + goto err_v4l2_device_unregister; + ret =3D camss_parse_ports(camss); if (ret < 0) goto err_v4l2_device_unregister; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/plat= form/qcom/camss/camss.h index fe5fe25d5f18d8a3ce35b48077a975f1453c341f..cce79e56f58c8bdc0097f4a1702= df22c4248f2fa 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -133,6 +133,7 @@ struct camss { struct ispif_device *ispif; struct vfe_device *vfe; void __iomem *csid_wrapper_base; + void __iomem *top_base; atomic_t ref_count; int genpd_num; struct device *genpd; --=20 2.34.1