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Document the compatible strings for the Kalambo SoC and the Compute Reference Device (CRD) board based on it. Acked-by: Krzysztof Kozlowski Signed-off-by: Gopikrishna Garmidi --- Documentation/devicetree/bindings/arm/qcom.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index c7c9a9279684..b0c07a57bda6 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -174,6 +174,11 @@ properties: - qcom,kaanapali-qrd - const: qcom,kaanapali =20 + - items: + - enum: + - qcom,kalambo-crd + - const: qcom,kalambo + - items: - enum: - qcom,mahua-crd --=20 2.34.1 From nobody Fri Oct 2 13:04:40 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EEFE3630BA for ; Fri, 31 Jul 2026 06:14:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2d04b15d26esm719635ad.76.2026.07.30.23.14.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 23:14:52 -0700 (PDT) From: Gopikrishna Garmidi Date: Thu, 30 Jul 2026 23:14:38 -0700 Subject: [PATCH v4 2/5] arm64: dts: qcom: Add Kalambo SoC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260730-b4-kalambo-crd-v4-2-e458f8b08114@oss.qualcomm.com> References: <20260730-b4-kalambo-crd-v4-0-e458f8b08114@oss.qualcomm.com> In-Reply-To: <20260730-b4-kalambo-crd-v4-0-e458f8b08114@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Pankaj Patil Cc: Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Gopikrishna Garmidi X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785478489; l=4284; i=gopikrishna.garmidi@oss.qualcomm.com; s=20260102; h=from:subject:message-id; bh=NkU3dFvQLNuVr0IO6l1ErGb6cSn9Tsn8pb/Xe/a6SHA=; b=wbmwo6Ii8Ofp0ydWufnhJs3SKIzU+S++IHsHEaUEQ8/xn8D8XhPGw46eKH+6g7c3nS/uqL4Y5 ZSNFGg/hBvKBHt2f19AXB2/d0GZt7J6hct4StYCuKYYlByssi7NYOU7 X-Developer-Key: i=gopikrishna.garmidi@oss.qualcomm.com; a=ed25519; pk=TkSjNEhrfsj90i3wkABTZtAjLNr2cfYsujaTvyOIDsE= X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA0MSBTYWx0ZWRfX/S7fxfeBIOPV jcxSYCp7IUklB5hlhICTwU5SJbmsQbcyyE8vHCvyy+iwqzP+rIqkIIj7oanHzBt9potnRFj36W3 NTAdHyHz4JS/dThSNsKCIvZUaVnWBJI= X-Authority-Analysis: v=2.4 cv=HJTz0Itv c=1 sm=1 tr=0 ts=6a6c3d5e cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=0meGOa8vbbZiQTQppSIA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: _MFZ2qzG_Cp3rahK82RuR1aOFfSy2f8U X-Proofpoint-GUID: _MFZ2qzG_Cp3rahK82RuR1aOFfSy2f8U X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA0MSBTYWx0ZWRfXygH6KSLOFWLB SO05l80eAgDGXFreHLugLWiNIr+wHFVq2/izY9VbDarw7io9SrTnV0VlCp4X8rBOmYOaPh8NpST JXjbLl8Cfd/BBSCwVb64GkucULrrD5JjOlhvNBxOkaOGZwsmdVE+28U5MzJXOZyJGwSZdQhyKxs 2V2qqhhF6jEqCcUyNcD1OZhiBjrWN1WLJJvKDbNs5iBgEpJGBGday1mFEJAbMAgZ/WrOLAHa4Y/ rZccA/eVjzXX8SdoVKCw/GH54tnM3912psB0yMXtywfMlhP9bKnSCVEgraqYsNpyXlKvEzDt6TE l41AuBGfnEpBf6zCBpdhkcn11nAYjwmlNNP5l7RLvnq+2FOtQ+UwUyqEBEIsFGqMKPvamdA4ec8 LKfVPesM6WyZsUSwVUXGCCiV+lfUhmSjccPF8qbBHZEO0cOo9OmJLwWPCBWWgHu0l3KvEFpIKxR 8guH0BNb4kbOfjRCXWA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_02,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 impostorscore=0 adultscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310041 Introduce support for the Qualcomm Kalambo SoC. It is derived from Mahua with CPU cluster 0 removed, leaving it with just cluster 1 (cpu6-cpu11). The surviving cluster is re-added to the cpu-map as cluster0, since the kernel stops scanning at the first missing clusterN index. cpu6-cpu11 are reassigned to SCMI performance domain 0, as domain 1 is no longer present. Kalambo uses PDP1 whose tx shmem (lpri1) sits at offset 0x200 within imem, vs 0x180 on Glymur (PDP0). This pushes the tx region end to 0x380, requiring an imem size override. The rx shmem (lpri0) stays at offset 0x0. The PDP mailbox addresses are overridden to match the Kalambo SCP firmware. PDC pins 109 and 110 carry the tsens6 and tsens7 upper/lower interrupts, which are unconnected on Kalambo since both sensors are absent. Split the range starting at pin 108 to skip them. Add labels to the cpus and cpu-map nodes in Glymur to allow derived SoCs to delete and redefine the cpu-map entirely. Reviewed-by: Abel Vesa Co-developed-by: Sibi Sankar Signed-off-by: Sibi Sankar Signed-off-by: Gopikrishna Garmidi --- arch/arm64/boot/dts/qcom/glymur.dtsi | 4 +- arch/arm64/boot/dts/qcom/kalambo.dtsi | 112 ++++++++++++++++++++++++++++++= ++++ 2 files changed, 114 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qco= m/glymur.dtsi index 4be7edf894b5..3f1fd0973717 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -36,7 +36,7 @@ / { #address-cells =3D <2>; #size-cells =3D <2>; =20 - cpus { + cpus: cpus { #address-cells =3D <2>; #size-cells =3D <0>; =20 @@ -274,7 +274,7 @@ cpu17: cpu@20500 { #cooling-cells =3D <2>; }; =20 - cpu-map { + cpu_map: cpu-map { cluster0 { core0 { cpu =3D <&cpu0>; diff --git a/arch/arm64/boot/dts/qcom/kalambo.dtsi b/arch/arm64/boot/dts/qc= om/kalambo.dtsi new file mode 100644 index 000000000000..fb5d68bd69d7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/kalambo.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "mahua.dtsi" + +/delete-node/ &cluster0_pd; +/delete-node/ &cpu_map; +/delete-node/ &cpu0; +/delete-node/ &cpu1; +/delete-node/ &cpu2; +/delete-node/ &cpu3; +/delete-node/ &cpu4; +/delete-node/ &cpu5; +/delete-node/ &cpu_pd0; +/delete-node/ &cpu_pd1; +/delete-node/ &cpu_pd2; +/delete-node/ &cpu_pd3; +/delete-node/ &cpu_pd4; +/delete-node/ &cpu_pd5; +/delete-node/ &cpu_scp_lpri1; + +&cpu6 { + power-domains =3D <&cpu_pd6>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpu7 { + power-domains =3D <&cpu_pd7>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpu8 { + power-domains =3D <&cpu_pd8>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpu9 { + power-domains =3D <&cpu_pd9>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpu10 { + power-domains =3D <&cpu_pd10>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpu11 { + power-domains =3D <&cpu_pd11>, <&scmi_perf 0>; + power-domain-names =3D "psci", "perf"; +}; + +&cpus { + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu6>; 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Similar to Mahua, it is pin-to-pin compatible with the Glymur CRD. It reuses the common CRD board description and drops the PMIC nodes not present on this design. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Gopikrishna Garmidi --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/kalambo-crd.dts | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index e05414290d8e..0ea4d6696aee 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -43,6 +43,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D ipq9574-rdp454.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq9650-rdp488.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D kaanapali-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D kaanapali-qrd.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D kalambo-crd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk.dtb =20 lemans-evk-camera-csi1-imx577-dtbs :=3D lemans-evk.dtb lemans-evk-camera-c= si1-imx577.dtbo diff --git a/arch/arm64/boot/dts/qcom/kalambo-crd.dts b/arch/arm64/boot/dts= /qcom/kalambo-crd.dts new file mode 100644 index 000000000000..b4441807f460 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/kalambo-crd.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "kalambo.dtsi" +#include "glymur-crd.dtsi" + +/delete-node/ &pmcx0102_d_e0; +/delete-node/ &pmcx0102_d0_thermal; +/delete-node/ &pmh0104_i_e0; +/delete-node/ &pmh0104_i0_thermal; +/delete-node/ &pmh0104_j_e0; +/delete-node/ &pmh0104_j0_thermal; + +/ { + model =3D "Qualcomm Technologies, Inc. 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2d04b15d26esm719635ad.76.2026.07.30.23.14.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jul 2026 23:14:54 -0700 (PDT) From: Gopikrishna Garmidi Date: Thu, 30 Jul 2026 23:14:40 -0700 Subject: [PATCH v4 4/5] firmware: qcom: scm: Allow QSEECOM on Kalambo CRD Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260730-b4-kalambo-crd-v4-4-e458f8b08114@oss.qualcomm.com> References: <20260730-b4-kalambo-crd-v4-0-e458f8b08114@oss.qualcomm.com> In-Reply-To: <20260730-b4-kalambo-crd-v4-0-e458f8b08114@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Pankaj Patil Cc: Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov , Gopikrishna Garmidi X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1785478489; l=984; i=gopikrishna.garmidi@oss.qualcomm.com; s=20260102; h=from:subject:message-id; bh=jkWeTjrNI+xze3hIGsedzEI8x6ITSkIXkZnnxBafFoc=; b=9FkTobWKSq3OTUgsN8Rw8LGKU4eULjMRN36hqMDr6rhVEyM1jYx8jEP4ZdopWea68YbW39ia/ QD9rc4j/0smDh/zukabBcFD+B51HmsiVuyjkpwacpsSXdpL8mxdHYPb X-Developer-Key: i=gopikrishna.garmidi@oss.qualcomm.com; a=ed25519; pk=TkSjNEhrfsj90i3wkABTZtAjLNr2cfYsujaTvyOIDsE= X-Proofpoint-Spam-Info: AW1haW4tMjYwNzMxMDA0MCBTYWx0ZWRfXzBLaHybXf5B4 lH0tUox/HK3cQcYZdujvi6FF4EAmM4w8Dic3KnciVERcgChfM8F6TSjmrDMBFugU37IQzxVFiqn mour17gpEYwap3t/+db1KWHrf8wuxig= X-Authority-Analysis: v=2.4 cv=fojsol4f c=1 sm=1 tr=0 ts=6a6c3d60 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=sPeBD9Pss2NjrgU8DtoA:9 a=QEXdDO2ut3YA:10 a=zZCYzV9kfG8A:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: R6DQeIU850fdWwIPs9iKs99kuOJMneTN X-Proofpoint-ORIG-GUID: R6DQeIU850fdWwIPs9iKs99kuOJMneTN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzMxMDA0MCBTYWx0ZWRfX8JjNOeHNtV0n gyvYfnyC0DdjfUF/n2g0YxC+D0AdBiRuPxnxc4KbQsdzGUf3GhvNhShOKwhd7quaT1XaYGVKSur 4Xr+T/6zW9yT079xLSNq5EGF0cxPzQiSJzjIPr6sPwjZCcF8MR53NcmKAqTlMFHzEFJ/u3F+zpt 4AhyQYFzfVH3X8B1OrR5ne3DofBjQZRkYCjI9+YHE5J93mPHvXaXlnxExhgs2oYl2w5zVzYg8DU k7wZw8zlQ0tY0LTfBzv0MdooUX1cel4FPjBt2jPIruYeJATNOsm8YPXqIPIereAgEnYAdzYNmTp anCpJBgUpnXTtKmmTGTNzAG3nwgVO3GS7TGLpai4tFtqlVmMdo7myW6Bsjsu8TDto+n9qm5vwL3 k5O/QxQapaTR2SvfdMt/HXhZECO2LOzMQc90Rbi47F36y8/n4hbDLgtBoY3t2lGnbb1CMXRdgRx 99WOpe22cFi92BV+g2Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-31_02,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 impostorscore=0 clxscore=1015 malwarescore=0 phishscore=0 adultscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607310040 Add Kalambo CRD board to the QSEECOM allowlist for enabling access to efivars. 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Add the Kalambo compatible to the UBWC configuration table to enable support. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Gopikrishna Garmidi --- drivers/soc/qcom/ubwc_config.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index 0209a02c390f..c5f79210ad52 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -112,6 +112,7 @@ static const struct of_device_id qcom_ubwc_configs[] __= maybe_unused =3D { { .compatible =3D "qcom,eliza", .data =3D &ubwc_5_0_hbb15 }, { .compatible =3D "qcom,glymur", .data =3D &glymur_data}, { .compatible =3D "qcom,kaanapali", .data =3D &ubwc_6_0_hbb16 }, + { .compatible =3D "qcom,kalambo", .data =3D &glymur_data }, { .compatible =3D "qcom,mahua", .data =3D &glymur_data }, { .compatible =3D "qcom,milos", .data =3D &milos_data }, { .compatible =3D "qcom,msm8226", .data =3D &no_ubwc_data }, --=20 2.34.1