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([27.60.19.161]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-314bc548e29sm918244eec.15.2026.07.24.09.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jul 2026 09:47:13 -0700 (PDT) From: Atharva Tiwari To: Cc: Atharva Tiwari , Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andreas Noever , Mika Westerberg , Yehezkel Bernat , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Jarkko Sakkinen , Mimi Zohar , Roberto Sassu , Dmitry Kasatkin , Eric Snowberg , Paul Moore , James Morris , "Serge E. Hallyn" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-integrity@vger.kernel.org, keyrings@vger.kernel.org, linux-security-module@vger.kernel.org Subject: [PATCH v4 1/2] treewide: Add a flag to detect the Apple T2 chip Date: Fri, 24 Jul 2026 12:46:36 -0400 Message-ID: <20260724164641.2239-2-atharvatiwarilinuxdev@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260724164641.2239-1-atharvatiwarilinuxdev@gmail.com> References: <20260724164641.2239-1-atharvatiwarilinuxdev@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a flag to detect Apple T2 chips on Intel Macs. Cache the result to avoid repeated checks. That will be used in upcoming patches. Signed-off-by: Atharva Tiwari --- arch/x86/kernel/quirks.c | 37 ++++++++++++++++++ include/linux/platform_data/x86/apple.h | 5 +++ .../platform_certs/keyring_handler.h | 8 ---- security/integrity/platform_certs/load_uefi.c | 38 ++++--------------- 4 files changed, 50 insertions(+), 38 deletions(-) diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index a92f18db9610..6651e5d4d106 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c @@ -664,8 +664,45 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2083, q= uirk_intel_purley_xeon_ras bool x86_apple_machine; EXPORT_SYMBOL(x86_apple_machine); =20 +bool has_apple_t2_chip; +EXPORT_SYMBOL(has_apple_t2_chip); + +static const char * const __initconst apple_t2_models[] =3D { + "MacBookPro15,1", + "MacBookPro15,2", + "MacBookPro15,3", + "MacBookPro15,4", + "MacBookPro16,1", + "MacBookPro16,2", + "MacBookPro16,3", + "MacBookPro16,4", + "MacBookAir8,1", + "MacBookAir8,2", + "MacBookAir9,1", + "Macmini8,1", + "MacPro7,1", + "iMac20,1", + "iMac20,2", + "iMacPro1,1", +}; + void __init early_platform_quirks(void) { x86_apple_machine =3D dmi_match(DMI_SYS_VENDOR, "Apple Inc.") || dmi_match(DMI_SYS_VENDOR, "Apple Computer, Inc."); + + if (x86_apple_machine) { + const char *product_name =3D dmi_get_system_info(DMI_PRODUCT_NAME); + int i; + + if (!product_name) + return; + + for (i =3D 0; i < ARRAY_SIZE(apple_t2_models); i++) { + if (!strcmp(product_name, apple_t2_models[i])) { + has_apple_t2_chip =3D true; + break; + } + } + } } diff --git a/include/linux/platform_data/x86/apple.h b/include/linux/platfo= rm_data/x86/apple.h index 079e816c3c21..47b27dceab18 100644 --- a/include/linux/platform_data/x86/apple.h +++ b/include/linux/platform_data/x86/apple.h @@ -6,8 +6,13 @@ * x86_apple_machine - whether the machine is an x86 Apple Macintosh */ extern bool x86_apple_machine; +/** + * has_apple_t2_chip - whether the machine has the Apple T2 chip + */ +extern bool has_apple_t2_chip; #else #define x86_apple_machine false +#define has_apple_t2_chip false #endif =20 #endif diff --git a/security/integrity/platform_certs/keyring_handler.h b/security= /integrity/platform_certs/keyring_handler.h index f92895cc50f6..a355f4400179 100644 --- a/security/integrity/platform_certs/keyring_handler.h +++ b/security/integrity/platform_certs/keyring_handler.h @@ -45,11 +45,3 @@ efi_element_handler_t get_handler_for_code_signing_keys(= const efi_guid_t *sig_ty efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_type); =20 #endif - -#ifndef UEFI_QUIRK_SKIP_CERT -#define UEFI_QUIRK_SKIP_CERT(vendor, product) \ - .matches =3D { \ - DMI_MATCH(DMI_BOARD_VENDOR, vendor), \ - DMI_MATCH(DMI_PRODUCT_NAME, product), \ - }, -#endif diff --git a/security/integrity/platform_certs/load_uefi.c b/security/integ= rity/platform_certs/load_uefi.c index c0d6948446c3..b4096d4c828d 100644 --- a/security/integrity/platform_certs/load_uefi.c +++ b/security/integrity/platform_certs/load_uefi.c @@ -3,42 +3,16 @@ #include #include #include -#include #include #include #include #include +#include #include #include #include "../integrity.h" #include "keyring_handler.h" =20 -/* - * On T2 Macs reading the db and dbx efi variables to load UEFI Secure Boot - * certificates causes occurrence of a page fault in Apple's firmware and - * a crash disabling EFI runtime services. The following quirk skips readi= ng - * these variables. - */ -static const struct dmi_system_id uefi_skip_cert[] =3D { - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro15,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro15,2") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro15,3") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro15,4") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro16,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro16,2") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro16,3") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookPro16,4") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookAir8,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookAir8,2") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacBookAir9,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "Macmini8,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "MacPro7,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "iMac20,1") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "iMac20,2") }, - { UEFI_QUIRK_SKIP_CERT("Apple Inc.", "iMacPro1,1") }, - { } -}; - /* * Look to see if a UEFI variable called MokIgnoreDB exists and return tru= e if * it does. @@ -165,10 +139,14 @@ static int __init load_uefi_certs(void) unsigned long dbsize =3D 0, dbxsize =3D 0, mokxsize =3D 0; efi_status_t status; int rc =3D 0; - const struct dmi_system_id *dmi_id; =20 - dmi_id =3D dmi_first_match(uefi_skip_cert); - if (dmi_id) { + /* + * On T2 Macs reading the db and dbx efi variables to load UEFI Secure Bo= ot + * certificates causes occurrence of a page fault in Apple's firmware and + * a crash disabling EFI runtime services. The following quirk skips read= ing + * these variables. + */ + if (has_apple_t2_chip) { pr_err("Reading UEFI Secure Boot Certs is not supported on T2 Macs.\n"); return false; } --=20 2.43.0 From nobody Fri Jul 24 20:51:04 2026 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23EA6448393 for ; Fri, 24 Jul 2026 16:47:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784911647; cv=none; b=aa9wL53Ql8qMy8Mm9MEQapqrSo8m/hrVbjhV0bGFp64NshVM+qinvZUT6LXNXTON6ww10FV7mlyJ54qisBbN0dCy3W8B++M8RCyOrD/MBKc2wcXYLN9BsnSAyanVC6mS+kd42scivsdVT2B38Q0pM/A6EbbFKM8P7JHIQn6TDp0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784911647; c=relaxed/simple; bh=FFFpGIB531o8c167/WQHpfJrFsCnpwaLHErYAnoCO+0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FFIvVcwetN75rUmcSW1s+rg37qVBaa8fuvhlBtTc1yEJDQ860YXnR2YNjvZbUmLdTokcrEkJ2TqXu7E5y6JzfwdmCUc11dMzbLt8Qc9eXjRRQr2Kpqjm4OlkOEhl9bd3AkpSsUYm0YPovZpPZH2zF3GPepPX7qEdA8qqZ9Tqb3c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ZnS2G3kU; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ZnS2G3kU" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2cc891373e0so7831635ad.2 for ; Fri, 24 Jul 2026 09:47:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1784911645; x=1785516445; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=5u91OXTJKFbcF00+Q/uuRlO/lNDvMJ8xKMudAoQ8DSI=; b=ZnS2G3kU8JXYzF7dwokX3zdAS7zVDQONicp0aDUtzst9uqgARTGf6Vxkye1NSibgbM fCnu+/Jzawcq4/utKzpXlzi0LCOWA24UK3OVqpPy71WruK1qV7Fssr3TzzJRaKZyi8uw bhV0e/+VbMWkh5MFqg23A0VLOvSyuDh3XldLIVJ0luGA6VMiFToXXpO2S3I+HZJziGb3 bmVBRfcBjrUJysYpWNZJu3w0KwOmfDoS/rmwo4w9JpW8kN+CiJ+eWVDqqsEQqw9D5tCn /dQay/pw157P1yBrbZdUwUx/o/WK6OMRQ1ISkFi7figPThchF/0aBvThivejccYviuFM 7/yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784911645; x=1785516445; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=5u91OXTJKFbcF00+Q/uuRlO/lNDvMJ8xKMudAoQ8DSI=; b=lR6MGFpTdcilIcnYxsBhrNsm47vY0krs3/N9viC9hLV4V4jBMOLyij3LVM3M06UVGQ nfHvklBrnYl7XB42JcimPDUMsPBHz+BeM9V1cUAXVFzNiRNYaDWd3reRomiCngXP2WaL lkn2m06nD53D247X/utOq3DxKGi3y9KJIkQGotmm2UZKk0xBg/E/Ic+0+5NxkodGSIWc /2G/eGXnu/zYLblCB2ufNx8ZUGsxU7x9POyak/jZAXP00rOXj8EhF2HvGaD0RCi/XNnJ yO3Y+wId7xTT8EhLsGimdOYgGnZSRl/hdUTCS+qzixOfsi1muVPZ+vryX9+t0KGoCPxA T/0Q== X-Forwarded-Encrypted: i=1; AHgh+RqRw43uWKfjn4tswDTYpN3aw7NusrYbVoXrdV60EbtWxnf7NY4gPZNmxvwpis2hoNHFeGji23DFtJW9dao=@vger.kernel.org X-Gm-Message-State: AOJu0YxLxZqCtEP79OBXk1iuml9ebrO5L6gyf8CFMc7X/FoSY8Ksalc3 JnXC2c8BUBhtqfzlsAk2zXb0XAn9ngCQNd6waayBAdWFuUozUZFjO4o= X-Gm-Gg: AR+sD10BxHFLV38QQsQLAjCozxlTonvAcz3JmlRrd1QVBOvqI/VYQ2BfrCepihuJIwp QgE3LfXAWyclniG2gOEKGnnn8PiP+nvuf1S61XAD8TQIcanGeOqML3nrc3qTf3oJB/g7TLF8nuE FA1qAplJjneTeIWbDMvpWFky1x34IXR+rRdR/5nXxEnN1L5c2+2QyDqMupz+UXW3uHJBi8XgsYf 1J3Dyo/rFgtRIqTL6AFSzgBIAR15rudcRxgqBEVEToGG3jtgZr9ljq0j64CMXz2ERFjl9qhMNcz KogEihB5T98pIGkLa6yPzHmEblVuCvyYothmLwd+iqtIp4a/B0O4BJ4bvTNnxRr49wY87TiNWQ8 I+7X9ZM+onKXQRImGTfJlZ3s4pO0n6PkGs3qdHH0gs1zg8o/yGxeEKHiwJEWmwqHzwGzclzZJYV 4mvp3j05vXCj26GpLu5SmV9k9Fx5v3O+ilXh4AqQ== X-Received: by 2002:a17:902:ecd0:b0:2c6:9f6a:9f6f with SMTP id d9443c01a7336-2cfa6c66734mr90588615ad.28.1784911645204; Fri, 24 Jul 2026 09:47:25 -0700 (PDT) Received: from at-Standard-PC-Q35-ICH9-2009.. ([27.60.19.161]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-314bc548e29sm918244eec.15.2026.07.24.09.47.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jul 2026 09:47:24 -0700 (PDT) From: Atharva Tiwari To: Cc: Atharva Tiwari , Andre Eikmeyer , Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andreas Noever , Mika Westerberg , Yehezkel Bernat , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Jarkko Sakkinen , Mimi Zohar , Roberto Sassu , Dmitry Kasatkin , Eric Snowberg , Paul Moore , James Morris , "Serge E. Hallyn" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-integrity@vger.kernel.org, keyrings@vger.kernel.org, linux-security-module@vger.kernel.org Subject: [PATCH v4 2/2] thunderbolt: Add device links for Apple T2 NHI Date: Fri, 24 Jul 2026 12:46:37 -0400 Message-ID: <20260724164641.2239-3-atharvatiwarilinuxdev@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260724164641.2239-1-atharvatiwarilinuxdev@gmail.com> References: <20260724164641.2239-1-atharvatiwarilinuxdev@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Andre Eikmeyer Icelake Thunderbolt NHI on T2 Macs (2018-2020). The NHI and its associated PCIe root ports all sit directly on the root complex with no upstream port. Apple's ACPI tables name Thunderbolt root ports as TRP0, TRP1, etc. Find them and create device links back to the NHI so that PCIe tunnels can be re-established after sleep. And on other Thunderbolt NHI's, like Titan Ridge, the default method is used to add device links. Co-developed-by: Atharva Tiwari Signed-off-by: Atharva Tiwari Signed-off-by: Andre Eikmeyer --- drivers/thunderbolt/tb.c | 58 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 2 deletions(-) diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c index c69c323e6952..625451ff3ea0 100644 --- a/drivers/thunderbolt/tb.c +++ b/drivers/thunderbolt/tb.c @@ -6,9 +6,11 @@ * Copyright (C) 2019, Intel Corporation */ =20 +#include #include #include #include +#include #include #include =20 @@ -3305,21 +3307,73 @@ static const struct tb_cm_ops tb_cm_ops =3D { static bool tb_apple_add_links(struct tb_nhi *nhi) { struct pci_dev *upstream, *pdev; - bool ret; + bool ret =3D false; =20 if (!x86_apple_machine) return false; =20 + /* On T2 Macs with Icelake thunderbolt NHI's. + * the root ports are stored in ACPI as TRP0, + * TRP1, etc. Find them and create device links + * so that PCIe tunnels can be re-established after + * sleep. + */ +#if IS_ENABLED(CONFIG_ACPI) + if (has_apple_t2_chip && (nhi->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_IC= L_NHI0 || + nhi->pdev->device =3D=3D PCI_DEVICE_ID_INTEL_ICL_NHI1)) { + struct acpi_device *adev; + unsigned int slot, func; + const struct device_link *link; + const char *bid; + + for (slot =3D 0; slot < 32; slot++) { + for (func =3D 0; func < 8; func++) { + struct pci_dev *current_pdev __free(pci_dev_put) =3D + pci_get_slot(nhi->pdev->bus, PCI_DEVFN(slot, func)); + if (!current_pdev) + continue; + + if (!pci_is_pcie(current_pdev) || pci_pcie_type(current_pdev) !=3D + PCI_EXP_TYPE_ROOT_PORT) + continue; + + adev =3D ACPI_COMPANION(¤t_pdev->dev); + if (!adev) + continue; + + bid =3D acpi_device_bid(adev); + if (strncmp(bid, "TRP", 3) !=3D 0) + continue; + + link =3D device_link_add(¤t_pdev->dev, &nhi->pdev->dev, + DL_FLAG_AUTOREMOVE_SUPPLIER | + DL_FLAG_PM_RUNTIME); + if (link) { + dev_dbg(&nhi->pdev->dev, "created link from %s\n", + dev_name(¤t_pdev->dev)); + ret =3D true; + } else { + dev_warn(&nhi->pdev->dev, + "device link creation from %s failed\n", + dev_name(¤t_pdev->dev)); + } + } + } + return ret; + } +#endif + switch (nhi->pdev->device) { case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI: case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI: break; default: return false; } - upstream =3D pci_upstream_bridge(nhi->pdev); while (upstream) { if (!pci_is_pcie(upstream)) --=20 2.43.0