From nobody Fri Jul 24 22:17:34 2026 Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 943B0175A99 for ; Fri, 24 Jul 2026 04:49:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784868545; cv=none; b=HUqaFYC5oDvvwvTTSAe1NYzKBVxPZgKDgO6pxrTmNOQ3Kjju6QlNPJdqKk19ugsXzp2atioxpwcBk7NF0Hn9oALqQA0YJx9dW4WjfX/YwwaGXbGGZuNwe8IMgvOiAFU/qoUvJlFwmuubJqkwHo1Kiq9rQ1ZQAkamd89mwRT6aqE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784868545; c=relaxed/simple; bh=jmxbrwT0ACsQ5mOq/PoKuhVXWl4DvzOqPCq0ZqbjROM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=RT15GUGF0QHbK/2iVvkVSQNVT2Jh4BH1oUzNSPnlWJ7CoXkKbNieTLUKZnsprle7HJ/geCu+rjkWkid9a6PVkKX4gSRppKLzczLxFyh3JFZ0EgS9ngahjewOmLmia4z1O7PXJTzafRpdTXYJEZuM5LsqFxcvyiFtSPgFqlpQhAM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=loG6h9mx; arc=none smtp.client-ip=209.85.214.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="loG6h9mx" Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-2caea3f742bso604635ad.0 for ; Thu, 23 Jul 2026 21:49:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1784868544; x=1785473344; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to:content-type; bh=t4o8yWR70SV8gvAgkdxuV0aAhEqNnVvORCWUZx0xUnU=; b=loG6h9mxow+qBNioQXkgpKr1gTkKojfsbnQvcmW6tWtWiFUKMBU0GQzsqljt64fDnt fTCCc0Qc/mZrm1X9AyvqmfIbePZr01ck6ywQdfUgWLlQ/KncwZ07fmgPfKj4J9GHxmoQ 3u/UBVUJxZfinG2NFQFCx3DvOEiPMAiU3LrGGgIdXIzTkx3OQ3naHqJ22WdGDfqmJE2E +UgySEQmrDho0O6R4U/sq+NV7UQa0d6Z6Jg4ZF9OPG+Pgf0mk2ha6dHVXXJbkXesOU7x I9hXBMDKn7Vi2BYxqIfFoGB70O1azo/s/+jwNrip4tAXAY6tcdq1x+ot726jFuOEdA1u xyEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784868544; x=1785473344; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=t4o8yWR70SV8gvAgkdxuV0aAhEqNnVvORCWUZx0xUnU=; b=sl4ZvNrj5m5SYMEspjlw/jYvPX6cUzLofbkKp6lICVMVcEpUCgWn0T7h7AjfnIvDUl bAI0wHKOcpUfS5vGWYs3iqSvtFKTedBCoP7J82HlxiZOd/3FFCA4Xsy3fNa6NmUmaOu9 98voVwZZoOrzmLnx9G5ioJnUETGg+mT7rIQDHEXGa2Erf21GjuIIRHda4umtVj/D0IOp +N32RVgKAPR8bhS2/6WEgIlDUUO/mweQIxxT0VHHm1ckVWaIAIQKPUqAbVNgYNAxgxbV yfMbZBkSuQ82BQn1hfA/rogqg6odsrnlgUbwcea9mb0F2maK7rTiHcGPHtZWXZBN8tc4 bjTw== X-Forwarded-Encrypted: i=1; AHgh+RrmO1gZ8FgwFtOeNTeobZjFMGZqKn+uA/vlmYNX9sR/5MfWBfA6Be7sYoOpyAnX8SwqnShw3BZ5nezmO+M=@vger.kernel.org X-Gm-Message-State: AOJu0YykFp7a7+37EHNn0YBZz6Tzt1q6mVAgbmqTegrjbEjCR+N9tQLI 5ip6FNW4L18P0s+LpqZOqIhBEripBfrwXhEz32QDLsEyvPmG2g7YI10= X-Gm-Gg: AR+sD129m+gJdhw8+oYca/widHP2LM4FPCTPLj6eM3RpFDJhtTbPmBiVDJo0mHmvSTY +Dlwp4qVp1xCO+imbyE+YyWmgC7Jb2bH0DjKhhujvLZjU9oerA9wQc6/3Hr3lBgcAjKGjwpaiTP NXrARv/GODqauNj3HsRRxoJW53kt/vYt698O4sKsWBLIpWrg2/UmYZLRHleEMNz8pf06klEPL6A vm0/8hdG+vkijRwfDdBbogA/udscLPs8pTYf2TEvZvuevcWf514Xhd3m/XatDqA3msAk8mP6BiB LQnSdxFhXPIGpKJjqyAnX0PNyFJHkbIUym89/WgSwKf5ET1GXzEzmtf2P7i2wNKvJEpCIEtJ2XN p5T3xreBr9qxhvsE5NUgwDD+/ylad13Yttm14Af9NEW0mfB/YboGn8QrD+HUQs0uV9ouBNFVsOE WDSU4G3yBah6V4+gCQCjzcgH7DW8A= X-Received: by 2002:a05:6a20:b08d:b0:3c3:bbe6:95c9 with SMTP id adf61e73a8af0-3c44afccc22mr6236342637.16.1784868543731; Thu, 23 Jul 2026 21:49:03 -0700 (PDT) Received: from t-rex ([2401:4900:7b3a:ad08:5f07:2836:b3b8:b712]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3147dc9f2f0sm26926887eec.13.2026.07.23.21.49.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jul 2026 21:49:03 -0700 (PDT) From: kr494167@gmail.com To: ukleinek@kernel.org Cc: george.moussalem@outlook.com, quic_devipriy@quicinc.com, andersson@kernel.org, baruch.siach@siklu.com, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Surendra Singh Chouhan Subject: [PATCH] pwm: ipq: prevent potential 32-bit integer overflow in hi_div calculation Date: Fri, 24 Jul 2026 10:18:54 +0530 Message-ID: <20260724044854.33274-1-kr494167@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Surendra Singh Chouhan In ipq_pwm_get_state(), hi_div was calculated as: hi_div =3D hi_dur * (pre_div + 1); hi_dur and (pre_div + 1) are both unsigned int (32-bit) values. Evaluating their multiplication using 32-bit arithmetic before assigning to the 64-bit u64 hi_div variable can overflow 32-bit unsigned math. While effective_div explicitly uses (u64)(pwm_div + 1) * (pre_div + 1) to prevent overflow, hi_div was missing the (u64) cast. Fix this by casting hi_dur to (u64) before multiplication, matching the precision used for effective_div. Fixes: c436e3e9c265 ("pwm: Driver for qualcomm ipq6018 pwm block") Signed-off-by: Surendra Singh Chouhan --- drivers/pwm/pwm-ipq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-ipq.c b/drivers/pwm/pwm-ipq.c index c53373948136..e27ddc8e9fea 100644 --- a/drivers/pwm/pwm-ipq.c +++ b/drivers/pwm/pwm-ipq.c @@ -186,7 +186,7 @@ static int ipq_pwm_get_state(struct pwm_chip *chip, str= uct pwm_device *pwm, state->period =3D DIV64_U64_ROUND_UP(effective_div * NSEC_PER_SEC, ipq_chip->clk_rate); =20 - hi_div =3D hi_dur * (pre_div + 1); + hi_div =3D (u64)hi_dur * (pre_div + 1); state->duty_cycle =3D DIV64_U64_ROUND_UP(hi_div * NSEC_PER_SEC, ipq_chip->clk_rate); =20 --=20 2.55.0