From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E75254908AC for ; Fri, 24 Jul 2026 00:00:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851225; cv=pass; b=fLaspOOIaJn4Xf67I7XtBQ+YgZJSN9nm7nzzknyNCKoJVSBHuk1UhmapQJ3JujMO7nqSEv9BauxeXLgIharB+8fFMtXf10x4rTVDjwVtDHYkxjoyf8OswpVoRh00bkGXbmbEX3SbRAh09pYweP9FhJeO2vBSNa7MJAdCPYhTnFU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851225; c=relaxed/simple; bh=s+TFqnBLyffcvvRdt+XgtQK5ewLRucmgSP4lvTByoVM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eKiAiVAI5UaJXblYrh8DDtIWBR2dXEqdqvP0W7pmKJ2LjW1786B8mfN9l8Y0oO/h9IFJnied1jmbej3yIGPjfJNsDyw5dgG6+gVqlJUw5r5Sx3YtHZvvRusX3nBwIN64BzSJA/jVAzzshcYTgqyjm5WvE5CPzINYX7kvDW+UqNw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=cGp3TBsx; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="cGp3TBsx" ARC-Seal: i=1; a=rsa-sha256; t=1784851193; cv=none; d=zohomail.com; s=zohoarc; b=hZFmM5vPl0SYj6YFlsYqnwvT3iFn6Vb54QTRGyH/QECnAUPvC8XGkOqTh16KLRyHKsQYzHdGUfEQRjAFsYLb5ldnLc5PQDmvGGssY3fc2DENmxgzzdyt+5MdKLgDHoXVihYjGD0IWK9xv7glegrXwE6vtKU24IFSSmsvYniWgVQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784851193; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=nzqJgETVkBIGkNjZS88+/BocleoPmjMybUJQH20vWSY=; b=DLApQv0kp2V8rigQA95i3OPWvaRXOfze/HdHxhU+aZrT7OMeUfkb89ylq7BAYs0RMvzfDl82mpy0xA28yakDkYz62H0hxNt29Jmhbi1MBEKeqnw3cqByzWPBJN/lf+vXLs8w0U0TNiacxFbaRtP6Khv5RbodGDpME7/lZ5SwzdU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1784851193; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=nzqJgETVkBIGkNjZS88+/BocleoPmjMybUJQH20vWSY=; b=cGp3TBsx1FPuYyXMnSDjSg3pKDDun1ZhiR/iDNppm23PqsotEbyaFX5TuVIY5NS+ GEIb4XJUGxhH11ufc0e6iNCxuEJjjtmD6OuyeeXH2UFh+rIr55SBZC8RaMjWFBIc5QG Eqy6lKBJ6mPupgCAiGlYLsj7a3RxJJlfS+bs8aFg= Received: by mx.zohomail.com with SMTPS id 1784851192170589.3654331289381; Thu, 23 Jul 2026 16:59:52 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:58:54 +0100 Subject: [PATCH v3 01/13] drm/panfrost: Check another bo field for cache option query Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-1-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong , Claude X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1159; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=s+TFqnBLyffcvvRdt+XgtQK5ewLRucmgSP4lvTByoVM=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqroT4QpjEyKhJbOJHCqUZ/aQmQeSIkJKDXG3 Wm5uwwGXZSJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PVVBC/9H/FKJsYL4jQOBDDJpIeAKslG7MoXaE58d7JGMq3kFEFL+GitO4mjkHcJLCG3UlmZPs7a DkWJQwHIXbWor3Tk3NEh79WNhSR6LxUWroLRUduc8y3E5C7x3THMiQOZOdsgH5moU1HraJSJRpQ SOip3IeiJsza2N48oo39CBKBqGEAvoSvnfPqAa7F13Xo05ZR01QSh7/7oaJXKkNyDmDxssXMPXa Ch5AA0ezN24DTKJ9/l46TmJh4GmxetZ/yx5AaQ8xKC86ZnJ318pZWQ6Uo4h1GWwuJiEJCy356pp HFpIwDFrBOA/Rd7J2hSJx0DrZ56OYkpXZpzl9puavVcbTu+O15o/hCU05K8h/XZgbXMBergqSl0 /uSJMn0+0gH6Gw8OiP3OdsfnlEDO60wS1+t+jwkTo7FeKwcsbPc/KjGhb4IYMlhKbS6HjM95/ae z9Ws/YQ4EzI+w69erXgGDYA9tDcbgDs3Qt57nmEETJzlpY/3/XZub0q4W4oWRO8QaV/EE= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D When querying the properties of a BO, whether it was created in Writeback caching mode for userspace mappings, is recorded in a Panfrost BO's wb_mmap field. Reported-by: Claude Closes: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/88 Fixes: 62eedf1ccba5 ("drm/panfrost: Add flag to map GEM object Write-Back C= acheable") Reviewed-by: Steven Price Reviewed-by: Boris Brezillon Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 784e36d72c2b..2e931fa90da0 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -661,7 +661,7 @@ static int panfrost_ioctl_query_bo_info(struct drm_devi= ce *dev, void *data, if (bo->is_heap) args->create_flags |=3D PANFROST_BO_HEAP; =20 - if (!bo->base.map_wc) + if (bo->wb_mmap) args->create_flags |=3D PANFROST_BO_WB_MMAP; } =20 --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AF74175A93 for ; Fri, 24 Jul 2026 00:00:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851231; cv=pass; b=o50Dx1DSijgdkXZyJn8pAWaSV0APOjeqtWr6QMnnOW5aTJbJ4LopA1WStY6OnQtWeMqxj54tdAs1rzwA3M8DS5wo5M0+o+sFeJwSfF+N0xCQ0z7wN0nqu0t8+6DsA+KDnvAdLYzVH8YGl2/SkAC4C1VRlWzJh5aquM5ZHvy9nVk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851231; c=relaxed/simple; bh=KmSX2xO2oMOAg8fuJcOMeaL/KBIEeQEl8siBGL1Okqs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O2MhrX7KgIr2ynkMGe6FOqclDwJJtW66IjjfgCLJhKF7Ee2geBW1auBp37BitgII0gIyR+mI8mh0WvRddu3vJ9/ML6qaO+KLADsKis3bl9h0HnfbrIwEcaXExKNE9e2ZBoFnEPALSCAcs/Wuv2ZJ0JMPmxmCnK8Ry3Z1Hc4/rsk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=RX2xW2LY; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="RX2xW2LY" ARC-Seal: i=1; a=rsa-sha256; t=1784851201; cv=none; d=zohomail.com; s=zohoarc; b=nC7OGDAbB5qjsoIH4DF8tYh0uLm0zZ2acfnEKej5VaAMyQZKyFpTPQXu4l4QoAMg/11Qph2r0GewGeChoJs6tf50pfFyevbz8W94qIC18eMhjNrTRTG8Ei6lbRy0friJMb1aJS+hLY7VCubIRsP8jm5StkRJ26Q37uYcnPCBdH4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784851201; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=cBB3KVYTzBRWfE/3wJyq/uXFT6n9iMLLFB45XO/sSoI=; b=gzE+UCf5vknSLvcuo5g7pflOWXAkmNVjNnRlFhOfzyfQS/I1LGZj88TIE+sDOM5SOSwrbHymPR5F0EnAykFyZlnGtppgqxfiM4VRQiffGAypc58VRzUp/buyG0StdqawLqYYCooqL39BpQ8qeU5zgyicusM+GxFv0WMV/SV6DYg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1784851201; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=cBB3KVYTzBRWfE/3wJyq/uXFT6n9iMLLFB45XO/sSoI=; b=RX2xW2LYgwUhSHhC+kB0zks/qPSVMayN1jqg/M3hCjDj7DRA1NhHJU5KbnHrry4d IAj9wypxwjAFRMwHjtKodXw6gRU9iX7gBTEf+iVY03i31WLRsLQ+u06pzB5UqLJ3Zi2 FpRhiOhspAyOm0LfeNlCy28h097uls+/Q6iFebzo= Received: by mx.zohomail.com with SMTPS id 1784851198922516.7538518502511; Thu, 23 Jul 2026 16:59:58 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:58:55 +0100 Subject: [PATCH v3 02/13] drm/panfrost: Prevent division by 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-2-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong , Claude X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1204; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=KmSX2xO2oMOAg8fuJcOMeaL/KBIEeQEl8siBGL1Okqs=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqro/UpJ98pK0vSK69sC4NIi1EtoRTIfKWpuz 04NissK2vCJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PXX8C/9+BpLQcUnw123Qj4HVCpmkgUay8i6Q6P/c5h4hkqbkfqBxt3EUb/wqsS6IPC1Xg1gnNqL EAIErjbF6YrYSSA79d6umZDx8v7eb1+/0kppx4xUrmYj+ACrVHgSrDQFCM1zj4HBOBf9woknNj9 CmEZnxib+oLzfQYuME6E6Gc3UfmFKzOSwYH2xFnz3Sb3ckkQnjEuiLMTEpWZkLSE35qxTlOJCW2 kqvCaPUpuZ21lYekzEx/p6vNLnFPbiXySrdmLnQHjRqICLJe9nVnVCPAHLWNnJnIlTmARBuuZnk wF0eNIURS/6UIOxxhxU85CLXlx5vjrXHcdhj7+bKQWp2qNVGtp0DlK+pvRfkgJLPk3J2ENhtuXG tg+52kYkQMXuAd00vl4B//PhU08Yc+x8Xp5iF+GI7GsxnD4nePQtIEqBPFeLz49/6ItCro08lGW AX2SPUnNneDPE4lQkSFTZq8Sl3tzH6l/w7pCA0O0/Fr7YCcgKDeWsr6oNF3iuqYKwEkac= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D When updating and debug-printing devfreq stats, in the very unlikely offchance that total device time is less than 100 ns, clamp it to 0 to avoid division by 0. Reported-by: Claude Closes: https://gitlab.freedesktop.org/panfrost/linux/-/work_items/88 Fixes: f3ba91228e8e ("drm/panfrost: Add initial panfrost driver") Reviewed-by: Steven Price Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/= panfrost/panfrost_devfreq.c index b51c30778811..0fe81d259274 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -78,7 +78,7 @@ static int panfrost_devfreq_get_dev_status(struct device = *dev, =20 dev_dbg(pfdev->base.dev, "busy %lu total %lu %lu %% freq %lu MHz\n", status->busy_time, status->total_time, - status->busy_time / (status->total_time / 100), + status->busy_time * 100 / MAX(status->total_time, 1), status->current_frequency / 1000 / 1000); =20 return 0; --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA8D71DE4EF for ; Fri, 24 Jul 2026 00:00:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851233; cv=pass; b=ah9ZDqkXELxkGTQTLeHBHPbs78m+BySYcW5MqVY8UFu0FYX/P1qczV/9zfOL+K5v5Gvvzh1tDvjxKdMBA9+OAp5vq8MHs4QG5yFYflYBkf8gJBUl38DfWzW4Lx7mHOazp/NtR+IUOMjlD88lh55y7jktiFWgVLqyDkNfixg/8jA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851233; c=relaxed/simple; bh=O25ujp75xoczWqfZkgJjzvV7Yz1Pjgp3Puq391G662I=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eI6neq6Z6p61l2b1LwxhDpUgNc+J08H480TaltrCOljM8QVWwvSy4JW/dBTtML08E/gIp2WV8CNvS3lsIhI1K284U7oa46ExVYefEz+WkBg+GL+43Y0jhyO355GhIGXKTE7ygH/xINNqKBY7naVweWH268eVTFcCM+PtAqYoi7I= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=SUUM1CZt; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="SUUM1CZt" ARC-Seal: i=1; a=rsa-sha256; t=1784851207; cv=none; d=zohomail.com; s=zohoarc; b=Vo1wgTcyVqYV6eGn6e0Xfa+yZ2Q7+eAQ8WaTYeHZVn/pChXlhYA3bdGffC35kwEcvL+Qs2bEZSqmuwo4o7tWvo/ieMBtqY3X/k7CAT1QXKkE9H55EuV4lwlGPZnNDl5RkZbmThpyVn3EDOT8rISjUlSKZqkHLbz3eaEEbblta/g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784851207; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=uP9JDNjIuM7429b59kQKnwdLdN1fmwoS5yZiDgLBDLw=; b=i0XgX2pUrSEAK0Ktz3WAouWF3T2V1E3L1YTI1fLM4xOHG2528kMZ5WSWVQ86+k/tHLDP6x9mhRunhuoSy5yXwqfBLfA69GCkhzSInCvYImJdy9GoJRymEMsnT0ss2FE/NJowXXEdwXDarhYOD7v70YNPDozqb288YhK+EkNoAdw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1784851207; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=uP9JDNjIuM7429b59kQKnwdLdN1fmwoS5yZiDgLBDLw=; b=SUUM1CZtNJRRmE5hPU29o2nov48XVP8oNqqBBEcT4xz91h6XJTwvfJDX+fs27cNn pP+xdr4YfVxga2CRJMTkcknqugKk9NEH3k53j3VIgabpbQWRsjPzjoLBeA5vC3llD+i IntZXQpvo8PWp7DbNaAhy+XRwBbAPOlbAKIZhq+Y= Received: by mx.zohomail.com with SMTPS id 1784851205270362.16637200217474; Thu, 23 Jul 2026 17:00:05 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:58:56 +0100 Subject: [PATCH v3 03/13] drm/panfrost: Remove unnecessary header file include Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-3-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. 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a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D None of panfrost_features.h definitions are used in panfrost_device.c Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 7fed22d555a5..d8421fd6a662 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -11,7 +11,6 @@ =20 #include "panfrost_device.h" #include "panfrost_devfreq.h" -#include "panfrost_features.h" #include "panfrost_gem.h" #include "panfrost_issues.h" #include "panfrost_gpu.h" --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BCF181DE4EF for ; Fri, 24 Jul 2026 00:00:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-4-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5819; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=6aNxR51IE0VlgmxKlgYtYVS00QsAQoyjjIb2FYf3BYs=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqroOzbcIrnJkOUhHkVGLbwiLyF56exlR+fUm nKJZ+747NeJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND Pdy0C/4qouXLcOJt9nsAN3AYB0MLrd/kO8yk52bHEzymmNNZfJcpT1/lECj5Pi43nLKdrtbi8fj h5JHEs+kwsxKJw8AL/bnVlvcML4vnaVWmT+rulw99FqToRV61y8hy9kESvZChoUsKAG8GLXi6sk KNt+P114fbfLRTHgHHfLOOe4rHwLjpSrhThiENiJNQQ4OIdqewNn4KEjwa+R/fQgYAzPFd0Yd3W cEfn1OL18OI3crhNi8TwTQsnFalzeBLw+KtFtEwZyLj8r51uhrSe7mA4OsaXNmBKfalbabFYscw TUjFWZAHdzIjkBTriy7uEfUSS69c+qboPZ1DA7FPjrmwzoOjyCDtl+FLt81AQLG6d0uxWTyi6HY OkW8UwZS2n+PS9BAb/guw3DHeP0jtXJ7bGUlogtEIQZOPcU+dBtNgqF5MHoL5sW18lrELPxDDjj cgeDc6dnLnOTxBMJ8UFPOWDI15oKyLxhCHW5kdv9ZvVUBQK2quzWuhz9u22ax0imESakk= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Since the moment we call drm_dev_register() the device should be in a position to accept jobs, so it's best if the shrinker is already initialized by then. On top of that, make shrinker functions take an panfrost_device pointer like other functions in the same sequence and rename them accordingly. Essentially mimic the init/fini behaviour in Panthor. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 8 +++++++- drivers/gpu/drm/panfrost/panfrost_drv.c | 6 ------ drivers/gpu/drm/panfrost/panfrost_gem.c | 6 ++++-- drivers/gpu/drm/panfrost/panfrost_gem.h | 6 +++--- drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c | 8 ++------ 5 files changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index d8421fd6a662..03905495aee2 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -281,9 +281,14 @@ int panfrost_device_init(struct panfrost_device *pfdev) if (err) goto out_job; =20 - panfrost_gem_init(pfdev); + err =3D panfrost_gem_init(pfdev); + if (err) + goto out_perfcnt; =20 return 0; + +out_perfcnt: + panfrost_perfcnt_fini(pfdev); out_job: panfrost_jm_fini(pfdev); out_mmu: @@ -305,6 +310,7 @@ int panfrost_device_init(struct panfrost_device *pfdev) =20 void panfrost_device_fini(struct panfrost_device *pfdev) { + panfrost_gem_shrinker_fini(pfdev); panfrost_perfcnt_fini(pfdev); panfrost_jm_fini(pfdev); panfrost_mmu_fini(pfdev); diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 2e931fa90da0..331a3bd5b98c 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -1002,14 +1002,9 @@ static int panfrost_probe(struct platform_device *pd= ev) if (err < 0) goto err_out1; =20 - err =3D panfrost_gem_shrinker_init(&pfdev->base); - if (err) - goto err_out2; =20 return 0; =20 -err_out2: - drm_dev_unregister(&pfdev->base); err_out1: pm_runtime_disable(pfdev->base.dev); panfrost_device_fini(pfdev); @@ -1023,7 +1018,6 @@ static void panfrost_remove(struct platform_device *p= dev) struct panfrost_device *pfdev =3D platform_get_drvdata(pdev); =20 drm_dev_unregister(&pfdev->base); - panfrost_gem_shrinker_cleanup(&pfdev->base); =20 pm_runtime_get_sync(pfdev->base.dev); pm_runtime_disable(pfdev->base.dev); diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panf= rost/panfrost_gem.c index 3a7fce428898..d2cd357a2ae3 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.c +++ b/drivers/gpu/drm/panfrost/panfrost_gem.c @@ -15,13 +15,13 @@ #include "panfrost_gem.h" #include "panfrost_mmu.h" =20 -void panfrost_gem_init(struct panfrost_device *pfdev) +int panfrost_gem_init(struct panfrost_device *pfdev) { int err; =20 if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE) && !panfrost_transparent_hugepage) - return; + return 0; =20 err =3D drm_gem_huge_mnt_create(&pfdev->base, "within_size"); if (drm_gem_get_huge_mnt(&pfdev->base)) @@ -29,6 +29,8 @@ void panfrost_gem_init(struct panfrost_device *pfdev) else if (err) drm_warn(&pfdev->base, "Can't use Transparent Hugepage (%d)\n", err); + + return panfrost_gem_shrinker_init(pfdev); } =20 #ifdef CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.h b/drivers/gpu/drm/panf= rost/panfrost_gem.h index 79d4377019e9..d6e55c2e4d86 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem.h +++ b/drivers/gpu/drm/panfrost/panfrost_gem.h @@ -129,7 +129,7 @@ drm_mm_node_to_panfrost_mapping(struct drm_mm_node *nod= e) return container_of(node, struct panfrost_gem_mapping, mmnode); } =20 -void panfrost_gem_init(struct panfrost_device *pfdev); +int panfrost_gem_init(struct panfrost_device *pfdev); =20 struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, = size_t size); =20 @@ -154,8 +154,8 @@ panfrost_gem_mapping_get(struct panfrost_gem_object *bo, void panfrost_gem_mapping_put(struct panfrost_gem_mapping *mapping); void panfrost_gem_teardown_mappings_locked(struct panfrost_gem_object *bo); =20 -int panfrost_gem_shrinker_init(struct drm_device *dev); -void panfrost_gem_shrinker_cleanup(struct drm_device *dev); +int panfrost_gem_shrinker_init(struct panfrost_device *pfdev); +void panfrost_gem_shrinker_fini(struct panfrost_device *pfdev); =20 void panfrost_gem_set_label(struct drm_gem_object *obj, const char *label); int panfrost_gem_sync(struct drm_gem_object *obj, u32 type, diff --git a/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c b/drivers/gpu= /drm/panfrost/panfrost_gem_shrinker.c index 2fe967a90bcb..fefae87535d6 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c +++ b/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c @@ -95,10 +95,8 @@ panfrost_gem_shrinker_scan(struct shrinker *shrinker, st= ruct shrink_control *sc) * * This function registers and sets up the panfrost shrinker. */ -int panfrost_gem_shrinker_init(struct drm_device *dev) +int panfrost_gem_shrinker_init(struct panfrost_device *pfdev) { - struct panfrost_device *pfdev =3D to_panfrost_device(dev); - pfdev->shrinker =3D shrinker_alloc(0, "drm-panfrost"); if (!pfdev->shrinker) return -ENOMEM; @@ -118,10 +116,8 @@ int panfrost_gem_shrinker_init(struct drm_device *dev) * * This function unregisters the panfrost shrinker. */ -void panfrost_gem_shrinker_cleanup(struct drm_device *dev) +void panfrost_gem_shrinker_fini(struct panfrost_device *pfdev) { - struct panfrost_device *pfdev =3D to_panfrost_device(dev); - if (pfdev->shrinker) shrinker_free(pfdev->shrinker); } --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 473981A9F87 for ; Fri, 24 Jul 2026 00:00:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851248; cv=pass; b=Isd/q+6UV+kjPx1umRbT6cXs32qLcqp9Bk70PvZbElcD4iCke11ObMC/pkangm7H12nkr6Flz8zDfFw+4UqDUq7U+BU93zyjJCRSmEiFDGTwBtmraRKeoi7Sw+tf46osGY6eQ+muA3lMy7BhoXK+Ljl1+B8qp4ZrBz+FxHVY560= ARC-Message-Signature: i=2; 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h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=Q7upsY9yMFftCib5x9pBTM8bYUDWeueIF3STXhh17Yk=; b=YQLbB84gxPGXz3hxMMk0AXqe+sXDGMiq1LHey1j+X2ebXeMkeopFLDYfYFUAuV9F fgg4Z5nEvu63s6Imub3/GmMV9r43lVjaXu8iZY/GtpjYaKYo78XO2iJ3SV7QnwZIGK3 CBug+9CX1M0RmrPEDyU6kBp8R3VqDc8kX/rrr4Mg= Received: by mx.zohomail.com with SMTPS id 1784851217646699.7851036660204; Thu, 23 Jul 2026 17:00:17 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:58:58 +0100 Subject: [PATCH v3 05/13] drm/panfrost: Move all device power up and down into RPM callbacks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-5-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=16882; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=8x2K5W9e7B6Rk+gJLwrnn90cE78maXPX4Ve8vHP4Xko=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqro5py4Pd35HEK/LVk/tk1sZ4IcAW8Uv3Att r1LOqxHSDqJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PTAtC/9D+HMDPg0XkAzuwuSc2MbIuxfz5BrATHjeZ3wmVtIWnaqKP2h/YImqy6jLaowomR8kXQy FiTm7n0+n+Hn0zl1whTwgnHXhZKCUs/9SYwqs7GfGsb4qRWky+un03nMGBMZE8zeetbX5FgZE1/ CHfHKa2od1gZZ/G0U6QF5IB5uzF7HdzYRAoiPX+i82jPjqTVBqtGd+GdiU9ulemCuslYo/cu7Jv fqc/WQh8N9XLQYDYDkAJLqY6oNf9vVfOeaqDKl4nddzToC/g0ouYGeCHyrfXhYF/2ZheKHfDJ93 leNXHvpMznbjzEDXZ/y4nhDRMuak1JSPFAo8EpZh2Eg/69wDey43ZqqWz4aRlqkqvrhzZ4DWXZn qeftpBGua5FgdjfLdaDm+UPIwogSYji7euAqWDf78+DWrCSIJHH76lX3BxsZCo2Cn9Nl6ODhh9H onCq/33TkSsq1+iHa4xOR7ppZbqwhj+chPBV5/F6ffFpg2Jh+HoC/lJjSIYV+Npd7thhU= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D During device probe(), failure to do a PM get() will leave the usage_count set to 0, which is the value assigned at device creation time. That means when the autosuspend delay expires, runtime suspend callback won't be invoked, so the device will remain powered on forever. On top of that, failure to call PM put() during device unplug means Panfrost device's PM usage_count increases monotonically for every new module reload. The combined outcome of both of the above was that devfreq OPP transition notifications would be printed all the time, even when no jobs are being submitted. This quickly fills the kernel ring buffer with junk. Even direr than that was the fact MMU interrupts are only enabled when the device is reset, so after device probe() the very first job targeting the tiler heap BO would always time out, because the driver's PM runtime resume callback would not be invoked. Fix all that by moving all GPU enabling and disabling into RPM resume and suspend callbacks, and making sure we resume the device right before touching any HW registers. This is done in imitation of the Panthor model. Signed-off-by: Adri=C3=A1n Larumbe Fixes: 635430797d3f ("drm/panfrost: Rework runtime PM initialization") Fixes: 876b15d2c88d ("drm/panfrost: Fix module unload") --- drivers/gpu/drm/panfrost/panfrost_device.c | 373 +++++++++++++++++--------= ---- drivers/gpu/drm/panfrost/panfrost_device.h | 3 + drivers/gpu/drm/panfrost/panfrost_drv.c | 13 +- drivers/gpu/drm/panfrost/panfrost_gpu.c | 7 +- 4 files changed, 228 insertions(+), 168 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 03905495aee2..d68f1ec82895 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -18,6 +18,11 @@ #include "panfrost_mmu.h" #include "panfrost_perfcnt.h" =20 +static bool panfrost_device_is_initialized(struct panfrost_device *pfdev) +{ + return !!pfdev->js; +} + static int panfrost_reset_init(struct panfrost_device *pfdev) { pfdev->rstc =3D devm_reset_control_array_get_optional_exclusive(pfdev->ba= se.dev); @@ -34,6 +39,32 @@ static void panfrost_reset_fini(struct panfrost_device *= pfdev) reset_control_assert(pfdev->rstc); } =20 +static int panfrost_clk_enable(struct panfrost_device *pfdev) +{ + int err; + + err =3D clk_enable(pfdev->clock); + if (err) + return err; + + err =3D clk_enable(pfdev->bus_clock); + if (err) + goto disable_clock; + + err =3D clk_enable(pfdev->bus_ace_clock); + if (err) + goto disable_bus_clock; + + return 0; + +disable_bus_clock: + clk_disable(pfdev->bus_clock); +disable_clock: + clk_disable(pfdev->clock); + + return err; +} + static int panfrost_clk_init(struct panfrost_device *pfdev) { int err; @@ -48,7 +79,7 @@ static int panfrost_clk_init(struct panfrost_device *pfde= v) rate =3D clk_get_rate(pfdev->clock); dev_info(pfdev->base.dev, "clock rate =3D %lu\n", rate); =20 - err =3D clk_prepare_enable(pfdev->clock); + err =3D clk_prepare(pfdev->clock); if (err) return err; =20 @@ -57,35 +88,43 @@ static int panfrost_clk_init(struct panfrost_device *pf= dev) dev_err(pfdev->base.dev, "get bus_clock failed %ld\n", PTR_ERR(pfdev->bus_clock)); err =3D PTR_ERR(pfdev->bus_clock); - goto disable_clock; + goto unprepare_clock; } =20 if (pfdev->bus_clock) { rate =3D clk_get_rate(pfdev->bus_clock); dev_info(pfdev->base.dev, "bus_clock rate =3D %lu\n", rate); =20 - err =3D clk_prepare_enable(pfdev->bus_clock); + err =3D clk_prepare(pfdev->bus_clock); if (err) - goto disable_clock; + goto unprepare_clock; } =20 pfdev->bus_ace_clock =3D devm_clk_get_optional(pfdev->base.dev, "bus_ace"= ); if (IS_ERR(pfdev->bus_ace_clock)) { err =3D PTR_ERR(pfdev->bus_ace_clock); dev_err(pfdev->base.dev, "get bus_ace_clock failed %d\n", err); - goto disable_bus_clock; + goto unprepare_bus_clock; } =20 - err =3D clk_prepare_enable(pfdev->bus_ace_clock); + err =3D clk_prepare(pfdev->bus_ace_clock); if (err) - goto disable_bus_clock; + goto unprepare_bus_clock; + + if (!(pfdev->comp->pm_features & BIT(GPU_PM_RT))) { + err =3D panfrost_clk_enable(pfdev); + if (err) + goto unprepare_bus_ace_clock; + } =20 return 0; =20 -disable_bus_clock: - clk_disable_unprepare(pfdev->bus_clock); -disable_clock: - clk_disable_unprepare(pfdev->clock); +unprepare_bus_ace_clock: + clk_unprepare(pfdev->bus_clock); +unprepare_bus_clock: + clk_unprepare(pfdev->bus_clock); +unprepare_clock: + clk_unprepare(pfdev->clock); =20 return err; } @@ -212,6 +251,143 @@ static int panfrost_pm_domain_init(struct panfrost_de= vice *pfdev) return err; } =20 +static int panfrost_device_runtime_resume(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { + ret =3D reset_control_deassert(pfdev->rstc); + if (ret) + return ret; + + ret =3D panfrost_clk_enable(pfdev); + if (ret) + goto err_clk; + } + + panfrost_device_reset(pfdev, true); + panfrost_devfreq_resume(pfdev); + + return 0; + +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) + reset_control_assert(pfdev->rstc); + return ret; +} + +static int panfrost_device_runtime_suspend(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + + if (!panfrost_jm_is_idle(pfdev)) + return -EBUSY; + + panfrost_devfreq_suspend(pfdev); + panfrost_jm_suspend_irq(pfdev); + panfrost_mmu_suspend_irq(pfdev); + panfrost_gpu_suspend_irq(pfdev); + panfrost_gpu_power_off(pfdev); + + if (panfrost_device_is_initialized(pfdev) && + pfdev->comp->pm_features & BIT(GPU_PM_RT)) { + clk_disable(pfdev->bus_ace_clock); + clk_disable(pfdev->bus_clock); + clk_disable(pfdev->clock); + reset_control_assert(pfdev->rstc); + } + + if (!panfrost_device_is_initialized(pfdev)) { + panfrost_clk_fini(pfdev); + reset_control_assert(pfdev->rstc); + } + + return 0; +} + +static int panfrost_device_resume(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { + unsigned long freq =3D pfdev->pfdevfreq.fast_rate; + struct dev_pm_opp *opp; + + opp =3D dev_pm_opp_find_freq_ceil(dev, &freq); + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_set_opp(dev, opp); + dev_pm_opp_put(opp); + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + ret =3D clk_enable(pfdev->clock); + if (ret) + goto err_clk; + + if (pfdev->bus_clock) { + ret =3D clk_enable(pfdev->bus_clock); + if (ret) + goto err_bus_clk; + } + } + + ret =3D pm_runtime_force_resume(dev); + if (ret) + goto err_resume; + + return 0; + +err_resume: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) + clk_disable(pfdev->bus_clock); +err_bus_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) + clk_disable(pfdev->clock); +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + return ret; +} + +static int panfrost_device_suspend(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_force_suspend(dev); + if (ret) + return ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + if (pfdev->bus_clock) + clk_disable(pfdev->bus_clock); + + clk_disable(pfdev->clock); + } + + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + + return 0; +} + +EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) =3D { + RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_r= esume, NULL) + SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) +}; + +void panfrost_try_suspend_device(struct panfrost_device *pfdev) +{ + pm_runtime_put_sync_suspend(pfdev->base.dev); + + /* If PM is disabled, we need to call the suspend handler manually. */ + if (!IS_ENABLED(CONFIG_PM)) + panfrost_device_runtime_suspend(pfdev->base.dev); +} + int panfrost_device_init(struct panfrost_device *pfdev) { int err; @@ -265,10 +441,25 @@ int panfrost_device_init(struct panfrost_device *pfde= v) goto out_regulator; } =20 - err =3D panfrost_gpu_init(pfdev); + err =3D devm_pm_runtime_enable(pfdev->base.dev); + if (err) + goto out_regulator; + + err =3D pm_runtime_resume_and_get(pfdev->base.dev); if (err) goto out_regulator; =20 + /* If PM is disabled, we need to call panfrost_device_runtime_resume() ma= nually. */ + if (!IS_ENABLED(CONFIG_PM)) { + err =3D panfrost_device_runtime_resume(pfdev->base.dev); + if (err) + goto out_regulator; + } + + err =3D panfrost_gpu_init(pfdev); + if (err) + goto out_rpm_put; + err =3D panfrost_mmu_init(pfdev); if (err) goto out_gpu; @@ -295,6 +486,8 @@ int panfrost_device_init(struct panfrost_device *pfdev) panfrost_mmu_fini(pfdev); out_gpu: panfrost_gpu_fini(pfdev); +out_rpm_put: + panfrost_try_suspend_device(pfdev); out_regulator: panfrost_regulator_fini(pfdev); out_devfreq: @@ -313,12 +506,8 @@ void panfrost_device_fini(struct panfrost_device *pfde= v) panfrost_gem_shrinker_fini(pfdev); panfrost_perfcnt_fini(pfdev); panfrost_jm_fini(pfdev); - panfrost_mmu_fini(pfdev); - panfrost_gpu_fini(pfdev); - panfrost_devfreq_fini(pfdev); panfrost_regulator_fini(pfdev); - panfrost_clk_fini(pfdev); - panfrost_reset_fini(pfdev); + panfrost_devfreq_fini(pfdev); panfrost_pm_domain_fini(pfdev); } =20 @@ -424,148 +613,20 @@ bool panfrost_exception_needs_reset(const struct pan= frost_device *pfdev, =20 void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int) { - panfrost_gpu_soft_reset(pfdev); - - panfrost_gpu_power_on(pfdev); - panfrost_mmu_reset(pfdev); - - panfrost_jm_reset_interrupts(pfdev); - if (enable_job_int) - panfrost_jm_enable_interrupts(pfdev); -} - -static int panfrost_device_runtime_resume(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); int ret; =20 - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { - ret =3D reset_control_deassert(pfdev->rstc); - if (ret) - return ret; - - ret =3D clk_enable(pfdev->clock); - if (ret) - goto err_clk; - - ret =3D clk_enable(pfdev->bus_clock); - if (ret) - goto err_bus_clk; - - ret =3D clk_enable(pfdev->bus_ace_clock); - if (ret) - goto err_bus_ace_clk; - } - - panfrost_device_reset(pfdev, true); - panfrost_devfreq_resume(pfdev); - - return 0; - -err_bus_ace_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - clk_disable(pfdev->bus_clock); -err_bus_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - clk_disable(pfdev->clock); -err_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) - reset_control_assert(pfdev->rstc); - return ret; -} - -static int panfrost_device_runtime_suspend(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - - if (!panfrost_jm_is_idle(pfdev)) - return -EBUSY; - - panfrost_devfreq_suspend(pfdev); - panfrost_jm_suspend_irq(pfdev); - panfrost_mmu_suspend_irq(pfdev); - panfrost_gpu_suspend_irq(pfdev); - panfrost_gpu_power_off(pfdev); - - if (pfdev->comp->pm_features & BIT(GPU_PM_RT)) { - clk_disable(pfdev->bus_ace_clock); - clk_disable(pfdev->bus_clock); - clk_disable(pfdev->clock); - reset_control_assert(pfdev->rstc); - } - - return 0; -} - -static int panfrost_device_resume(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - int ret; - - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { - unsigned long freq =3D pfdev->pfdevfreq.fast_rate; - struct dev_pm_opp *opp; - - opp =3D dev_pm_opp_find_freq_ceil(dev, &freq); - if (IS_ERR(opp)) - return PTR_ERR(opp); - dev_pm_opp_set_opp(dev, opp); - dev_pm_opp_put(opp); - } - - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { - ret =3D clk_enable(pfdev->clock); - if (ret) - goto err_clk; - - if (pfdev->bus_clock) { - ret =3D clk_enable(pfdev->bus_clock); - if (ret) - goto err_bus_clk; - } - } - - ret =3D pm_runtime_force_resume(dev); - if (ret) - goto err_resume; - - return 0; - -err_resume: - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) - clk_disable(pfdev->bus_clock); -err_bus_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) - clk_disable(pfdev->clock); -err_clk: - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) - dev_pm_opp_set_opp(dev, NULL); - return ret; -} - -static int panfrost_device_suspend(struct device *dev) -{ - struct panfrost_device *pfdev =3D dev_get_drvdata(dev); - int ret; - - ret =3D pm_runtime_force_suspend(dev); - if (ret) - return ret; + /* Do the actual device reset */ + ret =3D panfrost_gpu_soft_reset(pfdev); + panfrost_gpu_power_on(pfdev); =20 - if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { - if (pfdev->bus_clock) - clk_disable(pfdev->bus_clock); + if (!panfrost_device_is_initialized(pfdev) && !ret) + atomic_set(&pfdev->gpu_powered, 1); =20 - clk_disable(pfdev->clock); + /* Post-reset */ + if (panfrost_device_is_initialized(pfdev)) { + panfrost_mmu_reset(pfdev); + panfrost_jm_reset_interrupts(pfdev); + if (enable_job_int) + panfrost_jm_enable_interrupts(pfdev); } - - if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) - dev_pm_opp_set_opp(dev, NULL); - - return 0; } - -EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) =3D { - RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_r= esume, NULL) - SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) -}; diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index ec55c136b1b6..6bec8fcb701e 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -142,6 +142,7 @@ struct panfrost_device { /* pm_domains for devices with more than one. */ struct device *pm_domain_devs[MAX_PM_DOMAINS]; struct device_link *pm_domain_links[MAX_PM_DOMAINS]; + atomic_t gpu_powered; bool coherent; =20 struct panfrost_features features; @@ -253,6 +254,8 @@ int panfrost_device_init(struct panfrost_device *pfdev); void panfrost_device_fini(struct panfrost_device *pfdev); void panfrost_device_reset(struct panfrost_device *pfdev, bool enable_job_= int); =20 +void panfrost_try_suspend_device(struct panfrost_device *pfdev); + extern const struct dev_pm_ops panfrost_pm_ops; =20 enum drm_panfrost_exception_type { diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 331a3bd5b98c..5eb4b095b1f8 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -988,9 +988,7 @@ static int panfrost_probe(struct platform_device *pdev) goto err_out0; } =20 - pm_runtime_set_active(pfdev->base.dev); pm_runtime_mark_last_busy(pfdev->base.dev); - pm_runtime_enable(pfdev->base.dev); pm_runtime_set_autosuspend_delay(pfdev->base.dev, 50); /* ~3 frames */ pm_runtime_use_autosuspend(pfdev->base.dev); =20 @@ -1002,13 +1000,13 @@ static int panfrost_probe(struct platform_device *p= dev) if (err < 0) goto err_out1; =20 + pm_runtime_put_autosuspend(pfdev->base.dev); =20 return 0; =20 err_out1: - pm_runtime_disable(pfdev->base.dev); panfrost_device_fini(pfdev); - pm_runtime_set_suspended(pfdev->base.dev); + panfrost_try_suspend_device(pfdev); err_out0: return err; } @@ -1019,10 +1017,11 @@ static void panfrost_remove(struct platform_device = *pdev) =20 drm_dev_unregister(&pfdev->base); =20 - pm_runtime_get_sync(pfdev->base.dev); - pm_runtime_disable(pfdev->base.dev); + drm_WARN_ON(&pfdev->base, pm_runtime_get_sync(pfdev->base.dev) < 0); + panfrost_device_fini(pfdev); - pm_runtime_set_suspended(pfdev->base.dev); + + panfrost_try_suspend_device(pfdev); } =20 static ssize_t profiling_show(struct device *dev, diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panf= rost/panfrost_gpu.c index 7d555e63e21a..1b22578f71bc 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -516,9 +516,8 @@ int panfrost_gpu_init(struct panfrost_device *pfdev) { int err; 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h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=MBgoPp5s7KIQWnhfEKXF0hJxZFpuwcxeEJcGxa4bIhs=; b=TpYEfkioORXRSzKM5Ac3YFa3UAYcB3oAeJSYYiFgcUrdArqM1ceqemG2YHgtmJs1 i51sDtqMAqq5qYGlRdmKpJ5BXbnS60NuC3nuzy9JdrxrhFaw8WVBm1f80oNevAgjiKo 1MgAji/O19Hh1licTzAs7KlYExUKiFmJURvY+hoU= Received: by mx.zohomail.com with SMTPS id 1784851223294979.3334303946799; Thu, 23 Jul 2026 17:00:23 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:58:59 +0100 Subject: [PATCH v3 06/13] drm/panfrost: Explicitly enable MMU interrupts at device init Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-6-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1739; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=b3rUBnUVHsxL0qbL84XxzR6UioXNuBd6TsgNEfCQOaM=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqroVZoewLayjRfqnPMhaE7VHdHmo5GlzECEJ PQPsGEfUfuJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PZyNDACzJp1A/MDQrQlmshjGtC4icMDlPYF7mvgrKgRKtS9NF3A0JmgADuoSGq2ELoGG+/3cqRe 6T49Xxp9ddVWYR8WTbQGZEG/HZgTLrknBGuBz2mBkGVQj4K1bMjhimarkw66p1D9Pk9Xa3DOGCD 17E7L04SBqRE5tBVf0WJIbHxNxjo2IN4wgnEwwV3adl8n+PsjADaqbRF0MqMKiQdUyT9bX01UTU Xa4XC5AmXyC4Zz/hec3eI0x5LwSacXX0X0bj7OxnOfFdHOeB6xrU9N4BjEFUZhb7i5XE55dk5Z5 IvHGOvH4QOLIg06Rp7FgbMJq76UUEP76S93UGJy9aEfuRydvd/un54NNvnmaE4pLbWnxg7s+RMe e1uHqC2bmWxdYtkW0WvnVxWGbsez5MVMopXv8Fj61vpDRJ//tOvzfhDu0inUQ3c+s7KfaV55vk/ bEGm1s7GeyA4/3EeBQRxkVUWaoJb4aIszinvae0aZXzNfi41vZy5Cug7bA/BakW6Ii9os= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Because the device must be in a position to accept jobs between the time drm_dev_register() is called and autosuspend first kicks in, there's a very narrow window inbetween during which jobs targeting the tiler buffer object would time out, since the device's PM status is 'Active', but no MMU interrupts were enabled at device initialisation time. Signed-off-by: Adri=C3=A1n Larumbe Fixes: 73e467f60acd ("drm/panfrost: Consolidate reset handling") --- drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panf= rost/panfrost_mmu.c index 4a3162c3b659..bb6c1614964b 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -336,6 +336,12 @@ void panfrost_mmu_as_put(struct panfrost_device *pfdev= , struct panfrost_mmu *mmu WARN_ON(atomic_read(&mmu->as_count) < 0); } =20 +static void panfrost_mmu_enable_interrupts(struct panfrost_device *pfdev) +{ + mmu_write(pfdev, MMU_INT_CLEAR, ~0); + mmu_write(pfdev, MMU_INT_MASK, ~0); +} + void panfrost_mmu_reset(struct panfrost_device *pfdev) { struct panfrost_mmu *mmu, *mmu_tmp; @@ -355,8 +361,7 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev) =20 spin_unlock(&pfdev->as_lock); =20 - mmu_write(pfdev, MMU_INT_CLEAR, ~0); - mmu_write(pfdev, MMU_INT_MASK, ~0); + panfrost_mmu_enable_interrupts(pfdev); } =20 static size_t get_pgsize(u64 addr, size_t size, size_t *count) @@ -970,6 +975,8 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) return err; } =20 + panfrost_mmu_enable_interrupts(pfdev); + return 0; } =20 --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEC5526AA91 for ; Fri, 24 Jul 2026 00:00:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851257; cv=pass; b=oRv9E2hPWXtIAk/3TX4fjAB9FZGc4FkqAMPE7lGp0inciWem3xUiXmEUkgjHTgo6VBPGf9IxD8IyConHLmr4KMobhjP4JmIyNfryfYfKfgA45tA2n76En/K0InVPcrqZmOkKoiHys46nvpVLQr+T/WROZyBWMaGVhtOrEJKdX7M= ARC-Message-Signature: i=2; a=rsa-sha256; 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h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=w6HUpQIpSHs/rjyl1FLJmSgGlfWFvp+jq2d+LIKIZOg=; b=MkrcdJ87rY1ZPBmNEI59qOPa0JRuSvSmiKOhom9Lh013pxKNA/8QY8EnEYUc8/+D dTOoxDBAO2bQdMTH8SirjS/N806hHskQJpTLPQBlhaoUoSmxpHBSd80X/aDNRAu0hIi yybQwoY8kC3TSuIPKjLPwDuoK+cBrBHxWjLETSyM= Received: by mx.zohomail.com with SMTPS id 1784851229375543.1774978345184; Thu, 23 Jul 2026 17:00:29 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:59:00 +0100 Subject: [PATCH v3 07/13] drm/panfrost: Sync with IRQ before MMU disable and reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-7-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1704; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=rWSC1BF93/IHhqkvT/dZCfFzeAV6q1QvBTnPFkEVQIc=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqroAu7bSqptnLlQwSV2LVtPrWFlRntXWxxKx 3fb3Npuqu+JAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PTDfC/9Yu4ILLJZBxdAO4nZpjG+9zSzH2sVdJSTYZHAOcE70a4b4t5Yq+Q+OF6fzpDIkMYUnot9 izcAUFp77eLarLm5qhypGg6GDXETIyQuCmq/RtgE7XYej8MtyrAA97ollarCWGL+oa82MpSHbAU m+3s9FLEcy7SqirTRC8X7JsM0Nn39fcirECX0lrVcrAXxXbOu+g0BwfQleG/njxP5tG8qFTljeg 1oKxBRuKo8TJop95vEODbpE6ZqeBUz5kuErjIjbhG7HfaS7uzIjcvTHHVvUNP8q5/WchpdmbNOy 5b8kIBJTja9CC8MRnAUB6D95TObMekAYwC0B/QWJBM3LfuKeAB2uFckIcRoDUfiU6DJrhQMwXul BnxD0yZfhzZ2YWnvqGsF0E3MWYAdxIDKYFIdknu+Ih7kBLqF4/80ozrtpiDqE+n74SojBekv9GX p1wF8XhJYc7OKGODTTUFV20AXHMqKxcM1bObCyiBSjIKm6QUbnxR7cF0Zg/QbNmoIzu+M= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D There was a pitfall of the MMU threaded IRQ handler accessing HW registers after a spurious interrupt at the same time the device is being premature taking down because of a failed probe sequence. Let's make sure MMU IRQ's are marked suspended and synchronised with before unwinding further. Also, during a device reset, make sure we also sync with the MMU IRQ handler so that AS aren't clobbered while a map operation is ongoing. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_mmu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panf= rost/panfrost_mmu.c index bb6c1614964b..f067bcd360a8 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -347,6 +347,7 @@ void panfrost_mmu_reset(struct panfrost_device *pfdev) struct panfrost_mmu *mmu, *mmu_tmp; =20 clear_bit(PANFROST_COMP_BIT_MMU, pfdev->is_suspended); + synchronize_irq(pfdev->mmu_irq); =20 spin_lock(&pfdev->as_lock); =20 @@ -980,11 +981,6 @@ int panfrost_mmu_init(struct panfrost_device *pfdev) return 0; } =20 -void panfrost_mmu_fini(struct panfrost_device *pfdev) -{ - mmu_write(pfdev, MMU_INT_MASK, 0); -} - void panfrost_mmu_suspend_irq(struct panfrost_device *pfdev) { set_bit(PANFROST_COMP_BIT_MMU, pfdev->is_suspended); @@ -992,3 +988,8 @@ void panfrost_mmu_suspend_irq(struct panfrost_device *p= fdev) mmu_write(pfdev, MMU_INT_MASK, 0); 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Thu, 23 Jul 2026 17:00:35 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:59:01 +0100 Subject: [PATCH v3 08/13] drm/panfrost: Rewire reset sequence to avoid concurrent attempts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-8-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3904; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=cWP60f/sU6HbsGbiX3msep8L6EjlkG92o3kqyo/Yy94=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqroSJOMrW656b0Yx0KAOaeuj9wEFwXtrHrL/ TQgDwb6P9SJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND Pda/C/0X3Zja4UXeN6VrubGRNzzerqzjyNxofcXGynZyxvK7coiffdBbhd6EwwijPIqcihGob0x Z1H3+7iYvDfKD0GkN3jdi+RRjiy/WJVSRrvN3aFVHlbZUmkw6hw+TJU695Wguk9KHSnKKyCZcPX 4TH35cWjFQJXNKScscm3DqkIRe9qR3V5LHbOxfEDLVPbxRAa5sXmSy0HfrvtyVerO38gQpoF/pD 4HQqhxqPzeEuBMEB1mM5sN8cqj+Pi5Aw8OrHMRCsMtT7ORi6VlyJPPCKohEJtyM+5RWT9/jN8Nr iBaPcRNLQbQsQf637BDUeaD5YsRTK+IELPks8Yguvjm4GeyCxfWUjyaNawnPliWKkDdIQqv+vHM 1jwwkR8LyCSXLFxUk9y/zVOKVmjzKvBH41ctl89S3CZOgFYFROCIwdGaWUf6s/j+61kdHBgsaZb JjJtxJ+3meG+/CmqyvZRYQyITZ2Gr0pmhOfZThkhMcmGkX9ib1HY6GLA9Q9DZFxD1TmBE= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D This way, and in imitation of Panthor, only a single reset thread can progress at a time, and other threads wanting to trigger it just wait on the ongoing one to finish and wake them up. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 1 + drivers/gpu/drm/panfrost/panfrost_device.h | 5 +++-- drivers/gpu/drm/panfrost/panfrost_job.c | 16 ++++++++++------ 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index d68f1ec82895..cf115db9cebf 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -8,6 +8,7 @@ #include #include #include +#include =20 #include "panfrost_device.h" #include "panfrost_devfreq.h" diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 6bec8fcb701e..23dea923bd04 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -167,6 +167,7 @@ struct panfrost_device { struct { struct workqueue_struct *wq; struct work_struct work; + wait_queue_head_t wait; atomic_t pending; } reset; =20 @@ -341,8 +342,8 @@ bool panfrost_exception_needs_reset(const struct panfro= st_device *pfdev, static inline void panfrost_device_schedule_reset(struct panfrost_device *pfdev) { - atomic_set(&pfdev->reset.pending, 1); - queue_work(pfdev->reset.wq, &pfdev->reset.work); + if (!atomic_cmpxchg(&pfdev->reset.pending, 0, 1)) + queue_work(pfdev->reset.wq, &pfdev->reset.work); } =20 #endif diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index 2d12b83e900a..c2a1670a74e8 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -497,10 +497,8 @@ static void panfrost_job_handle_err(struct panfrost_de= vice *pfdev, =20 pm_runtime_put_autosuspend(pfdev->base.dev); =20 - if (panfrost_exception_needs_reset(pfdev, js_status)) { - atomic_set(&pfdev->reset.pending, 1); + if (panfrost_exception_needs_reset(pfdev, js_status)) drm_sched_fault(&pfdev->js->queue[js].sched); - } } =20 static void panfrost_jm_handle_done(struct panfrost_device *pfdev, @@ -755,6 +753,8 @@ panfrost_reset(struct panfrost_device *pfdev, panfrost_jm_enable_interrupts(pfdev); =20 dma_fence_end_signalling(cookie); + + wake_up_all(&pfdev->reset.wait); } =20 static enum drm_gpu_sched_stat panfrost_job_timedout(struct drm_sched_job @@ -763,6 +763,7 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(st= ruct drm_sched_job struct panfrost_job *job =3D to_panfrost_job(sched_job); struct panfrost_device *pfdev =3D job->pfdev; int js =3D panfrost_job_get_slot(job); + int ret; =20 /* * If the GPU managed to complete this jobs fence, the timeout has @@ -797,10 +798,12 @@ static enum drm_gpu_sched_stat panfrost_job_timedout(= struct drm_sched_job =20 panfrost_core_dump(job); =20 - atomic_set(&pfdev->reset.pending, 1); - panfrost_reset(pfdev, sched_job); + panfrost_device_schedule_reset(pfdev); + ret =3D wait_event_timeout(pfdev->reset.wait, + !atomic_read(&pfdev->reset.pending), + msecs_to_jiffies(60)); =20 - return DRM_GPU_SCHED_STAT_RESET; + return (ret) ? DRM_GPU_SCHED_STAT_RESET : DRM_GPU_SCHED_STAT_ENODEV; } =20 static void panfrost_reset_work(struct work_struct *work) @@ -892,6 +895,7 @@ int panfrost_jm_init(struct panfrost_device *pfdev) if (!pfdev->reset.wq) return -ENOMEM; args.timeout_wq =3D pfdev->reset.wq; + init_waitqueue_head(&pfdev->reset.wait); =20 for (j =3D 0; j < NUM_JOB_SLOTS; j++) { js->queue[j].fence_context =3D dma_fence_context_alloc(1); --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8BBA1DED49 for ; Fri, 24 Jul 2026 00:01:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851267; cv=pass; b=cLtiOVfnYMn1WDegCz2BJVOYtaoQUZjQ4cABdXgFXSc9z9+4GItKyI3gB1bjJxwE12q25e1wqu2pNr62UFi0vgau6VXUV5wTtlcCT9XfMnt0e3QdbJRx9wm3LuWEIOcvuKPEdBfyou0JJ8MS21Xw7paXGjInTSqGIIIwhiE1A2E= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784851267; c=relaxed/simple; bh=hIkA9kKBskWx/XZTRbh3ZJYCDHbNCIyDvVQzCFGV/rs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PjsdL7COxiOd1y2959eIhLLdvjZ2+Wt3BPbPjdJwGSyj+W088LjXuCFVQcvLqKIsqQgYjtb55Vx6z0LIf4s8GJM3rNVx6oXzuiNLCDc1FVTHZcs9d8me+QISYRIiXiXAWrtcWUcugwWuB/569pWzuPp8fqrOsxLW7fFZCXyE2X8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=e274JjPB; arc=pass smtp.client-ip=136.143.188.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="e274JjPB" ARC-Seal: i=1; a=rsa-sha256; t=1784851241; cv=none; d=zohomail.com; s=zohoarc; b=E1nyvwtVYakYpgk21W8w34IjYdcylCRIcycmmDvac9osYm0ttP8J+2FXAX2au/3qXoG0FUyvpTnvulmnIKhYErjpaRxLihMelw4eD/xPT/f4PBpQJDwNFzmgsXIw78REsvdk8kVcQqq/w8Zw9lYsstwckXrgrNCZ3xbMt15onr0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784851241; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=RWquoODj+otOqmvG7GRUPK/89BcUOZ/21tLxF3D9Lik=; b=IhG2zKIIrLaGxJc8ZXbEf7j7jzp+7TqQL3c8twEDXa/K+s/T1dzK1TGneJ+Jh5QZYR5xz5WaltWxuw74vX0m0Gu/ddSNZytojP2HfuhOgH2aeyWwQq1PRznC+uNa/uBxexrIDnB+Eo/64xQa5dZqfvko1FkcwkAFu3vwV3/h2fo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1784851241; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=RWquoODj+otOqmvG7GRUPK/89BcUOZ/21tLxF3D9Lik=; b=e274JjPBJjRYrzxMTCUVnBqU4BUNqiruxu06C0wrvWyVl+k/gk7Wpd1BIb3+4VmW d2w8oboRcZsbFFPvS7HtQmFq0Mxb/dN9fWc4zPlPrI3lkpeV+QmbiVPz3fJz20Z9X0q SsQMoDnXaA3VRnnQvjyK47+C/SkEdC4b1MR17O7c= Received: by mx.zohomail.com with SMTPS id 1784851240675951.2213263241606; Thu, 23 Jul 2026 17:00:40 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:59:02 +0100 Subject: [PATCH v3 09/13] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-9-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3055; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=hIkA9kKBskWx/XZTRbh3ZJYCDHbNCIyDvVQzCFGV/rs=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqro2D7K346QTus/1xxLweFKwELzG6/DPKuQu JDUolit9pKJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PVgeC/sFzwycIQrbLJdgRLcTB+mJ31zrz4niZIUDT7P/EW0VoWm2ZkrR8LtG7haE3xvP0e+7t89 wuLxp9a9bGjJRRVAlx1MmHONZ12tC9gcu9ufCWtZXOmeEGSMqkg1wFpbzJIxHJVnRDWTT4/r0W8 U3zZrLfVf/+BlvHCM+P/JqnlCAJZqMnEEgJJiK143YeWUmEIBUKzCTgKh3bIaxAWuD1vskeehl0 2iH5A5UjrbrS9GYoomB7z1GDMWX6uyyu/wz3PhW/fBVzALya1bR5sczxd2JbGQ8HVeByPVz+Cii RPGbZb8NPJVAtHXZeY1/UL+BBDtPYBqSSJH7JBnFl/5JkYhHi/7PqlLT5ONiuioQB4mlQR5KvFi cxmeah/xai7X+CgsbVJnWRkOqZLqZvhtfZPXel6lwKkfEuh3YvBAET0WiQucy2bMVEIdV7LgiCT bBdpYYem+YhPC+5h6JHsvwrY8eIdQ9AWzL4Tcfew/ITqR3PByoFc/0rIBExV8/ltcZY1M= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D This will be of great help when testing potential races between the GPU reset sequence and other parts of the code accessing HW registers. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 38 ++++++++++++++++++++++++++= ++++ drivers/gpu/drm/panfrost/panfrost_device.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 3 files changed, 42 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index cf115db9cebf..80746e375410 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -2,6 +2,7 @@ /* Copyright 2018 Marty E. Plummer */ /* Copyright 2019 Linaro, Ltd, Rob Herring */ =20 +#include #include #include #include @@ -631,3 +632,40 @@ void panfrost_device_reset(struct panfrost_device *pfd= ev, bool enable_job_int) panfrost_jm_enable_interrupts(pfdev); } } + +#ifdef CONFIG_DEBUG_FS +static int reset_get(void *data, u64 *val) +{ + struct panfrost_device *pfdev =3D + container_of(data, struct panfrost_device, base); + + *val =3D atomic_read(&pfdev->reset.pending); + return 0; +} + +static int reset_set(void *data, u64 val) +{ + struct panfrost_device *pfdev =3D + container_of(data, struct panfrost_device, base); + + if (pm_runtime_get_if_in_use(pfdev->base.dev)) { + panfrost_device_schedule_reset(pfdev); + wait_event_interruptible_timeout(pfdev->reset.wait, + !atomic_read(&pfdev->reset.pending), + msecs_to_jiffies(60)); + pm_runtime_put(pfdev->base.dev); + } + + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(panfrost_reset_debugfs_fops, + reset_get, reset_set, + "0x%08llx\n"); + +void panfrost_reset_debugfs_init(struct drm_minor *minor) +{ + debugfs_create_file("reset", 0600, minor->debugfs_root, + minor->dev, &panfrost_reset_debugfs_fops); +} +#endif // CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 23dea923bd04..855ee4d0fb40 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -346,4 +346,7 @@ panfrost_device_schedule_reset(struct panfrost_device *= pfdev) queue_work(pfdev->reset.wq, &pfdev->reset.work); } =20 +#ifdef CONFIG_DEBUG_FS +void panfrost_reset_debugfs_init(struct drm_minor *minor); +#endif // CONFIG_DEBUG_FS #endif diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 5eb4b095b1f8..2490e9785057 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -916,6 +916,7 @@ static void panfrost_debugfs_init(struct drm_minor *min= or) { panthor_gems_debugfs_init(minor); panfrost_sched_debugfs_init(minor); + panfrost_reset_debugfs_init(minor); } #endif =20 --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0F0E757EA for ; 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Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2779; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=4tGiJGWiK+TDM+P28WpbzF6ffBP1X3E56TrK7Eumeb4=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqrowqDa0Sjp5VAyzmgnRRRWCNSSbDv8Y7utv f9Qt9klrMWJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6AAKCRAOJn5M7lND PS0DDACkPRjUDZOv7w3Puker6XQ8/Cmfq0xKCALP0pIZQKD4XOrJIqGIlt6zrm38YkPA2C3kiSE qsmokwb/jkNn7ZOPuctYm0UZj4aLO5ZtTjE4DrFnYvVdwcsqfP32ToSHo4jRJuLXFgh+06798yc q2FVMt9aN7DRhA3gUy3RRbST7yJEdqOzQKIy8057P67B+zpm7cuNuVkJSt1McnkZ/SeMoYybK3I ZynuB5KcHbk1F87pMWwDlSMAV69ZpVH50AK08nVAqvKEZq2YpKt32IT8P9x2EiX90OoLK2laqFh wHNl++Xu5aiZLzrfOKtgBmpyJBuz+09wyLEDCvDuYx9EbJib1sz45/P/b0gUoB705UHidWQFGPK zSJG378NZCWOdyJroTQMcucY+ykP3Qnn3n1xI2fYHI9ctxnfDf48/0bajUPg+6vdiqf3jgy97AU cd3YvIgKqSPs3cWfivJsjhivUHqsMGehkgrUgbJmxzUjfHlUXWd/JO2dRadPMuZLM8czA= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Just for the sake of avoiding repetition. Reviewed-by: Steven Price Reviewed-by: Boris Brezillon Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 31 ++++++++++++-------------= ---- 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.c index 7020c0192e18..ad1156678e91 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c @@ -35,6 +35,16 @@ struct panfrost_perfcnt { struct completion dump_comp; }; =20 +static void panfrost_perfcnt_gpu_disable(struct panfrost_device *pfdev) +{ + gpu_write(pfdev, GPU_PERFCNT_CFG, + GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); + gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0); + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); +} + void panfrost_perfcnt_clean_cache_done(struct panfrost_device *pfdev) { complete(&pfdev->perfcnt->dump_comp); @@ -193,12 +203,7 @@ static int panfrost_perfcnt_disable_locked(struct panf= rost_device *pfdev, if (user !=3D perfcnt->user) return -EINVAL; =20 - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); + panfrost_perfcnt_gpu_disable(pfdev); =20 perfcnt->user =3D NULL; drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map); @@ -327,12 +332,7 @@ int panfrost_perfcnt_init(struct panfrost_device *pfde= v) perfcnt->bosize =3D size; =20 /* Start with everything disabled. */ - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + panfrost_perfcnt_gpu_disable(pfdev); =20 init_completion(&perfcnt->dump_comp); mutex_init(&perfcnt->lock); @@ -344,10 +344,5 @@ int panfrost_perfcnt_init(struct panfrost_device *pfde= v) void panfrost_perfcnt_fini(struct panfrost_device *pfdev) { /* Disable everything before leaving. */ - gpu_write(pfdev, GPU_PERFCNT_CFG, - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF)); - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0); - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + panfrost_perfcnt_gpu_disable(pfdev); } --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF8981DA57 for ; Fri, 24 Jul 2026 00:01:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3263; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=T7U9edMzpRK9aAMWEZ+SiPKRkqpUPu8BX0k4Qkh2M8Y=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqrpzsCc0sBF7XwP2T4bGezhs9rQQwuTlg/Ul LN/8pDcv9CJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6QAKCRAOJn5M7lND PW/AC/4qJ7VlVWbGC5aJmjDx3lr1CpgeOsRhwH6FLOL26R4i472gDkyXFiuLkMzr9G3XjJLtkpN 9nvEZxGF+WnIGFiy45R+rohGuikeoCG8eVeMXZjDHI14OADBRyhudJqv8w20dGXXT2ZtfQ78t5d 4j7sk3jsTbcpeNbXifs12GcgD/QBcb4ohKJiisrxxsXYZYcXiRYELJ7UABCYRPQNRkGBk369DDp l96g8PR9DxPi6Nh8PfD94RMBoliVx/sjFZantHnN9Cf+6isdPMG3MoG78RWF8Vt8yWa213kqC67 HbU9BdKa8Kqm1shUIfn4xH2PpFxRUByrAjheTjQOg70/yiKtwNfLqspK40rs0kRfI2wA2Bwpm7o Eofb6LcUkleXu3uuB+9xmPOH5YXCZwb2aXa+Fd3GrUFYMpXd4k83Y+3Nh9Jq6nNlrhLA32ARC5L QnVSHZ/qao6ltKuEchIWEkVxzRBDKy68jvLeDNuzpC8qwEosWIJL979+cVNc2VJtNAyVI= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D So as to avoid accessing HW register while a reset is ongoing, a read/write semaphore that envelopes the reset sequence will help driver entry points avoid racing with it. For now, the only such racy entry point is the ioctl that returns the current GPU timestmap. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 5 +++++ drivers/gpu/drm/panfrost/panfrost_device.h | 1 + drivers/gpu/drm/panfrost/panfrost_drv.c | 9 ++++++--- drivers/gpu/drm/panfrost/panfrost_job.c | 2 ++ 4 files changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 80746e375410..46c6e911e562 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -617,6 +617,10 @@ void panfrost_device_reset(struct panfrost_device *pfd= ev, bool enable_job_int) { int ret; =20 + /* Pre-reset */ + if (panfrost_device_is_initialized(pfdev)) + down_write(&pfdev->reset.lock); + /* Do the actual device reset */ ret =3D panfrost_gpu_soft_reset(pfdev); panfrost_gpu_power_on(pfdev); @@ -630,6 +634,7 @@ void panfrost_device_reset(struct panfrost_device *pfde= v, bool enable_job_int) panfrost_jm_reset_interrupts(pfdev); if (enable_job_int) panfrost_jm_enable_interrupts(pfdev); + up_write(&pfdev->reset.lock); } } =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 855ee4d0fb40..7f5202ff6469 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -167,6 +167,7 @@ struct panfrost_device { struct { struct workqueue_struct *wq; struct work_struct work; + struct rw_semaphore lock; wait_queue_head_t wait; atomic_t pending; } reset; diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 2490e9785057..e04eb416ea0f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -41,9 +41,12 @@ static int panfrost_ioctl_query_timestamp(struct panfros= t_device *pfdev, if (ret) return ret; =20 - panfrost_cycle_counter_get(pfdev); - *arg =3D panfrost_timestamp_read(pfdev); - panfrost_cycle_counter_put(pfdev); + /* We should not read timestamp register while the GPU is being reset */ + scoped_guard(rwsem_read, &pfdev->reset.lock) { + panfrost_cycle_counter_get(pfdev); + *arg =3D panfrost_timestamp_read(pfdev); + panfrost_cycle_counter_put(pfdev); + } =20 pm_runtime_put(pfdev->base.dev); return 0; diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index c2a1670a74e8..c1d0b111dde1 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -895,7 +895,9 @@ int panfrost_jm_init(struct panfrost_device *pfdev) if (!pfdev->reset.wq) return -ENOMEM; args.timeout_wq =3D pfdev->reset.wq; + init_waitqueue_head(&pfdev->reset.wait); + init_rwsem(&pfdev->reset.lock); =20 for (j =3D 0; j < NUM_JOB_SLOTS; j++) { js->queue[j].fence_context =3D dma_fence_context_alloc(1); --=20 2.55.0 From nobody Fri Jul 24 04:50:43 2026 Received: from sender4-op-o11.zoho.com (sender4-op-o11.zoho.com [136.143.188.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5985E56A for ; Fri, 24 Jul 2026 00:01:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-12-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=12692; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=ZQVtgbIlObc6kA/k0j/xqw2dNF/CaFJE1JMxBRIX3Jg=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqrpLnIGwAaUSHumpmq8aIDfxzAye/y9Wfo7Q IoX9GIPwzqJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6QAKCRAOJn5M7lND PWQbC/9mLqoPuy1Le+CITjSFIVnL0OX1V5ukFc6ktrbYmcPWEWj6m1nArX1eNw/Cn1oJTOpzuxE D4pVY1Ma9oCbW2xlqfHwNMt4ki88GzJr7VFLLjsoN6EqB9gnVmBZ1xgzTigdUcLJLi5+6YSXNRW 8S82S+N6noVpLh0THkWx2W78ZyHQV5UMfvX+kNdDGI4LRckxFS0NhoXlxEsxpL3Xydi/TZm6foy AqozVwA7V0YoTHzRI4tH2rg+N7jswL31XBf2WDIaBO8uz/5VYfNhRMT32g4WR7dLGCWEUsJD1Uo wqbhuxavKOOHdFx13V8nRLaBS3wV69NM5me741uJk1w9twjUY7wyY7SHc0t0UdKbcS3bSK74TZy rPj2dg7aA7YDReb8D69vSpp8eiwKbilR/bXXHzUFg4VJCk6fqe7b08hIQ8tdzA8PDAEBf9Rcw0d NR28xAg2GV6pgQDPaMPANzAlot+IP69HYNHOIbaW6rR94ymnPuRXFsfocP8kL6ywihyxw= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Formerly, the reset sequence would race with panfrost_mmu_as_put() when tearing down a perfcnt session. On top of that, poking GPU registers to program a perfcnt session or obtaining a dump might lead to undefined behaviour when done at the same time a reset was ongoing. Use the reset r/w semaphore to govern access to the hardware at reset time. On top of that, expand the DRM uAPI for the perfcnt DUMP operation so that userspace can be made aware of a reset having happened, because that means counters will go back to 0 and can no longer be accumulated to values previously kept in user space. The new perfcnt-aware reset sequence also takes care to reestablish perfcnt to its original configuration if there was an enabled session. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 5 +- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 196 ++++++++++++++++++++----= ---- drivers/gpu/drm/panfrost/panfrost_perfcnt.h | 2 + include/uapi/drm/panfrost_drm.h | 3 +- 4 files changed, 146 insertions(+), 60 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 46c6e911e562..2ee8d9584c36 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -618,8 +618,10 @@ void panfrost_device_reset(struct panfrost_device *pfd= ev, bool enable_job_int) int ret; =20 /* Pre-reset */ - if (panfrost_device_is_initialized(pfdev)) + if (panfrost_device_is_initialized(pfdev)) { down_write(&pfdev->reset.lock); + panfrost_perfcnt_reset(pfdev); + } =20 /* Do the actual device reset */ ret =3D panfrost_gpu_soft_reset(pfdev); @@ -634,6 +636,7 @@ void panfrost_device_reset(struct panfrost_device *pfde= v, bool enable_job_int) panfrost_jm_reset_interrupts(pfdev); if (enable_job_int) panfrost_jm_enable_interrupts(pfdev); + panfrost_perfcnt_postreset(pfdev); up_write(&pfdev->reset.lock); } } diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.c index ad1156678e91..a6f1b0b961fc 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.c +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.c @@ -11,6 +11,7 @@ #include #include #include +#include =20 #include "panfrost_device.h" #include "panfrost_features.h" @@ -25,14 +26,17 @@ #define BYTES_PER_COUNTER 4 #define BLOCKS_PER_COREGROUP 8 #define V4_SHADERS_PER_COREGROUP 4 +#define PERFCNT_DUMP_MAX_RETRIES 5 =20 struct panfrost_perfcnt { struct panfrost_gem_mapping *mapping; + unsigned int counterset; size_t bosize; void *buf; struct panfrost_file_priv *user; struct mutex lock; struct completion dump_comp; + atomic_t reset_happened; }; =20 static void panfrost_perfcnt_gpu_disable(struct panfrost_device *pfdev) @@ -55,38 +59,98 @@ void panfrost_perfcnt_sample_done(struct panfrost_devic= e *pfdev) gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_CACHES); } =20 -static int panfrost_perfcnt_dump_locked(struct panfrost_device *pfdev) +static int panfrost_perfcnt_dump_locked(struct panfrost_device *pfdev, + u64 *reset_happened) { + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + u64 retries =3D PERFCNT_DUMP_MAX_RETRIES; + bool previous_reset; u64 gpuva; int ret; =20 reinit_completion(&pfdev->perfcnt->dump_comp); gpuva =3D pfdev->perfcnt->mapping->mmnode.start << PAGE_SHIFT; - gpu_write(pfdev, GPU_PERFCNT_BASE_LO, lower_32_bits(gpuva)); - gpu_write(pfdev, GPU_PERFCNT_BASE_HI, upper_32_bits(gpuva)); - gpu_write(pfdev, GPU_INT_CLEAR, - GPU_IRQ_CLEAN_CACHES_COMPLETED | - GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); - gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_SAMPLE); + previous_reset =3D atomic_read(&perfcnt->reset_happened); + +dump_retry: + scoped_guard(rwsem_read, &pfdev->reset.lock) { + gpu_write(pfdev, GPU_PERFCNT_BASE_LO, lower_32_bits(gpuva)); + gpu_write(pfdev, GPU_PERFCNT_BASE_HI, upper_32_bits(gpuva)); + gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_CLEAN_CACHES_COMPLETED | + GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); + gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_SAMPLE); + } + ret =3D wait_for_completion_interruptible_timeout(&pfdev->perfcnt->dump_c= omp, msecs_to_jiffies(1000)); - if (!ret) - ret =3D -ETIMEDOUT; - else if (ret > 0) - ret =3D 0; + if (retries =3D=3D PERFCNT_DUMP_MAX_RETRIES) + *reset_happened =3D previous_reset || atomic_read(&perfcnt->reset_happen= ed); + + if (atomic_cmpxchg(&perfcnt->reset_happened, 1, 0)) { + if (--retries >=3D 0) + goto dump_retry; + ret =3D -EBUSY; + } else { + if (!ret) + ret =3D -ETIMEDOUT; + else if (ret > 0) + ret =3D 0; + } =20 return ret; } =20 +static int panfrost_perfcnt_hw_enable(struct panfrost_device *pfdev) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + u32 cfg, as; + int ret; + + /* TODO: could keeping the as somehow race with perfcnt_disable? */ + ret =3D panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu); + if (ret < 0) + return ret; + + as =3D ret; + cfg =3D GPU_PERFCNT_CFG_AS(as) | + GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_MANUAL); + + /* + * Bifrost GPUs have 2 set of counters, but we're only interested by + * the first one for now. + */ + if (panfrost_model_is_bifrost(pfdev)) + cfg |=3D GPU_PERFCNT_CFG_SETSEL(perfcnt->counterset); + + gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0xffffffff); + gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0xffffffff); + gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0xffffffff); + + /* + * Due to PRLAM-8186 we need to disable the Tiler before we enable HW + * counters. + */ + if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); + else + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + + gpu_write(pfdev, GPU_PERFCNT_CFG, cfg); + + if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) + gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + + return 0; +} + static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev, struct drm_file *file_priv, unsigned int counterset) { struct panfrost_file_priv *user =3D file_priv->driver_priv; struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; - struct iosys_map map; struct drm_gem_shmem_object *bo; - u32 cfg, as; + struct iosys_map map; int ret; =20 if (user =3D=3D perfcnt->user) @@ -127,57 +191,37 @@ static int panfrost_perfcnt_enable_locked(struct panf= rost_device *pfdev, * Invalidate the cache and clear the counters to start from a fresh * state. */ - reinit_completion(&pfdev->perfcnt->dump_comp); - gpu_write(pfdev, GPU_INT_CLEAR, - GPU_IRQ_CLEAN_CACHES_COMPLETED | - GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); - gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR); - gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + reinit_completion(&pfdev->perfcnt->dump_comp); + gpu_write(pfdev, GPU_INT_CLEAR, + GPU_IRQ_CLEAN_CACHES_COMPLETED | + GPU_IRQ_PERFCNT_SAMPLE_COMPLETED); + gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR); + gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES); + } + + /* + * If a reset happens during the wait for the IRQ notification that caches + * are clean and invalidated, then we know the reset sequence did the job + * for us, even if resetting IRQs means the completion might time out. + */ ret =3D wait_for_completion_timeout(&pfdev->perfcnt->dump_comp, msecs_to_jiffies(1000)); - if (!ret) { + if (!ret && !atomic_read(&perfcnt->reset_happened)) { ret =3D -ETIMEDOUT; goto err_vunmap; } =20 - ret =3D panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu); - if (ret < 0) - goto err_vunmap; - - as =3D ret; - cfg =3D GPU_PERFCNT_CFG_AS(as) | - GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_MANUAL); - - /* - * Bifrost GPUs have 2 set of counters, but we're only interested by - * the first one for now. - */ - if (panfrost_model_is_bifrost(pfdev)) - cfg |=3D GPU_PERFCNT_CFG_SETSEL(counterset); - - gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0xffffffff); - gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0xffffffff); - gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0xffffffff); - - /* - * Due to PRLAM-8186 we need to disable the Tiler before we enable HW - * counters. - */ - if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0); - else - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); - - gpu_write(pfdev, GPU_PERFCNT_CFG, cfg); - - if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186)) - gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + perfcnt->counterset =3D counterset; + perfcnt->user =3D user; + atomic_set(&perfcnt->reset_happened, 0); + panfrost_perfcnt_hw_enable(pfdev); + } =20 /* The BO ref is retained by the mapping. */ drm_gem_object_put(&bo->base); =20 - perfcnt->user =3D user; - return 0; =20 err_vunmap: @@ -203,13 +247,15 @@ static int panfrost_perfcnt_disable_locked(struct pan= frost_device *pfdev, if (user !=3D perfcnt->user) return -EINVAL; =20 - panfrost_perfcnt_gpu_disable(pfdev); + scoped_guard(rwsem_read, &pfdev->reset.lock) { + panfrost_mmu_as_put(pfdev, perfcnt->mapping->mmu); + panfrost_perfcnt_gpu_disable(pfdev); + perfcnt->user =3D NULL; + } =20 - perfcnt->user =3D NULL; drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map); perfcnt->buf =3D NULL; panfrost_gem_close(&perfcnt->mapping->obj->base.base, file_priv); - panfrost_mmu_as_put(pfdev, perfcnt->mapping->mmu); panfrost_gem_mapping_put(perfcnt->mapping); perfcnt->mapping =3D NULL; pm_runtime_put_autosuspend(pfdev->base.dev); @@ -263,7 +309,7 @@ int panfrost_ioctl_perfcnt_dump(struct drm_device *dev,= void *data, goto out; } =20 - ret =3D panfrost_perfcnt_dump_locked(pfdev); + ret =3D panfrost_perfcnt_dump_locked(pfdev, &req->hw_reset); if (ret) goto out; =20 @@ -346,3 +392,37 @@ void panfrost_perfcnt_fini(struct panfrost_device *pfd= ev) /* Disable everything before leaving. */ panfrost_perfcnt_gpu_disable(pfdev); } + +void panfrost_perfcnt_reset(struct panfrost_device *pfdev) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + + /* Could a reset somehow race with perfcnt_fini? */ + if (drm_WARN_ON(&pfdev->base, !perfcnt)) + return; + + lockdep_assert_held(&pfdev->reset.lock); + + if (!perfcnt->user) + return; + + atomic_set(&perfcnt->reset_happened, 1); + synchronize_irq(pfdev->gpu_irq); + complete(&perfcnt->dump_comp); + panfrost_perfcnt_gpu_disable(pfdev); +} + +void panfrost_perfcnt_postreset(struct panfrost_device *pfdev) +{ + struct panfrost_perfcnt *perfcnt =3D pfdev->perfcnt; + + if (drm_WARN_ON(&pfdev->base, !perfcnt)) + return; + + lockdep_assert_held(&pfdev->reset.lock); + + if (!perfcnt->user) + return; + + panfrost_perfcnt_hw_enable(pfdev); +} diff --git a/drivers/gpu/drm/panfrost/panfrost_perfcnt.h b/drivers/gpu/drm/= panfrost/panfrost_perfcnt.h index 8bbcf5f5fb33..e14e760641fd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_perfcnt.h +++ b/drivers/gpu/drm/panfrost/panfrost_perfcnt.h @@ -14,5 +14,7 @@ int panfrost_ioctl_perfcnt_enable(struct drm_device *dev,= void *data, struct drm_file *file_priv); int panfrost_ioctl_perfcnt_dump(struct drm_device *dev, void *data, struct drm_file *file_priv); +void panfrost_perfcnt_reset(struct panfrost_device *pfdev); +void panfrost_perfcnt_postreset(struct panfrost_device *pfdev); =20 #endif diff --git a/include/uapi/drm/panfrost_drm.h b/include/uapi/drm/panfrost_dr= m.h index 50d5337f35ef..3bbf9220103d 100644 --- a/include/uapi/drm/panfrost_drm.h +++ b/include/uapi/drm/panfrost_drm.h @@ -47,7 +47,7 @@ extern "C" { * them for anything but debugging purpose. */ #define DRM_IOCTL_PANFROST_PERFCNT_ENABLE DRM_IOW(DRM_COMMAND_BASE + DRM_P= ANFROST_PERFCNT_ENABLE, struct drm_panfrost_perfcnt_enable) -#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PA= NFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump) +#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOWR(DRM_COMMAND_BASE + DRM_P= ANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump) =20 #define PANFROST_JD_REQ_FS (1 << 0) #define PANFROST_JD_REQ_CYCLE_COUNT (1 << 1) @@ -272,6 +272,7 @@ struct drm_panfrost_perfcnt_enable { =20 struct drm_panfrost_perfcnt_dump { __u64 buf_ptr; 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Thu, 23 Jul 2026 17:01:02 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 24 Jul 2026 00:59:06 +0100 Subject: [PATCH v3 13/13] drm/panfrost: Bump driver minor to reflect new DUMP IOCTL req field Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-claude-fixes-v3-13-542af61abd0f@collabora.com> References: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> In-Reply-To: <20260724-claude-fixes-v3-0-542af61abd0f@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1172; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=0nSYYdP+Vk0D9tHhyK5Rd2zCsph/BYAPaERTuRr0yfU=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqYqrpy24c7GsVf4slbr08YVEHOS658ldj4XFJT Ulsna2hjqOJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCamKq6QAKCRAOJn5M7lND PT/3DACWj6XO0VR2o2QhSYtUkwW8smg5AmuMPF+gNRi71lary98UFO6UcKiQkHAGY5ha6y07/jo U4Tr8Yi0NF2QpBfhbCCNtUqVMMiF6uHTNEHb2MhVboTST/rCul+76vXjPOWwaXTWv6D+o+c4OZA sLvQLrZdmO0zlKGM2x864uDtwzI8McfltIiVpLqDSsVf1VW+soIM4O9gye/09Lzi9KgMJpIymhT MUD44To+nqo/CtzA+/Lz+ERXFUOZNx3MFXgktuyahOlctjZgfwmM9jlSjLYVfjXX8MHwrxw8Xto OkMXXWwuLdUbiuOYFYfHXmurdIyholh6RZDCtdU6B9bBrZXSl0a7IP9yt26AaxGaEnn5c8NXyHH yJtAGtZC/g+j7UeMFNxjknnpb7okMs60cJrCKSDhgrKfLOJS8v/D8O1mOlpOko3aol/EkmcHhyp E1CEdvxjrRAFsfqnHOyD1kmMv6dpSJobs0GvNEAYbzEdxqLKJLOw8BBLN215aRXprvOas= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D Expose expanded PERFCNT_DUMP IOCTL interface to user mode. Signed-off-by: Adri=C3=A1n Larumbe --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index e04eb416ea0f..d9d41236cc71 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -936,6 +936,7 @@ static void panfrost_debugfs_init(struct drm_minor *min= or) * - 1.6 - adds PANFROST_BO_MAP_WB, PANFROST_IOCTL_SYNC_BO, * PANFROST_IOCTL_QUERY_BO_INFO and * DRM_PANFROST_PARAM_SELECTED_COHERENCY + * - 1.7 - adds PERFCNT_DUMP req hw_reset field */ static const struct drm_driver panfrost_drm_driver =3D { .driver_features =3D DRIVER_RENDER | DRIVER_GEM | DRIVER_SYNCOBJ, @@ -948,7 +949,7 @@ static const struct drm_driver panfrost_drm_driver =3D { .name =3D "panfrost", .desc =3D "panfrost DRM", .major =3D 1, - .minor =3D 6, + .minor =3D 7, =20 .gem_create_object =3D panfrost_gem_create_object, .gem_prime_import =3D panfrost_gem_prime_import, --=20 2.55.0