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Fri, 24 Jul 2026 14:16:54 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:41 +0200 Subject: [PATCH v3 1/9] dt-bindings: arm: apple: Add M3 Pro/Max/Ultra devices (T603x) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-1-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3346; i=j@jannau.net; h=from:subject:message-id; bh=3DLK4uSPqvhbiYOir4MraNLTj5Fo4Xhdu2DX7dKgAz4=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNbzHF93/bv332qaiiRt+5Nze2F1zPvvq8YhTF9iv1 apqnLn4pWMiC4MYF4OlmCJLkvbLDobVNYoxtQ/CYOawMoEMkRZpYAACFga+3MS8UiMdIz1TbUM9 QyMdYx0jBi5OAZjqFZ0M/7T/eHiWvWbKFZ76QqPUZ/fmxqRqhpkqr8N9mDnn9nAa3mBkeBl9rjp o9bqZLuFOuWEH3d5O09Sa8fL2zs+MbRNd1MwSGQE= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The M3 Pro, Max and Ultra Apple silicon SoC family (T6030, T6031, T6032 and T6034) differs from its M1 and M2 predecessors. Most notable is that T6030 (M3 Pro) appears to be a separately designed SoC. MMIO address spaces, interrupt and pin numbers do not match. It has two CPU clusters with 6 efficiency or performance cores. T6031 (M3 Max) as one cluster with 4 effciency cores and two clusters with 6 performance cores each. T6032 (M3 Ultra) is like in the previous generations two T6031 dies connected with an high speed interface and appears from operation system perspective as a single SoC. T6034 is a separate identifier for smaller M3 Max variant. It has fewer performance CPU cores (10 instead of 12), fewer GPU cores (30 instead of 40) and less memory controllers (384-bit instead of 512-bit combined width). Apple has only released 14- and 16-inch Macbook Pros with T6030, T6031 and T6034 (M3 Pro and Max) and as only desktop device the Mac Studio with T6032 (M3 Ultra). Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/arm/apple.yaml | 37 ++++++++++++++++++++= ++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index e49403c73f9d..fb277c96f341 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -123,6 +123,14 @@ description: | - Mac Studio (M2 Ultra, 2023) - Mac Pro (M2 Ultra, 2023) =20 + Devices based on the "M3 Pro", "M3 Max" and "M3 Ultra" SoCs: + + - MacBook Pro (14-inch, M3 Pro, 2023) + - MacBook Pro (14-inch, M3 Max, 2023) + - MacBook Pro (16-inch, M3 Pro, 2023) + - MacBook Pro (16-inch, M3 Max, 2023) + - Mac Studio (M3 Ultra, 2025) + The compatible property should follow this format: =20 compatible =3D "apple,", "apple,", "apple,arm-platfor= m"; @@ -365,6 +373,35 @@ properties: - const: apple,t6022 - const: apple,arm-platform =20 + - description: Apple M3 Pro SoC based platforms + items: + - enum: + - apple,j514s # MacBook Pro (14-inch, M3 Pro, 2023) + - apple,j516s # MacBook Pro (16-inch, M3 Pro, 2023) + - const: apple,t6030 + - const: apple,arm-platform + + - description: Apple M3 Max SoC based platforms + oneOf: + - items: + - enum: + - apple,j514c # MacBook Pro (14-inch, M3 Max, 16 cores,= 2023) + - apple,j516c # MacBook Pro (16-inch, M3 Max, 16 cores,= 2023) + - const: apple,t6031 + - const: apple,arm-platform + - items: + - enum: + - apple,j514m # MacBook Pro (14-inch, M3 Max, 14 cores,= 2023) + - apple,j516m # MacBook Pro (16-inch, M3 Max, 14 cores,= 2023) + - const: apple,t6034 + - const: apple,arm-platform + + - description: Apple M3 Ultra SoC based platforms + items: + - const: apple,j575d # Mac Studio (M3 Ultra, 2025) + - const: apple,t6032 + - const: apple,arm-platform + additionalProperties: true =20 ... --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fout-b1-smtp.messagingengine.com (fout-b1-smtp.messagingengine.com [202.12.124.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B41AC41B36A; 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Fri, 24 Jul 2026 14:16:56 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:42 +0200 Subject: [PATCH v3 2/9] dt-bindings: interrupt-controller: apple,aic2: Invert #interrupt-cells condition Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-2-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1552; i=j@jannau.net; h=from:subject:message-id; bh=AKZYad8jBRwy8Pq5GWuDAVzKic6oS+V16a1/1LfrzSg=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNbwWPLGcy7dN7FH+lXsmalZ86/pNJQy54kleew/17 t+lnmffMYGFQYyLwVJMkSVJ+2UHw+oaxZjaB2Ewc1iZQIZIizQwAAELA19uYl6pkY6Rnqm2oZ6h kY6xjhEDF6cATPXM3ww/5p25m9mteK7OlfnG7OzuPZK5xWkik6W6/k1UzgxesmstI0PXpN9nLWx EOB+YTJT5suaXquVd030nkgS6fKfemli//S47AA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The condition for 3 or 4 #interrupt-cells list compatibles for the 3 cells variant (not used in SoCs consisting out of multiple dies). This includes the AICv3 base compatible "apple,t8122-aic3". This will match compatible =3D "apple,t6031-aic3", "apple,t8122-aic3"; shared for M3 Max and Ultra based devices which require the additional interrupt cell for the die number. Instead list the compatibles used for multi-die SoCs explicitly and use 4 #interrupt-cells for them. Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- .../devicetree/bindings/interrupt-controller/apple,aic2.yaml | 8 ++++= ---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index d0d9a90e96e7..a94787939d34 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -128,16 +128,16 @@ allOf: compatible: contains: enum: - - apple,t8112-aic - - apple,t8122-aic3 + - apple,t6000-aic + - apple,t6020-aic then: properties: '#interrupt-cells': - const: 3 + const: 4 else: properties: '#interrupt-cells': - const: 4 + const: 3 =20 examples: - | --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fhigh-b3-smtp.messagingengine.com (fhigh-b3-smtp.messagingengine.com [202.12.124.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3602D41685D; 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Fri, 24 Jul 2026 14:16:59 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:43 +0200 Subject: [PATCH v3 3/9] dt-bindings: interrupt-controller: apple,aic2: Add apple,t6031-aic3 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-3-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1233; i=j@jannau.net; h=from:subject:message-id; bh=GDAcLzUVKgsaSayFIqUH1HECZbzpn/awNHaCk0rT/Bg=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNXwBMa9cOg70/o84fHtXeN12dmFlE67YpR+Nihfp7 ZaIbdnRMZGFQYyLwVJMkSVJ+2UHw+oaxZjaB2Ewc1iZQIZIizQwAAELA19uYl6pkY6Rnqm2oZ6h kY6xjhEDF6cATLX5cUaGWyKVN27cOWysv7D3SX6+WWav0rOgd0ZKZbu2fbrM+PhHCyPDfPYGifq oM9eZZd4U9xj53nI0izOO+Xi65aGPm9KFk7E8AA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The Apple M3 Max and Ultra SoCs use AICv3 as interrupt controller. It is compatible to the base M3 AICv3. Add "apple,t6031-aic3" as compatible and add it to the list for 4 #interrupt-cells used for multi-die SoCs. Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 2= ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index a94787939d34..726a6720e05f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -44,6 +44,7 @@ properties: - items: - enum: - apple,t6030-aic3 + - apple,t6031-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 @@ -130,6 +131,7 @@ allOf: enum: - apple,t6000-aic - apple,t6020-aic + - apple,t6031-aic3 then: properties: '#interrupt-cells': --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fout-b1-smtp.messagingengine.com (fout-b1-smtp.messagingengine.com [202.12.124.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B653C41BA87; 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Fri, 24 Jul 2026 14:17:01 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:44 +0200 Subject: [PATCH v3 4/9] dt-bindings: arm: apple: apple,pmgr: Add t6030 and t6031 compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-4-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=999; i=j@jannau.net; h=from:subject:message-id; bh=EAgiesomzybSknxGeZNprvP2a+/4nRBcYAJ0yjY0iyA=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNXx/VnYK7UjwNvKpT+8t6toexl44u9bq5vUXy/Zlr EsSWtrRMZGFQYyLwVJMkSVJ+2UHw+oaxZjaB2Ewc1iZQIZIizQwAAELA19uYl6pkY6Rnqm2oZ6h kY6xjhEDF6cATPWLGQz/lAOnFov8TYw69bp9pmHypVqLjMvn18mt514+YfH/2UHSUxkZJp3ILnr 9/C97gonHt4UhQSdkOf+s59g+O/xkfOJHobwzHAA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The block on Apple M3 Pro, Max and Ultra SoCs is compatible with "apple,t8103-pmgr". Add "apple,t6030-pmgr" and "apple,t6031-pmgr" as per-SoC compatibles for M3 Pro and M3 Max and Ultra. Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index c67b67ba065a..1d2001836eb4 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -38,6 +38,8 @@ properties: - items: - enum: - apple,t6020-pmgr + - apple,t6030-pmgr + - apple,t6031-pmgr - apple,t8122-pmgr - const: apple,t8103-pmgr - const: syscon --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fhigh-b3-smtp.messagingengine.com (fhigh-b3-smtp.messagingengine.com [202.12.124.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2648435A93; Fri, 24 Jul 2026 18:17:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 24 Jul 2026 14:17:04 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:45 +0200 Subject: [PATCH v3 5/9] dt-bindings: power: apple,pmgr-pwrstate: Add t6030 and t6031 compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-5-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1093; i=j@jannau.net; h=from:subject:message-id; bh=EOha7mQGj6gCEN3iU4Vtes8noxMlN2Ugngc5Pw+LtX8=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNXybFX/O7o7TyNt1utMkaeZMy6QXu0q3H8g76LCKe zLfdF+ljoksDGJcDJZiiixJ2i87GFbXKMbUPgiDmcPKBDJEWqSBAQhYGPhyE/NKjXSM9Ey1DfUM jXSMdYwYuDgFYKrVfBn+hxwKkCmYLPou3fxNm+rS36dCHSrnbJGW19hruP5U2Lv6lQz/NI71G0e ccW6Y9M3p5yUNxgcng18Yxj8sbn850yT3EOdvRgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The pmgr-powerstate registers on Apple M3 Pro, Max and Ultra SoCs are compatible with "apple,t8103-pmgr-pwrstate". Add "apple,t6030-pmgr-pwrstate" for M3 Pro and "apple,t6031-pmgr-pwrstate" for M3 Max and Ultra as per-SoC compatibles. Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index c9be097cfba0..e269f433524e 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -45,6 +45,8 @@ properties: - items: - enum: - apple,t6020-pmgr-pwrstate + - apple,t6030-pmgr-pwrstate + - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fhigh-b3-smtp.messagingengine.com (fhigh-b3-smtp.messagingengine.com [202.12.124.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D993442B05; 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Fri, 24 Jul 2026 14:17:06 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:46 +0200 Subject: [PATCH v3 6/9] dt-bindings: i2c: apple,i2c: Add t6030 and t6031 compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-6-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=959; i=j@jannau.net; h=from:subject:message-id; bh=UeodmP8zjm6vT7hJS7cbsmjEW7Hjxj6/HXGYdSRLKaI=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNfw33a9ICC0Pu/h+xkdDM5O1Ezg5d/huj9u9wPnTu 00Gl7/965jIwiDGxWAppsiSpP2yg2F1jWJM7YMwmDmsTCBDpEUaGICAhYEvNzGv1EjHSM9U21DP 0EjHWMeIgYtTAKba8gPDf9fg+cGhwqnHH5dWLsrs+GcTsFnn2Got3l/BdU3nzr2MfMfwTyHt1eO HglND6m52T7BMjvRe6y5rIvm7x03q4dWuwAI9DgA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The i2c block on Apple silicon M3 Pro, Max and Ultra SoCs are compatible with the t8103 (M1) one. Add "apple,t6030-i2c" for M3 Pro and "apple,t6031-i2c" for M3 Max and Ultra as per-SoC compatibles. Acked-by: Conor Dooley Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documen= tation/devicetree/bindings/i2c/apple,i2c.yaml index 9e59200ad37b..d39f5e3f1df4 100644 --- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml @@ -24,6 +24,8 @@ properties: - items: - enum: - apple,t6020-i2c + - apple,t6030-i2c + - apple,t6031-i2c - apple,t8122-i2c - const: apple,t8103-i2c - items: --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fhigh-b3-smtp.messagingengine.com (fhigh-b3-smtp.messagingengine.com [202.12.124.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06FB14483B7; Fri, 24 Jul 2026 18:17:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.154 ARC-Seal: i=1; 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Fri, 24 Jul 2026 14:17:08 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:47 +0200 Subject: [PATCH v3 7/9] dt-bindings: pwm: apple,s5l-fpwm: Add t6030 and t6031 compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-7-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1013; i=j@jannau.net; h=from:subject:message-id; bh=hoexqVQCY+ejGnrBu1mfICEMGGXuczIAOnwrV9ILD/o=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNfxzTkcfmWseJbIqdLLOBxbn+OuBO7cnpl/w37BsK a+M7F6ejoksDGJcDJZiiixJ2i87GFbXKMbUPgiDmcPKBDJEWqSBAQhYGPhyE/NKjXSM9Ey1DfUM jXSMdYwYuDgFYKqzaxgZPts8PZS4U0W30CNZLnuBpuw5/VUHpRwubVuaa892ZMbBlwz/Szvf32q bdCD/Yqy23KJjGxaprnMMKsycZ6pw8cb0YP0ffAA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The PWM controller on Apple silicon M3 Pro, Max and Ultra SoCs is compatible with the t8103 (M1) one. Add "apple,t6030-fpwm" for M3 Pro and "apple,t6031-fpwm" for M3 Max and Ultra as per-SoC compatibles. Acked-by: Conor Dooley Acked-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Do= cumentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml index 25ef04b60ca1..dd95037ea5ee 100644 --- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml @@ -21,6 +21,8 @@ properties: - apple,t8122-fpwm - apple,t6000-fpwm - apple,t6020-fpwm + - apple,t6030-fpwm + - apple,t6031-fpwm - const: apple,s5l-fpwm =20 reg: --=20 2.55.0 From nobody Fri Jul 24 20:49:29 2026 Received: from fout-b1-smtp.messagingengine.com (fout-b1-smtp.messagingengine.com [202.12.124.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94DE644AB7F; Fri, 24 Jul 2026 18:17:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 24 Jul 2026 14:17:11 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:48 +0200 Subject: [PATCH v3 8/9] arm64: dts: apple: Initial T603[124] (M3 Max and Ultra) device trees Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-8-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=114739; i=j@jannau.net; h=from:subject:message-id; bh=EsRysDfOTJXwSBnAPYfNT+fnN9LlBKOUSfVFtkFzFeQ=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNQIFuV7b94S/NjmpZ/JKQeOLwz39nz9+Oyw/5L9qe qqWpeuBjoksDGJcDJZiiixJ2i87GFbXKMbUPgiDmcPKBDJEWqSBAQhYGPhyE/NKjXSM9Ey1DfUM jXSMdYwYuDgFYKq3v2Nk6NTkTr26SNxzodf7II6JpdIL8roMa85FNm4K4Mw2ONbNz/DfNy1CLWT Tc7Yj3c9ifF6fOOJp3zb3W1FnbrupxxzWaYvYAA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 Contains minimal device trees for all M3 Max and Ultra Apple silicon devices. Those are 14-inch and 16-inch MacBook Pros with M3 Max released in November 2023 and Mac Studio with M3 Ultra released in 2025. This does not include M3 Pro since it is separate SoC and not a smaller variant of the M3 Max contrary to the M1 and M2 generations. The smaller M3 Max variant (10 performance cores) has its own chip variant (T6034) but is clearly the same design as T6031. Besides fewer CPU performance cores and GPU cores it misses also on fourth of the memory controllers and thus has an aggregated bus width of 384 bit instead of 512 bit. Both M3 Ultra variants (28 or 32 CPU cores) are based on T6031 judging by the advertised memory bandwidth of 819GB/s. This uses the same multi-die macros as t600x*.dtsi and t602x.dtsi to support M3 Max and M3 Ultra without duplicating device nodes. Since the M3 Pro can't use the same .dtsi files "t6031*.dtsi" are used to define common nodes for T6031, T6032 and T6034. The device trees have devices nodes for CPU cores, timer, interrupt controller, power states, watchdog, serial, pin controller, i2c, PWM based keyboard LED illumination and the boot framebuffer. Reviewed-by: Sven Peter Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 5 + arch/arm64/boot/dts/apple/t6031-base.dtsi | 297 +++ arch/arm64/boot/dts/apple/t6031-die0.dtsi | 197 ++ arch/arm64/boot/dts/apple/t6031-dieX.dtsi | 107 ++ arch/arm64/boot/dts/apple/t6031-gpio-pins.dtsi | 53 + arch/arm64/boot/dts/apple/t6031-j514c.dts | 18 + arch/arm64/boot/dts/apple/t6031-j516c.dts | 18 + arch/arm64/boot/dts/apple/t6031-pmgr.dtsi | 2400 ++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t6031.dtsi | 48 + arch/arm64/boot/dts/apple/t6032-j575d.dts | 46 + arch/arm64/boot/dts/apple/t6032.dtsi | 416 ++++ arch/arm64/boot/dts/apple/t6034-j514m.dts | 18 + arch/arm64/boot/dts/apple/t6034-j516m.dts | 18 + arch/arm64/boot/dts/apple/t6034.dtsi | 53 + arch/arm64/boot/dts/apple/t603x-j514-j516.dtsi | 66 + 15 files changed, 3760 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 6fc3349a5842..a22b4a8068b6 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -87,6 +87,11 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t6021-j416c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6020-j474s.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6021-j475c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6022-j475d.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6031-j514c.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6031-j516c.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6032-j575d.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6034-j514m.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6034-j516m.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j413.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j415.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j473.dtb diff --git a/arch/arm64/boot/dts/apple/t6031-base.dtsi b/arch/arm64/boot/dt= s/apple/t6031-base.dtsi new file mode 100644 index 000000000000..74e1fa51242d --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-base.dtsi @@ -0,0 +1,297 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Nodes common for T6031, T6032 and T6034 family SoCs (M3 Max/Ultra) + * + * Other names: H15J, H15S, "Palma" + * + * Copyright The Asahi Linux Contributors + */ + +/ { + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e00>; + }; + core1 { + cpu =3D <&cpu_e01>; + }; + core2 { + cpu =3D <&cpu_e02>; + }; + core3 { + cpu =3D <&cpu_e03>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p00>; + }; + core1 { + cpu =3D <&cpu_p01>; + }; + core2 { + cpu =3D <&cpu_p02>; + }; + core3 { + cpu =3D <&cpu_p03>; + }; + core4 { + cpu =3D <&cpu_p04>; + }; + core5 { + cpu =3D <&cpu_p05>; + }; + }; + + cluster2 { + core0 { + cpu =3D <&cpu_p10>; + }; + core1 { + cpu =3D <&cpu_p11>; + }; + core2 { + cpu =3D <&cpu_p12>; + }; + core3 { + cpu =3D <&cpu_p13>; + }; + core4 { + cpu =3D <&cpu_p14>; + }; + core5 { + cpu =3D <&cpu_p15>; + }; + }; + }; + + cpu_e00: cpu@0 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e01: cpu@1 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e02: cpu@2 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e03: cpu@3 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p00: cpu@10100 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p01: cpu@10101 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p02: cpu@10102 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p03: cpu@10103 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p04: cpu@10104 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10104>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p05: cpu@10105 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10105>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p10: cpu@10200 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10200>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p11: cpu@10201 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10201>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p12: cpu@10202 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10202>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p13: cpu@10203 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10203>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p14: cpu@10204 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10204>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p15: cpu@10205 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10205>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_2>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + + l2_cache_2: l2-cache-2 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6031-die0.dtsi b/arch/arm64/boot/dt= s/apple/t6031-die0.dtsi new file mode 100644 index 000000000000..47d08672a047 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-die0.dtsi @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Devices used on die 0 on the Apple T6032 "M3 Ultra" SoC and present on + * Apple T6030 ("M3 Pro") and T6031 / T6034 ("M3 Max"). + * + * Copyright The Asahi Linux Contributors + */ + + aic: interrupt-controller@292400000 { + compatible =3D "apple,t6031-aic3", "apple,t8122-aic3"; + #interrupt-cells =3D <4>; + interrupt-controller; + + reg =3D <0x00000002 0x92400000 0x00000000 0x1cc000>, + <0x00000002 0x92440000 0x00000000 0x4000>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + }; + + wdt: watchdog@2a02d4000 { + compatible =3D "apple,t6031-wdt", "apple,t8103-wdt"; + reg =3D <0x2 0xa02d4000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_smc: pinctrl@2a4820000 { + compatible =3D "apple,t6031-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xa4820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 30>; + apple,npins =3D <30>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + i2c0: i2c@391010000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91010000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c0>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + }; + + i2c1: i2c@391014000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91014000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c1>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c2: i2c@391018000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91018000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c2>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c3: i2c@39101c000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x9101c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c3>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c4: i2c@391020000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91020000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c4>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c5: i2c@391024000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91024000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c5_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c5>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c6: i2c@391028000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91028000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c6_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c6>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c7: i2c@39102c000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x9102c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c7_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c7>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + i2c8: i2c@391030000 { + compatible =3D "apple,t6031-i2c", "apple,t8103-i2c"; + reg =3D <0x3 0x91030000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c8_pins>; + pinctrl-names =3D "default"; + power-domains =3D <&ps_i2c8>; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + status =3D "disabled"; + }; + + fpwm0: pwm@391040000 { + compatible =3D "apple,t6031-fpwm", "apple,s5l-fpwm"; + reg =3D <0x3 0x91040000 0x0 0x4000>; + power-domains =3D <&ps_fpwm0>; + clocks =3D <&clkref>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + serial0: serial@391200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0x91200000 0x0 0x4000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* + * TODO: figure out the clocking properly, there may + * be a third selectable clock. + */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + status =3D "disabled"; + }; diff --git a/arch/arm64/boot/dts/apple/t6031-dieX.dtsi b/arch/arm64/boot/dt= s/apple/t6031-dieX.dtsi new file mode 100644 index 000000000000..2e9d3d2e6dea --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-dieX.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Nodes present on both dies of T6032 (M3 Ultra) and present on T6031 / T= 6034 + * (M3 Max). + * + * Copyright The Asahi Linux Contributors + */ + + DIE_NODE(pmgr): power-management@292280000 { + compatible =3D "apple,t6031-pmgr", "apple,t8103-pmgr", "syscon", "simple= -mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x2 0x92280000 0 0xc000>; + }; + + DIE_NODE(pmgr1): power-management@292800000 { + compatible =3D "apple,t6031-pmgr", "apple,t8103-pmgr", "syscon", "simple= -mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x2 0x92800000 0 0x4000>; + }; + + DIE_NODE(pinctrl_nub): pinctrl@2a01f0000 { + compatible =3D "apple,t6031-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xa01f0000 0x0 0x4000>; + power-domains =3D <&DIE_NODE(ps_nub_gpio)>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_nub) 0 0 59>; + apple,npins =3D <59>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + DIE_NODE(pmgr_mini): power-management@2a0280000 { + compatible =3D "apple,t6031-pmgr", "apple,t8103-pmgr", "syscon", "simple= -mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x2 0xa0280000 0 0x4000>; + }; + + DIE_NODE(pinctrl_aop): pinctrl@2a8824000 { + compatible =3D "apple,t6031-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xa8824000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_aop) 0 0 102>; + apple,npins =3D <102>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + DIE_NODE(pinctrl_ap): pinctrl@2b3000000 { + compatible =3D "apple,t6031-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xb3000000 0x0 0x4000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + clocks =3D <&clkref>; + power-domains =3D <&DIE_NODE(ps_gpio)>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&DIE_NODE(pinctrl_ap) 0 0 200>; + apple,npins =3D <200>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + DIE_NODE(pmgr_gfx): power-management@408e80000 { + compatible =3D "apple,t6031-pmgr", "apple,t8103-pmgr", "syscon", "simple= -mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x4 0x8e80000 0 0x4000>; + }; diff --git a/arch/arm64/boot/dts/apple/t6031-gpio-pins.dtsi b/arch/arm64/bo= ot/dts/apple/t6031-gpio-pins.dtsi new file mode 100644 index 000000000000..5e4727e357d2 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-gpio-pins.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * GPIO pin mappings for Apple T6031/T6032/T6034 SoCs. + * + * Copyright The Asahi Linux Contributors + */ + +&pinctrl_ap { + i2c0_pins: i2c0-pins { + pinmux =3D , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + + i2c5_pins: i2c5-pins { + pinmux =3D , + ; + }; + + i2c6_pins: i2c6-pins { + pinmux =3D , + ; + }; + + i2c7_pins: i2c7-pins { + pinmux =3D , + ; + }; + + i2c8_pins: i2c8-pins { + pinmux =3D , + ; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6031-j514c.dts b/arch/arm64/boot/dt= s/apple/t6031-j514c.dts new file mode 100644 index 000000000000..c1507158325e --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-j514c.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14-inch, M3 Max, 16 CPU cores, Nov 2023) + * + * target-type: J514c + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6031.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j514c", "apple,t6031", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M3 Max, 16 CPU cores, Nov 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6031-j516c.dts b/arch/arm64/boot/dt= s/apple/t6031-j516c.dts new file mode 100644 index 000000000000..841b2bb10b06 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-j516c.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M3 Max, 16 CPU cores, Nov 2023) + * + * target-type: J516c + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6031.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j516c", "apple,t6031", "apple,arm-platform"; + model =3D "Apple MacBook Pro (16-inch, M3 Max, 16 CPU cores, Nov 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6031-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t6031-pmgr.dtsi new file mode 100644 index 000000000000..f80ee5f7ebcf --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031-pmgr.dtsi @@ -0,0 +1,2400 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for Apple T6031 "M3 Max/Ultra" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&DIE_NODE(pmgr) { + DIE_NODE(ps_ispsens0): power-controller@100 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ispsens0); + }; + + DIE_NODE(ps_apcie_gp): power-controller@108 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_gp); + }; + + DIE_NODE(ps_apcie_ge): power-controller@110 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_ge); + }; + + DIE_NODE(ps_apcie_st): power-controller@118 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_st); + }; + + DIE_NODE(ps_afnc3_ioa): power-controller@120 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_ioa); + apple,always-on; + }; + + DIE_NODE(ps_afnc3_ls): power-controller@128 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc3_ioa)>; + }; + + DIE_NODE(ps_afnc3_lw0): power-controller@138 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc3_ls)>; + }; + + DIE_NODE(ps_afnc3_lw1): power-controller@148 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc3_lw1); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc3_ls)>; + }; + + DIE_NODE(ps_apcie_sys_gp): power-controller@158 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_sys_gp); + power-domains =3D <&DIE_NODE(ps_apcie_gp)>, <&DIE_NODE(ps_afnc3_lw0)>; + }; + + DIE_NODE(ps_afnc4_ioa): power-controller@168 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_ioa); + apple,always-on; + }; + + DIE_NODE(ps_afnc4_ls): power-controller@178 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc4_ioa)>; + }; + + DIE_NODE(ps_afnc4_lw0): power-controller@188 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc4_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc4_ls)>; + }; + + DIE_NODE(ps_afnc5_ioa): power-controller@198 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_ioa); + apple,always-on; + }; + + DIE_NODE(ps_afnc5_ls): power-controller@1a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc5_ioa)>; + }; + + DIE_NODE(ps_afnc5_lw0): power-controller@1b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc5_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc5_ls)>; + }; + + DIE_NODE(ps_afnc6_ioa): power-controller@1c8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc6_ioa); + apple,always-on; + }; + + DIE_NODE(ps_afnc6_ls): power-controller@1d8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc6_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc6_ioa)>; + }; + + DIE_NODE(ps_afnc6_lw0): power-controller@1e8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc6_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc6_ls)>; + }; + + DIE_NODE(ps_sio): power-controller@1f8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_disp_sys): power-controller@200 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(disp_sys); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_isp_sys): power-controller@208 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_sys); + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_sio_cpu): power-controller@210 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_cpu); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm0): power-controller@218 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm0); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm1): power-controller@220 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm1); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_fpwm2): power-controller@228 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(fpwm2); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c0): power-controller@230 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c0); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c1): power-controller@238 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c1); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c2): power-controller@240 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c2); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c3): power-controller@248 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c3); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c4): power-controller@250 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c4); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c5): power-controller@258 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c5); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c6): power-controller@260 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c6); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c7): power-controller@268 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c7); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_i2c8): power-controller@270 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(i2c8); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_spi_p): power-controller@278 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_uart_p): power-controller@280 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_audio_p): power-controller@288 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(audio_p); + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_aes): power-controller@290 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(aes); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_sio)>; + }; + + DIE_NODE(ps_disp_fe): power-controller@298 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(disp_fe); + power-domains =3D <&DIE_NODE(ps_disp_cpu)>; + apple,min-state =3D <4>; + }; + + DIE_NODE(ps_disp_cpu): power-controller@2a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(disp_cpu); + power-domains =3D <&DIE_NODE(ps_disp_sys)>; + }; + + DIE_NODE(ps_spi0): power-controller@2a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi0); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi1): power-controller@2b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi1); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi2): power-controller@2b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi2); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi3): power-controller@2c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi3); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi4): power-controller@2c8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi4); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_spi5): power-controller@2d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(spi5); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_qspi): power-controller@2d8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(qspi); + power-domains =3D <&DIE_NODE(ps_spi_p)>; + }; + + DIE_NODE(ps_uart_n): power-controller@2e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart_n); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart0): power-controller@2e8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart0); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart1): power-controller@2f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart1); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart2): power-controller@2f8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart2); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart3): power-controller@300 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart3); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart4): power-controller@308 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart4); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart5): power-controller@310 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart5); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_uart6): power-controller@318 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(uart6); + power-domains =3D <&DIE_NODE(ps_uart_p)>; + }; + + DIE_NODE(ps_sio_adma): power-controller@320 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sio_adma); + power-domains =3D <&DIE_NODE(ps_sio)>, <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa0): power-controller@328 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x328 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa0); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa1): power-controller@330 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa1); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa2): power-controller@338 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa2); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa3): power-controller@340 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa3); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_dpa4): power-controller@348 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dpa4); + power-domains =3D <&DIE_NODE(ps_audio_p)>; + }; + + DIE_NODE(ps_amcc1): power-controller@350 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x350 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc1); + apple,always-on; + }; + + DIE_NODE(ps_amcc3): power-controller@360 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc3); + apple,always-on; + }; + + DIE_NODE(ps_amcc5): power-controller@370 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc5); + apple,always-on; + }; + + DIE_NODE(ps_amcc7): power-controller@380 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc7); + apple,always-on; + }; + + DIE_NODE(ps_dcs_04): power-controller@390 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_04); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc1)>; + }; + + DIE_NODE(ps_dcs_05): power-controller@3a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_05); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc1)>; + }; + + DIE_NODE(ps_dcs_06): power-controller@3b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_06); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc1)>; + }; + + DIE_NODE(ps_dcs_07): power-controller@3c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_07); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc1)>; + }; + + DIE_NODE(ps_dcs_12): power-controller@3d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_12); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc3)>; + }; + + DIE_NODE(ps_dcs_13): power-controller@3e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_13); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc3)>; + }; + + DIE_NODE(ps_dcs_14): power-controller@3f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_14); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc3)>; + }; + + DIE_NODE(ps_dcs_15): power-controller@400 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_15); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc3)>; + }; + + DIE_NODE(ps_dcs_20): power-controller@410 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x410 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_20); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc5)>; + }; + + DIE_NODE(ps_dcs_21): power-controller@420 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x420 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_21); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc5)>; + }; + + DIE_NODE(ps_dcs_22): power-controller@430 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x430 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_22); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc5)>; + }; + + DIE_NODE(ps_dcs_23): power-controller@440 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x440 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_23); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc5)>; + }; + + DIE_NODE(ps_dcs_28): power-controller@450 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x450 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_28); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc7)>; + }; + + DIE_NODE(ps_dcs_29): power-controller@460 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x460 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_29); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc7)>; + }; + + DIE_NODE(ps_dcs_30): power-controller@470 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x470 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_30); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc7)>; + }; + + DIE_NODE(ps_dcs_31): power-controller@480 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x480 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_31); + apple,always-on; /* LPDDR5 interface */ + power-domains =3D <&DIE_NODE(ps_amcc7)>; + }; + + DIE_NODE(ps_mca0): power-controller@4e8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca0); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca1): power-controller@4f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca1); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca2): power-controller@4f8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca2); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_mca3): power-controller@500 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x500 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mca3); + power-domains =3D <&DIE_NODE(ps_audio_p)>, <&DIE_NODE(ps_sio_adma)>; + }; + + DIE_NODE(ps_msr1): power-controller@508 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x508 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr1); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>; + }; + + DIE_NODE(ps_venc1_sys): power-controller@510 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x510 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_sys); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>; + }; + + DIE_NODE(ps_msr0): power-controller@518 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x518 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr0); + power-domains =3D <&DIE_NODE(ps_afnc6_lw0)>; + }; + + DIE_NODE(ps_ane_sys): power-controller@520 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x520 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_sys); + power-domains =3D <&DIE_NODE(ps_afnc5_lw0)>, <&DIE_NODE(ps_afnc6_lw0)>; + }; + + DIE_NODE(ps_msr1_ase_core): power-controller@538 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x538 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr1_ase_core); + power-domains =3D <&DIE_NODE(ps_msr1)>; + }; + + DIE_NODE(ps_apcie_sys_ge): power-controller@540 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x540 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_sys_ge); + power-domains =3D <&DIE_NODE(ps_apcie_ge)>, <&DIE_NODE(ps_afnc3_lw0)>; + }; + + DIE_NODE(ps_ans): power-controller@550 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x550 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ans); + power-domains =3D <&DIE_NODE(ps_afnc3_lw1)>; + }; + + DIE_NODE(ps_apcie_sys_st): power-controller@560 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x560 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_sys_st); + power-domains =3D <&DIE_NODE(ps_apcie_st)>, <&DIE_NODE(ps_ans)>; + }; + + DIE_NODE(ps_apcie_sys_st1): power-controller@570 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x570 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_sys_st1); + power-domains =3D <&DIE_NODE(ps_apcie_st)>, <&DIE_NODE(ps_ans)>; + }; + + DIE_NODE(ps_apcie_phy_sw): power-controller@580 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x580 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(apcie_phy_sw); + apple,always-on; /* macOS does not turn this off */ + }; + + DIE_NODE(ps_msr0_ase_core): power-controller@590 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x590 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msr0_ase_core); + power-domains =3D <&DIE_NODE(ps_msr0)>; + }; + + DIE_NODE(ps_ane_mpm): power-controller@5a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_mpm); + power-domains =3D <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ps_ane_cpu): power-controller@5a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_cpu); + power-domains =3D <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ps_ane_td): power-controller@5b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_td); + power-domains =3D <&DIE_NODE(ps_ane_sys)>; + }; + + DIE_NODE(ps_ane_base): power-controller@5c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ane_base); + power-domains =3D <&DIE_NODE(ps_ane_td)>; + }; + + DIE_NODE(ps_sep): power-controller@c00 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sep); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc4_lw0)>; + }; + + DIE_NODE(ps_isp_cpu): power-controller@4008 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_cpu); + power-domains =3D <&DIE_NODE(ps_isp_sys)>; + }; + + DIE_NODE(ps_isp_fe): power-controller@4030 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4030 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_fe); + power-domains =3D <&DIE_NODE(ps_isp_sys)>; + }; + + DIE_NODE(ps_dprx): power-controller@4038 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4038 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dprx); + power-domains =3D <&DIE_NODE(ps_isp_fe)>; + }; + + DIE_NODE(ps_isp_secure): power-controller@4040 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4040 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_secure); + power-domains =3D <&DIE_NODE(ps_isp_fe)>; + }; + + DIE_NODE(ps_isp_be): power-controller@4048 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4048 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_be); + power-domains =3D <&DIE_NODE(ps_isp_fe)>; + }; + + DIE_NODE(ps_isp_clr): power-controller@4050 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4050 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(isp_clr); + power-domains =3D <&DIE_NODE(ps_isp_be)>; + }; + + DIE_NODE(ps_venc1_dma): power-controller@8000 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_dma); + power-domains =3D <&DIE_NODE(ps_venc1_sys)>; + }; + + DIE_NODE(ps_venc1_pipe4): power-controller@8008 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_pipe4); + power-domains =3D <&DIE_NODE(ps_venc1_dma)>; + }; + + DIE_NODE(ps_venc1_pipe5): power-controller@8010 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_pipe5); + power-domains =3D <&DIE_NODE(ps_venc1_dma)>; + }; + + DIE_NODE(ps_venc1_me0): power-controller@8018 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_me0); + power-domains =3D <&DIE_NODE(ps_venc1_dma)>; + }; + + DIE_NODE(ps_venc1_me1): power-controller@8020 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc1_me1); + power-domains =3D <&DIE_NODE(ps_venc1_me0)>; + }; +}; + +&DIE_NODE(pmgr1) { + DIE_NODE(ps_aic): power-controller@100 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(aic); + }; + + DIE_NODE(ps_dwi): power-controller@108 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dwi); + }; + + DIE_NODE(ps_sbr): power-controller@110 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(sbr); + apple,always-on; + }; + + DIE_NODE(ps_pms): power-controller@118 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms); + apple,always-on; + }; + + DIE_NODE(ps_soc_dpe): power-controller@120 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(soc_dpe); + apple,always-on; + }; + + DIE_NODE(ps_pms_c1ppt): power-controller@128 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_c1ppt); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_soc_dpe)>; + }; + + DIE_NODE(ps_pmgr_soc_ocla): power-controller@130 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pmgr_soc_ocla); + }; + + DIE_NODE(ps_pms_fpwm0): power-controller@138 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_fpwm0); + }; + + DIE_NODE(ps_pms_fpwm1): power-controller@140 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_fpwm1); + }; + + DIE_NODE(ps_pms_fpwm2): power-controller@148 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_fpwm2); + }; + + DIE_NODE(ps_pms_fpwm3): power-controller@150 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_fpwm3); + }; + + DIE_NODE(ps_pms_fpwm4): power-controller@158 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_fpwm4); + }; + + DIE_NODE(ps_gpio): power-controller@160 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gpio); + power-domains =3D <&DIE_NODE(ps_sbr)>; + }; + + DIE_NODE(ps_msg): power-controller@168 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(msg); + }; + + DIE_NODE(ps_afc): power-controller@170 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afc); + apple,always-on; + }; + + DIE_NODE(ps_amcc0): power-controller@180 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afc)>; + }; + + DIE_NODE(ps_amcc2): power-controller@190 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc2); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afc)>; + }; + + DIE_NODE(ps_amcc4): power-controller@1a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc4); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afc)>; + }; + + DIE_NODE(ps_amcc6): power-controller@1b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(amcc6); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afc)>; + }; + + DIE_NODE(ps_dcs_00): power-controller@1c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_00); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc0)>; + }; + + DIE_NODE(ps_dcs_01): power-controller@1d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_01); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc0)>; + }; + + DIE_NODE(ps_dcs_02): power-controller@1e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_02); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc0)>; + }; + + DIE_NODE(ps_dcs_03): power-controller@1f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_03); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc0)>; + }; + + DIE_NODE(ps_dcs_08): power-controller@200 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_08); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc2)>; + }; + + DIE_NODE(ps_dcs_09): power-controller@210 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_09); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc2)>; + }; + + DIE_NODE(ps_dcs_10): power-controller@220 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_10); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc2)>; + }; + + DIE_NODE(ps_dcs_11): power-controller@230 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_11); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc2)>; + }; + + DIE_NODE(ps_dcs_16): power-controller@240 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_16); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc4)>; + }; + + DIE_NODE(ps_dcs_17): power-controller@250 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_17); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc4)>; + }; + + DIE_NODE(ps_dcs_18): power-controller@260 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_18); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc4)>; + }; + + DIE_NODE(ps_dcs_19): power-controller@270 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_19); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc4)>; + }; + + DIE_NODE(ps_dcs_24): power-controller@280 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_24); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc6)>; + }; + + DIE_NODE(ps_dcs_25): power-controller@290 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_25); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc6)>; + }; + + DIE_NODE(ps_dcs_26): power-controller@2a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_26); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc6)>; + }; + + DIE_NODE(ps_afi): power-controller@2b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afi); + apple,always-on; + }; + + DIE_NODE(ps_dcs_27): power-controller@2c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dcs_27); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_amcc6)>; + }; + + DIE_NODE(ps_afi_d2d_0): power-controller@2d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afi_d2d_0); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afi_d2d_1): power-controller@2e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afi_d2d_1); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afc_d2d_0): power-controller@2f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afc_d2d_0); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afc_d2d_1): power-controller@300 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afc_d2d_1); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afr_d2d_0): power-controller@310 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afr_d2d_0); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afr_d2d_1): power-controller@320 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afr_d2d_1); + apple,always-on; + status =3D "disabled"; + }; + + DIE_NODE(ps_afnc1_ioa): power-controller@330 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_ioa); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc0_ioa): power-controller@340 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_ioa); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc2_ioa): power-controller@350 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x350 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_ioa); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc7_ioa): power-controller@360 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc7_ioa); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afi)>; + }; + + DIE_NODE(ps_afnc1_ls): power-controller@370 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc1_ioa)>; + }; + + DIE_NODE(ps_afnc0_ls): power-controller@380 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc0_ioa)>; + }; + + DIE_NODE(ps_afnc2_ls): power-controller@390 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc2_ioa)>; + }; + + DIE_NODE(ps_afnc7_ls): power-controller@3a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc7_ls); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc7_ioa)>; + }; + + DIE_NODE(ps_afnc1_lw0): power-controller@3b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc1_ls)>; + }; + + DIE_NODE(ps_afnc1_lw1): power-controller@3c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc1_lw1); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc1_ls)>; + }; + + DIE_NODE(ps_afnc0_lw0): power-controller@3d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc0_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc0_ls)>; + }; + + DIE_NODE(ps_afnc2_lw0): power-controller@3e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_lw0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc2_ls)>; + }; + + DIE_NODE(ps_afnc2_lw1): power-controller@3f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc2_lw1); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_afnc2_ls)>; + }; + + DIE_NODE(ps_afnc7_lw0): power-controller@400 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afnc7_lw0); + apple,always-on; + }; + + DIE_NODE(ps_avd_sys): power-controller@410 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x410 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(avd_sys); + power-domains =3D <&DIE_NODE(ps_afnc1_lw0)>; + }; + + DIE_NODE(ps_jpg): power-controller@418 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x418 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(jpg); + power-domains =3D <&DIE_NODE(ps_afnc1_lw0)>; + }; + + DIE_NODE(ps_dispext3_sys): power-controller@420 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x420 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext3_sys); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_scodec): power-controller@428 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x428 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(scodec); + power-domains =3D <&DIE_NODE(ps_afnc1_lw1)>; + }; + + DIE_NODE(ps_venc0_sys): power-controller@430 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x430 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_sys); + power-domains =3D <&DIE_NODE(ps_afnc0_lw0)>; + }; + + DIE_NODE(ps_prores): power-controller@438 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x438 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(prores); + power-domains =3D <&DIE_NODE(ps_afnc0_lw0)>; + }; + + DIE_NODE(ps_dispext0_sys): power-controller@440 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x440 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext0_sys); + power-domains =3D <&DIE_NODE(ps_afnc2_lw0)>; + }; + + DIE_NODE(ps_atc0_common): power-controller@448 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x448 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_common); + power-domains =3D <&DIE_NODE(ps_afnc2_lw0)>; + }; + + DIE_NODE(ps_atc1_common): power-controller@450 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x450 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_common); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_atc2_common): power-controller@458 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x458 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_common); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_atc3_common): power-controller@460 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x460 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_common); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_trace_fab): power-controller@468 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x468 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(trace_fab); + power-domains =3D <&DIE_NODE(ps_afnc2_lw1)>; + }; + + DIE_NODE(ps_dispext1_sys): power-controller@470 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x470 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext1_sys); + power-domains =3D <&DIE_NODE(ps_afnc7_lw0)>; + }; + + DIE_NODE(ps_dispext2_sys): power-controller@478 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x478 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext2_sys); + power-domains =3D <&DIE_NODE(ps_afnc7_lw0)>; + }; + + DIE_NODE(ps_dispext3_fe): power-controller@480 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x480 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext3_fe); + power-domains =3D <&DIE_NODE(ps_dispext3_cpu)>; + }; + + DIE_NODE(ps_dispext3_cpu): power-controller@488 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x488 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext3_cpu); + power-domains =3D <&DIE_NODE(ps_dispext3_sys)>; + }; + + DIE_NODE(ps_scodec_streaming): power-controller@490 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x490 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(scodec_streaming); + power-domains =3D <&DIE_NODE(ps_scodec)>; + }; + + DIE_NODE(ps_venc0_dma): power-controller@498 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x498 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_dma); + power-domains =3D <&DIE_NODE(ps_venc0_sys)>; + }; + + DIE_NODE(ps_dispext0_fe): power-controller@4a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext0_fe); + power-domains =3D <&DIE_NODE(ps_dispext0_cpu)>; + }; + + DIE_NODE(ps_dispext0_cpu): power-controller@4a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext0_cpu); + power-domains =3D <&DIE_NODE(ps_dispext0_sys)>; + }; + + DIE_NODE(ps_atc0_cio): power-controller@4b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio); + power-domains =3D <&DIE_NODE(ps_atc0_common)>; + }; + + DIE_NODE(ps_atc0_pcie): power-controller@4b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_pcie); + power-domains =3D <&DIE_NODE(ps_atc0_common)>; + }; + + DIE_NODE(ps_atc1_cio): power-controller@4c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio); + power-domains =3D <&DIE_NODE(ps_atc1_common)>; + }; + + DIE_NODE(ps_atc1_pcie): power-controller@4c8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_pcie); + power-domains =3D <&DIE_NODE(ps_atc1_common)>; + }; + + DIE_NODE(ps_atc2_cio): power-controller@4d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio); + power-domains =3D <&DIE_NODE(ps_atc2_common)>; + }; + + DIE_NODE(ps_atc2_pcie): power-controller@4d8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_pcie); + power-domains =3D <&DIE_NODE(ps_atc2_common)>; + }; + + DIE_NODE(ps_atc3_cio): power-controller@4e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio); + power-domains =3D <&DIE_NODE(ps_atc3_common)>; + }; + + DIE_NODE(ps_atc3_pcie): power-controller@4e8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_pcie); + power-domains =3D <&DIE_NODE(ps_atc3_common)>; + }; + + DIE_NODE(ps_dispext1_fe): power-controller@4f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext1_fe); + power-domains =3D <&DIE_NODE(ps_dispext1_cpu)>; + }; + + DIE_NODE(ps_dispext1_cpu): power-controller@4f8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext1_cpu); + power-domains =3D <&DIE_NODE(ps_dispext1_sys)>; + }; + + DIE_NODE(ps_dispext2_fe): power-controller@500 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x500 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext2_fe); + power-domains =3D <&DIE_NODE(ps_dispext2_cpu)>; + }; + + DIE_NODE(ps_dispext2_cpu): power-controller@508 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x508 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(dispext2_cpu); + power-domains =3D <&DIE_NODE(ps_dispext2_sys)>; + }; + + DIE_NODE(ps_venc0_pipe4): power-controller@538 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x538 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_pipe4); + power-domains =3D <&DIE_NODE(ps_venc0_dma)>; + }; + + DIE_NODE(ps_venc0_pipe5): power-controller@540 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x540 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_pipe5); + power-domains =3D <&DIE_NODE(ps_venc0_dma)>; + }; + + DIE_NODE(ps_venc0_me0): power-controller@548 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x548 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_me0); + power-domains =3D <&DIE_NODE(ps_venc0_dma)>; + }; + + DIE_NODE(ps_pmp): power-controller@550 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x550 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pmp); + }; + + DIE_NODE(ps_pms_sram): power-controller@560 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x560 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(pms_sram); + }; + + DIE_NODE(ps_atc0_cio_pcie): power-controller@598 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x598 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc0_cio)>; + }; + + DIE_NODE(ps_atc0_cio_usb): power-controller@5a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc0_cio)>; + }; + + DIE_NODE(ps_atc1_cio_pcie): power-controller@5a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc1_cio)>; + }; + + DIE_NODE(ps_atc1_cio_usb): power-controller@5b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc1_cio)>; + }; + + DIE_NODE(ps_atc2_cio_pcie): power-controller@5b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc2_cio)>; + }; + + DIE_NODE(ps_atc2_cio_usb): power-controller@5c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc2_cio)>; + }; + + DIE_NODE(ps_atc3_cio_pcie): power-controller@5c8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio_pcie); + power-domains =3D <&DIE_NODE(ps_atc3_cio)>; + }; + + DIE_NODE(ps_atc3_cio_usb): power-controller@5d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_cio_usb); + power-domains =3D <&DIE_NODE(ps_atc3_cio)>; + }; + + DIE_NODE(ps_venc0_me1): power-controller@638 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x638 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(venc0_me1); + power-domains =3D <&DIE_NODE(ps_venc0_me0)>; + }; + + DIE_NODE(ps_ap_tmm): power-controller@670 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x670 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(ap_tmm); + }; +}; + +&DIE_NODE(pmgr_mini) { + DIE_NODE(ps_debug_gated): power-controller@58 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(debug_gated); + apple,always-on; + }; + + DIE_NODE(ps_nub_spmi_ahb_fab): power-controller@60 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi_ahb_fab); + apple,always-on; + }; + + DIE_NODE(ps_nub_spmi0): power-controller@68 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_nub_spmi_a0): power-controller@70 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi_a0); + apple,always-on; + }; + + DIE_NODE(ps_nub_spmi_a1): power-controller@78 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi_a1); + apple,always-on; + }; + + DIE_NODE(ps_nub_spmi_a2): power-controller@80 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi_a2); + apple,always-on; + }; + + DIE_NODE(ps_nub_aon): power-controller@90 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_aon); + apple,always-on; + }; + + DIE_NODE(ps_nub_gpio): power-controller@98 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x98 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_gpio); + apple,always-on; + }; + + DIE_NODE(ps_nub_ocla): power-controller@a0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_ocla); + apple,always-on; + }; + + DIE_NODE(ps_atc0_common_dp): power-controller@a8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_common_dp); + }; + + DIE_NODE(ps_atc1_common_dp): power-controller@b0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_common_dp); + }; + + DIE_NODE(ps_atc2_common_dp): power-controller@b8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_common_dp); + }; + + DIE_NODE(ps_atc3_common_dp): power-controller@c0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_common_dp); + }; + + DIE_NODE(ps_nub_spmi1): power-controller@c8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi1); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_atc0_usb_aon): power-controller@d0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_usb_aon); + }; + + DIE_NODE(ps_atc1_usb_aon): power-controller@d8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_usb_aon); + }; + + DIE_NODE(ps_atc2_usb_aon): power-controller@e0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_usb_aon); + }; + + DIE_NODE(ps_atc3_usb_aon): power-controller@e8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_usb_aon); + }; + + DIE_NODE(ps_nub_spmi2): power-controller@f0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xf0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi2); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_nub_spmi3): power-controller@f8 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xf8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi3); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_nub_spmi4): power-controller@100 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi4); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_nub_spmi5): power-controller@108 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_spmi5); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_spmi_ahb_fab)>; + }; + + DIE_NODE(ps_nub_fabric): power-controller@110 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_fabric); + apple,always-on; + }; + + DIE_NODE(ps_nub_sram): power-controller@120 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(nub_sram); + apple,always-on; + }; + + DIE_NODE(ps_debug_switch): power-controller@130 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(debug_switch); + apple,always-on; + }; + + DIE_NODE(ps_atc0_usb): power-controller@140 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc0_usb); + power-domains =3D <&DIE_NODE(ps_atc0_usb_aon)>, <&DIE_NODE(ps_atc0_commo= n)>; + }; + + DIE_NODE(ps_atc1_usb): power-controller@148 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc1_usb); + power-domains =3D <&DIE_NODE(ps_atc1_usb_aon)>, <&DIE_NODE(ps_atc1_commo= n)>; + }; + + DIE_NODE(ps_atc2_usb): power-controller@150 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc2_usb); + power-domains =3D <&DIE_NODE(ps_atc2_usb_aon)>, <&DIE_NODE(ps_atc2_commo= n)>; + }; + + DIE_NODE(ps_atc3_usb): power-controller@158 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(atc3_usb); + power-domains =3D <&DIE_NODE(ps_atc3_usb_aon)>, <&DIE_NODE(ps_atc3_commo= n)>; + }; + +#if 0 + /* MTP stuff is self-managed */ + DIE_NODE(ps_mtp_fabric): power-controller@2000 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_fabric); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_nub_fabric)>; + }; + + DIE_NODE(ps_mtp_gpio): power-controller@2008 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_gpio); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>; + }; + + DIE_NODE(ps_mtp_base): power-controller@2010 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_base); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>; + }; + + DIE_NODE(ps_mtp_periph): power-controller@2018 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_periph); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>; + }; + + DIE_NODE(ps_mtp_uart0): power-controller@2020 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_uart0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>; + }; + + DIE_NODE(ps_mtp_cpu): power-controller@2028 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2028 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_cpu); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>; + }; + + DIE_NODE(ps_mtp_scm_fabric): power-controller@2030 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2030 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_scm_fabric); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_periph)>; + }; + + DIE_NODE(ps_mtp_spi0): power-controller@2038 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2038 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_spi0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>, <&DIE_NODE(ps_mtp_periph)>; + }; + + DIE_NODE(ps_mtp_i2cm0): power-controller@2040 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2040 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_i2cm0); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>, <&DIE_NODE(ps_mtp_periph)>; + }; + + DIE_NODE(ps_mtp_sram): power-controller@2048 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2048 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_sram); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_cpu)>, <&DIE_NODE(ps_mtp_scm_fabric)= >; + }; + + DIE_NODE(ps_mtp_dma): power-controller@2050 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2050 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(mtp_dma); + apple,always-on; + power-domains =3D <&DIE_NODE(ps_mtp_fabric)>, <&DIE_NODE(ps_mtp_sram)>; + }; +#endif +}; + +&DIE_NODE(pmgr_gfx) { + DIE_NODE(ps_gpx): power-controller@0 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gpx); + apple,always-on; + }; + + DIE_NODE(ps_afr): power-controller@100 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(afr); + apple,always-on; + }; + + DIE_NODE(ps_gfx): power-controller@110 { + compatible =3D "apple,t6031-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D DIE_LABEL(gfx); + power-domains =3D <&DIE_NODE(ps_afr)>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6031.dtsi b/arch/arm64/boot/dts/app= le/t6031.dtsi new file mode 100644 index 000000000000..0059afe9a844 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6031.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6031 "M3 Max" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include + +#include "multi-die-cpp.h" + +#include "t6031-base.dtsi" + +/ { + compatible =3D "apple,t6031", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + /* Required to get >32-bit DMA via DARTs */ + dma-ranges =3D <0 0 0 0 0xffffffff 0xffffc000>; + + // filled via templated includes at the end of the file + }; +}; + +#define DIE +#define DIE_NO 0 + +&soc { + #include "t6031-die0.dtsi" + #include "t6031-dieX.dtsi" +}; + +#include "t6031-gpio-pins.dtsi" +#include "t6031-pmgr.dtsi" + +#undef DIE +#undef DIE_NO diff --git a/arch/arm64/boot/dts/apple/t6032-j575d.dts b/arch/arm64/boot/dt= s/apple/t6032-j575d.dts new file mode 100644 index 000000000000..56edfb1139fb --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6032-j575d.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple Mac Studio (M3 Ultra, 2025) + * + * target-type: J575d + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6032.dtsi" + +/ { + compatible =3D "apple,j575d", "apple,t6032", "apple,arm-platform"; + model =3D "Apple Mac Studio (M3 Ultra, 2025)"; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + status =3D "disabled"; + power-domains =3D <&ps_dispext0_cpu>; + }; + }; + + memory@10000000000 { + device_type =3D "memory"; + reg =3D <0x100 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6032.dtsi b/arch/arm64/boot/dts/app= le/t6032.dtsi new file mode 100644 index 000000000000..bbf19ecdaaec --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6032.dtsi @@ -0,0 +1,416 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6032 "M3 Ultra" SoC + * + * Other names: H15J, "Palma 2C" + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include + +#include "multi-die-cpp.h" + +#include "t6031-base.dtsi" + +/ { + compatible =3D "apple,t6032", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster3 { + core0 { + cpu =3D <&cpu_e10>; + }; + core1 { + cpu =3D <&cpu_e11>; + }; + core2 { + cpu =3D <&cpu_e12>; + }; + core3 { + cpu =3D <&cpu_e13>; + }; + }; + + cluster4 { + core0 { + cpu =3D <&cpu_p20>; + }; + core1 { + cpu =3D <&cpu_p21>; + }; + core2 { + cpu =3D <&cpu_p22>; + }; + core3 { + cpu =3D <&cpu_p23>; + }; + core4 { + cpu =3D <&cpu_p24>; + }; + core5 { + cpu =3D <&cpu_p25>; + }; + }; + + cluster5 { + core0 { + cpu =3D <&cpu_p30>; + }; + core1 { + cpu =3D <&cpu_p31>; + }; + core2 { + cpu =3D <&cpu_p32>; + }; + core3 { + cpu =3D <&cpu_p33>; + }; + core4 { + cpu =3D <&cpu_p34>; + }; + core5 { + cpu =3D <&cpu_p35>; + }; + }; + }; + + cpu_e10: cpu@800 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x800>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_3>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e11: cpu@801 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x801>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_3>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e12: cpu@802 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x802>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_3>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e13: cpu@803 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x803>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_3>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p20: cpu@10900 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10900>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p21: cpu@10901 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10901>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p22: cpu@10902 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10902>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p23: cpu@10903 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10903>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p24: cpu@10904 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10904>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p25: cpu@10905 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10905>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_4>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p30: cpu@10a00 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a00>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p31: cpu@10a01 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a01>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p32: cpu@10a02 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a02>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p33: cpu@10a03 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a03>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p34: cpu@10a04 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a04>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p35: cpu@10a05 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10a05>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_5>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_3: l2-cache-3 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_4: l2-cache-4 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + + l2_cache_5: l2-cache-5 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + die0: soc@200000000 { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x02 0x00000000 0x02 0x00000000 0x4 0x00000000>, + <0x05 0x80000000 0x05 0x80000000 0x1 0x80000000>, + <0x07 0x00000000 0x07 0x00000000 0xf 0x80000000>, + <0x16 0x80000000 0x16 0x80000000 0x5 0x80000000>; + nonposted-mmio; + /* Required to get >32-bit DMA via DARTs */ + dma-ranges =3D <0 0 0 0 0xffffffff 0xffffc000>; + + // filled via templated includes at the end of the file + }; + + die1: soc@2200000000 { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x02 0x00000000 0x22 0x00000000 0x4 0x00000000>, + <0x07 0x00000000 0x27 0x00000000 0xf 0x80000000>, + <0x16 0x80000000 0x36 0x80000000 0x5 0x80000000>; + nonposted-mmio; + /* Required to get >32-bit DMA via DARTs */ + dma-ranges =3D <0 0 0 0 0xffffffff 0xffffc000>; + + // filled via templated includes at the end of the file + }; +}; + +#define DIE +#define DIE_NO 0 + +&die0 { + #include "t6031-die0.dtsi" + #include "t6031-dieX.dtsi" +}; + +#include "t6031-pmgr.dtsi" +#include "t6031-gpio-pins.dtsi" + +#undef DIE +#undef DIE_NO + +#define DIE _die1 +#define DIE_NO 1 + +&die1 { + #include "t6031-dieX.dtsi" +}; + +#include "t6031-pmgr.dtsi" + +/delete-node/ &ps_pmp_die1; + +#undef DIE +#undef DIE_NO + +/* delete non-present DISP power-states */ +/delete-node/ &ps_disp_cpu; +/delete-node/ &ps_disp_cpu_die1; +/delete-node/ &ps_disp_fe; +/delete-node/ &ps_disp_fe_die1; +/delete-node/ &ps_disp_sys; +/delete-node/ &ps_disp_sys_die1; + +/* delete non-present ISP power-states */ +/delete-node/ &ps_dprx; +/delete-node/ &ps_dprx_die1; +/delete-node/ &ps_isp_be; +/delete-node/ &ps_isp_be_die1; +/delete-node/ &ps_isp_clr; +/delete-node/ &ps_isp_clr_die1; +/delete-node/ &ps_isp_cpu; +/delete-node/ &ps_isp_cpu_die1; +/delete-node/ &ps_isp_fe; +/delete-node/ &ps_isp_fe_die1; +/delete-node/ &ps_isp_secure; +/delete-node/ &ps_isp_secure_die1; +/delete-node/ &ps_isp_sys; +/delete-node/ &ps_isp_sys_die1; + +&ps_afi_d2d_0 { + status =3D "okay"; +}; + +&ps_afi_d2d_0_die1 { + status =3D "okay"; +}; + +&ps_afi_d2d_1 { + status =3D "okay"; +}; + +&ps_afi_d2d_1_die1 { + status =3D "okay"; +}; + +&ps_afc_d2d_0 { + status =3D "okay"; +}; + +&ps_afc_d2d_0_die1{ + status =3D "okay"; +}; + +&ps_afc_d2d_1 { + status =3D "okay"; +}; + +&ps_afc_d2d_1_die1 { + status =3D "okay"; +}; + +&ps_afr_d2d_0 { + status =3D "okay"; +}; + +&ps_afr_d2d_0_die1 { + status =3D "okay"; +}; + +&ps_afr_d2d_1 { + status =3D "okay"; +}; + +&ps_afr_d2d_1_die1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t6034-j514m.dts b/arch/arm64/boot/dt= s/apple/t6034-j514m.dts new file mode 100644 index 000000000000..e31bd0bc0592 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6034-j514m.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14-inch, M3 Max, 14 CPU cores, Nov 2023) + * + * target-type: J514m + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6034.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j514m", "apple,t6034", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M3 Max, 14 CPU cores, Nov 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6034-j516m.dts b/arch/arm64/boot/dt= s/apple/t6034-j516m.dts new file mode 100644 index 000000000000..4d6513558597 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6034-j516m.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M3 Max, 14 CPU cores, Nov 2023) + * + * target-type: J516m + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6034.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j516m", "apple,t6034", "apple,arm-platform"; + model =3D "Apple MacBook Pro (16-inch, M3 Max, 14 CPU cores, Nov 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t6034.dtsi b/arch/arm64/boot/dts/app= le/t6034.dtsi new file mode 100644 index 000000000000..ae8c27d7fa25 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6034.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6034 "M3 Max" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include "t6031.dtsi" + +/ { + compatible =3D "apple,t6034", "apple,arm-platform"; +}; + +// Disable power-states for memory channels not present on the 14-core var= iant. +&ps_amcc6 { + status =3D "disabled"; +}; + +&ps_amcc7 { + status =3D "disabled"; +}; + +&ps_dcs_24 { + status =3D "disabled"; +}; + +&ps_dcs_25 { + status =3D "disabled"; +}; + +&ps_dcs_26 { + status =3D "disabled"; +}; + +&ps_dcs_27 { + status =3D "disabled"; +}; + +&ps_dcs_28 { + status =3D "disabled"; +}; + +&ps_dcs_29 { + status =3D "disabled"; +}; + +&ps_dcs_30 { + status =3D "disabled"; +}; + +&ps_dcs_31 { + status =3D "disabled"; +}; diff --git a/arch/arm64/boot/dts/apple/t603x-j514-j516.dtsi b/arch/arm64/bo= ot/dts/apple/t603x-j514-j516.dtsi new file mode 100644 index 000000000000..517b84c183ca --- /dev/null +++ b/arch/arm64/boot/dts/apple/t603x-j514-j516.dtsi @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14/16-inch, 2023) + * + * This file contains the parts common to J514 and J516 devices with t6030, + * t6031 and t6034. + * + * target-type: J514s / J514m / J514c / J516s / J516m / J516c + * + * Copyright The Asahi Linux Contributors + */ + +/* + * These models are essentially identical to the previous generations, oth= er + * than the GPIO indices and using SPMI based USB Type-C port controllers. + */ + +#include + +/ { + chassis-type =3D "laptop"; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; 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Fri, 24 Jul 2026 14:17:13 -0400 (EDT) From: Janne Grunau Date: Fri, 24 Jul 2026 20:16:49 +0200 Subject: [PATCH v3 9/9] arm64: dts: apple: Initial T6030 (M3 Pro) device trees Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260724-apple-t603x-initial-devices-v3-9-bbeba0420603@jannau.net> References: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> In-Reply-To: <20260724-apple-t603x-initial-devices-v3-0-bbeba0420603@jannau.net> To: Sven Peter , Janne Grunau , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Andi Shyti , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Sasha Finkelstein Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=58054; i=j@jannau.net; h=from:subject:message-id; bh=6zre/2+Eymh3ISnEJG4WtZnFWUA1rLvUTHbCrrZcYrw=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhqzkNQJCm925G9XS3nBd/ui5h3ul+eMdH6fq2b5KUeSc/ kd11wHGjoksDGJcDJZiiixJ2i87GFbXKMbUPgiDmcPKBDJEWqSBAQhYGPhyE/NKjXSM9Ey1DfUM jXSMdYwYuDgFYKpzzjIyfPFav2bCod1MN/487ZTcvVb8cP9vs+yHr7LSXyxTvezxl4fhf9Bn/+t vOyccnL86ROxF6X2RG5NOHbXncdr6qOR2flhVJx8A X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 Minimal device trees for the M3 Pro based 14-inch and 16-inch MacBook Pro released in November 2023. The M3 Pro is a distinct SoC design and not a cut down version of the Max variant like for M1 and M2 Pro. The M3 Pro has only a single cluster with up to 6 performance cores and one cluster with 6 efficiency cores. While it no longer shares a common SoC .dtsi the devices itself are still similar to the ones with M3 Max. It is still useful to share the basic device composition in t603x-j514-j516.dtsi. For the M3 Pro based devices additional overrides for diverging pin and irq numbers are expected. The device trees have devices nodes for CPU cores, timer, interrupt controller, power states, watchdog, serial, pin controller, i2c, PWM based keyboard LED illumination and the boot framebuffer. Reviewed-by: Sven Peter Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 2 + arch/arm64/boot/dts/apple/t6030-j514s.dts | 22 + arch/arm64/boot/dts/apple/t6030-j516s.dts | 22 + arch/arm64/boot/dts/apple/t6030-pmgr.dtsi | 1437 +++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t6030.dtsi | 524 +++++++++++ 5 files changed, 2007 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index a22b4a8068b6..9fea43f760ec 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -87,6 +87,8 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t6021-j416c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6020-j474s.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6021-j475c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6022-j475d.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6030-j514s.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t6030-j516s.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6031-j514c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6031-j516c.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t6032-j575d.dtb diff --git a/arch/arm64/boot/dts/apple/t6030-j514s.dts b/arch/arm64/boot/dt= s/apple/t6030-j514s.dts new file mode 100644 index 000000000000..3ba2c9ca4347 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6030-j514s.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (14-inch, M3 Pro, Nov 2023) + * + * target-type: J514s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6030.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j514s", "apple,t6030", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M3 Pro, Nov 2023)"; +}; + +&framebuffer0 { + power-domains =3D <&ps_disp_cpu>; +}; diff --git a/arch/arm64/boot/dts/apple/t6030-j516s.dts b/arch/arm64/boot/dt= s/apple/t6030-j516s.dts new file mode 100644 index 000000000000..ab07bf7939ab --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6030-j516s.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * MacBook Pro (16-inch, M3 Pro, Nov 2023) + * + * target-type: J516s + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t6030.dtsi" +#include "t603x-j514-j516.dtsi" + +/ { + compatible =3D "apple,j516s", "apple,t6030", "apple,arm-platform"; + model =3D "Apple MacBook Pro (16-inch, M3 Pro, Nov 2023)"; +}; + +&framebuffer0 { + power-domains =3D <&ps_disp_cpu>; +}; diff --git a/arch/arm64/boot/dts/apple/t6030-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t6030-pmgr.dtsi new file mode 100644 index 000000000000..932388ea13c9 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6030-pmgr.dtsi @@ -0,0 +1,1437 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for Apple T6030 "M3 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr_gfx { + ps_gpx: power-controller@0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpx"; + apple,always-on; + }; + + ps_afr: power-controller@100 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "afr"; + apple,always-on; + }; + + ps_gfx: power-controller@110 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + power-domains =3D <&ps_gpx>, <&ps_afr>; + }; +}; + +&pmgr { + ps_msg: power-controller@108 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msg"; + apple,always-on; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_pms_fpwm0: power-controller@138 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm0"; + }; + + ps_pms_fpwm1: power-controller@140 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm1"; + }; + + ps_pms_fpwm2: power-controller@148 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm2"; + }; + + ps_pms_fpwm3: power-controller@150 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm3"; + }; + + ps_pms_fpwm4: power-controller@158 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm4"; + }; + + ps_pms_c1ppt: power-controller@160 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_c1ppt"; + }; + + ps_soc_rc: power-controller@168 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_rc"; + }; + + ps_soc_dpe: power-controller@170 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_dpe"; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@178 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmgr_soc_ocla"; + }; + + ps_ispsens0: power-controller@180 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens0"; + }; + + ps_aft0: power-controller@190 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aft0"; + }; + + ps_ap_tmm: power-controller@1a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ap_tmm"; + }; + + ps_sio: power-controller@1b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio"; + }; + + ps_disp_sys: power-controller@1c0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_sys"; + }; + + ps_jpg: power-controller@1c8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + }; + + ps_sio_cpu: power-controller@1d0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_cpu"; + power-domains =3D <&ps_sio>; + }; + + ps_fpwm0: power-controller@1d8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm0"; + power-domains =3D <&ps_sio>; + }; + + ps_fpwm1: power-controller@1e0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm1"; + power-domains =3D <&ps_sio>; + }; + + ps_fpwm2: power-controller@1e8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm2"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c0: power-controller@1f0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c1: power-controller@1f8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c2: power-controller@200 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c3: power-controller@208 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c4: power-controller@210 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c4"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c5: power-controller@218 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c5"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c6: power-controller@220 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c6"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c7: power-controller@228 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c7"; + power-domains =3D <&ps_sio>; + }; + + ps_i2c8: power-controller@230 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c8"; + power-domains =3D <&ps_sio>; + }; + + ps_spi_p: power-controller@238 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi_p"; + power-domains =3D <&ps_sio>; + }; + + ps_uart_p: power-controller@240 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_p"; + power-domains =3D <&ps_sio>; + }; + + ps_audio_p: power-controller@248 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "audio_p"; + power-domains =3D <&ps_sio>; + }; + + ps_aes: power-controller@250 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes"; + power-domains =3D <&ps_sio>; + }; + + ps_disp_fe: power-controller@258 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_fe"; + power-domains =3D <&ps_disp_sys>; + }; + + ps_spi0: power-controller@260 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi1: power-controller@268 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi2: power-controller@270 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi3: power-controller@278 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi4: power-controller@280 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi4"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi5: power-controller@288 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi5"; + power-domains =3D <&ps_spi_p>; + }; + + ps_qspi: power-controller@290 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "qspi"; + power-domains =3D <&ps_spi_p>; + }; + + ps_uart_n: power-controller@298 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_n"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart0: power-controller@2a0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart1: power-controller@2a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart2: power-controller@2b0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart3: power-controller@2b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart4: power-controller@2c0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart5: power-controller@2c8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart6: power-controller@2d0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart6"; + power-domains =3D <&ps_uart_p>; + }; + + ps_sio_adma: power-controller@2d8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_adma"; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa0: power-controller@2e0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa0"; + apple,always-on; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa1: power-controller@2e8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa1"; + apple,always-on; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa2: power-controller@2f0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa2"; + apple,always-on; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa3: power-controller@2f8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa3"; + apple,always-on; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa4: power-controller@300 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa4"; + apple,always-on; + power-domains =3D <&ps_audio_p>; + }; + + ps_mca0: power-controller@308 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca0"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_dcs0: power-controller@320 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs0"; + apple,always-on; + }; + + ps_dcs2: power-controller@328 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x328 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs2"; + apple,always-on; + }; + + ps_dcs1: power-controller@330 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs1"; + apple,always-on; + }; + + ps_dcs3: power-controller@338 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs3"; + apple,always-on; + }; + + ps_dcs4: power-controller@340 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs4"; + apple,always-on; + }; + + ps_dcs5: power-controller@348 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs5"; + apple,always-on; + }; + + ps_dcs6: power-controller@358 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x358 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs6"; + apple,always-on; + }; + + ps_dcs7: power-controller@360 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs7"; + apple,always-on; + }; + + ps_dcs8: power-controller@368 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x368 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs8"; + apple,always-on; + }; + + ps_dcs9: power-controller@370 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs9"; + apple,always-on; + }; + + ps_dcs10: power-controller@378 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs10"; + apple,always-on; + }; + + ps_dcs11: power-controller@380 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs11"; + apple,always-on; + }; + + ps_mca1: power-controller@388 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca1"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca2: power-controller@390 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca2"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca3: power-controller@398 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca3"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_ioa1: power-controller@3a0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ioa1"; + apple,always-on; + }; + + ps_ls1: power-controller@3a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ls1"; + apple,always-on; + power-domains =3D <&ps_ioa1>; + }; + + ps_lw10: power-controller@3b0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "lw10"; + apple,always-on; + power-domains =3D <&ps_ls1>; + }; + + ps_dispext0_sys: power-controller@3b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_sys"; + power-domains =3D <&ps_lw10>; + }; + + ps_dispext1_sys: power-controller@3c0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_sys"; + power-domains =3D <&ps_lw10>; + }; + + ps_isp_sys: power-controller@3c8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_sys"; + power-domains =3D <&ps_lw10>; + }; + + ps_venc_sys: power-controller@3d0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_sys"; + power-domains =3D <&ps_lw10>; + }; + + ps_dispext0_fe: power-controller@3d8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_fe"; + power-domains =3D <&ps_dispext0_sys>; + }; + + ps_dispext0_cpu: power-controller@3e0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext0_cpu"; + power-domains =3D <&ps_dispext0_fe>; + }; + + ps_trace_fab: power-controller@3e8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "trace_fab"; + }; + + ps_dispext1_fe: power-controller@3f0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_fe"; + power-domains =3D <&ps_dispext1_sys>; + }; + + ps_dispext1_cpu: power-controller@3f8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext1_cpu"; + power-domains =3D <&ps_dispext1_fe>; + }; + + ps_dptx_phy: power-controller@408 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x408 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dptx_phy"; + apple,always-on; + }; + + ps_avd_sys: power-controller@490 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x490 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "avd_sys"; + }; + + ps_ane_sys: power-controller@498 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x498 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_sys"; + }; + + ps_scodec: power-controller@4a0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec"; + }; + + ps_scodec_stream: power-controller@4a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec_stream"; + power-domains =3D <&ps_scodec>; + }; + + ps_ioa3: power-controller@4b0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ioa3"; + apple,always-on; + }; + + ps_ls3: power-controller@4b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ls3"; + apple,always-on; + power-domains =3D <&ps_ioa3>; + }; + + ps_lw30: power-controller@4c0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "lw30"; + apple,always-on; + power-domains =3D <&ps_ls3>; + }; + + ps_pmp: power-controller@4c8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmp"; + }; + + ps_pms_sram: power-controller@4d0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_sram"; + }; + + ps_lw31: power-controller@4d8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "lw31"; + apple,always-on; + power-domains =3D <&ps_ls3>; + }; + + ps_atc0_common: power-controller@4e0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_common"; + power-domains =3D <&ps_lw30>; + }; + + ps_atc1_common: power-controller@4e8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_common"; + power-domains =3D <&ps_lw30>; + }; + + ps_atc2_common: power-controller@4f0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_common"; + power-domains =3D <&ps_lw30>; + }; + + ps_atc3_common: power-controller@4f8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_common"; + power-domains =3D <&ps_lw30>; + }; + + ps_apcie_gp: power-controller@500 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x500 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_gp"; + power-domains =3D <&ps_lw31>; + }; + + ps_msr: power-controller@508 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x508 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + power-domains =3D <&ps_lw31>; + }; + + ps_ans: power-controller@510 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x510 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + power-domains =3D <&ps_lw31>; + }; + + ps_atc0_pcie: power-controller@518 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x518 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_pcie"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio: power-controller@520 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x520 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc1_pcie: power-controller@528 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x528 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_pcie"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio: power-controller@530 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x530 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc2_pcie: power-controller@538 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x538 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_pcie"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc2_cio: power-controller@540 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x540 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio"; + power-domains =3D <&ps_atc2_common>; + }; + + ps_atc3_pcie: power-controller@548 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x548 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_pcie"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_atc3_cio: power-controller@550 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x550 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio"; + power-domains =3D <&ps_atc3_common>; + }; + + ps_apcie_sys_gp: power-controller@558 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x558 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_gp"; + power-domains =3D <&ps_apcie_gp>; + }; + + ps_msr_ase_core: power-controller@560 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x560 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr_ase_core"; + power-domains =3D <&ps_msr>; + }; + + ps_apcie_st: power-controller@568 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x568 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_st"; + power-domains =3D <&ps_ans>; + }; + + ps_atc0_cio_pcie: power-controller@570 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x570 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_pcie"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc0_cio_usb: power-controller@578 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x578 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_usb"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc1_cio_pcie: power-controller@580 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x580 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_pcie"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc1_cio_usb: power-controller@588 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x588 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_usb"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc2_cio_pcie: power-controller@590 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x590 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_pcie"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_atc2_cio_usb: power-controller@598 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x598 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_cio_usb"; + power-domains =3D <&ps_atc2_cio>; + }; + + ps_atc3_cio_pcie: power-controller@5a0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_pcie"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_atc3_cio_usb: power-controller@5a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_cio_usb"; + power-domains =3D <&ps_atc3_cio>; + }; + + ps_apcie_sys_st: power-controller@5b0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_sys_st"; + power-domains =3D <&ps_apcie_st>, <&ps_ans>; + }; + + ps_apcie_phy_sw: power-controller@5b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x5b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_phy_sw"; + apple,always-on; /* macOS does not turn this off */ + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; + }; + + ps_isp_cpu: power-controller@4000 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_cpu"; + power-domains =3D <&ps_isp_sys>; + }; + + ps_isp_fe: power-controller@4008 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_fe"; + power-domains =3D <&ps_isp_sys>; + }; + + ps_dprx: power-controller@4010 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dprx"; + power-domains =3D <&ps_isp_fe>; + }; + + ps_isp_secure: power-controller@4018 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_secure"; + power-domains =3D <&ps_isp_fe>; + }; + + ps_isp_be: power-controller@4020 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_be"; + power-domains =3D <&ps_isp_fe>; + }; + + ps_isp_clr: power-controller@4028 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4028 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_clr"; + power-domains =3D <&ps_isp_be>; + }; + + ps_venc_dma: power-controller@8000 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_dma"; + power-domains =3D <&ps_venc_sys>; + }; + + ps_venc_pipe4: power-controller@8008 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe4"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_pipe5: power-controller@8010 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe5"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me0: power-controller@8018 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me0"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me1: power-controller@8020 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me1"; + power-domains =3D <&ps_venc_me0>; + }; + + ps_disp_cpu: power-controller@10000 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x10000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_cpu"; + power-domains =3D <&ps_disp_fe>; + apple,min-state =3D <4>; + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_gated"; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi0"; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi1"; + apple,always-on; + }; + + ps_nub_spmi2: power-controller@68 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi2"; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@70 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a0"; + apple,always-on; + }; + + ps_nub_spmi_a1: power-controller@78 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a1"; + apple,always-on; + }; + + ps_nub_spi0: power-controller@88 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spi0"; + apple,always-on; + }; + + ps_nub_ocla: power-controller@90 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_ocla"; + apple,always-on; + }; + + ps_nub_gpio: power-controller@98 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x98 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_gpio"; + apple,always-on; + }; + + ps_nub_sram: power-controller@a8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_sram"; + apple,always-on; + }; + + ps_debug_switch: power-controller@b0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_switch"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@b8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb_aon"; + }; + + ps_atc1_usb_aon: power-controller@c0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb_aon"; + }; + + ps_atc2_usb_aon: power-controller@c8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb_aon"; + }; + + ps_atc3_usb_aon: power-controller@d0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb_aon"; + }; + + ps_atc0_usb: power-controller@d8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xd8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb"; + power-domains =3D <&ps_atc0_usb_aon>, <&ps_atc0_common>; + }; + + ps_atc1_usb: power-controller@e0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb"; + power-domains =3D <&ps_atc1_usb_aon>, <&ps_atc1_common>; + }; + + ps_atc2_usb: power-controller@e8 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xe8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc2_usb"; + power-domains =3D <&ps_atc2_usb_aon>, <&ps_atc2_common>; + }; + + ps_atc3_usb: power-controller@f0 { + compatible =3D "apple,t6030-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xf0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc3_usb"; + power-domains =3D <&ps_atc3_usb_aon>, <&ps_atc3_common>; + }; +}; + diff --git a/arch/arm64/boot/dts/apple/t6030.dtsi b/arch/arm64/boot/dts/app= le/t6030.dtsi new file mode 100644 index 000000000000..dda9568af11f --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6030.dtsi @@ -0,0 +1,524 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T6030 "M3 Pro" SoC + * + * Other names: H15J, "Lobos" + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include + +/ { + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e00>; + }; + core1 { + cpu =3D <&cpu_e01>; + }; + core2 { + cpu =3D <&cpu_e02>; + }; + core3 { + cpu =3D <&cpu_e03>; + }; + core4 { + cpu =3D <&cpu_e04>; + }; + core5 { + cpu =3D <&cpu_e05>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p00>; + }; + core1 { + cpu =3D <&cpu_p01>; + }; + core2 { + cpu =3D <&cpu_p02>; + }; + core3 { + cpu =3D <&cpu_p03>; + }; + core4 { + cpu =3D <&cpu_p04>; + }; + core5 { + cpu =3D <&cpu_p05>; + }; + }; + }; + + cpu_e00: cpu@0 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e01: cpu@1 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e02: cpu@2 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e03: cpu@3 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e04: cpu@4 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x4>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e05: cpu@5 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x5>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* to be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p00: cpu@10100 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p01: cpu@10101 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p02: cpu@10102 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p03: cpu@10103 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p04: cpu@10104 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10104>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p05: cpu@10105 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10105>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + /* Required to get >32-bit DMA via DARTs */ + dma-ranges =3D <0 0 0 0 0xffffffff 0xffffc000>; + + i2c1: i2c@289014000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x89014000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c1>; + status =3D "disabled"; + }; + + i2c2: i2c@289018000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x89018000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c2>; + status =3D "disabled"; + }; + + i2c3: i2c@28901c000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x8901c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c3>; + status =3D "disabled"; + }; + + i2c4: i2c@289020000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x89020000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c4>; + status =3D "disabled"; + }; + + i2c6: i2c@289028000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x89028000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c6_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c6>; + status =3D "disabled"; + }; + + i2c8: i2c@289030000 { + compatible =3D "apple,t6030-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x89030000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c8_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c8>; + status =3D "disabled"; + }; + + fpwm0: pwm@289040000 { + compatible =3D "apple,t6030-fpwm", "apple,s5l-fpwm"; + reg =3D <0x2 0x89040000 0x0 0x4000>; + power-domains =3D <&ps_fpwm0>; + clocks =3D <&clkref>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + serial0: serial@289200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0x89200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* + * TODO: figure out the clocking properly, there may + * be a third selectable clock. + */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + status =3D "disabled"; + }; + + pmgr_gfx: power-management@290e80000 { + compatible =3D "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x2 0x90e80000 0 0x4000>; + /* child nodes are added in t6030-pmgr.dtsi */ + }; + + pinctrl_ap: pinctrl@347100000 { + compatible =3D "apple,t6030-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x47100000 0x0 0x4000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + power-domains =3D <&ps_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 224>; + apple,npins =3D <224>; + + interrupt-controller; + #interrupt-cells =3D <2>; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + + i2c6_pins: i2c6-pins { + pinmux =3D , + ; + }; + + i2c8_pins: i2c8-pins { + pinmux =3D , + ; + }; + }; + + pmgr: power-management@350700000 { + compatible =3D "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x3 0x50700000 0 0x14000>; + /* child nodes are added in t6030-pmgr.dtsi */ + }; + + aic: interrupt-controller@351000000 { + compatible =3D "apple,t6030-aic3", "apple,t8122-aic3"; + #interrupt-cells =3D <3>; + interrupt-controller; + + reg =3D <0x3 0x51000000 0x0 0x184000>, + <0x3 0x51040000 0x0 0x4000>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + }; + + pinctrl_nub: pinctrl@3641f0000 { + compatible =3D "apple,t6030-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x641f0000 0x0 0x4000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_nub 0 0 37>; + apple,npins =3D <37>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + + pmgr_mini: power-management@364280000 { + compatible =3D "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + reg =3D <0x3 0x64280000 0 0x4000>; + /* child nodes are added in t6030-pmgr.dtsi */ + }; + + wdt: watchdog@3642b0000 { + compatible =3D "apple,t6030-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x642b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_smc: pinctrl@36c820000 { + compatible =3D "apple,t6030-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x6c820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 18>; + apple,npins =3D <18>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@374824000 { + compatible =3D "apple,t6030-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x3 0x74824000 0x0 0x4000>; + + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + clocks =3D <&clkref>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 54>; + apple,npins =3D <54>; + + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; +}; + +#include "t6030-pmgr.dtsi" --=20 2.55.0