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Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 1/9] cpufreq/amd-pstate: Set min_limit_freq based on bios_min_perf Date: Thu, 23 Jul 2026 20:12:20 +0000 Message-ID: <20260723201228.22584-2-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CE:EE_|MN0PR12MB5929:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f317e62-6eba-462b-b49b-08dee8f6d23a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|82310400026|1800799024|376014|36860700016|10067099003|56012099006|11063799006|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: LRHPMMy0F4cpcB7SSQzY2cXJMxcscALeSZP49AD1WAgA8r8iVUQEO5ZsWlfYcW1kMF5z+LubByBtxF5sgSseY3aFbFZMJWbLErPyuvGieYXjcgFtGBbbZ/8s2UVclGtGJ0MHj55zs0PftW0naqdhWIArtWX9018VEYjFy3AGNFUzSFArApIGYVRXx3mhln6gpXjGYqPRi2v+L7Q1OopJMb3SIx/eJNSJZt3ezEHQ6/bx4Eq/9uBdls61/QsBgj714+zJnRZN4YFXwMKA0aijOABp1/i4PtFbSagYRTuEp9PdcbHT06k74tsFVPiWTTQLZQpOU/ol83j7WEmPxWg2uxuR2Gbvx4n/eYyUiPg2NHm89aVUqeTorAWDxJUniCynGIY4b7ipW/WAENZC2rwJctoQLMuPOAk/Y3cSphrqcIKvEHfLgv3bgrsvSxq22SwMAsyxhfy3NKkYaWX5qGrzg/pq58SPW4K619HCC4J+fiv0Xbe/7TweQYS3D/ejc3HfGJKGpj+2h3uYN0IlTJC4HLZjWxrAdcIqNgTHQvyq43ohh86ETO9ZXUpDn3Qa9ZG38QOQKchg8bMoyycBitW3xGdvZmPXQ739276J9XQkPuC0dRalxCYjZKfX1In6HV272FxjUqAl5tZEzsDApfYk96IKLqlRBCHhnsd1CTqwFnIjGtblctJkFyVhct4aNgi1qxtiIy5lrBDjkdsrm7Vi9Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(23010399003)(82310400026)(1800799024)(376014)(36860700016)(10067099003)(56012099006)(11063799006)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8SHNjZZ/JY5GgbKC7UKXpCpKtZmE+mHGq/39MfX38AtYJQvjsaTeFI97f2eF66tyUr/OZj/uhsdpE7CsqOOFax9fjoZlZqZMPSYvwovyPBsXwDnzRicwVmvf5UE6uOfN9I6GZdASVO8Y0LY8tWmi5bIjjc0rwdmz/E9ZX1uEF5S/EdB4L6aq8+GZZhI2JTItsdGuP2P/ZfcDRMAuKBUnNnyNlEyP5N+urZAemqp48cSE7WnoRIXUFoSUcgVp4ivlxVuYY3QezMZ4nljVemMNqw0DIIOefWWjfyn0HIJ/5WI+mtt9ZgHtPBPLEHD4KuLzdEV3+IByxjwZRJEV6bx4HQYkfVkxU5eghJcLTlPUL4Yyamyt3M8uNzouG9XYGZkYjZvhuHci5LgFQBsd+fJnft1WJkErFECdzAK6lj7i4bg2zrnMFyVhyB9NLNPxEZSf X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:13:11.8575 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f317e62-6eba-462b-b49b-08dee8f6d23a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5929 Content-Type: text/plain; charset="utf-8" amd_pstate_update_min_max_limit() sets the min_limit_perf to the nominal_perf to avoid frequency throttling when the system is idling. This was found to be an ideal default but is suboptimal for users who have profiled their workload at different operating frequencies and have configured the optimal idling frequency via bios_min_perf. Use the bios_min_perf (if configured) as the min_limit_perf when running with performance governor. In absence of bios_min_perf, continue using nominal_perf as the default min_limit_perf to avoid throttling. Fixes: 608a76b65288 ("cpufreq/amd-pstate: Add support for the "Requested CP= U Min frequency" BIOS option") Reviewed-by: Mario Limonciello (AMD) Signed-off-by: K Prateek Nayak --- Changelog rfc v1..v2: o Picked up tag from Mario. (Thanks a ton!) --- drivers/cpufreq/amd-pstate.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index b357189f4f8e..1157f05df10f 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -699,9 +699,12 @@ static void amd_pstate_update_min_max_limit(struct cpu= freq_policy *policy) WRITE_ONCE(cpudata->max_limit_freq, policy->max); =20 if (cpudata->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) { + u8 min_limit_perf =3D perf.bios_min_perf ?: perf.nominal_perf; + u32 min_limit_freq; + /* - * For performance policy, set MinPerf to nominal_perf rather than - * highest_perf or lowest_nonlinear_perf. + * For performance policy, set MinPerf to nominal_perf / bios_min_perf + * rather than highest_perf or lowest_nonlinear_perf. * * Per commit 0c411b39e4f4c, using highest_perf was observed * to cause frequency throttling on power-limited platforms, leading to @@ -709,11 +712,17 @@ static void amd_pstate_update_min_max_limit(struct cp= ufreq_policy *policy) * performance too much for HPC workloads requiring high frequency * operation and minimal wakeup latency from idle states. * - * nominal_perf therefore provides a balance by avoiding throttling - * while still maintaining enough performance for HPC workloads. + * nominal_perf therefore provides a balanced default by avoiding + * throttling while still maintaining enough performance for HPC + * workloads when bios_min_perf is not available. + * + * When bios_min_perf is available, users have profiled their workloads + * to understand the best idling frequency. Use that instead. */ - perf.min_limit_perf =3D min(perf.nominal_perf, perf.max_limit_perf); - WRITE_ONCE(cpudata->min_limit_freq, min(cpudata->nominal_freq, cpudata->= max_limit_freq)); + min_limit_freq =3D perf_to_freq(perf, cpudata->nominal_freq, min_limit_p= erf); + perf.min_limit_perf =3D min_limit_perf; + + WRITE_ONCE(cpudata->min_limit_freq, min(min_limit_freq, cpudata->max_lim= it_freq)); } else { perf.min_limit_perf =3D freq_to_perf(perf, cpudata->nominal_freq, policy= ->min); WRITE_ONCE(cpudata->min_limit_freq, policy->min); --=20 2.34.1 From nobody Fri Jul 24 21:53:04 2026 Received: from CY7PR03CU001.outbound.protection.outlook.com (mail-westcentralusazon11010019.outbound.protection.outlook.com [40.93.198.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBDF54156FB; Thu, 23 Jul 2026 20:13:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.198.19 ARC-Seal: i=2; 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Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 2/9] cpufreq/amd-pstate: Remove the defensive check for bios_min_perf Date: Thu, 23 Jul 2026 20:12:21 +0000 Message-ID: <20260723201228.22584-3-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001C9:EE_|SA0PR12MB4445:EE_ X-MS-Office365-Filtering-Correlation-Id: 4fd8b94b-8692-4980-f7f6-08dee8f6dc3f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|1800799024|23010399003|82310400026|6133799003|56012099006|11063799006|10067099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: ZaerSLYWdY+G2KrPRycRAM/Z9/yKCJDKuX0bbJIxluVh27F48FcWaGMKSMqgITZqAW1PSpgRg4CZiRJZWpSSym9C6k1DzsxJ/dYiIzmqIB9JGnkpfLcLrFZiId3OuA0OOZ8wtVsL6e6llOGjKVJHfOn+ATDEwsJ6YCIeWkPT3eht2Rl1ymeY+VcvtSU5dGKycGMIQi9rXT4MfDdh334QY8orHm+N7AnJamIvvvtgfe1zwYRADgjvQt6DIWY4XD+/1mLUKv6CEZBTB9pxS4yFMRdtHtNW+R/V7wF+hFb17cYrjqDPHrN9D7j0ouqqPu9MQBkJFI9k86JjsLzLrv9QuNVXsVDYAIQZ6KPH0m4/qt3Pw0TRScQi2LkNyf88kt7Hbn6eCHAfEzHrlDocW61Mi/EckWUD8THYz+GIhWczZVe5UtvOkd4SYdBetadjU/nWM0ojYbAB/MEXxaON/ebWxfD1w1N2WCvYHBG1XbDCXEq37vRFGcTULZUN15WTzKgVuuWRnuugH5VI8fJp9v9eoZiDv2kX4sGeKYp9kTffIiol7np+Ks8AbzlE3dJsAbH2Tt06mAf4uGPxsX4c1f5zk1uDJq0qLNGx8G5+VQWus5QpFl+qdg6RF8xnzbGFy2rAU3tu7PmX6INXmD/o4COz8IPqifOC9zrIYxBKIPAPZKz1BPa8YvHndasIX+fneu9EjibFaT5a6VCqxcjghHTYfg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(376014)(1800799024)(23010399003)(82310400026)(6133799003)(56012099006)(11063799006)(10067099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ilLBAHysXI24YoSkElYxnGESBaG5yDpguczGYcWSIAsn7FUJmsTSIxMKAkrZEnRy0RgfT8QMsPuAHoLFfP6eUxfPno6G90egblMdqlnz9i0o91m0nkDGLC8rDgnoBb0QEG4BsnnLKhEwUVvkGeMVqK/2cZM657+g9HhV7nZZz/m6WVdTwTAGXCvK1LLcXF6rPA0aARSxf1ky9qpx8BrYztN3amPrySp+r2cHPTBMyizjLI6PFu4l7CYgXR21IxcHdlIzc2b2gxlZKAOT2I9HWXx6zT0Sc1kw9vH9RFHnmyrgvNdnb7GgdCpBgTDTIXyt+8wIP19wVqnl2NwYdZNWAiy0zDCiHibvK8IZw7giV/0GF4HbSPRb6lcnxI18pPScJj32t+U/kZXpqiOkYcHUK1zb7qpK8FqKtuCusKKD4RvWAnRoKVED5pVPwnv73Evo X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:13:28.6700 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4fd8b94b-8692-4980-f7f6-08dee8f6dc3f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001C9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4445 Content-Type: text/plain; charset="utf-8" Initialization of bios_min_perf (BIOS Requested CPU Min Freq.) only succeeds when the driver init finds the CPPC_REQ MSRs to have all 0s except for MIN_PERF bits. A kexec puts the driver through the suspend path which, although resets the min_perf back to bios_min_perf, keeps the rest of the CPPR_REQ intact with the last value at the time of suspend. The defensive check for bios_min_perf exists to prevent the min perf from last CPPC_REQ being incorrectly considered as bios_min_perf when a kexec switches from an older kernel running the version of driver which is not aware of bios_min_perf to a newer one. This scenario is extremely unlikely and Mario suggested it is better to simplify the initialization rather than complicating the suspend resume paths. Drop the defensive check for bios_min_perf initialization and add a debug message to dump the BIOS Requested Min Freq. to console leaving enough breadcrumbs for debug if a situation so arises. Suggested-by: Mario Limonciello Signed-off-by: K Prateek Nayak Reviewed-by: Mario Limonciello (AMD) --- Changelog rfc v1..v2: o Reworked based on review comments from Mario. --- drivers/cpufreq/amd-pstate.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 1157f05df10f..02308e95636e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -462,7 +462,6 @@ static int msr_init_perf(struct amd_cpudata *cpudata) { union perf_cached perf =3D READ_ONCE(cpudata->perf); u64 cap1, numerator, cppc_req; - u8 min_perf; =20 int ret =3D rdmsrq_safe_on_cpu(cpudata->cpu, MSR_AMD_CPPC_CAP1, &cap1); @@ -478,16 +477,6 @@ static int msr_init_perf(struct amd_cpudata *cpudata) return ret; =20 WRITE_ONCE(cpudata->cppc_req_cached, cppc_req); - min_perf =3D FIELD_GET(AMD_CPPC_MIN_PERF_MASK, cppc_req); - - /* - * Clear out the min_perf part to check if the rest of the MSR is 0, if y= es, this is an - * indication that the min_perf value is the one specified through the BI= OS option - */ - cppc_req &=3D ~(AMD_CPPC_MIN_PERF_MASK); - - if (!cppc_req) - perf.bios_min_perf =3D min_perf; =20 perf.highest_perf =3D numerator; perf.max_limit_perf =3D numerator; @@ -495,6 +484,7 @@ static int msr_init_perf(struct amd_cpudata *cpudata) perf.nominal_perf =3D FIELD_GET(AMD_CPPC_NOMINAL_PERF_MASK, cap1); perf.lowest_nonlinear_perf =3D FIELD_GET(AMD_CPPC_LOWNONLIN_PERF_MASK, ca= p1); perf.lowest_perf =3D FIELD_GET(AMD_CPPC_LOWEST_PERF_MASK, cap1); + perf.bios_min_perf =3D FIELD_GET(AMD_CPPC_MIN_PERF_MASK, cppc_req); WRITE_ONCE(cpudata->perf, perf); WRITE_ONCE(cpudata->prefcore_ranking, FIELD_GET(AMD_CPPC_HIGHEST_PERF_MAS= K, cap1)); WRITE_ONCE(cpudata->floor_perf_cnt, FIELD_GET(AMD_CPPC_FLOOR_PERF_CNT_MAS= K, cap1)); @@ -1043,6 +1033,13 @@ static int amd_pstate_init_freq(struct amd_cpudata *= cpudata) return -EINVAL; } =20 + if (perf.bios_min_perf) { + u32 bios_min_freq =3D perf_to_freq(perf, cpudata->nominal_freq, perf.bio= s_min_perf); + + pr_debug("Found Requested CPU Min Frequency of %uMHz on CPU%d\n", + bios_min_freq, cpudata->cpu); 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Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 3/9] cpufreq/amd-pstate: Extract platform profile to EPP conversion into a helper Date: Thu, 23 Jul 2026 20:12:22 +0000 Message-ID: <20260723201228.22584-4-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001C9:EE_|SA1PR12MB8599:EE_ X-MS-Office365-Filtering-Correlation-Id: e085b06b-be0e-44f8-e886-08dee8f6e8e4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|36860700016|82310400026|376014|11063799006|56012099006|10067099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: A8Wy5+2LhNNg5jYM2qKYWsqBuVfYDRcST7VoDH7FbHxGZBSQzPwdz+39kta39SlM0IkJuxhnu3rOCa5N9IhmenUmT1G9c79CvKQw+9ydmAjIwTmY7ypFs55cOTVo32pk+w5BdduozlkOSIZnZqMOjsSIq8KimpVTfmPJm8sfXR/GiIaKXZ3/YqdPNLOSkVZMKnJiT+i7hVQk3cdHWiXw0heUmgFzcCHbFR2XOKPDZPbmOaXEOXf0Gr8MzAURbqMDRWbi8fXtW3r4IZC6mqDhw4MMKAvCM5eehADs5pnXvqHhkFriQnNN4bvO5o1zpQCOmpsfMf0Elk3WBidBX56DCk7iG27mskCApDavYJlnvt58v5dL1WKQkAuQRnEZ7ZMO9PUQymjhYSMMod7pmbwqj07n+HIaaJtbnLt2ED6lzTVPUgO5Lkan/qx9RdOwla0102IyOCOeKtj3sn4o4XRBxn1BFW/uinMTwejHiPbk8ZIMu26vsNZe9814jx7+Koo+f0XXa2QgMGtanqilNsua4JHqKHG/cH+r29YYomKQtzqSSWdxDh40Js0dOsB1B1S8rcbxVTpX9sf6wohwLT/a0lIiLsgzOWhFP9FFZipPJlYgp3DPQE6Odnx2b8wJCMkpIAQOOO/rSO7rwPA2PoZo4T3dX0LEJkSNxe5ILBoaq9QxJRh8xymY90zsK371uO0YekPCkBAqPMRYGLrM+aFiVA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(23010399003)(36860700016)(82310400026)(376014)(11063799006)(56012099006)(10067099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JrpXy9RLBaB+GAFVq2IlqFDdxyRVcSGxjXD5DH+Y1RklBfTOFI9AIbIaHlR2XnPtSnyrdxc3KUAyIX6cNf8rq7T5lfyi1K/TCGTAwh3A64tqPXqNEf7cjH5spD7MsUT0E7Ezhx/paD92voTYkBdtPc98BwfoX7N1AkPPT/wUmuKMfOcSbUOjZP2JLk9wy1IIrchZaLBnCLNvhfrDCaMYgf8S3riHFCw5geg85/qyHLW+gxYs4PRUj9KsIA1OTd52rED4dnQ1EEW0j4t1tWP0V3tW/GExd+NkGRNUEiObszwWovRtBfn0tUUcsDz47DO/YrvN/1yN/BOjhMp+GVJFeG4bFhpmnFKNP8Egg5Qs/vSRifaG52ORa3OPon4gQ6H3q71UppBmKF1U9+KYFgO+t6XQcx6fd7kMkxeWti7FtVkZqLlDCO1ViE1iyUsKGYbx X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:13:49.8730 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e085b06b-be0e-44f8-e886-08dee8f6e8e4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001C9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8599 Content-Type: text/plain; charset="utf-8" Avoid duplication by extracting the switch case that derives EPP based on platform profile into the amd_pstate_get_epp_from_platform_profile() helper. No functional changes intended. Reviewed-by: Mario Limonciello (AMD) Signed-off-by: K Prateek Nayak --- Changelog rfc v1..v2: o Picked up tag from Mario. (Thanks a ton!) --- drivers/cpufreq/amd-pstate.c | 67 +++++++++++++++++------------------- 1 file changed, 32 insertions(+), 35 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 02308e95636e..7d1feed0e11e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1188,6 +1188,24 @@ static int amd_pstate_power_supply_notifier(struct n= otifier_block *nb, return NOTIFY_OK; } =20 +static int amd_pstate_get_epp_from_platform_profile(struct cpufreq_policy = *policy, + enum platform_profile_option profile) +{ + switch (profile) { + case PLATFORM_PROFILE_PERFORMANCE: + return AMD_CPPC_EPP_PERFORMANCE; + case PLATFORM_PROFILE_BALANCED: + return amd_pstate_get_balanced_epp(policy); + case PLATFORM_PROFILE_LOW_POWER: + return AMD_CPPC_EPP_POWERSAVE; + default: + break; + } + + pr_err("Unknown Platform Profile %d\n", profile); + return -EOPNOTSUPP; +} + static int amd_pstate_profile_probe(void *drvdata, unsigned long *choices) { set_bit(PLATFORM_PROFILE_LOW_POWER, choices); @@ -1213,31 +1231,19 @@ static int amd_pstate_profile_set(struct device *de= v, struct amd_cpudata *cpudata =3D dev_get_drvdata(dev); struct cpufreq_policy *policy __free(put_cpufreq_policy) =3D cpufreq_cpu_= get(cpudata->cpu); int ret; + u8 epp; =20 if (!policy) return -ENODEV; =20 - switch (profile) { - case PLATFORM_PROFILE_LOW_POWER: - ret =3D amd_pstate_set_epp(policy, AMD_CPPC_EPP_POWERSAVE); - if (ret) - return ret; - break; - case PLATFORM_PROFILE_BALANCED: - ret =3D amd_pstate_set_epp(policy, - amd_pstate_get_balanced_epp(policy)); - if (ret) - return ret; - break; - case PLATFORM_PROFILE_PERFORMANCE: - ret =3D amd_pstate_set_epp(policy, AMD_CPPC_EPP_PERFORMANCE); - if (ret) - return ret; - break; - default: - pr_err("Unknown Platform Profile %d\n", profile); - return -EOPNOTSUPP; - } + ret =3D amd_pstate_get_epp_from_platform_profile(policy, profile); + if (ret < 0) + return ret; + + epp =3D (u8)ret; + ret =3D amd_pstate_set_epp(policy, epp); + if (ret) + return ret; =20 cpudata->current_profile =3D profile; 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Thu, 23 Jul 2026 15:13:59 -0500 From: K Prateek Nayak To: Mario Limonciello , Huang Rui , "Rafael J. Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 4/9] cpufreq/amd-pstate: Add dynamic EPP as an "energy_performance_preference" mode Date: Thu, 23 Jul 2026 20:12:23 +0000 Message-ID: <20260723201228.22584-5-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CF:EE_|MN0PR12MB6365:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d9f0ee3-ceb2-481a-baf0-08dee8f6f23a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700016|1800799024|23010399003|11063799006|22082099003|5023799004|10067099003|56012099006|18002099003|6133799003; X-Microsoft-Antispam-Message-Info: RnzQ4tRR63qksK5ta5ZWkuCEm8j0qKZ7l3AL3np7WO7Oa0EqwciPP7yLcHhy9r1r2uA50Afk56xwMKLb9k7CP/HuiFw/SmJWslNOVKfiiThqGddK9JED4Soc4ArWUQ04tTKsuncnnCCgx3DxfjQKsutxhjxC0lFY7SCkKGA/reHCNzL8it1IfrOaGak6lGWUniv8oX6BScNtvHRruPiny53Qt4tsr9XTktvz5LChLZvMvX2o5qSbJp6RWdxpJy5WU8oqotGatK9relCq0P1GdzbnrFsZuHQHYIytaSVWGwy5X8G2i+GIgPOREj+JAMBtDdJxl61nZebAXzJ6VzPkuhnxaoDROGECKdoPs1W9AHdYGGxzH8cgv4wKKrAIVO1nVaDBz1zPCo0TV0opwPdwTt6+Rocbc2eXP7QTpESDHLTyFioDu8tYDkKVSdA7wmmbmlyhOXgsp5AHaNfuU7BBR4dCtfqX6abXSTHbiOMrlrJJ61rznjxSiFzQBhkmSvJ8PA9K2A5XX5D6q1NfUaqqRoUvJpRGuDZWJ5TZZx272CNrDS13HB6RAefhOC4H6B895HCEJdTXalhUoEIhv7r04rlduroDpfu07juP5gOL1tmcLH5O2JzTPT/vZT6KZEpiJMGgP13+dG3RZabgxfQKyAVt8y7itMDNcyMYfb9OJlQhBChT93MYJvq74k1x/orVta2hwY/PEzWwoQJ8ih9kwA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700016)(1800799024)(23010399003)(11063799006)(22082099003)(5023799004)(10067099003)(56012099006)(18002099003)(6133799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nfSKvGhWwUwi6kPNT7FgqNvBEuS1GIsLsUYXYvLMs//u0uzfYWQXi3EENzxqAZYO5nKv8s6ffsvlzMW3dix5BJSBB14WHdJwI26QRUoyVyPpCfLurcyWNKblUmyIWYZvujmO+u0jUd68MFosXEWX78pCavfaJDO59zXY9NcfHmYHRxgxo41Yq1KccmDB2hWamzRjxi6s6VyMg9I/HQY9xuqKUuv72WAYXv0jNwE0uKY2MS171t20F+UYGxqXq9ltZGhOvsmDa5pM9ZiJPN+P1ZdVUmqDorKWNS2m2ZEmTScrnpZ44JgfWXuCLy24jlIwCfeXxMpXjcUSxwiA0c5Lb6BXKCRniAmu9DabDZguFDfjI6M2gZToS9Lhh6WsHhxRzQkD6laX0a0AKukQKabkBWv8Z1Pw5RNpj5hlEIxKJUtIcsdOD4j5n48+QgCL7pl4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:14:05.5449 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d9f0ee3-ceb2-481a-baf0-08dee8f6f23a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6365 Content-Type: text/plain; charset="utf-8" Conver the global "dynamic_epp" toggle into a per-CPU "energy_performance_preference" mode "dynamic" that allows toggling the functionality of "dynamic_epp" at a per-CPU level. Instead of being a system-wide toggle, users can opt into the functionality of dynamic EPP on a per-CPU basis by switching to the powersave governor and selecting the "dynamic" mode from the available performance preferences. Unlike the previous implementation that had to check for driver mode before toggling on the functionality, block writes to certain sysfs files, potentially disallow policy change, etc. the per-CPU toggle fits naturally into the intended design and provides more granular control to the user. The dynamic_epp file is now redundant as the option to toggle it on is controlled via energy_performance_preference, and the dynamic_epp file will be removed in the subsequent commit. Signed-off-by: K Prateek Nayak Reviewed-by: Mario Limonciello (AMD) --- Changelog rfc v1..v2: o Removed "dynamic_epp" global control related changes since it will be removed in the subsequent commit. --- drivers/cpufreq/amd-pstate.c | 57 +++++++++++++++++++++++++++++++----- 1 file changed, 49 insertions(+), 8 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 7d1feed0e11e..fc90e4108c22 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -106,6 +106,7 @@ static struct quirk_entry *quirks; * 3 balance_power * 4 power * 5 custom (for raw EPP values) + * 6 dynamic (platform profile driven selection) */ enum energy_perf_value_index { EPP_INDEX_DEFAULT =3D 0, @@ -114,6 +115,7 @@ enum energy_perf_value_index { EPP_INDEX_BALANCE_POWERSAVE, EPP_INDEX_POWERSAVE, EPP_INDEX_CUSTOM, + EPP_INDEX_DYNAMIC, EPP_INDEX_MAX, }; =20 @@ -124,6 +126,7 @@ static const char * const energy_perf_strings[] =3D { [EPP_INDEX_BALANCE_POWERSAVE] =3D "balance_power", [EPP_INDEX_POWERSAVE] =3D "power", [EPP_INDEX_CUSTOM] =3D "custom", + [EPP_INDEX_DYNAMIC] =3D "dynamic", }; static_assert(ARRAY_SIZE(energy_perf_strings) =3D=3D EPP_INDEX_MAX); =20 @@ -134,7 +137,7 @@ static unsigned int epp_values[] =3D { [EPP_INDEX_BALANCE_POWERSAVE] =3D AMD_CPPC_EPP_BALANCE_POWERSAVE, [EPP_INDEX_POWERSAVE] =3D AMD_CPPC_EPP_POWERSAVE, }; -static_assert(ARRAY_SIZE(epp_values) =3D=3D EPP_INDEX_MAX - 1); +static_assert(ARRAY_SIZE(epp_values) =3D=3D EPP_INDEX_MAX - 2); =20 typedef int (*cppc_mode_transition_fn)(int); =20 @@ -1274,6 +1277,7 @@ EXPORT_SYMBOL_GPL(amd_pstate_clear_dynamic_epp); static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) { struct amd_cpudata *cpudata =3D policy->driver_data; + u64 prev =3D READ_ONCE(cpudata->cppc_req_cached); int ret; u8 epp; =20 @@ -1314,6 +1318,9 @@ static int amd_pstate_set_dynamic_epp(struct cpufreq_= policy *policy) cleanup: amd_pstate_clear_dynamic_epp(policy); =20 + epp =3D FIELD_GET(AMD_CPPC_EPP_PERF_MASK, prev); + /* Restore previous EPP if toggling Dynamic EPP failed. */ + amd_pstate_set_epp(policy, epp); return ret; } =20 @@ -1384,7 +1391,7 @@ static ssize_t show_amd_pstate_hw_prefcore(struct cpu= freq_policy *policy, static ssize_t show_energy_performance_available_preferences( struct cpufreq_policy *policy, char *buf) { - int offset =3D 0, i; + int i, offset =3D 0; struct amd_cpudata *cpudata =3D policy->driver_data; =20 if (cpudata->policy =3D=3D CPUFREQ_POLICY_PERFORMANCE) @@ -1407,11 +1414,6 @@ ssize_t store_energy_performance_preference(struct c= pufreq_policy *policy, bool raw_epp =3D false; u8 epp; =20 - if (cpudata->dynamic_epp) { - pr_debug("EPP cannot be set when dynamic EPP is enabled\n"); - return -EBUSY; - } - /* * if the value matches a number, use that, otherwise see if * matches an index in the energy_perf_strings array @@ -1422,6 +1424,23 @@ ssize_t store_energy_performance_preference(struct c= pufreq_policy *policy, ret =3D sysfs_match_string(energy_perf_strings, buf); if (ret < 0 || ret =3D=3D EPP_INDEX_CUSTOM) return -EINVAL; + + if (ret =3D=3D EPP_INDEX_DYNAMIC) { + /* + * Dynamic EPP was already enabled for this CPU. + * Nothing to do. + */ + if (cpudata->dynamic_epp) + return count; + + cpudata->current_profile =3D PLATFORM_PROFILE_BALANCED; + ret =3D amd_pstate_set_dynamic_epp(policy); + if (ret) + return ret; + + return count; + } + if (ret) epp =3D epp_values[ret]; else @@ -1433,6 +1452,13 @@ ssize_t store_energy_performance_preference(struct c= pufreq_policy *policy, return -EBUSY; } =20 + /* + * Dynamic EPP was enabled previously! + * Switch back to the static EPP mode. + */ + if (cpudata->dynamic_epp) + amd_pstate_clear_dynamic_epp(policy); + ret =3D amd_pstate_set_epp(policy, epp); if (ret) return ret; @@ -1450,7 +1476,7 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * =20 epp =3D FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached); =20 - if (cpudata->raw_epp) + if (!cpudata->dynamic_epp && cpudata->raw_epp) return sysfs_emit(buf, "%u\n", epp); =20 switch (epp) { @@ -1470,6 +1496,9 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * return -EINVAL; } =20 + if (cpudata->dynamic_epp) + return sysfs_emit(buf, "dynamic(profile:%s)\n", energy_perf_strings[pref= erence]); + return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } EXPORT_SYMBOL_GPL(show_energy_performance_preference); @@ -2030,6 +2059,18 @@ static int amd_pstate_epp_set_policy(struct cpufreq_= policy *policy) if (!policy->cpuinfo.max_freq) return -ENODEV; =20 + /* Must be a switch between PERFORMANCE and POWERSAVE */ + if (cpudata->policy !=3D policy->policy) { + /* + * Disable dynamic_epp when switching + * out of CPUFREQ_POLICY_POWERSAVE. + */ + if (cpudata->dynamic_epp) { + WARN_ON_ONCE(cpudata->policy !=3D CPUFREQ_POLICY_POWERSAVE); + amd_pstate_clear_dynamic_epp(policy); + } + } + cpudata->policy =3D policy->policy; =20 ret =3D amd_pstate_epp_update_limit(policy, true); --=20 2.34.1 From nobody Fri Jul 24 21:53:04 2026 Received: from PH0PR06CU001.outbound.protection.outlook.com (mail-westus3azon11011008.outbound.protection.outlook.com [40.107.208.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5618E418A30; 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Thu, 23 Jul 2026 15:14:17 -0500 From: K Prateek Nayak To: Mario Limonciello , Huang Rui , "Rafael J. Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 5/9] cpufreq/amd-pstate: Remove "amd_dynamic_epp" cmdline and "dynamic_epp" sysfs Date: Thu, 23 Jul 2026 20:12:24 +0000 Message-ID: <20260723201228.22584-6-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CD:EE_|SN7PR12MB6743:EE_ X-MS-Office365-Filtering-Correlation-Id: 17963be3-8099-4596-97bc-08dee8f6fc49 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|23010399003|82310400026|1800799024|36860700016|6133799003|18002099003|22082099003|56012099006|5023799004|11063799006|10067099003; X-Microsoft-Antispam-Message-Info: uhXrsIaktREBnHxGh6awx30BX+lArWvwelSUo4ZHwSGej3DACgvjXQxFz5uDrGGvzTOAOQ9JfNc+d3NQigu1AquIjLRV3V6v/n86dUfaQiwKWfxWdXzTCqUoK4+aAmKg7iqmEm+rX3tzZ1a/L9x3EiaEdcWfW66sa7KYnP5GZnOVKS1/wzdF59/iUewEVsm57fW/skY6hyKziQSS22dH15XUTl1e015waUmoR+89Gr/ko0hgPmzxrv1s81CX5GBe999/N4BYjrTNlWCQl3JLZ4upeETEkzS2w0Je813ur+GM8aYdmYDam9+7TQDLoKGmKhN0svNfTqIZfaIAmNLqDnbeiQwoIIPoQV3RF909GgltIsr/jLM1GdJGOtfruT882pIjQ2wadRIs6WJj/hut46+5NTDKNn5CwoPpXWCa64uPJ30/b18UvAd3WzBCcCACt5lTviVMycTjaVDJxyS5f4eB376Ve9F7URwSrkyPYHbT3VsbMxVNds6glFz+5SO1ImDLAPYAl/zY2Q0mMVayeox6TOZIXzCbb7esnRKMqdxVSgqTYWy1Ks5Yv87UFY9sSzJ9XFxa2KPVKGmbyLAIRBS1H2+/Hb7bd8GneQ2zIL2VChhx2jn4GxgCGt7HalqTupxTcP2b0QpIOYQ7QGo+SEGH1Ua+CEt7bkV6dw5TE+WKD4K2Y9A95OLIB3FUZ8AXUaGehoV9ST+66xinw6B/7A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(23010399003)(82310400026)(1800799024)(36860700016)(6133799003)(18002099003)(22082099003)(56012099006)(5023799004)(11063799006)(10067099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pC3WeIZVr07gaDqb6grrXO5Lso5kbjJZu9lf4Wv5HYu6fh8P+2K8tCFDs5z1ztubYqC177BLERHcleGu9GR0isR4wZ5aaiGEHNx/8xxNS8mnFernM4yhcWNd7Hr/B51N8mF/hzQY1xfoSmqWP3QDkiHlNtEMlDwh64/DMrSqjkSbtrpl/dXIE716BFlsifqruUlzJAabgBLbfXrSDxddTI4LC9MyXTm8iZSEPoyAEu1sW5I/bvW9l55iKAa7mVErmsLjlb66kfD3yI9pt/d9FV792GnqnuLGbbiO1S2lFAQxjqwk9NwYqgohNLieGLSYUjZzxViwwIo3SNKhjzn/b++jwoBhoz8FuSHNVssQDuX7S/ot8WnutBDIHXwkFLf9F2Rzkf8U5+Hx7nldLcA1CRTkpIKdcjQ0/fdtM6aS2Xizvyb5Uya+VTRetOiGn13R X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:14:22.4205 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 17963be3-8099-4596-97bc-08dee8f6fc49 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CD.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6743 Content-Type: text/plain; charset="utf-8" Since dynamic_epp has been converted to an "energy_performance_preference", toggling the feature via the sysfs file or the kernel cmdline is now redundant. Remove the sysfs file and the "amd_dynamic_epp" cmdline and only depend on "energy_performance_preference" to toggle dynamic_epp. Signed-off-by: K Prateek Nayak Reviewed-by: Mario Limonciello (AMD) --- Changelog rfc v1..v2: o Removed "dynamic_epp" gloabal control, the "amd_synamic_epp" cmdline, and the "fdynamic_epp" sysfs since they are all redundant after the rework. --- drivers/cpufreq/amd-pstate.c | 55 +----------------------------------- 1 file changed, 1 insertion(+), 54 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index fc90e4108c22..92da8937df04 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -87,7 +87,6 @@ static struct cpufreq_driver amd_pstate_driver; static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state =3D AMD_PSTATE_UNDEFINED; static bool amd_pstate_prefcore =3D true; -static bool dynamic_epp; static struct quirk_entry *quirks; =20 /* @@ -1834,50 +1833,12 @@ static ssize_t prefcore_show(struct device *dev, return sysfs_emit(buf, "%s\n", str_enabled_disabled(amd_pstate_prefcore)); } =20 -static ssize_t dynamic_epp_show(struct device *dev, - struct device_attribute *attr, char *buf) -{ - return sysfs_emit(buf, "%s\n", str_enabled_disabled(dynamic_epp)); -} - -static ssize_t dynamic_epp_store(struct device *a, struct device_attribute= *b, - const char *buf, size_t count) -{ - bool enabled; - int ret; - - ret =3D kstrtobool(buf, &enabled); - if (ret) - return ret; - - guard(mutex)(&amd_pstate_driver_lock); - - if (cppc_state !=3D AMD_PSTATE_ACTIVE) { - pr_debug("dynamic_epp can only be toggled in active mode\n"); - return -EINVAL; - } - - /* Nothing to do */ - if (dynamic_epp =3D=3D enabled) - return count; - - /* reinitialize with desired dynamic EPP value */ - dynamic_epp =3D enabled; - ret =3D amd_pstate_change_driver_mode(cppc_state); - if (ret) - dynamic_epp =3D false; - - return ret ? ret : count; -} - static DEVICE_ATTR_RW(status); static DEVICE_ATTR_RO(prefcore); -static DEVICE_ATTR_RW(dynamic_epp); =20 static struct attribute *pstate_global_attributes[] =3D { &dev_attr_status.attr, &dev_attr_prefcore.attr, - &dev_attr_dynamic_epp.attr, NULL }; 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Thu, 23 Jul 2026 15:14:35 -0500 From: K Prateek Nayak To: Mario Limonciello , Huang Rui , "Rafael J. Wysocki" , Viresh Kumar , Jonathan Corbet , Shuah Khan CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 6/9] Documentation/amd-pstate: Update dynamic_epp documentation with new behavior Date: Thu, 23 Jul 2026 20:12:25 +0000 Message-ID: <20260723201228.22584-7-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001C8:EE_|PH0PR12MB8126:EE_ X-MS-Office365-Filtering-Correlation-Id: 457c7fd6-7542-48f8-6ca4-08dee8f70712 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|82310400026|36860700016|23010399003|11063799006|3023799007|18002099003|22082099003|56012099006|6133799003|10067099003; X-Microsoft-Antispam-Message-Info: 51APuUVwYs4Hc7Bl/Kf4FQw4PGrRaScF5F+lQAvrP73EQhRC+9bBtCtXUEtW+GwvF/eFGjHbVlBMLydnE68PXGiiq3N7LI3W3bbovvJ8cS71OYwdHyLk5Vv3AF1xzmPYyN7CuiU7Zf33c/kEsY/PLhyrN6bqQv+PeGk/96vmuDzZ0Op0qS/cFowlgoVF5it4esY1R5QNbVQ4Gx2Wz2NTx9EVLwavo4c3ggmepdAObrhxb5+ftaGJDPX3K2QRw7F2XnYHJIE8aZSL5CtMfl+kOxRe16V/y67PEDXb63RoP83G2Vk7aKVLII9Ck7jsTAkWS3RI37JDKmp3THE2C1Tg4mMJKOp+SHo2O/tszZN2NqQCjxS5pkk9D9gjEKEa8ZFl43c08vO1pP8J7/hVOHAS/6GYaUK5ISb1n52GGyTYdkSNqrvC8brMulYPpZ3wh9sBOHJhAQ5YS8xGPv/kmpA1GR2JS2Nsth019qg9Go1UI+EvJR9JUO77M9UTgIReKBSSaP1JfL+nMjNW/oPHuUkOGxyJnokjOY20A67Si8YrSO+jH8MzQFDIUGCAg0iTJFmTWM6qSgULkl3/6yU7qFM/T8pcLhP0Tb8E/F1JjjM+JTrWL+7fx3oOVGncKtw4Ge4VcyMFESpPzwsdsLPBHiP4w6LEYEgxz8DGFmnLd+iWOOQhjw/kmQ55feSdPZMMRe+I/tqS8m1w2sdD/ZhOdKymCA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(82310400026)(36860700016)(23010399003)(11063799006)(3023799007)(18002099003)(22082099003)(56012099006)(6133799003)(10067099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XAquBNAVMRCI0aVWou4kGBlM6QPpaxKIMwcyNZH/xioDqxnClDlWtPBfd4Oq5tsYqoTo2tbFmr+5R95CmkotfkYWQBrQeOcQS+/HJrWp5Ku6u7IaZ0gWI609eNcqb1ByrN2BhUsu5LiV7U39OOVUhJtaZUQ/6LSdy9eyMUH5nOU3K7YCNjrwlh3TO9T4+cy5ykyMO8iZ/BJKr04mXydr7YT4qSJYQg1haWdedq4LLpYTIsOXLqDhUScQD/1BEsCwfD7N8ljpW6RFlovrr0Up937A2E3MhM3hX633a3mzbtA8mGeAlJNWlEXYYHKtFPgDTw12aSnzel7rez/QizVEbSrx6Lxcg89DH4gyIQhxeDbJH2YGZXF1ed9QAzLIKkC6gHykd25lZ2oWz6uF9lXIPYO9IYNy4n19W+7YhMsehw3TxupAvI0Y2cqUTnVQq0jD X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:14:40.5133 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 457c7fd6-7542-48f8-6ca4-08dee8f70712 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001C8.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8126 Content-Type: text/plain; charset="utf-8" Update the admin-guide for dynamic_epp describing the latest integration into energy_performance_preference selections. Signed-off-by: K Prateek Nayak --- Changelog rfc v1..v2: o Updated documentation based on current state of rework. --- Documentation/admin-guide/pm/amd-pstate.rst | 46 ++++++++++----------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index a95e2ebce005..b0f1626bd783 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -317,7 +317,10 @@ These profiles represent different hints that are prov= ided to the low-level firmware about the user's desired energy vs efficiency tradeoff. ``default`` represents the epp value is set by platform firmware. ``custom`` designates that integer values 0-255 may be written -as well. This attribute is read-only. +as well. ``dynamic`` designates that the EPP is modified dynamically +by the platform profile and the power supply status. See ``Dynamic energy +performance profile`` section below to know more about the ``dynamic`` +mode. This attribute is read-only. =20 ``energy_performance_preference`` =20 @@ -326,13 +329,11 @@ and user can change current preference according to e= nergy or performance needs Coarse named profiles are available in the attribute ``energy_performance_available_preferences``. Users can also write individual integer values between 0 to 255. -When dynamic EPP is enabled, writes to energy_performance_preference are b= locked -even when EPP feature is enabled by platform firmware. Lower epp values sh= ift the bias -towards improved performance while a higher epp value shifts the bias towa= rds -power-savings. The exact impact can change from one platform to the other. -If a valid integer was last written, then a number will be returned on fut= ure reads. -If a valid string was last written then a string will be returned on futur= e reads. -This attribute is read-write. +Lower epp values shift the bias towards improved performance while a highe= r epp +value shifts the bias towards power-savings. The exact impact can change f= rom +one platform to the other. If a valid integer was last written, then a num= ber +will be returned on future reads. If a valid string was last written then a +string will be returned on future reads. This attribute is read-write. =20 ``boost`` The `boost` sysfs attribute provides control over the CPU core @@ -356,21 +357,20 @@ Other performance and frequency values can be read ba= ck from Dynamic energy performance profile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D The amd-pstate driver supports dynamically selecting the energy performance -profile based on whether the machine is running on AC or DC power. - -Whether this behavior is enabled by default depends on the kernel command = line option -``amd_dynamic_epp`` is set. This behavior can also be overridden -at runtime by the sysfs file ``/sys/devices/system/cpu/amd_pstate/dynamic_= epp``. - -When set to enabled, the driver will select a different energy performance -profile when the machine is running on battery or AC power. The driver will -also register with the platform profile handler to receive notifications of -user desired power state and react to those. -When set to disabled, the driver will not change the energy performance pr= ofile -based on the power source and will not react to user desired power state. - -Attempting to manually write to the ``energy_performance_preference`` sysfs -file will fail when ``dynamic_epp`` is enabled. +profile based on the system profile and the current power source in active= mode. + +The ``dynamic`` mode is listed in +``/sys/devices/system/cpu/cpuX/cpufreq/energy_performance_available_prefer= ences`` +when available while running under the ``powersave`` governor. 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Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 7/9] cpufreq/amd-pstate: Reduce the scope of exported symbols Date: Thu, 23 Jul 2026 20:12:26 +0000 Message-ID: <20260723201228.22584-8-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001C9:EE_|SA1PR12MB7128:EE_ X-MS-Office365-Filtering-Correlation-Id: e0f51880-3ce4-4b0d-4341-08dee8f71186 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|36860700016|82310400026|376014|11063799006|56012099006|10067099003|6133799003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: rjNjvbNX1XdSPNQZ7TcwTdvqev/r3LA7RjJGnqtbHTg7vfia8HZJs9HfPRDu79R/iRj28q53CXgYP0TFGBhBnazCDHizSsmy0AonQcqCcf/nrBzUa96CbScA3AGnRG8sjbiH3hAsLn05GnbPrBDXCuYkaBUoj92BvOWK724vxpt2usQog86RJ+KxRmp0s//WsMrPDBea2LFAu5lE8NwM9jnLsZxp2VKV3UH/Kr8DXSQaBQQpk7kUqY7Mkc/L6XyyGyzcA7WmN3duY825UksGYY3BaO2oDjt5NKu798VfhO7bqo9iG7iMRXEzlJ/K1PElL04RAgoj44aQl+UadCr0sFmROcTdAlXRaI7y21rvycFB32XjTgXVSQSVc7o5LNTscqXh8T2pGAIB8LMnSYYCvmeYLUchCg2Ycmzb/whusxVX1jwar5euKn9r0Y9f04ili5ZTtLSiqb7lJSWPOJlK9g/J4Qjzj3FGKftJR5h9lXpyhARIC6jCti3SuLrI7sCkWtDTBZ6kuZhqe5Pg6zR922W68b8puvuQ4cpuVGtRpstPrIoZjLT0oEth8ONtu+NZfzSoH9TbBl2AVzJnVJpmAOKWOSIc+9vla1QCIO3JBW0Q0zXfTEZqhTrj9nSvBR/xfQUmoFHpL4vd4j/5UhqYnEJg2E0x9scYJWmIajfEpb5Q3hpl63+TP5DUXBfMEK2r01atytmjXT18Nc8OZaxK/g== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(23010399003)(36860700016)(82310400026)(376014)(11063799006)(56012099006)(10067099003)(6133799003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dCclT3Vo3JM9KGqLFf9Igu6sw6r7RqUgOQFHbQqICzd8z1hc9Bd2KHD1QerMnB5BssTfRMN2THOv/DYfc8B59ysCx2qXd1BBtqrrNW+knEE6Nh9/Y2NRqur/kGR+Uqii61rQMyaO1c+Q2GVoj0iiwZf7EI0rpQ85h2WOvXqtTeEPkM7leS/e+iM/myCpNeEMf6LJJD9Y+lxLT3MJ+ptmbSie9Z48EFF7HMsWi3TsmVPL5ahg/O9OEsMgYbIAxkJB0/zby+2qufTGRzvurBGcLngXpH3tjMLEt7ROOIPHMOLg0YBwK9gdrTnIvoV2MPsPa/4UOOm1VhG+X+X01jZ1sF0ma5OmRIJVAVy7mfzZ1nuY1OpCMu7uUoBT5WqC3WlhXLN3tKwvo0bFcvampd6E9K4JN95QeRVkf6vKyNUt2uDSZ6bbjUmQ4JpvkIcri1Ag X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:14:58.0485 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0f51880-3ce4-4b0d-4341-08dee8f71186 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001C9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7128 Content-Type: text/plain; charset="utf-8" Symbols exported by amd-pstate.c are ever only needed for amd-pstate-ut. Introduce EXPORT_SYMBOL_FOR_PSTATE_UT() to export these symbols selectively to "amd-pstate-ut" namespace as opposed to all GPL modules. No functional changes intended. Reviewed-by: Mario Limonciello (AMD) Signed-off-by: K Prateek Nayak --- Changelog rfc v1..v2: o Collected tag from Mario. (Thanks a ton!) --- drivers/cpufreq/amd-pstate.c | 14 +++++++------- drivers/cpufreq/amd-pstate.h | 7 +++++++ 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 92da8937df04..b875e92103e1 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -75,7 +75,7 @@ const char *amd_pstate_get_mode_string(enum amd_pstate_mo= de mode) mode =3D AMD_PSTATE_UNDEFINED; return amd_pstate_mode_string[mode]; } -EXPORT_SYMBOL_GPL(amd_pstate_get_mode_string); +EXPORT_SYMBOL_FOR_PSTATE_UT(amd_pstate_get_mode_string); =20 struct quirk_entry { u32 nominal_freq; @@ -1271,7 +1271,7 @@ void amd_pstate_clear_dynamic_epp(struct cpufreq_poli= cy *policy) kfree(cpudata->profile_name); cpudata->dynamic_epp =3D false; } -EXPORT_SYMBOL_GPL(amd_pstate_clear_dynamic_epp); +EXPORT_SYMBOL_FOR_PSTATE_UT(amd_pstate_clear_dynamic_epp); =20 static int amd_pstate_set_dynamic_epp(struct cpufreq_policy *policy) { @@ -1466,7 +1466,7 @@ ssize_t store_energy_performance_preference(struct cp= ufreq_policy *policy, =20 return count; } -EXPORT_SYMBOL_GPL(store_energy_performance_preference); +EXPORT_SYMBOL_FOR_PSTATE_UT(store_energy_performance_preference); =20 ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, = char *buf) { @@ -1500,7 +1500,7 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * =20 return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } -EXPORT_SYMBOL_GPL(show_energy_performance_preference); +EXPORT_SYMBOL_FOR_PSTATE_UT(show_energy_performance_preference); =20 static ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, const char *buf, size_t count) @@ -1600,7 +1600,7 @@ struct freq_attr **amd_pstate_get_current_attrs(void) return NULL; return current_pstate_driver->attr; } -EXPORT_SYMBOL_GPL(amd_pstate_get_current_attrs); +EXPORT_SYMBOL_FOR_PSTATE_UT(amd_pstate_get_current_attrs); =20 static struct freq_attr **get_freq_attrs(void) { @@ -1785,7 +1785,7 @@ int amd_pstate_get_status(void) { return cppc_state; } -EXPORT_SYMBOL_GPL(amd_pstate_get_status); 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Wysocki" , Viresh Kumar CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 8/9] cpufreq/amd-pstate-ut: Add unit test for "dynamic" EPP mode Date: Thu, 23 Jul 2026 20:12:27 +0000 Message-ID: <20260723201228.22584-9-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CF:EE_|DM4PR12MB8560:EE_ X-MS-Office365-Filtering-Correlation-Id: 02a3f268-33f3-4f0b-9d1e-08dee8f71bf5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|23010399003|376014|82310400026|10067099003|11063799006|56012099006|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: /l6zry1oaiKvFvyMi3pXCO37z5By0dp1YOFRx+r3UsZ5CgZiW8F6MFDwpV7OP7/9R/I4O2uSwPqv1jEto3ETQw/+3Dxt8QHa9jNAnTholJ0t0SY3TzJZb+yhZKxy0F6FnBdjsHwdD3piZP8shE++LNa5Xes7FqEbK/RUsPGLZiiWsZuM7NPeAIF9vyF2tPHtZlx0UjhKzQq2sQOjlOsDafn+s+CvSMtgKyN1p65xbC+G4lfUOF4TgKtxMk8qe4tirxgEEElToXza80LIduWdJMimABZKkICFPhQC0qElhnwDbMoCAAyzBiX2hCARKMGP/pT/22I4PMqhAe7F61tEvioK1v2W4uOt8+zA3D8Y/80lK38CbpQVeCvY0mDXpXlPYw3gCLnftTXzFdCNgGwMJRjO3AetOXJiWKCVc9ioZQdmyXs/eXUeWL8ZYZ1SrPGi9tRzrc7rkR/PZjD94d3VT1lhx9LZO/iBWlXliYFKFEDI5JzbCYJ3f1cAJvscHeCOY2ZaEHa+1pWHkSBeOZQUtJoxr0rwgsZSc6WpyOz7g4PkalZrIl3xsDr9EqS2YhjhJT1L3aG3KHqykGSzDD+CCavJ0FcZvUL/G0eOv/W3Cl0ZcIZDGaVSXpPFeKr0t16X6A8FlkNQUW3cSc2eRpglV45/Wk7L2+L9tEJek43dr/jwpVbv3ykh3DUdZAQ57Pk+ByNAHpMNMKuloTWlqSRosQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700016)(23010399003)(376014)(82310400026)(10067099003)(11063799006)(56012099006)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6kB/Bbm/I3zD4Uunc60wTSFwQlYSIug22yRgQz3Pyru9phLAm5qxNOBfgDHHZvVLJLPQG2DAAGt0TGaksDhQrsWSNakt0u0aTKfT8MKZpE9EeldqkoBw59Eb7HrwuYiDHIsPc+ggiWV7lX5LvAjb0xoOCC6m9G6OYDCSjymmUZKAujRBrNK0ebvUJKjTpqTSyEmuaYUsRZVSsTesMi4RDi4hBB7jZEpIiM3yHzuXpdNnPm9cOYeY5uzpci0g3vYHZqL9q3FcLdjbvqFlrLIQ+e1cL8qQmMOgyIoEbcAQfGYQzFcnOW0HRtUKC45A/rqxP32aNwmv5WopBxcFoMdxxCm4iEZbrPOwGMz7NcLqUyjfw8DvPMeuvLBjFPMEJGLFHQr25jz64SY7xEbfyndp7nIYo7bkpQdDZKC0+wnodTwdx3xvVl90cTI1Ep9Vkyf2 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:15:15.5715 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 02a3f268-33f3-4f0b-9d1e-08dee8f71bf5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8560 Content-Type: text/plain; charset="utf-8" Extend the EPP unit test to cover the "dynamic" epp mode. Since "dynamic_epp" is no longer a system-wide toggle, remove the legacy "dynamic_epp" bits from the unit test. Signed-off-by: K Prateek Nayak Reviewed-by: Mario Limonciello (AMD) --- Changelog rfc v1..v2: o Simplified some aspect of test now that dynamic_epp global knob is removed. --- drivers/cpufreq/amd-pstate-ut.c | 45 ++++++++++++++++++--------------- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-u= t.c index 2142838ad6cc..d1f730e3502b 100644 --- a/drivers/cpufreq/amd-pstate-ut.c +++ b/drivers/cpufreq/amd-pstate-ut.c @@ -275,6 +275,7 @@ static int amd_pstate_set_mode(enum amd_pstate_mode mod= e) static int amd_pstate_ut_epp(u32 index) { static const char * const epp_strings[] =3D { + "dynamic", "power", "balance_power", "balance_performance", @@ -282,10 +283,10 @@ static int amd_pstate_ut_epp(u32 index) }; char *buf __free(cleanup_page) =3D NULL; struct cpufreq_policy *policy =3D NULL; + unsigned long orig_dynamic_epp =3D 0; enum amd_pstate_mode orig_mode; struct amd_cpudata *cpudata; unsigned long orig_policy; - bool orig_dynamic_epp; int ret, cpu =3D 0; u16 epp; int i; @@ -294,9 +295,11 @@ static int amd_pstate_ut_epp(u32 index) if (!policy) return -ENODEV; =20 - cpudata =3D policy->driver_data; orig_mode =3D amd_pstate_get_status(); - orig_dynamic_epp =3D cpudata->dynamic_epp; + if (policy->driver_data) { + cpudata =3D policy->driver_data; + orig_dynamic_epp =3D cpudata->dynamic_epp; + } =20 /* Drop reference before potential driver change. */ cpufreq_cpu_put(policy); @@ -321,16 +324,6 @@ static int amd_pstate_ut_epp(u32 index) orig_policy =3D cpudata->policy; cpudata->policy =3D CPUFREQ_POLICY_POWERSAVE; =20 - /* - * Disable dynamic EPP before running test. If "orig_dynamic_epp" is - * true, the driver will do a redundant switch at the end and there - * is no need for enabling it again at the end of the test. - */ - if (cpudata->dynamic_epp) { - pr_debug("Dynamic EPP is enabled, disabling it\n"); - amd_pstate_clear_dynamic_epp(policy); - } - for (epp =3D 0; epp <=3D U8_MAX; epp++) { u8 val; =20 @@ -367,6 +360,11 @@ static int amd_pstate_ut_epp(u32 index) if (ret < 0) goto out; strreplace(buf, '\n', '\0'); + /* + * "dynamic" mode reports the EPP as "dynamic(profile:X)" + * Trim at "(" and just compare tie the epp string. + */ + strreplace(buf, '(', '\0'); =20 if (strcmp(buf, epp_strings[i])) { pr_err("String EPP value mismatch: %s !=3D %s\n", buf, epp_strings[i]); @@ -380,18 +378,23 @@ static int amd_pstate_ut_epp(u32 index) out: if (policy) { cpudata->policy =3D orig_policy; + /* + * If the driver had enabled dynamic_epp to brgin with, + * restore it here before dropping policy reference. + */ + if (orig_dynamic_epp) { + int ret2; + + ret2 =3D store_energy_performance_preference(policy, + epp_strings[0], + strlen(epp_strings[0])); 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Wysocki" , Viresh Kumar , Kalpana Shetty CC: Mario Limonciello , Perry Yuan , "K Prateek Nayak" , , , Subject: [PATCH v2 9/9] cpufreq/amd-pstate-ut: Add unit test for CPPC Performance Priority Date: Thu, 23 Jul 2026 20:12:28 +0000 Message-ID: <20260723201228.22584-10-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260723201228.22584-1-kprateek.nayak@amd.com> References: <20260723201228.22584-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CB:EE_|PH0PR12MB7887:EE_ X-MS-Office365-Filtering-Correlation-Id: 09231b54-0492-4c3b-cf3d-08dee8f726f4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|82310400026|36860700016|376014|1800799024|6133799003|56012099006|10067099003|11063799006|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: zWZjyWe2iYq9z6cWmCrGDQV7jvY63LS/wCpkB5AeqiFdJSxPXWbm7vPzlZZJeiXjrTtphqsDigVu8DQ6xlMs+teB5AMk3/YOB/jBHIy3CDz17hYKs03rgvnH5fF2AOgxaCIZn8JH3CsBOWJK3VaNagSU3wriWtkNCki9DT67jxHiI/WCaTp74YhwN2xvfvqk6TFZVq90gyZkeTPd2Moizsm6qRlz5VsqbUPcpKhdOSQcTVqiaCbt2rNn8R4LH59XcFX+CUV+l2HK3hHfMRxZFkQluaKNQ5moMKLWGE8cqm+aFnSDBZ/D0P1N7ZsbPrJ6j22eQwha8m4iXGoGXTuj28T6AfXN8nLY+7Ng9zEpsMnjG+oHKB6NOn+sQgNSHi7hcv4CznmlGAiVWzcq1VpWKTxICDGqylbl699r8hcABnXP2BOLeFSgYtb7N//T2bnBgRGg4Vt6Jmy0aQfqAz/soxVAdXcmNNKpe6yRQk/+q9cH+13FPsIJEi8Gi9OkA+k4ANSb2x6lWgyWR6h5/QgvluoIfEiGeDLIr5WL6VAh4Ml1Brq3IxSeZYIll1i3SNmzEVnv83l24+YXc1RUqkwerKp07k+hgk0TR/QhJf4Z5mhhLzri4w0SW18ySVJptz0yNve5WDdx1OWXo96FjeZ/RdCZ1QCrPCvWYsH5ECNl+phbp/wNqFWYp5C9CuFaaqiH/V5tn6DrA9B3GAlYYBY/bw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(23010399003)(82310400026)(36860700016)(376014)(1800799024)(6133799003)(56012099006)(10067099003)(11063799006)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ZrkLOgs5hx9hNcTSXXwLyJ3VrlJYiZyXhin3GysOD5ehsgePC89+XCEOL3XURczHywQqNZHYIHMC04qBkWW+/2fSoVvGL09D3sqRE4GlGUGAU5zIaR2km1La9vD4C4feiEcZ4JhCf4UiUpVaB0O/3NXEvquXEtrGLGaKoBEzsiEroUz2NS4IY2uIhOLvbm70Dovhjnr7yRdTcGvX+Q7W27oZ1Q8/UF5CRdN7q0Xudj/4CoP2N9JMyf+e5ph3Mhgljaq8hR+uD70DoeIX/5Py+pPe1zzK2Q+9yOEMnC9y1KTGxUNLFO6qfl5sxk9Juz2xwY2g5rmE/n+FgewZ7OeJHeFlQElDgB3Iy4ZJgplrAPJrBZ6y0N80uw140gxwqaP+skrZmUPqjKPm9hR7xQIbKSRBv3sNbrYu/71n68s/HYYUuLykM7G2U2iNAgTWHLbb X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2026 20:15:33.9975 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09231b54-0492-4c3b-cf3d-08dee8f726f4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7887 Content-Type: text/plain; charset="utf-8" Add a unit test for CPPC Performance Priority that modifies the floor perf and confirms if the modification was successful similar to the energy_performance_preference unit test. On platforms that do not support X86_FEATURE_CPPC_PERF_PRIO, the test returns -EOPNOTSUPP and amd_pstate_ut_check_floor_freq is marked as "skipped". Suggested-by: Kalpana Shetty Signed-off-by: K Prateek Nayak Reviewed-by: Mario Limonciello (AMD) --- changelog rfc v1..v2: o New patch. --- drivers/cpufreq/amd-pstate-ut.c | 83 ++++++++++++++++++++++++++++++++- drivers/cpufreq/amd-pstate.c | 7 +-- drivers/cpufreq/amd-pstate.h | 2 + 3 files changed, 87 insertions(+), 5 deletions(-) diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-u= t.c index d1f730e3502b..6a17941380c2 100644 --- a/drivers/cpufreq/amd-pstate-ut.c +++ b/drivers/cpufreq/amd-pstate-ut.c @@ -59,6 +59,7 @@ static int amd_pstate_ut_check_freq(u32 index); static int amd_pstate_ut_epp(u32 index); static int amd_pstate_ut_check_driver(u32 index); static int amd_pstate_ut_check_freq_attrs(u32 index); +static int amd_pstate_ut_check_floor_freq(u32 index); =20 static struct amd_pstate_ut_struct amd_pstate_ut_cases[] =3D { {"amd_pstate_ut_acpi_cpc_valid", amd_pstate_ut_acpi_cpc_valid }, @@ -68,6 +69,7 @@ static struct amd_pstate_ut_struct amd_pstate_ut_cases[] = =3D { {"amd_pstate_ut_epp", amd_pstate_ut_epp }, {"amd_pstate_ut_check_driver", amd_pstate_ut_check_driver }, {"amd_pstate_ut_check_freq_attrs", amd_pstate_ut_check_freq_attrs }, + {"amd_pstate_ut_check_floor_freq", amd_pstate_ut_check_floor_freq }, }; =20 static bool test_in_list(const char *list, const char *name) @@ -560,6 +562,77 @@ static int amd_pstate_ut_check_freq_attrs(u32 index) return ret; } =20 +static int amd_pstate_ut_check_floor_freq(u32 index) +{ + struct cpufreq_policy *policy __free(put_cpufreq_policy) =3D NULL; + char *buf __free(cleanup_page) =3D NULL; + unsigned int orig_floor_freq; + unsigned int floor_freq; + int ret, cpu =3D 0; + + if (!cpu_feature_enabled(X86_FEATURE_CPPC_PERF_PRIO)) + return -EOPNOTSUPP; + + policy =3D cpufreq_cpu_get(cpu); + if (!policy || !policy->driver_data) + return -ENODEV; + + buf =3D (char *)__get_free_page(GFP_KERNEL); + if (!buf) + return -ENOMEM; + + guard(rwsem_write)(&policy->rwsem); + + /* Retrieve original floor frequency */ + memset(buf, 0, PAGE_SIZE); + ret =3D show_amd_pstate_floor_freq(policy, buf); + if (ret < 0) + return ret; + + ret =3D kstrtou32(buf, 0, &orig_floor_freq); + if (ret) + return ret; + + memset(buf, 0, PAGE_SIZE); + snprintf(buf, PAGE_SIZE, "%u", policy->cpuinfo.min_freq); + + /* Set floor frequency to cpuinfo.min_freq */ + ret =3D store_amd_pstate_floor_freq(policy, buf, strlen(buf)); + if (ret < 0) { + pr_err("Failed to set floor frequency to %s\n", buf); + return ret; + } + + memset(buf, 0, PAGE_SIZE); + ret =3D show_amd_pstate_floor_freq(policy, buf); + if (ret < 0) + return ret; + + strreplace(buf, '\n', '\0'); + ret =3D kstrtou32(buf, 0, &floor_freq); + if (ret) + return ret; + + /* Confirm sysfs reflects the change correctly. */ + if (floor_freq !=3D policy->cpuinfo.min_freq) { + pr_err("Floor frequency value mismatch: %u !=3D %u\n", + floor_freq, policy->cpuinfo.min_freq); + return -EINVAL; + } + + memset(buf, 0, PAGE_SIZE); + snprintf(buf, PAGE_SIZE, "%u", orig_floor_freq); + + /* Restore the original value. */ + ret =3D store_amd_pstate_floor_freq(policy, buf, strlen(buf)); + if (ret < 0) { + pr_err("Failed to restore floor frequency to %s\n", buf); + return ret; + } + + return 0; +} + static int __init amd_pstate_ut_init(void) { u32 i =3D 0, arr_size =3D ARRAY_SIZE(amd_pstate_ut_cases); @@ -578,10 +651,16 @@ static int __init amd_pstate_ut_init(void) =20 ret =3D amd_pstate_ut_cases[i].func(i); =20 - if (ret) + if (ret) { + /* Platform does not support the feature being tested. */ + if (ret =3D=3D -EOPNOTSUPP) { + pr_err("%-4d %-20s\t skipped!\n", i+1, amd_pstate_ut_cases[i].name); + continue; + } pr_err("%-4d %-20s\t fail: %d!\n", i+1, amd_pstate_ut_cases[i].name, re= t); - else + } else { pr_info("%-4d %-20s\t success!\n", i+1, amd_pstate_ut_cases[i].name); + } } =20 return 0; diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index b875e92103e1..a42899722a21 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -1502,8 +1502,7 @@ ssize_t show_energy_performance_preference(struct cpu= freq_policy *policy, char * } EXPORT_SYMBOL_FOR_PSTATE_UT(show_energy_performance_preference); =20 -static ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, - const char *buf, size_t count) +ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, const c= har *buf, size_t count) { struct amd_cpudata *cpudata =3D policy->driver_data; union perf_cached perf =3D READ_ONCE(cpudata->perf); @@ -1526,13 +1525,15 @@ static ssize_t store_amd_pstate_floor_freq(struct c= pufreq_policy *policy, =20 return ret ?: count; } +EXPORT_SYMBOL_FOR_PSTATE_UT(store_amd_pstate_floor_freq); =20 -static ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, c= har *buf) +ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, char *bu= f) { struct amd_cpudata *cpudata =3D policy->driver_data; =20 return sysfs_emit(buf, "%u\n", cpudata->floor_freq); } +EXPORT_SYMBOL_FOR_PSTATE_UT(show_amd_pstate_floor_freq); =20 static ssize_t show_amd_pstate_floor_count(struct cpufreq_policy *policy, = char *buf) { diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index edd697a5e29f..f8e2f6ba1534 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -160,6 +160,8 @@ ssize_t store_energy_performance_preference(struct cpuf= req_policy *policy, const char *buf, size_t count); ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, = char *buf); void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy); +ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, const c= har *buf, size_t count); +ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, char *bu= f); =20 struct freq_attr; =20 --=20 2.34.1