From nobody Fri Jul 24 05:22:04 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4397321D3D2; Thu, 23 Jul 2026 03:58:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779116; cv=none; b=s/s9UlosQt6mGRxXomZ5AFlZ/ppaBOhSvFHpH2p6jAOQCT+AtS3pJt6oCAn/KFsparGfUQdudaBMUQUs65Eoa61LxPHtge/Eo/DExmJckrI5HVmdQBturzz5ZgOkE8RfvsOEfzgQ6jawrsqBRce89rUjiIMeZDIXfbQTPqh054w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779116; c=relaxed/simple; bh=ZVDJmuFMKz0DC3PvrMlK7WoZjGCAQIAawo3qSpVtMuo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nXfAtkfxReKfaPlOYW82Q57WvHrX+JzFe77AIft3QDgtJdyHwyvsZH0mdvkankNyGri12n7eqMz6v3oh4e89tEX3o919gaIU34skmbqhYXaJx9xwO716E3oMZ6GnBDN0X0jlBes7lMqhwPP4zDPjDj9z6NfD62BoIlSX8NzILW4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=VadahuPD; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="VadahuPD" X-UUID: c21d2af0864a11f1b1788b6acf885367-20260723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kl7+mc2oAYcNRZ648KTKzRhgvWfW5JNgBpw4aDm/2MQ=; b=VadahuPDOvkIFWz3F3A39EX1QeQpIAfzx6YeDlm4BkUiKib7km3/h1M2/HG1GeD9mvQlHjy9XK0avxW+g60VrhCFVVB1KTzWb1G4KwcHt+Jc35AAyup3NtF4fQMedfKo2wARUpj+z7Ub30cvH465cTknLRU6CW1W+ChyCCtDF+s=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:2e111aab-3a01-412d-9699-6e6782a8f4cb,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:8a735a6,CLOUDID:478e3454-ba59-46c6-b844-86065e9edbd3,B ulkID:nil,BulkQuantity:0,SF:81|82|102|836|865|888|898,TC:-5,Content:0|15|5 0|99,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0, OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: c21d2af0864a11f1b1788b6acf885367-20260723 Received: from mtkmbs09n1.mediatek.inc [(172.21.101.35)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 16467687; Thu, 23 Jul 2026 11:58:26 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 23 Jul 2026 11:58:25 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 23 Jul 2026 11:58:25 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh , Chen-Yu Tsai Subject: [PATCH v7 1/5] pinctrl: mediatek: use devm_gpiochip_add_data() for GPIO chip Date: Thu, 23 Jul 2026 11:58:12 +0800 Message-ID: <20260723035823.2041832-2-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260723035823.2041832-1-justin.yeh@mediatek.com> References: <20260723035823.2041832-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The gpio_chip is allocated with device-managed memory but registered with the non-managed gpiochip_add_data(). This was harmless while the drivers were built-in, but once they can be built as modules and unbound/rmmod'd, devm frees the gpio_chip's memory while it is still registered, causing a use-after-free. Register it with devm_gpiochip_add_data() so it shares the same device-managed lifecycle, which also lets the manual gpiochip_remove() error paths go away. Fixes: a6df410d420a ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135= .") Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements = the vendor dt-bindings") Fixes: e78d57b2f87c ("pinctrl: mediatek: add pinctrl-moore that implements = the generic pinctrl dt-bindings") Signed-off-by: Justin Yeh Reviewed-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-moore.c | 6 ++---- drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 14 ++++---------- drivers/pinctrl/mediatek/pinctrl-paris.c | 2 +- 3 files changed, 7 insertions(+), 15 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/med= iatek/pinctrl-moore.c index 17e30f83dc19..38f15dbe9a28 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -594,7 +594,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) chip->base =3D -1; chip->ngpio =3D hw->soc->npins; =20 - ret =3D gpiochip_add_data(chip, hw); + ret =3D devm_gpiochip_add_data(hw->dev, chip, hw); if (ret < 0) return ret; =20 @@ -608,10 +608,8 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) if (!of_property_present(hw->dev->of_node, "gpio-ranges")) { ret =3D gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, chip->ngpio); - if (ret < 0) { - gpiochip_remove(chip); + if (ret < 0) return ret; - } } =20 return 0; diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctr= l/mediatek/pinctrl-mtk-common.c index dd2c8aa03938..791eddd7a2c6 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -1130,30 +1130,24 @@ int mtk_pctrl_init(struct platform_device *pdev, pctl->chip->parent =3D &pdev->dev; pctl->chip->base =3D -1; =20 - ret =3D gpiochip_add_data(pctl->chip, pctl); + ret =3D devm_gpiochip_add_data(&pdev->dev, pctl->chip, pctl); if (ret) return -EINVAL; =20 /* Register the GPIO to pin mappings. */ ret =3D gpiochip_add_pin_range(pctl->chip, dev_name(&pdev->dev), 0, 0, pctl->devdata->npins); - if (ret) { - ret =3D -EINVAL; - goto chip_error; - } + if (ret) + return -EINVAL; =20 /* Only initialize EINT if we have EINT pins */ if (data->eint_hw.ap_num > 0) { ret =3D mtk_eint_init(pctl, pdev); if (ret) - goto chip_error; + return ret; } =20 return 0; - -chip_error: - gpiochip_remove(pctl->chip); - return ret; } =20 int mtk_pctrl_common_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/med= iatek/pinctrl-paris.c index 23f04b24fd65..09098b68f725 100644 --- a/drivers/pinctrl/mediatek/pinctrl-paris.c +++ b/drivers/pinctrl/mediatek/pinctrl-paris.c @@ -957,7 +957,7 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw) chip->base =3D -1; chip->ngpio =3D hw->soc->npins; =20 - ret =3D gpiochip_add_data(chip, hw); + ret =3D devm_gpiochip_add_data(hw->dev, chip, hw); if (ret < 0) return ret; =20 --=20 2.45.2 From nobody Fri Jul 24 05:22:04 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 624A336826E; Thu, 23 Jul 2026 03:58:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779122; cv=none; b=ALVaHskK2ERXkUbOVPMCe3HiN0bcU3xF6VOh99roSLNhiuyQIl+u0MEsQ0ZEKQ2EqdgAudPNYsED5OC2jlksv6HwB+gFj13X3xZXlifs2YgUle3NcWRI1GpGDCFXzas0MOa86iOyOGkHXrnVF6XQ4188yeIju9ubV0nuXn6FTAg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779122; c=relaxed/simple; bh=ycuMSZ5JIGGE14y7RYDqvr8p3XRdeQ3R6mo5kNi8s44=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mI3l1RDH/PZ2F4xM3Knjwr3Z8ptFPGprZNbXppD5ESXZnIl+uBooaVQbA8/LmrF8J1p8lCuo+pp6VtDwUf4S5aJ3FEfwFZJWhhDPuWiIWa6F9KsFkZO8tGUfvrfzzcXH7tPbhD72SUR6kVkucxGLVC6je2xtnUJ2Gqb3FN3qcuA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=FdRnTieD; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="FdRnTieD" X-UUID: c22f4028864a11f18dc8c9802ae25ab1-20260723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=AiFxMQJcPCjNrSOlVHZhtCQZBI3sh0SumQ8GAaE0fO4=; b=FdRnTieDC8QJvxuj9ycu9RujLSCSkbfWaepvM/DtQAK5ONe3U5+XGYj0RWrAFIIMhZxJO4KvcgJhF4ikLdE/kEXHIxvBW96nutmEPzxtc4wHlvifjQjJRnDa8bz0BnIcbIP4nO0z/AoC7UKsZDKcwyPx//8t0zugTaONEEgnSXw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:3dacd60f-8c26-4e7d-83a1-3bbadf58442a,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:8a735a6,CLOUDID:309b0931-c234-4105-b2c8-ac1d356c64f7,B ulkID:nil,BulkQuantity:0,SF:81|82|102|836|865|888|898,TC:-5,Content:0|15|5 0|99,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0, OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: c22f4028864a11f18dc8c9802ae25ab1-20260723 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 777233578; Thu, 23 Jul 2026 11:58:26 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 23 Jul 2026 11:58:25 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 23 Jul 2026 11:58:25 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh Subject: [PATCH v7 2/5] pinctrl: mediatek: free EINT resources on unbind Date: Thu, 23 Jul 2026 11:58:13 +0800 Message-ID: <20260723035823.2041832-3-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260723035823.2041832-1-justin.yeh@mediatek.com> References: <20260723035823.2041832-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" mtk_eint_do_init() creates an IRQ domain, populates it with a mapping for every EINT line and installs a chained handler on the parent interrupt, but none of these are ever released. This was harmless while the drivers were built-in, but now that they can be built as modules and unbound/rmmod'd it leaves behind a dangling IRQ domain, interrupt mappings whose chip data points at freed memory, and a chained handler that keeps firing into that freed data. The plain allocations in mtk_eint_do_init() already use the device-managed devm_*() helpers, so tear the remaining resources down the same way: register a devm action that detaches the chained handler, waits for any in-flight handler to finish, disposes of the per-line mappings and removes the IRQ domain. This mirrors the device-managed lifecycle adopted for the GPIO chip and keeps the whole EINT setup self-cleaning on unbind. Fixes: e46df235b4e6 ("pinctrl: mediatek: refactor EINT related code for all= MediaTek pinctrl can fit") Signed-off-by: Justin Yeh Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/mtk-eint.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/mediatek/mtk-eint.c b/drivers/pinctrl/mediatek= /mtk-eint.c index 47ac92ea98c2..8b022545a3e9 100644 --- a/drivers/pinctrl/mediatek/mtk-eint.c +++ b/drivers/pinctrl/mediatek/mtk-eint.c @@ -12,8 +12,10 @@ */ =20 #include +#include #include #include +#include #include #include #include @@ -509,6 +511,27 @@ int mtk_eint_find_irq(struct mtk_eint *eint, unsigned = long eint_n) } EXPORT_SYMBOL_GPL(mtk_eint_find_irq); =20 +static void mtk_eint_teardown(void *data) +{ + struct mtk_eint *eint =3D data; + unsigned int i, virq; + + /* Detach the demux handler so it can no longer reference freed data. */ + irq_set_chained_handler_and_data(eint->irq, NULL, NULL); + + /* Wait for any in-flight handler to finish before tearing down. */ + synchronize_irq(eint->irq); + + /* Dispose of all child mappings before the domain is removed. */ + for (i =3D 0; i < eint->hw->ap_num; i++) { + virq =3D irq_find_mapping(eint->domain, i); + if (virq) + irq_dispose_mapping(virq); + } + + irq_domain_remove(eint->domain); +} + int mtk_eint_do_init(struct mtk_eint *eint, struct mtk_eint_pin *eint_pin) { unsigned int size, i, port, virq, inst =3D 0; @@ -601,7 +624,7 @@ int mtk_eint_do_init(struct mtk_eint *eint, struct mtk_= eint_pin *eint_pin) irq_set_chained_handler_and_data(eint->irq, mtk_eint_irq_handler, eint); =20 - return 0; + return devm_add_action_or_reset(eint->dev, mtk_eint_teardown, eint); =20 err_eint: for (i =3D 0; i < eint->nbase; i++) { --=20 2.45.2 From nobody Fri Jul 24 05:22:04 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FED936896D; Thu, 23 Jul 2026 03:58:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779127; cv=none; b=mrr0oDYnGYu5r2k6Ztt6OYlGSzqhxIXCIedoPeDbwVbyZbrWmOAmW6ChTpu2A+07ekQn7YvoyVjT7ZtNOxuyCUTQWNsNEctXB3diRmqVTvwZbqxmXht/buCYh+hpDjXreTIu8UbptuaT+y+BKYt/nU+aD9jry9boNbH1tlsZQJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779127; c=relaxed/simple; bh=C5IJi6htYp1wVyhQdlss1bE1iNcq0tIZf5Rv68DAmFE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Nt99nFerVVWVDTdxFBlJeJrhhli/FRAFxzW7ytg1USgHA6Y16O7enBnsHnz9T7UC+GneHTv2QW4+unUBWdWq4mgsyIyOZVHii5sLYwpj6M2SvIOlX5y7BhAHdjJDI9PVb5akSnvP41mNwz5MMb8X8R4R9geHFo6QKyumwuqQqwQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Cx4g5DSH; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Cx4g5DSH" X-UUID: c1d4990c864a11f18dc8c9802ae25ab1-20260723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=sAdnFvyfBKPaRzVFOl9q5U0tA2qKj/ZNso5TYX/8hMQ=; b=Cx4g5DSHDR6B9AD4a9FqOmnRzUeuefmBZCfP/mr2vupM5PrUiqhNebJrNyaZN5ogD/sQVMS3TNLhPc1d2QtElmCqleTLzRYciI9W1wCzt8d7dREuvnvpyS2fQAw4jgTTKiCt/7v9l55l4q8rD6YvV+A5NPE3yy1cI1vy0Sz0+P8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:7c383769-9e5b-45b8-9383-b301a5cf4792,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:8a735a6,CLOUDID:319b0931-c234-4105-b2c8-ac1d356c64f7,B ulkID:nil,BulkQuantity:0,SF:81|82|102|836|865|888|898,TC:-5,Content:0|15|5 0|99,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0, OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: c1d4990c864a11f18dc8c9802ae25ab1-20260723 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 743818261; Thu, 23 Jul 2026 11:58:26 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 23 Jul 2026 11:58:25 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 23 Jul 2026 11:58:25 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh Subject: [PATCH v7 3/5] pinctrl: mediatek: allow common drivers to be built as modules Date: Thu, 23 Jul 2026 11:58:14 +0800 Message-ID: <20260723035823.2041832-4-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260723035823.2041832-1-justin.yeh@mediatek.com> References: <20260723035823.2041832-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The MediaTek SoC pinctrl drivers link against the shared implementations in pinctrl-mtk-common.c (v1), pinctrl-moore.c and pinctrl-mtmips.c. These were built-in only: their Kconfig symbols were bool, they did not export their entry points and they carried no MODULE_LICENSE(). To let the individual SoC drivers be built as loadable modules (required for Android GKI + vendor_dlkm, where vendor drivers must live outside the GKI vmlinux), the shared code they depend on has to be modular too. Otherwise selecting a SoC driver as =3Dm forces the common symbol to =3Dy a= nd the resulting module fails to link against the unexported common entry points. Convert PINCTRL_MTK, PINCTRL_MTK_MOORE and PINCTRL_MTK_MTMIPS to tristate, export the entry points used by the SoC drivers, and add MODULE_DESCRIPTION()/MODULE_LICENSE() to the three common files. The v2 common code (PINCTRL_MTK_V2) is already modular, but mtk_rmw() was never exported. It is called directly by SoC drivers such as mt7623, so export it as well to keep those drivers linking once they are modular. Rather than exporting these shared symbols into the global namespace, export them in the "MTK_PINCTRL" symbol namespace with EXPORT_SYMBOL_NS_GPL() so they are only visible to drivers that opt in. Each SoC driver that uses them therefore declares MODULE_IMPORT_NS("MTK_PINCTRL"). Signed-off-by: Justin Yeh --- drivers/pinctrl/mediatek/Kconfig | 6 +++--- drivers/pinctrl/mediatek/pinctrl-moore.c | 5 +++++ drivers/pinctrl/mediatek/pinctrl-mt2701.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt2712.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt6397.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7620.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7621.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7622.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7623.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7629.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7981.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7986.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt7988.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt8127.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt8135.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt8167.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt8173.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mt8365.c | 1 + drivers/pinctrl/mediatek/pinctrl-mt8516.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 1 + drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 8 ++++++++ drivers/pinctrl/mediatek/pinctrl-mtmips.c | 4 ++++ drivers/pinctrl/mediatek/pinctrl-rt2880.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-rt305x.c | 2 ++ drivers/pinctrl/mediatek/pinctrl-rt3883.c | 2 ++ 26 files changed, 62 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kc= onfig index 97980cc28b9c..864e7ffc6044 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -11,7 +11,7 @@ config EINT_MTK default PINCTRL_MTK_PARIS =20 config PINCTRL_MTK - bool + tristate depends on OF select PINMUX select GENERIC_PINCONF @@ -22,13 +22,13 @@ config PINCTRL_MTK_V2 tristate =20 config PINCTRL_MTK_MTMIPS - bool + tristate depends on RALINK select PINMUX select GENERIC_PINCONF =20 config PINCTRL_MTK_MOORE - bool + tristate depends on OF select GENERIC_PINCONF select GENERIC_PINCTRL_GROUPS diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/med= iatek/pinctrl-moore.c index 38f15dbe9a28..fdfbe007b84f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -10,6 +10,7 @@ =20 #include #include +#include =20 #include =20 @@ -743,3 +744,7 @@ int mtk_moore_pinctrl_probe(struct platform_device *pde= v, =20 return 0; } +EXPORT_SYMBOL_NS_GPL(mtk_moore_pinctrl_probe, "MTK_PINCTRL"); + +MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Moore"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2701.c b/drivers/pinctrl/me= diatek/pinctrl-mt2701.c index 6b1c7122b0fb..d262f810e40b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c @@ -542,3 +542,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2712.c b/drivers/pinctrl/me= diatek/pinctrl-mt2712.c index bb7394ae252b..aa8f9650c157 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c @@ -591,3 +591,5 @@ static int __init mtk_pinctrl_init(void) } =20 arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/me= diatek/pinctrl-mt6397.c index 03d0f65d7bcc..be691edf3e65 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c @@ -59,3 +59,5 @@ static struct platform_driver mtk_pinctrl_driver =3D { }; =20 builtin_platform_driver(mtk_pinctrl_driver); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7620.c b/drivers/pinctrl/me= diatek/pinctrl-mt7620.c index d2624b9b5bc4..e5d368530247 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7620.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7620.c @@ -135,3 +135,5 @@ static int __init mt7620_pinctrl_init(void) return platform_driver_register(&mt7620_pinctrl_driver); } core_initcall_sync(mt7620_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7621.c b/drivers/pinctrl/me= diatek/pinctrl-mt7621.c index b18c1a47bbeb..b337936e5c18 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7621.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7621.c @@ -115,3 +115,5 @@ static int __init mt7621_pinctrl_init(void) return platform_driver_register(&mt7621_pinctrl_driver); } core_initcall_sync(mt7621_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/me= diatek/pinctrl-mt7622.c index d5777889448a..38830f6dc5fd 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -893,3 +893,5 @@ static int __init mt7622_pinctrl_init(void) return platform_driver_register(&mt7622_pinctrl_driver); } arch_initcall(mt7622_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/me= diatek/pinctrl-mt7623.c index 69c06c2c0e21..a36124036daa 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c @@ -1440,3 +1440,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7629.c b/drivers/pinctrl/me= diatek/pinctrl-mt7629.c index cc0694881ac9..57868f73fce2 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c @@ -449,3 +449,5 @@ static int __init mt7629_pinctrl_init(void) return platform_driver_register(&mt7629_pinctrl_driver); } arch_initcall(mt7629_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c b/drivers/pinctrl/me= diatek/pinctrl-mt76x8.c index 2bc8d4409ca2..9c064bf94935 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c @@ -247,3 +247,5 @@ static int __init mt76x8_pinctrl_init(void) return platform_driver_register(&mt76x8_pinctrl_driver); } core_initcall_sync(mt76x8_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/me= diatek/pinctrl-mt7981.c index 22c8f2480346..69b16b01b4b3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -1058,3 +1058,5 @@ static int __init mt7981_pinctrl_init(void) return platform_driver_register(&mt7981_pinctrl_driver); } arch_initcall(mt7981_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/me= diatek/pinctrl-mt7986.c index 5dda4b7467fd..ca468115765b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -1009,3 +1009,5 @@ static int __init mt7986b_pinctrl_init(void) =20 arch_initcall(mt7986a_pinctrl_init); arch_initcall(mt7986b_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7988.c b/drivers/pinctrl/me= diatek/pinctrl-mt7988.c index fd3a7ff0a04d..d90456c55c0b 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7988.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7988.c @@ -1544,3 +1544,5 @@ static int __init mt7988_pinctrl_init(void) return platform_driver_register(&mt7988_pinctrl_driver); } arch_initcall(mt7988_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8127.c b/drivers/pinctrl/me= diatek/pinctrl-mt8127.c index f5030a9ea40b..34d840c1cc6a 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c @@ -307,3 +307,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8135.c b/drivers/pinctrl/me= diatek/pinctrl-mt8135.c index 77c6ac464e86..635048f9d1f2 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c @@ -336,3 +336,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8167.c b/drivers/pinctrl/me= diatek/pinctrl-mt8167.c index c812d614e9d4..3bd8288795e4 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c @@ -343,3 +343,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/me= diatek/pinctrl-mt8173.c index b214deeafbf1..20dd324eb152 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c @@ -356,3 +356,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8365.c b/drivers/pinctrl/me= diatek/pinctrl-mt8365.c index c20b9e2e02dd..73849ae569c9 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c @@ -495,3 +495,4 @@ arch_initcall(mtk_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8365 Pinctrl Driver"); MODULE_AUTHOR("Zhiyong Tao "); +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8516.c b/drivers/pinctrl/me= diatek/pinctrl-mt8516.c index 68d6638e7f4b..62084d0cc4c9 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c @@ -343,3 +343,5 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mtk_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pin= ctrl/mediatek/pinctrl-mtk-common-v2.c index 4918d38abfc2..802f780120bf 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c @@ -69,6 +69,7 @@ void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32= mask, u32 set) =20 spin_unlock_irqrestore(&pctl->lock, flags); } +EXPORT_SYMBOL_NS_GPL(mtk_rmw, "MTK_PINCTRL"); =20 static int mtk_hw_pin_field_lookup(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctr= l/mediatek/pinctrl-mtk-common.c index 791eddd7a2c6..1a977acd6883 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c @@ -7,6 +7,7 @@ =20 #include #include +#include #include #include #include @@ -190,6 +191,7 @@ int mtk_pconf_spec_set_ies_smt_range(struct regmap *reg= map, regmap_write(regmap, reg_addr, bit); return 0; } +EXPORT_SYMBOL_NS_GPL(mtk_pconf_spec_set_ies_smt_range, "MTK_PINCTRL"); =20 static const struct mtk_pin_drv_grp *mtk_find_pin_drv_grp_by_pin( struct mtk_pinctrl *pctl, unsigned long pin) { @@ -297,6 +299,7 @@ int mtk_pctrl_spec_pull_set_samereg(struct regmap *regm= ap, =20 return 0; } +EXPORT_SYMBOL_NS_GPL(mtk_pctrl_spec_pull_set_samereg, "MTK_PINCTRL"); =20 static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl, unsigned int pin, bool enable, bool isup, unsigned int arg) @@ -1149,6 +1152,7 @@ int mtk_pctrl_init(struct platform_device *pdev, =20 return 0; } +EXPORT_SYMBOL_NS_GPL(mtk_pctrl_init, "MTK_PINCTRL"); =20 int mtk_pctrl_common_probe(struct platform_device *pdev) { @@ -1160,3 +1164,7 @@ int mtk_pctrl_common_probe(struct platform_device *pd= ev) =20 return mtk_pctrl_init(pdev, data, NULL); } +EXPORT_SYMBOL_NS_GPL(mtk_pctrl_common_probe, "MTK_PINCTRL"); + +MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mtmips.c b/drivers/pinctrl/me= diatek/pinctrl-mtmips.c index efd77b6c56a1..b2d7a79ff9cc 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtmips.c +++ b/drivers/pinctrl/mediatek/pinctrl-mtmips.c @@ -349,3 +349,7 @@ int mtmips_pinctrl_init(struct platform_device *pdev, =20 return PTR_ERR_OR_ZERO(dev); } +EXPORT_SYMBOL_NS_GPL(mtmips_pinctrl_init, "MTK_PINCTRL"); + +MODULE_DESCRIPTION("MediaTek MIPS Pinctrl Common Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt2880.c b/drivers/pinctrl/me= diatek/pinctrl-rt2880.c index e0366721a515..a9c4acdc6766 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt2880.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt2880.c @@ -59,3 +59,5 @@ static int __init rt2880_pinctrl_init(void) return platform_driver_register(&rt2880_pinctrl_driver); } core_initcall_sync(rt2880_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt305x.c b/drivers/pinctrl/me= diatek/pinctrl-rt305x.c index 77bd4d1f6122..93788ec49ed0 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt305x.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt305x.c @@ -138,3 +138,5 @@ static int __init rt305x_pinctrl_init(void) return platform_driver_register(&rt305x_pinctrl_driver); } core_initcall_sync(rt305x_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt3883.c b/drivers/pinctrl/me= diatek/pinctrl-rt3883.c index eeaf344c3647..afe705a0ddf6 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt3883.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt3883.c @@ -106,3 +106,5 @@ static int __init rt3883_pinctrl_init(void) return platform_driver_register(&rt3883_pinctrl_driver); } core_initcall_sync(rt3883_pinctrl_init); + +MODULE_IMPORT_NS("MTK_PINCTRL"); --=20 2.45.2 From nobody Fri Jul 24 05:22:04 2026 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FD3F2E2663; Thu, 23 Jul 2026 03:58:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779116; cv=none; b=BUfDA89T9Pyyg53c4gP7WeY2P9ozmauQGY1Qp7mHV2k/+3zyOOVSkNfWCdUw6Cxh36HSNYJzqj0zG0OnALEMtBE2E8ZWrG4z9NlkSL5sezVTxnjYevfCLMh4/F3c9aZqyO0s4wa7MGj2RtnGuzL+UWDmMa78KBUw+2cDso1+Ta0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779116; c=relaxed/simple; bh=/+UZDeEgCJT8LkE0ipsaNWZCfsAI5TC4kqDuiGFGSds=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AV4Z5eWZyyZjv8cQ4sJU7Xj8u66Zxj7z3vKl2GjKf/bXtFPy1M7FLosA5Qu1jEBqzmvji15fDOYMrRNmOzLD71HO/gRGNBQEqnWBiO8xI4kfgGNHVTI+o76t1tY4eKEt5q+yQM3L6ySjz71pKZ6QbxWE8rezhcT2CiKX0FL0rN8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=WwSY6fM+; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="WwSY6fM+" X-UUID: c25e3838864a11f1b1788b6acf885367-20260723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=N1W2wqKCJbOZw8CgB2iZJKooo+2PL+bi2PCu+HXC33g=; b=WwSY6fM+V6TgJcb1OlPQMZPdBVyksImgLXkJ7a7ZU8dE62BMzgZ7cXfXap8NmOJi8S63W0CDBhNrYDZJzT0aEOGEFEuZabDrV9GoDLse0y+pgOvZiWnkUiJhsbUfkDgEKkdsuwLVVpvN/JutvsU1zHOPpeHTvJXd+q+xv/wqjFE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:059ac388-fd18-4150-8fbd-126ced8ff6ec,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:8a735a6,CLOUDID:468e3454-ba59-46c6-b844-86065e9edbd3,B ulkID:nil,BulkQuantity:0,SF:81|82|102|836|865|888|898,TC:-5,Content:0|15|5 0|99,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL:0,OSI:0, OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: c25e3838864a11f1b1788b6acf885367-20260723 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 812183994; Thu, 23 Jul 2026 11:58:27 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 23 Jul 2026 11:58:25 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 23 Jul 2026 11:58:25 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh , Chen-Yu Tsai Subject: [PATCH v7 4/5] pinctrl: mediatek: mt7986: register both platform drivers from a single initcall Date: Thu, 23 Jul 2026 11:58:15 +0800 Message-ID: <20260723035823.2041832-5-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260723035823.2041832-1-justin.yeh@mediatek.com> References: <20260723035823.2041832-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" The MT7986 driver registers two separate platform drivers (mt7986a and mt7986b) and used to call arch_initcall() twice, once for each. This is fine while the driver is built-in, but a single translation unit can only provide one module_init(). Since arch_initcall() expands to module_init() when built as a module, having two of them would break the module build with a redefinition of init_module()/__inittest(). Fold both platform drivers into a single driver array and register them from one initcall using platform_register_drivers(), matching the shape of the other MediaTek pinctrl SoC drivers. platform_register_drivers() also rolls back the first registration if the second one fails. No functional change for built-in builds; this is a preparatory cleanup for enabling module builds. Signed-off-by: Justin Yeh Reviewed-by: Chen-Yu Tsai --- drivers/pinctrl/mediatek/pinctrl-mt7986.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/me= diatek/pinctrl-mt7986.c index ca468115765b..d7c7591ed231 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -997,17 +997,16 @@ static struct platform_driver mt7986b_pinctrl_driver = =3D { .probe =3D mt7986b_pinctrl_probe, }; =20 -static int __init mt7986a_pinctrl_init(void) -{ - return platform_driver_register(&mt7986a_pinctrl_driver); -} +static struct platform_driver * const mt7986_pinctrl_drivers[] =3D { + &mt7986a_pinctrl_driver, + &mt7986b_pinctrl_driver, +}; =20 -static int __init mt7986b_pinctrl_init(void) +static int __init mt7986_pinctrl_init(void) { - return platform_driver_register(&mt7986b_pinctrl_driver); + return platform_register_drivers(mt7986_pinctrl_drivers, + ARRAY_SIZE(mt7986_pinctrl_drivers)); } - -arch_initcall(mt7986a_pinctrl_init); -arch_initcall(mt7986b_pinctrl_init); +arch_initcall(mt7986_pinctrl_init); =20 MODULE_IMPORT_NS("MTK_PINCTRL"); --=20 2.45.2 From nobody Fri Jul 24 05:22:04 2026 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2114B23AB88; Thu, 23 Jul 2026 03:58:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779126; cv=none; b=sMxuPu+WHmvPKA20PO6mzM4UOGW4BcEpRiJT/W4qKlW6bu1cQ98cCB5Pc6VU6JW9jieKY4UXINgNiR7aCYJTUmo9PrG7BoY4XCGZXEG/SIA2ZBEnkZSJ9vxJFg0KrBYi9PkEzrwxLgmpCaB4yELvR9IIv47GsILQ1dC7u2L4KL0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784779126; c=relaxed/simple; bh=xORt1GoXQpn7JdpIiI6B5EvN4bREUFn1dFgcTpmQStA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nIyFK0p3S5Ot2zUSLcj6XlmAh198tgiAuvcJtKNiD8IXtKU5Ub4id9cz2eJNGk5U1PLq0T3cK7+pUbu5xO2m7nmS2iVpLM3eDhTu/96lcYLokhw/tSh0I0U7vEFdPVE/OvdfNuZzYUbP6UFeJWSgx9bFre65ckZAbYuxa/TPD4g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Y29t5kJU; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Y29t5kJU" X-UUID: c2789304864a11f18dc8c9802ae25ab1-20260723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=y+cUuVqLUnQQTcUYJalAo2eqKUUDtOgA4uSawG8klWY=; b=Y29t5kJUGP+jN2c4sf+elnJUP0Th5VkSlmTFgHRCmSzgb0S88ooat6g4y06snojfeIHn1mMLuJ4cRD3RGsKcoFl7XgpU1Zu/weQaFc5y6i/Thn5drzBD3U8digGLoYshxfiB4/ptYwJlO3Xrq/3MOL3VZOp7DxwyhRHtbJiFTNw=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.18,REQID:acaf23bc-a421-4115-a085-8de01024660e,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:8a735a6,CLOUDID:1576cf5f-762a-4584-baab-4eebe609beea,B ulkID:nil,BulkQuantity:0,SF:81|82|102|136|836|865|888|898,TC:-5,Content:0| 15|50|99,EDM:-3|-100,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL :0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: c2789304864a11f18dc8c9802ae25ab1-20260723 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 92965970; Thu, 23 Jul 2026 11:58:27 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Thu, 23 Jul 2026 11:58:26 +0800 Received: from mtksitap99.mediatek.inc (10.233.130.16) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Thu, 23 Jul 2026 11:58:26 +0800 From: Justin Yeh To: Sean Wang , Linus Walleij , Matthias Brugger , AngeloGioacchino Del Regno CC: , , , , , Justin Yeh Subject: [PATCH v7 5/5] pinctrl: mediatek: enable module build support for all SoC drivers Date: Thu, 23 Jul 2026 11:58:16 +0800 Message-ID: <20260723035823.2041832-6-justin.yeh@mediatek.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20260723035823.2041832-1-justin.yeh@mediatek.com> References: <20260723035823.2041832-1-justin.yeh@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Convert the Kconfig option of every MediaTek pinctrl SoC driver from bool to tristate and add MODULE_DESCRIPTION()/MODULE_LICENSE() so that they can be built as loadable kernel modules. This is required for Android GKI + vendor_dlkm deployments, where vendor-specific drivers must be kept separate from the GKI vmlinux and loaded as modules from the vendor partition. Signed-off-by: Justin Yeh Reviewed-by: AngeloGioacchino Del Regno --- drivers/pinctrl/mediatek/Kconfig | 64 +++++++++++------------ drivers/pinctrl/mediatek/pinctrl-mt2701.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt2712.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt6397.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt6795.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt6797.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt6878.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt6893.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt7620.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt7621.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt7622.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt7623.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt7629.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt7981.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt7986.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt7988.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt8127.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt8135.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt8167.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8173.c | 3 ++ drivers/pinctrl/mediatek/pinctrl-mt8183.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt8186.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt8188.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8189.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8192.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8195.c | 4 ++ drivers/pinctrl/mediatek/pinctrl-mt8196.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8365.c | 2 + drivers/pinctrl/mediatek/pinctrl-mt8516.c | 2 + drivers/pinctrl/mediatek/pinctrl-rt2880.c | 2 + drivers/pinctrl/mediatek/pinctrl-rt305x.c | 2 + drivers/pinctrl/mediatek/pinctrl-rt3883.c | 2 + 33 files changed, 117 insertions(+), 32 deletions(-) diff --git a/drivers/pinctrl/mediatek/Kconfig b/drivers/pinctrl/mediatek/Kc= onfig index 864e7ffc6044..611ca57ecefa 100644 --- a/drivers/pinctrl/mediatek/Kconfig +++ b/drivers/pinctrl/mediatek/Kconfig @@ -48,42 +48,42 @@ config PINCTRL_MTK_PARIS =20 # For MIPS SoCs config PINCTRL_MT7620 - bool "MediaTek MT7620 pin control" + tristate "MediaTek MT7620 pin control" depends on SOC_MT7620 || COMPILE_TEST depends on RALINK default SOC_MT7620 select PINCTRL_MTK_MTMIPS =20 config PINCTRL_MT7621 - bool "MediaTek MT7621 pin control" + tristate "MediaTek MT7621 pin control" depends on SOC_MT7621 || COMPILE_TEST depends on RALINK default SOC_MT7621 select PINCTRL_MTK_MTMIPS =20 config PINCTRL_MT76X8 - bool "MediaTek MT76X8 pin control" + tristate "MediaTek MT76X8 pin control" depends on SOC_MT7620 || COMPILE_TEST depends on RALINK default SOC_MT7620 select PINCTRL_MTK_MTMIPS =20 config PINCTRL_RT2880 - bool "Ralink RT2880 pin control" + tristate "Ralink RT2880 pin control" depends on SOC_RT288X || COMPILE_TEST depends on RALINK default SOC_RT288X select PINCTRL_MTK_MTMIPS =20 config PINCTRL_RT305X - bool "Ralink RT305X pin control" + tristate "Ralink RT305X pin control" depends on SOC_RT305X || COMPILE_TEST depends on RALINK default SOC_RT305X select PINCTRL_MTK_MTMIPS =20 config PINCTRL_RT3883 - bool "Ralink RT3883 pin control" + tristate "Ralink RT3883 pin control" depends on SOC_RT3883 || COMPILE_TEST depends on RALINK default SOC_RT3883 @@ -91,35 +91,35 @@ config PINCTRL_RT3883 =20 # For ARMv7 SoCs config PINCTRL_MT2701 - bool "MediaTek MT2701 pin control" + tristate "MediaTek MT2701 pin control" depends on MACH_MT7623 || MACH_MT2701 || COMPILE_TEST depends on OF default MACH_MT2701 select PINCTRL_MTK =20 config PINCTRL_MT7623 - bool "MediaTek MT7623 pin control with generic binding" + tristate "MediaTek MT7623 pin control with generic binding" depends on MACH_MT7623 || COMPILE_TEST depends on OF default MACH_MT7623 select PINCTRL_MTK_MOORE =20 config PINCTRL_MT7629 - bool "MediaTek MT7629 pin control" + tristate "MediaTek MT7629 pin control" depends on MACH_MT7629 || COMPILE_TEST depends on OF default MACH_MT7629 select PINCTRL_MTK_MOORE =20 config PINCTRL_MT8135 - bool "MediaTek MT8135 pin control" + tristate "MediaTek MT8135 pin control" depends on MACH_MT8135 || COMPILE_TEST depends on OF default MACH_MT8135 select PINCTRL_MTK =20 config PINCTRL_MT8127 - bool "MediaTek MT8127 pin control" + tristate "MediaTek MT8127 pin control" depends on MACH_MT8127 || COMPILE_TEST depends on OF default MACH_MT8127 @@ -127,7 +127,7 @@ config PINCTRL_MT8127 =20 # For ARMv8 SoCs config PINCTRL_MT2712 - bool "MediaTek MT2712 pin control" + tristate "MediaTek MT2712 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -153,21 +153,21 @@ config PINCTRL_MT6779 map specific eint which doesn't have real gpio pin. =20 config PINCTRL_MT6795 - bool "MediaTek MT6795 pin control" + tristate "MediaTek MT6795 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT6797 - bool "MediaTek MT6797 pin control" + tristate "MediaTek MT6797 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT6878 - bool "MediaTek MT6878 pin control" + tristate "MediaTek MT6878 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -177,7 +177,7 @@ config PINCTRL_MT6878 on the MediaTek MT6878 SoC. =20 config PINCTRL_MT6893 - bool "MediaTek Dimensity MT6893 pin control" + tristate "MediaTek Dimensity MT6893 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -187,63 +187,63 @@ config PINCTRL_MT6893 on the MediaTek Dimensity 1200 MT6893 Smartphone SoC. =20 config PINCTRL_MT7622 - bool "MediaTek MT7622 pin control" + tristate "MediaTek MT7622 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE =20 config PINCTRL_MT7981 - bool "MediaTek MT7981 pin control" + tristate "MediaTek MT7981 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE =20 config PINCTRL_MT7986 - bool "MediaTek MT7986 pin control" + tristate "MediaTek MT7986 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE =20 config PINCTRL_MT7988 - bool "Mediatek MT7988 pin control" + tristate "Mediatek MT7988 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_MOORE =20 config PINCTRL_MT8167 - bool "MediaTek MT8167 pin control" + tristate "MediaTek MT8167 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK =20 config PINCTRL_MT8173 - bool "MediaTek MT8173 pin control" + tristate "MediaTek MT8173 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK =20 config PINCTRL_MT8183 - bool "MediaTek MT8183 pin control" + tristate "MediaTek MT8183 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT8186 - bool "MediaTek MT8186 pin control" + tristate "MediaTek MT8186 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT8188 - bool "MediaTek MT8188 pin control" + tristate "MediaTek MT8188 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -255,7 +255,7 @@ config PINCTRL_MT8188 map specific eint which doesn't have real gpio pin. =20 config PINCTRL_MT8189 - bool "MediaTek MT8189 pin control" + tristate "MediaTek MT8189 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -267,21 +267,21 @@ config PINCTRL_MT8189 map specific eint which doesn't have real gpio pin. =20 config PINCTRL_MT8192 - bool "MediaTek MT8192 pin control" + tristate "MediaTek MT8192 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT8195 - bool "MediaTek MT8195 pin control" + tristate "MediaTek MT8195 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK_PARIS =20 config PINCTRL_MT8196 - bool "MediaTek MT8196 pin control" + tristate "MediaTek MT8196 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -293,14 +293,14 @@ config PINCTRL_MT8196 map specific eint which doesn't have real gpio pin. =20 config PINCTRL_MT8365 - bool "MediaTek MT8365 pin control" + tristate "MediaTek MT8365 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK select PINCTRL_MTK =20 config PINCTRL_MT8516 - bool "MediaTek MT8516 pin control" + tristate "MediaTek MT8516 pin control" depends on OF depends on ARM64 || COMPILE_TEST default ARM64 && ARCH_MEDIATEK @@ -308,7 +308,7 @@ config PINCTRL_MT8516 =20 # For PMIC config PINCTRL_MT6397 - bool "MediaTek MT6397 pin control" + tristate "MediaTek MT6397 pin control" depends on MFD_MT6397 || COMPILE_TEST depends on OF default MFD_MT6397 diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2701.c b/drivers/pinctrl/me= diatek/pinctrl-mt2701.c index d262f810e40b..9e04f5b7cbba 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c @@ -543,4 +543,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT2701 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt2712.c b/drivers/pinctrl/me= diatek/pinctrl-mt2712.c index aa8f9650c157..c7df168c314d 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c @@ -592,4 +592,6 @@ static int __init mtk_pinctrl_init(void) =20 arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT2712 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6397.c b/drivers/pinctrl/me= diatek/pinctrl-mt6397.c index be691edf3e65..13cee2a209c2 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6397.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6397.c @@ -49,6 +49,7 @@ static const struct of_device_id mt6397_pctrl_match[] =3D= { { .compatible =3D "mediatek,mt6397-pinctrl", }, { } }; +MODULE_DEVICE_TABLE(of, mt6397_pctrl_match); =20 static struct platform_driver mtk_pinctrl_driver =3D { .probe =3D mt6397_pinctrl_probe, @@ -60,4 +61,6 @@ static struct platform_driver mtk_pinctrl_driver =3D { =20 builtin_platform_driver(mtk_pinctrl_driver); =20 +MODULE_DESCRIPTION("MediaTek MT6397 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6795.c b/drivers/pinctrl/me= diatek/pinctrl-mt6795.c index ee3ae3d2fa7e..82df5cafc3d3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6795.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6795.c @@ -607,6 +607,7 @@ static const struct of_device_id mt6795_pctrl_match[] = =3D { { .compatible =3D "mediatek,mt6795-pinctrl", .data =3D &mt6795_data }, { } }; +MODULE_DEVICE_TABLE(of, mt6795_pctrl_match); =20 static struct platform_driver mt6795_pinctrl_driver =3D { .driver =3D { @@ -622,3 +623,6 @@ static int __init mtk_pinctrl_init(void) return platform_driver_register(&mt6795_pinctrl_driver); } arch_initcall(mtk_pinctrl_init); + +MODULE_DESCRIPTION("MediaTek MT6795 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6797.c b/drivers/pinctrl/me= diatek/pinctrl-mt6797.c index 53f240491259..6d4a5b16035f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6797.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6797.c @@ -61,6 +61,7 @@ static const struct of_device_id mt6797_pinctrl_of_match[= ] =3D { { .compatible =3D "mediatek,mt6797-pinctrl", .data =3D &mt6797_data }, { } }; +MODULE_DEVICE_TABLE(of, mt6797_pinctrl_of_match); =20 static struct platform_driver mt6797_pinctrl_driver =3D { .driver =3D { @@ -75,3 +76,6 @@ static int __init mt6797_pinctrl_init(void) return platform_driver_register(&mt6797_pinctrl_driver); } arch_initcall(mt6797_pinctrl_init); + +MODULE_DESCRIPTION("MediaTek MT6797 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6878.c b/drivers/pinctrl/me= diatek/pinctrl-mt6878.c index b59ae089128a..7b5a15f4aba1 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6878.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6878.c @@ -1459,6 +1459,7 @@ static const struct of_device_id mt6878_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt6878-pinctrl", .data =3D &mt6878_data }, { } }; +MODULE_DEVICE_TABLE(of, mt6878_pinctrl_of_match); =20 static struct platform_driver mt6878_pinctrl_driver =3D { .driver =3D { @@ -1476,3 +1477,4 @@ static int __init mt6878_pinctrl_init(void) arch_initcall(mt6878_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT6878 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6893.c b/drivers/pinctrl/me= diatek/pinctrl-mt6893.c index 468ce0109b07..5ff1e7722889 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt6893.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt6893.c @@ -859,6 +859,7 @@ static const struct of_device_id mt6893_pinctrl_of_matc= h[] =3D { { .compatible =3D "mediatek,mt6893-pinctrl", .data =3D &mt6893_data }, { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, mt6893_pinctrl_of_match); =20 static struct platform_driver mt6893_pinctrl_driver =3D { .driver =3D { @@ -877,3 +878,4 @@ static int __init mt6893_pinctrl_init(void) arch_initcall(mt6893_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT6893 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7620.c b/drivers/pinctrl/me= diatek/pinctrl-mt7620.c index e5d368530247..7bfa6a8a3ce3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7620.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7620.c @@ -136,4 +136,6 @@ static int __init mt7620_pinctrl_init(void) } core_initcall_sync(mt7620_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7620 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7621.c b/drivers/pinctrl/me= diatek/pinctrl-mt7621.c index b337936e5c18..5a893d8505a3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7621.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7621.c @@ -116,4 +116,6 @@ static int __init mt7621_pinctrl_init(void) } core_initcall_sync(mt7621_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7621 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/me= diatek/pinctrl-mt7622.c index 38830f6dc5fd..36a9a9f302ca 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -874,6 +874,7 @@ static const struct of_device_id mt7622_pinctrl_of_matc= h[] =3D { { .compatible =3D "mediatek,mt7622-pinctrl", }, { } }; +MODULE_DEVICE_TABLE(of, mt7622_pinctrl_of_match); =20 static int mt7622_pinctrl_probe(struct platform_device *pdev) { @@ -894,4 +895,6 @@ static int __init mt7622_pinctrl_init(void) } arch_initcall(mt7622_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7622 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/me= diatek/pinctrl-mt7623.c index a36124036daa..26fa489db13c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c @@ -1413,6 +1413,7 @@ static const struct of_device_id mt7623_pctrl_match[]= =3D { { .compatible =3D "mediatek,mt7623-moore-pinctrl", }, {} }; +MODULE_DEVICE_TABLE(of, mt7623_pctrl_match); =20 static int mt7623_pinctrl_probe(struct platform_device *pdev) { @@ -1441,4 +1442,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7623 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7629.c b/drivers/pinctrl/me= diatek/pinctrl-mt7629.c index 57868f73fce2..385d66b8e3fb 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c @@ -430,6 +430,7 @@ static const struct of_device_id mt7629_pinctrl_of_matc= h[] =3D { { .compatible =3D "mediatek,mt7629-pinctrl", }, {} }; +MODULE_DEVICE_TABLE(of, mt7629_pinctrl_of_match); =20 static int mt7629_pinctrl_probe(struct platform_device *pdev) { @@ -450,4 +451,6 @@ static int __init mt7629_pinctrl_init(void) } arch_initcall(mt7629_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7629 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c b/drivers/pinctrl/me= diatek/pinctrl-mt76x8.c index 9c064bf94935..336d4e36e884 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c @@ -248,4 +248,6 @@ static int __init mt76x8_pinctrl_init(void) } core_initcall_sync(mt76x8_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT76X8 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/me= diatek/pinctrl-mt7981.c index 69b16b01b4b3..2325cc8b9345 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -1039,6 +1039,7 @@ static const struct of_device_id mt7981_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt7981-pinctrl", }, {} }; +MODULE_DEVICE_TABLE(of, mt7981_pinctrl_of_match); =20 static int mt7981_pinctrl_probe(struct platform_device *pdev) { @@ -1059,4 +1060,6 @@ static int __init mt7981_pinctrl_init(void) } arch_initcall(mt7981_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7981 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/me= diatek/pinctrl-mt7986.c index d7c7591ed231..6cbf90879eb5 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -965,11 +965,13 @@ static const struct of_device_id mt7986a_pinctrl_of_m= atch[] =3D { {.compatible =3D "mediatek,mt7986a-pinctrl",}, {} }; +MODULE_DEVICE_TABLE(of, mt7986a_pinctrl_of_match); =20 static const struct of_device_id mt7986b_pinctrl_of_match[] =3D { {.compatible =3D "mediatek,mt7986b-pinctrl",}, {} }; +MODULE_DEVICE_TABLE(of, mt7986b_pinctrl_of_match); =20 static int mt7986a_pinctrl_probe(struct platform_device *pdev) { @@ -1009,4 +1011,6 @@ static int __init mt7986_pinctrl_init(void) } arch_initcall(mt7986_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7986 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7988.c b/drivers/pinctrl/me= diatek/pinctrl-mt7988.c index d90456c55c0b..14b5f4b695a2 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7988.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7988.c @@ -1525,6 +1525,7 @@ static const struct of_device_id mt7988_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt7988-pinctrl" }, {} }; +MODULE_DEVICE_TABLE(of, mt7988_pinctrl_of_match); =20 static int mt7988_pinctrl_probe(struct platform_device *pdev) { @@ -1545,4 +1546,6 @@ static int __init mt7988_pinctrl_init(void) } arch_initcall(mt7988_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT7988 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8127.c b/drivers/pinctrl/me= diatek/pinctrl-mt8127.c index 34d840c1cc6a..296eed43c10a 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c @@ -293,6 +293,7 @@ static const struct of_device_id mt8127_pctrl_match[] = =3D { { .compatible =3D "mediatek,mt8127-pinctrl", .data =3D &mt8127_pinctrl_da= ta }, { } }; +MODULE_DEVICE_TABLE(of, mt8127_pctrl_match); =20 static struct platform_driver mtk_pinctrl_driver =3D { .probe =3D mtk_pctrl_common_probe, @@ -308,4 +309,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT8127 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8135.c b/drivers/pinctrl/me= diatek/pinctrl-mt8135.c index 635048f9d1f2..713b362832db 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c @@ -322,6 +322,7 @@ static const struct of_device_id mt8135_pctrl_match[] = =3D { { .compatible =3D "mediatek,mt8135-pinctrl", .data =3D &mt8135_pinctrl_da= ta }, { } }; +MODULE_DEVICE_TABLE(of, mt8135_pctrl_match); =20 static struct platform_driver mtk_pinctrl_driver =3D { .probe =3D mtk_pctrl_common_probe, @@ -337,4 +338,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT8135 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8167.c b/drivers/pinctrl/me= diatek/pinctrl-mt8167.c index 3bd8288795e4..cc45b0954009 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c @@ -344,4 +344,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT8167 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/me= diatek/pinctrl-mt8173.c index 20dd324eb152..fbb92a1b9d2c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c @@ -341,6 +341,7 @@ static const struct of_device_id mt8173_pctrl_match[] = =3D { }, { } }; +MODULE_DEVICE_TABLE(of, mt8173_pctrl_match); =20 static struct platform_driver mtk_pinctrl_driver =3D { .probe =3D mt8173_pinctrl_probe, @@ -357,4 +358,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT8173 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8183.c b/drivers/pinctrl/me= diatek/pinctrl-mt8183.c index 93e482c6b5fd..edc68f998d8c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8183.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c @@ -571,6 +571,7 @@ static const struct of_device_id mt8183_pinctrl_of_matc= h[] =3D { { .compatible =3D "mediatek,mt8183-pinctrl", .data =3D &mt8183_data }, { } }; +MODULE_DEVICE_TABLE(of, mt8183_pinctrl_of_match); =20 static struct platform_driver mt8183_pinctrl_driver =3D { .driver =3D { @@ -586,3 +587,6 @@ static int __init mt8183_pinctrl_init(void) return platform_driver_register(&mt8183_pinctrl_driver); } arch_initcall(mt8183_pinctrl_init); + +MODULE_DESCRIPTION("MediaTek MT8183 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8186.c b/drivers/pinctrl/me= diatek/pinctrl-mt8186.c index dd19e74856a9..d4817838c531 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8186.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8186.c @@ -1249,6 +1249,7 @@ static const struct of_device_id mt8186_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt8186-pinctrl", .data =3D &mt8186_data }, { } }; +MODULE_DEVICE_TABLE(of, mt8186_pinctrl_of_match); =20 static struct platform_driver mt8186_pinctrl_driver =3D { .driver =3D { @@ -1265,3 +1266,6 @@ static int __init mt8186_pinctrl_init(void) } =20 arch_initcall(mt8186_pinctrl_init); + +MODULE_DESCRIPTION("MediaTek MT8186 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8188.c b/drivers/pinctrl/me= diatek/pinctrl-mt8188.c index 3975e99d9cf4..35dde16ab449 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8188.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8188.c @@ -1653,6 +1653,7 @@ static const struct of_device_id mt8188_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt8188-pinctrl", .data =3D &mt8188_data }, { } }; +MODULE_DEVICE_TABLE(of, mt8188_pinctrl_of_match); =20 static struct platform_driver mt8188_pinctrl_driver =3D { .driver =3D { @@ -1671,3 +1672,4 @@ static int __init mt8188_pinctrl_init(void) arch_initcall(mt8188_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8188 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8189.c b/drivers/pinctrl/me= diatek/pinctrl-mt8189.c index cd4cdff309a1..1b1f9b4b6ad1 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8189.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8189.c @@ -1679,6 +1679,7 @@ static const struct of_device_id mt8189_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt8189-pinctrl", .data =3D &mt8189_data }, { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, mt8189_pinctrl_of_match); =20 static struct platform_driver mt8189_pinctrl_driver =3D { .driver =3D { @@ -1696,3 +1697,4 @@ static int __init mt8189_pinctrl_init(void) arch_initcall(mt8189_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8189 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8192.c b/drivers/pinctrl/me= diatek/pinctrl-mt8192.c index 3f8a9dbcb704..b2ae3a62418d 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c @@ -1414,6 +1414,7 @@ static const struct of_device_id mt8192_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt8192-pinctrl", .data =3D &mt8192_data }, { } }; +MODULE_DEVICE_TABLE(of, mt8192_pinctrl_of_match); =20 static struct platform_driver mt8192_pinctrl_driver =3D { .driver =3D { @@ -1431,3 +1432,4 @@ static int __init mt8192_pinctrl_init(void) arch_initcall(mt8192_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8192 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/me= diatek/pinctrl-mt8195.c index 83345c52b2fa..3a9912c0c095 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c @@ -963,6 +963,7 @@ static const struct of_device_id mt8195_pinctrl_of_matc= h[] =3D { { .compatible =3D "mediatek,mt8195-pinctrl", .data =3D &mt8195_data }, { } }; +MODULE_DEVICE_TABLE(of, mt8195_pinctrl_of_match); =20 static struct platform_driver mt8195_pinctrl_driver =3D { .driver =3D { @@ -978,3 +979,6 @@ static int __init mt8195_pinctrl_init(void) return platform_driver_register(&mt8195_pinctrl_driver); } arch_initcall(mt8195_pinctrl_init); + +MODULE_DESCRIPTION("MediaTek MT8195 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8196.c b/drivers/pinctrl/me= diatek/pinctrl-mt8196.c index dec957c1724b..2e36bf3c45eb 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8196.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8196.c @@ -1839,6 +1839,7 @@ static const struct of_device_id mt8196_pinctrl_of_ma= tch[] =3D { { .compatible =3D "mediatek,mt8196-pinctrl", .data =3D &mt8196_data }, { /* sentinel */ } }; +MODULE_DEVICE_TABLE(of, mt8196_pinctrl_of_match); =20 static struct platform_driver mt8196_pinctrl_driver =3D { .driver =3D { @@ -1856,3 +1857,4 @@ static int __init mt8196_pinctrl_init(void) arch_initcall(mt8196_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8196 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8365.c b/drivers/pinctrl/me= diatek/pinctrl-mt8365.c index 73849ae569c9..564227f7ca2d 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c @@ -477,6 +477,7 @@ static const struct of_device_id mt8365_pctrl_match[] = =3D { { .compatible =3D "mediatek,mt8365-pinctrl", .data =3D &mt8365_pinctrl_da= ta }, {} }; +MODULE_DEVICE_TABLE(of, mt8365_pctrl_match); =20 static struct platform_driver mtk_pinctrl_driver =3D { .probe =3D mtk_pctrl_common_probe, @@ -494,5 +495,6 @@ static int __init mtk_pinctrl_init(void) arch_initcall(mtk_pinctrl_init); =20 MODULE_DESCRIPTION("MediaTek MT8365 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Zhiyong Tao "); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8516.c b/drivers/pinctrl/me= diatek/pinctrl-mt8516.c index 62084d0cc4c9..d4f0a0bc5438 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c @@ -344,4 +344,6 @@ static int __init mtk_pinctrl_init(void) } arch_initcall(mtk_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek MT8516 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt2880.c b/drivers/pinctrl/me= diatek/pinctrl-rt2880.c index a9c4acdc6766..e7099325c5ef 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt2880.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt2880.c @@ -60,4 +60,6 @@ static int __init rt2880_pinctrl_init(void) } core_initcall_sync(rt2880_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek RT2880 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt305x.c b/drivers/pinctrl/me= diatek/pinctrl-rt305x.c index 93788ec49ed0..fa6407e86f79 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt305x.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt305x.c @@ -139,4 +139,6 @@ static int __init rt305x_pinctrl_init(void) } core_initcall_sync(rt305x_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek RT305X Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); diff --git a/drivers/pinctrl/mediatek/pinctrl-rt3883.c b/drivers/pinctrl/me= diatek/pinctrl-rt3883.c index afe705a0ddf6..838bf811cd0c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-rt3883.c +++ b/drivers/pinctrl/mediatek/pinctrl-rt3883.c @@ -107,4 +107,6 @@ static int __init rt3883_pinctrl_init(void) } core_initcall_sync(rt3883_pinctrl_init); =20 +MODULE_DESCRIPTION("MediaTek RT3883 Pinctrl Driver"); +MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("MTK_PINCTRL"); --=20 2.45.2